33037 lines
1.2 MiB
33037 lines
1.2 MiB
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eCompass.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .isr_vector 00000194 08000000 08000000 00010000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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1 .text 0000e680 080001a0 080001a0 000101a0 2**4
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 00000438 0800e820 0800e820 0001e820 2**3
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .ARM.extab 00000000 0800ec58 0800ec58 000201fc 2**0
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CONTENTS
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4 .ARM 00000008 0800ec58 0800ec58 0001ec58 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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5 .preinit_array 00000000 0800ec60 0800ec60 000201fc 2**0
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CONTENTS, ALLOC, LOAD, DATA
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6 .init_array 00000004 0800ec60 0800ec60 0001ec60 2**2
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CONTENTS, ALLOC, LOAD, DATA
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7 .fini_array 00000004 0800ec64 0800ec64 0001ec64 2**2
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CONTENTS, ALLOC, LOAD, DATA
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8 .data 000001fc 20000000 0800ec68 00020000 2**2
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CONTENTS, ALLOC, LOAD, DATA
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9 .bss 000008b8 200001fc 0800ee64 000201fc 2**2
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ALLOC
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10 ._user_heap_stack 00000604 20000ab4 0800ee64 00020ab4 2**0
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ALLOC
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11 .ARM.attributes 00000030 00000000 00000000 000201fc 2**0
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CONTENTS, READONLY
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12 .debug_info 0001d66d 00000000 00000000 0002022c 2**0
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CONTENTS, READONLY, DEBUGGING
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13 .debug_abbrev 00004048 00000000 00000000 0003d899 2**0
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CONTENTS, READONLY, DEBUGGING
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14 .debug_aranges 00001458 00000000 00000000 000418e8 2**3
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CONTENTS, READONLY, DEBUGGING
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15 .debug_ranges 000012a8 00000000 00000000 00042d40 2**3
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CONTENTS, READONLY, DEBUGGING
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16 .debug_macro 0001ba14 00000000 00000000 00043fe8 2**0
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CONTENTS, READONLY, DEBUGGING
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17 .debug_line 000147bf 00000000 00000000 0005f9fc 2**0
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CONTENTS, READONLY, DEBUGGING
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18 .debug_str 00092511 00000000 00000000 000741bb 2**0
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CONTENTS, READONLY, DEBUGGING
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19 .comment 0000007b 00000000 00000000 001066cc 2**0
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CONTENTS, READONLY
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20 .debug_frame 000066f8 00000000 00000000 00106748 2**2
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CONTENTS, READONLY, DEBUGGING
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Disassembly of section .text:
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080001a0 <__do_global_dtors_aux>:
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80001a0: b510 push {r4, lr}
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80001a2: 4c05 ldr r4, [pc, #20] ; (80001b8 <__do_global_dtors_aux+0x18>)
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80001a4: 7823 ldrb r3, [r4, #0]
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80001a6: b933 cbnz r3, 80001b6 <__do_global_dtors_aux+0x16>
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80001a8: 4b04 ldr r3, [pc, #16] ; (80001bc <__do_global_dtors_aux+0x1c>)
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80001aa: b113 cbz r3, 80001b2 <__do_global_dtors_aux+0x12>
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80001ac: 4804 ldr r0, [pc, #16] ; (80001c0 <__do_global_dtors_aux+0x20>)
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80001ae: f3af 8000 nop.w
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80001b2: 2301 movs r3, #1
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80001b4: 7023 strb r3, [r4, #0]
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80001b6: bd10 pop {r4, pc}
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80001b8: 200001fc .word 0x200001fc
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80001bc: 00000000 .word 0x00000000
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80001c0: 0800e808 .word 0x0800e808
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080001c4 <frame_dummy>:
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80001c4: b508 push {r3, lr}
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80001c6: 4b03 ldr r3, [pc, #12] ; (80001d4 <frame_dummy+0x10>)
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80001c8: b11b cbz r3, 80001d2 <frame_dummy+0xe>
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80001ca: 4903 ldr r1, [pc, #12] ; (80001d8 <frame_dummy+0x14>)
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80001cc: 4803 ldr r0, [pc, #12] ; (80001dc <frame_dummy+0x18>)
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80001ce: f3af 8000 nop.w
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80001d2: bd08 pop {r3, pc}
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80001d4: 00000000 .word 0x00000000
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80001d8: 20000200 .word 0x20000200
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80001dc: 0800e808 .word 0x0800e808
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080001e0 <strlen>:
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80001e0: 4603 mov r3, r0
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80001e2: f813 2b01 ldrb.w r2, [r3], #1
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80001e6: 2a00 cmp r2, #0
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80001e8: d1fb bne.n 80001e2 <strlen+0x2>
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80001ea: 1a18 subs r0, r3, r0
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80001ec: 3801 subs r0, #1
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80001ee: 4770 bx lr
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080001f0 <memchr>:
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80001f0: f001 01ff and.w r1, r1, #255 ; 0xff
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80001f4: 2a10 cmp r2, #16
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80001f6: db2b blt.n 8000250 <memchr+0x60>
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80001f8: f010 0f07 tst.w r0, #7
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80001fc: d008 beq.n 8000210 <memchr+0x20>
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80001fe: f810 3b01 ldrb.w r3, [r0], #1
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8000202: 3a01 subs r2, #1
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8000204: 428b cmp r3, r1
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8000206: d02d beq.n 8000264 <memchr+0x74>
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8000208: f010 0f07 tst.w r0, #7
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800020c: b342 cbz r2, 8000260 <memchr+0x70>
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800020e: d1f6 bne.n 80001fe <memchr+0xe>
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8000210: b4f0 push {r4, r5, r6, r7}
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8000212: ea41 2101 orr.w r1, r1, r1, lsl #8
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8000216: ea41 4101 orr.w r1, r1, r1, lsl #16
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800021a: f022 0407 bic.w r4, r2, #7
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800021e: f07f 0700 mvns.w r7, #0
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8000222: 2300 movs r3, #0
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8000224: e8f0 5602 ldrd r5, r6, [r0], #8
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8000228: 3c08 subs r4, #8
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800022a: ea85 0501 eor.w r5, r5, r1
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800022e: ea86 0601 eor.w r6, r6, r1
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8000232: fa85 f547 uadd8 r5, r5, r7
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8000236: faa3 f587 sel r5, r3, r7
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800023a: fa86 f647 uadd8 r6, r6, r7
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800023e: faa5 f687 sel r6, r5, r7
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8000242: b98e cbnz r6, 8000268 <memchr+0x78>
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8000244: d1ee bne.n 8000224 <memchr+0x34>
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8000246: bcf0 pop {r4, r5, r6, r7}
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8000248: f001 01ff and.w r1, r1, #255 ; 0xff
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800024c: f002 0207 and.w r2, r2, #7
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8000250: b132 cbz r2, 8000260 <memchr+0x70>
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8000252: f810 3b01 ldrb.w r3, [r0], #1
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8000256: 3a01 subs r2, #1
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8000258: ea83 0301 eor.w r3, r3, r1
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800025c: b113 cbz r3, 8000264 <memchr+0x74>
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800025e: d1f8 bne.n 8000252 <memchr+0x62>
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8000260: 2000 movs r0, #0
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8000262: 4770 bx lr
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8000264: 3801 subs r0, #1
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8000266: 4770 bx lr
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8000268: 2d00 cmp r5, #0
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800026a: bf06 itte eq
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800026c: 4635 moveq r5, r6
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800026e: 3803 subeq r0, #3
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8000270: 3807 subne r0, #7
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8000272: f015 0f01 tst.w r5, #1
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8000276: d107 bne.n 8000288 <memchr+0x98>
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8000278: 3001 adds r0, #1
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800027a: f415 7f80 tst.w r5, #256 ; 0x100
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800027e: bf02 ittt eq
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8000280: 3001 addeq r0, #1
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8000282: f415 3fc0 tsteq.w r5, #98304 ; 0x18000
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8000286: 3001 addeq r0, #1
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8000288: bcf0 pop {r4, r5, r6, r7}
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800028a: 3801 subs r0, #1
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800028c: 4770 bx lr
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800028e: bf00 nop
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08000290 <__aeabi_drsub>:
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8000290: f081 4100 eor.w r1, r1, #2147483648 ; 0x80000000
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8000294: e002 b.n 800029c <__adddf3>
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8000296: bf00 nop
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08000298 <__aeabi_dsub>:
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8000298: f083 4300 eor.w r3, r3, #2147483648 ; 0x80000000
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0800029c <__adddf3>:
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800029c: b530 push {r4, r5, lr}
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800029e: ea4f 0441 mov.w r4, r1, lsl #1
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80002a2: ea4f 0543 mov.w r5, r3, lsl #1
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80002a6: ea94 0f05 teq r4, r5
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80002aa: bf08 it eq
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80002ac: ea90 0f02 teqeq r0, r2
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80002b0: bf1f itttt ne
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80002b2: ea54 0c00 orrsne.w ip, r4, r0
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80002b6: ea55 0c02 orrsne.w ip, r5, r2
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80002ba: ea7f 5c64 mvnsne.w ip, r4, asr #21
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80002be: ea7f 5c65 mvnsne.w ip, r5, asr #21
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80002c2: f000 80e2 beq.w 800048a <__adddf3+0x1ee>
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80002c6: ea4f 5454 mov.w r4, r4, lsr #21
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80002ca: ebd4 5555 rsbs r5, r4, r5, lsr #21
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80002ce: bfb8 it lt
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80002d0: 426d neglt r5, r5
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80002d2: dd0c ble.n 80002ee <__adddf3+0x52>
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80002d4: 442c add r4, r5
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80002d6: ea80 0202 eor.w r2, r0, r2
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80002da: ea81 0303 eor.w r3, r1, r3
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80002de: ea82 0000 eor.w r0, r2, r0
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80002e2: ea83 0101 eor.w r1, r3, r1
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80002e6: ea80 0202 eor.w r2, r0, r2
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80002ea: ea81 0303 eor.w r3, r1, r3
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80002ee: 2d36 cmp r5, #54 ; 0x36
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80002f0: bf88 it hi
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80002f2: bd30 pophi {r4, r5, pc}
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80002f4: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
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80002f8: ea4f 3101 mov.w r1, r1, lsl #12
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80002fc: f44f 1c80 mov.w ip, #1048576 ; 0x100000
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8000300: ea4c 3111 orr.w r1, ip, r1, lsr #12
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8000304: d002 beq.n 800030c <__adddf3+0x70>
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8000306: 4240 negs r0, r0
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8000308: eb61 0141 sbc.w r1, r1, r1, lsl #1
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800030c: f013 4f00 tst.w r3, #2147483648 ; 0x80000000
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8000310: ea4f 3303 mov.w r3, r3, lsl #12
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8000314: ea4c 3313 orr.w r3, ip, r3, lsr #12
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8000318: d002 beq.n 8000320 <__adddf3+0x84>
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800031a: 4252 negs r2, r2
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800031c: eb63 0343 sbc.w r3, r3, r3, lsl #1
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8000320: ea94 0f05 teq r4, r5
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8000324: f000 80a7 beq.w 8000476 <__adddf3+0x1da>
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8000328: f1a4 0401 sub.w r4, r4, #1
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800032c: f1d5 0e20 rsbs lr, r5, #32
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8000330: db0d blt.n 800034e <__adddf3+0xb2>
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8000332: fa02 fc0e lsl.w ip, r2, lr
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8000336: fa22 f205 lsr.w r2, r2, r5
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800033a: 1880 adds r0, r0, r2
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800033c: f141 0100 adc.w r1, r1, #0
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8000340: fa03 f20e lsl.w r2, r3, lr
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8000344: 1880 adds r0, r0, r2
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8000346: fa43 f305 asr.w r3, r3, r5
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800034a: 4159 adcs r1, r3
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800034c: e00e b.n 800036c <__adddf3+0xd0>
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800034e: f1a5 0520 sub.w r5, r5, #32
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8000352: f10e 0e20 add.w lr, lr, #32
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8000356: 2a01 cmp r2, #1
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8000358: fa03 fc0e lsl.w ip, r3, lr
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800035c: bf28 it cs
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800035e: f04c 0c02 orrcs.w ip, ip, #2
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8000362: fa43 f305 asr.w r3, r3, r5
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8000366: 18c0 adds r0, r0, r3
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8000368: eb51 71e3 adcs.w r1, r1, r3, asr #31
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800036c: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
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8000370: d507 bpl.n 8000382 <__adddf3+0xe6>
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8000372: f04f 0e00 mov.w lr, #0
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8000376: f1dc 0c00 rsbs ip, ip, #0
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800037a: eb7e 0000 sbcs.w r0, lr, r0
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800037e: eb6e 0101 sbc.w r1, lr, r1
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8000382: f5b1 1f80 cmp.w r1, #1048576 ; 0x100000
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8000386: d31b bcc.n 80003c0 <__adddf3+0x124>
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8000388: f5b1 1f00 cmp.w r1, #2097152 ; 0x200000
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800038c: d30c bcc.n 80003a8 <__adddf3+0x10c>
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800038e: 0849 lsrs r1, r1, #1
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8000390: ea5f 0030 movs.w r0, r0, rrx
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8000394: ea4f 0c3c mov.w ip, ip, rrx
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8000398: f104 0401 add.w r4, r4, #1
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800039c: ea4f 5244 mov.w r2, r4, lsl #21
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80003a0: f512 0f80 cmn.w r2, #4194304 ; 0x400000
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80003a4: f080 809a bcs.w 80004dc <__adddf3+0x240>
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80003a8: f1bc 4f00 cmp.w ip, #2147483648 ; 0x80000000
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80003ac: bf08 it eq
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80003ae: ea5f 0c50 movseq.w ip, r0, lsr #1
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80003b2: f150 0000 adcs.w r0, r0, #0
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80003b6: eb41 5104 adc.w r1, r1, r4, lsl #20
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80003ba: ea41 0105 orr.w r1, r1, r5
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80003be: bd30 pop {r4, r5, pc}
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80003c0: ea5f 0c4c movs.w ip, ip, lsl #1
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80003c4: 4140 adcs r0, r0
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80003c6: eb41 0101 adc.w r1, r1, r1
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80003ca: f411 1f80 tst.w r1, #1048576 ; 0x100000
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80003ce: f1a4 0401 sub.w r4, r4, #1
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80003d2: d1e9 bne.n 80003a8 <__adddf3+0x10c>
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80003d4: f091 0f00 teq r1, #0
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80003d8: bf04 itt eq
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80003da: 4601 moveq r1, r0
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80003dc: 2000 moveq r0, #0
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80003de: fab1 f381 clz r3, r1
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80003e2: bf08 it eq
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80003e4: 3320 addeq r3, #32
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80003e6: f1a3 030b sub.w r3, r3, #11
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80003ea: f1b3 0220 subs.w r2, r3, #32
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80003ee: da0c bge.n 800040a <__adddf3+0x16e>
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80003f0: 320c adds r2, #12
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80003f2: dd08 ble.n 8000406 <__adddf3+0x16a>
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80003f4: f102 0c14 add.w ip, r2, #20
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80003f8: f1c2 020c rsb r2, r2, #12
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80003fc: fa01 f00c lsl.w r0, r1, ip
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8000400: fa21 f102 lsr.w r1, r1, r2
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8000404: e00c b.n 8000420 <__adddf3+0x184>
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8000406: f102 0214 add.w r2, r2, #20
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800040a: bfd8 it le
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800040c: f1c2 0c20 rsble ip, r2, #32
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8000410: fa01 f102 lsl.w r1, r1, r2
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8000414: fa20 fc0c lsr.w ip, r0, ip
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8000418: bfdc itt le
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800041a: ea41 010c orrle.w r1, r1, ip
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800041e: 4090 lslle r0, r2
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8000420: 1ae4 subs r4, r4, r3
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8000422: bfa2 ittt ge
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8000424: eb01 5104 addge.w r1, r1, r4, lsl #20
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8000428: 4329 orrge r1, r5
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800042a: bd30 popge {r4, r5, pc}
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800042c: ea6f 0404 mvn.w r4, r4
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8000430: 3c1f subs r4, #31
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8000432: da1c bge.n 800046e <__adddf3+0x1d2>
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8000434: 340c adds r4, #12
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8000436: dc0e bgt.n 8000456 <__adddf3+0x1ba>
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8000438: f104 0414 add.w r4, r4, #20
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800043c: f1c4 0220 rsb r2, r4, #32
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8000440: fa20 f004 lsr.w r0, r0, r4
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8000444: fa01 f302 lsl.w r3, r1, r2
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8000448: ea40 0003 orr.w r0, r0, r3
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800044c: fa21 f304 lsr.w r3, r1, r4
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8000450: ea45 0103 orr.w r1, r5, r3
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8000454: bd30 pop {r4, r5, pc}
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8000456: f1c4 040c rsb r4, r4, #12
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800045a: f1c4 0220 rsb r2, r4, #32
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800045e: fa20 f002 lsr.w r0, r0, r2
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8000462: fa01 f304 lsl.w r3, r1, r4
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8000466: ea40 0003 orr.w r0, r0, r3
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800046a: 4629 mov r1, r5
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800046c: bd30 pop {r4, r5, pc}
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800046e: fa21 f004 lsr.w r0, r1, r4
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8000472: 4629 mov r1, r5
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8000474: bd30 pop {r4, r5, pc}
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8000476: f094 0f00 teq r4, #0
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800047a: f483 1380 eor.w r3, r3, #1048576 ; 0x100000
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800047e: bf06 itte eq
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8000480: f481 1180 eoreq.w r1, r1, #1048576 ; 0x100000
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8000484: 3401 addeq r4, #1
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8000486: 3d01 subne r5, #1
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8000488: e74e b.n 8000328 <__adddf3+0x8c>
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800048a: ea7f 5c64 mvns.w ip, r4, asr #21
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800048e: bf18 it ne
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8000490: ea7f 5c65 mvnsne.w ip, r5, asr #21
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8000494: d029 beq.n 80004ea <__adddf3+0x24e>
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8000496: ea94 0f05 teq r4, r5
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800049a: bf08 it eq
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800049c: ea90 0f02 teqeq r0, r2
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80004a0: d005 beq.n 80004ae <__adddf3+0x212>
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80004a2: ea54 0c00 orrs.w ip, r4, r0
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80004a6: bf04 itt eq
|
|
80004a8: 4619 moveq r1, r3
|
|
80004aa: 4610 moveq r0, r2
|
|
80004ac: bd30 pop {r4, r5, pc}
|
|
80004ae: ea91 0f03 teq r1, r3
|
|
80004b2: bf1e ittt ne
|
|
80004b4: 2100 movne r1, #0
|
|
80004b6: 2000 movne r0, #0
|
|
80004b8: bd30 popne {r4, r5, pc}
|
|
80004ba: ea5f 5c54 movs.w ip, r4, lsr #21
|
|
80004be: d105 bne.n 80004cc <__adddf3+0x230>
|
|
80004c0: 0040 lsls r0, r0, #1
|
|
80004c2: 4149 adcs r1, r1
|
|
80004c4: bf28 it cs
|
|
80004c6: f041 4100 orrcs.w r1, r1, #2147483648 ; 0x80000000
|
|
80004ca: bd30 pop {r4, r5, pc}
|
|
80004cc: f514 0480 adds.w r4, r4, #4194304 ; 0x400000
|
|
80004d0: bf3c itt cc
|
|
80004d2: f501 1180 addcc.w r1, r1, #1048576 ; 0x100000
|
|
80004d6: bd30 popcc {r4, r5, pc}
|
|
80004d8: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
|
80004dc: f045 41fe orr.w r1, r5, #2130706432 ; 0x7f000000
|
|
80004e0: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
|
80004e4: f04f 0000 mov.w r0, #0
|
|
80004e8: bd30 pop {r4, r5, pc}
|
|
80004ea: ea7f 5c64 mvns.w ip, r4, asr #21
|
|
80004ee: bf1a itte ne
|
|
80004f0: 4619 movne r1, r3
|
|
80004f2: 4610 movne r0, r2
|
|
80004f4: ea7f 5c65 mvnseq.w ip, r5, asr #21
|
|
80004f8: bf1c itt ne
|
|
80004fa: 460b movne r3, r1
|
|
80004fc: 4602 movne r2, r0
|
|
80004fe: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
|
8000502: bf06 itte eq
|
|
8000504: ea52 3503 orrseq.w r5, r2, r3, lsl #12
|
|
8000508: ea91 0f03 teqeq r1, r3
|
|
800050c: f441 2100 orrne.w r1, r1, #524288 ; 0x80000
|
|
8000510: bd30 pop {r4, r5, pc}
|
|
8000512: bf00 nop
|
|
|
|
08000514 <__aeabi_ui2d>:
|
|
8000514: f090 0f00 teq r0, #0
|
|
8000518: bf04 itt eq
|
|
800051a: 2100 moveq r1, #0
|
|
800051c: 4770 bxeq lr
|
|
800051e: b530 push {r4, r5, lr}
|
|
8000520: f44f 6480 mov.w r4, #1024 ; 0x400
|
|
8000524: f104 0432 add.w r4, r4, #50 ; 0x32
|
|
8000528: f04f 0500 mov.w r5, #0
|
|
800052c: f04f 0100 mov.w r1, #0
|
|
8000530: e750 b.n 80003d4 <__adddf3+0x138>
|
|
8000532: bf00 nop
|
|
|
|
08000534 <__aeabi_i2d>:
|
|
8000534: f090 0f00 teq r0, #0
|
|
8000538: bf04 itt eq
|
|
800053a: 2100 moveq r1, #0
|
|
800053c: 4770 bxeq lr
|
|
800053e: b530 push {r4, r5, lr}
|
|
8000540: f44f 6480 mov.w r4, #1024 ; 0x400
|
|
8000544: f104 0432 add.w r4, r4, #50 ; 0x32
|
|
8000548: f010 4500 ands.w r5, r0, #2147483648 ; 0x80000000
|
|
800054c: bf48 it mi
|
|
800054e: 4240 negmi r0, r0
|
|
8000550: f04f 0100 mov.w r1, #0
|
|
8000554: e73e b.n 80003d4 <__adddf3+0x138>
|
|
8000556: bf00 nop
|
|
|
|
08000558 <__aeabi_f2d>:
|
|
8000558: 0042 lsls r2, r0, #1
|
|
800055a: ea4f 01e2 mov.w r1, r2, asr #3
|
|
800055e: ea4f 0131 mov.w r1, r1, rrx
|
|
8000562: ea4f 7002 mov.w r0, r2, lsl #28
|
|
8000566: bf1f itttt ne
|
|
8000568: f012 437f andsne.w r3, r2, #4278190080 ; 0xff000000
|
|
800056c: f093 4f7f teqne r3, #4278190080 ; 0xff000000
|
|
8000570: f081 5160 eorne.w r1, r1, #939524096 ; 0x38000000
|
|
8000574: 4770 bxne lr
|
|
8000576: f032 427f bics.w r2, r2, #4278190080 ; 0xff000000
|
|
800057a: bf08 it eq
|
|
800057c: 4770 bxeq lr
|
|
800057e: f093 4f7f teq r3, #4278190080 ; 0xff000000
|
|
8000582: bf04 itt eq
|
|
8000584: f441 2100 orreq.w r1, r1, #524288 ; 0x80000
|
|
8000588: 4770 bxeq lr
|
|
800058a: b530 push {r4, r5, lr}
|
|
800058c: f44f 7460 mov.w r4, #896 ; 0x380
|
|
8000590: f001 4500 and.w r5, r1, #2147483648 ; 0x80000000
|
|
8000594: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
|
8000598: e71c b.n 80003d4 <__adddf3+0x138>
|
|
800059a: bf00 nop
|
|
|
|
0800059c <__aeabi_ul2d>:
|
|
800059c: ea50 0201 orrs.w r2, r0, r1
|
|
80005a0: bf08 it eq
|
|
80005a2: 4770 bxeq lr
|
|
80005a4: b530 push {r4, r5, lr}
|
|
80005a6: f04f 0500 mov.w r5, #0
|
|
80005aa: e00a b.n 80005c2 <__aeabi_l2d+0x16>
|
|
|
|
080005ac <__aeabi_l2d>:
|
|
80005ac: ea50 0201 orrs.w r2, r0, r1
|
|
80005b0: bf08 it eq
|
|
80005b2: 4770 bxeq lr
|
|
80005b4: b530 push {r4, r5, lr}
|
|
80005b6: f011 4500 ands.w r5, r1, #2147483648 ; 0x80000000
|
|
80005ba: d502 bpl.n 80005c2 <__aeabi_l2d+0x16>
|
|
80005bc: 4240 negs r0, r0
|
|
80005be: eb61 0141 sbc.w r1, r1, r1, lsl #1
|
|
80005c2: f44f 6480 mov.w r4, #1024 ; 0x400
|
|
80005c6: f104 0432 add.w r4, r4, #50 ; 0x32
|
|
80005ca: ea5f 5c91 movs.w ip, r1, lsr #22
|
|
80005ce: f43f aed8 beq.w 8000382 <__adddf3+0xe6>
|
|
80005d2: f04f 0203 mov.w r2, #3
|
|
80005d6: ea5f 0cdc movs.w ip, ip, lsr #3
|
|
80005da: bf18 it ne
|
|
80005dc: 3203 addne r2, #3
|
|
80005de: ea5f 0cdc movs.w ip, ip, lsr #3
|
|
80005e2: bf18 it ne
|
|
80005e4: 3203 addne r2, #3
|
|
80005e6: eb02 02dc add.w r2, r2, ip, lsr #3
|
|
80005ea: f1c2 0320 rsb r3, r2, #32
|
|
80005ee: fa00 fc03 lsl.w ip, r0, r3
|
|
80005f2: fa20 f002 lsr.w r0, r0, r2
|
|
80005f6: fa01 fe03 lsl.w lr, r1, r3
|
|
80005fa: ea40 000e orr.w r0, r0, lr
|
|
80005fe: fa21 f102 lsr.w r1, r1, r2
|
|
8000602: 4414 add r4, r2
|
|
8000604: e6bd b.n 8000382 <__adddf3+0xe6>
|
|
8000606: bf00 nop
|
|
|
|
08000608 <__aeabi_dmul>:
|
|
8000608: b570 push {r4, r5, r6, lr}
|
|
800060a: f04f 0cff mov.w ip, #255 ; 0xff
|
|
800060e: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
|
8000612: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
|
8000616: bf1d ittte ne
|
|
8000618: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
|
800061c: ea94 0f0c teqne r4, ip
|
|
8000620: ea95 0f0c teqne r5, ip
|
|
8000624: f000 f8de bleq 80007e4 <__aeabi_dmul+0x1dc>
|
|
8000628: 442c add r4, r5
|
|
800062a: ea81 0603 eor.w r6, r1, r3
|
|
800062e: ea21 514c bic.w r1, r1, ip, lsl #21
|
|
8000632: ea23 534c bic.w r3, r3, ip, lsl #21
|
|
8000636: ea50 3501 orrs.w r5, r0, r1, lsl #12
|
|
800063a: bf18 it ne
|
|
800063c: ea52 3503 orrsne.w r5, r2, r3, lsl #12
|
|
8000640: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
|
8000644: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
|
8000648: d038 beq.n 80006bc <__aeabi_dmul+0xb4>
|
|
800064a: fba0 ce02 umull ip, lr, r0, r2
|
|
800064e: f04f 0500 mov.w r5, #0
|
|
8000652: fbe1 e502 umlal lr, r5, r1, r2
|
|
8000656: f006 4200 and.w r2, r6, #2147483648 ; 0x80000000
|
|
800065a: fbe0 e503 umlal lr, r5, r0, r3
|
|
800065e: f04f 0600 mov.w r6, #0
|
|
8000662: fbe1 5603 umlal r5, r6, r1, r3
|
|
8000666: f09c 0f00 teq ip, #0
|
|
800066a: bf18 it ne
|
|
800066c: f04e 0e01 orrne.w lr, lr, #1
|
|
8000670: f1a4 04ff sub.w r4, r4, #255 ; 0xff
|
|
8000674: f5b6 7f00 cmp.w r6, #512 ; 0x200
|
|
8000678: f564 7440 sbc.w r4, r4, #768 ; 0x300
|
|
800067c: d204 bcs.n 8000688 <__aeabi_dmul+0x80>
|
|
800067e: ea5f 0e4e movs.w lr, lr, lsl #1
|
|
8000682: 416d adcs r5, r5
|
|
8000684: eb46 0606 adc.w r6, r6, r6
|
|
8000688: ea42 21c6 orr.w r1, r2, r6, lsl #11
|
|
800068c: ea41 5155 orr.w r1, r1, r5, lsr #21
|
|
8000690: ea4f 20c5 mov.w r0, r5, lsl #11
|
|
8000694: ea40 505e orr.w r0, r0, lr, lsr #21
|
|
8000698: ea4f 2ece mov.w lr, lr, lsl #11
|
|
800069c: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
|
80006a0: bf88 it hi
|
|
80006a2: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
|
80006a6: d81e bhi.n 80006e6 <__aeabi_dmul+0xde>
|
|
80006a8: f1be 4f00 cmp.w lr, #2147483648 ; 0x80000000
|
|
80006ac: bf08 it eq
|
|
80006ae: ea5f 0e50 movseq.w lr, r0, lsr #1
|
|
80006b2: f150 0000 adcs.w r0, r0, #0
|
|
80006b6: eb41 5104 adc.w r1, r1, r4, lsl #20
|
|
80006ba: bd70 pop {r4, r5, r6, pc}
|
|
80006bc: f006 4600 and.w r6, r6, #2147483648 ; 0x80000000
|
|
80006c0: ea46 0101 orr.w r1, r6, r1
|
|
80006c4: ea40 0002 orr.w r0, r0, r2
|
|
80006c8: ea81 0103 eor.w r1, r1, r3
|
|
80006cc: ebb4 045c subs.w r4, r4, ip, lsr #1
|
|
80006d0: bfc2 ittt gt
|
|
80006d2: ebd4 050c rsbsgt r5, r4, ip
|
|
80006d6: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
|
80006da: bd70 popgt {r4, r5, r6, pc}
|
|
80006dc: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
|
80006e0: f04f 0e00 mov.w lr, #0
|
|
80006e4: 3c01 subs r4, #1
|
|
80006e6: f300 80ab bgt.w 8000840 <__aeabi_dmul+0x238>
|
|
80006ea: f114 0f36 cmn.w r4, #54 ; 0x36
|
|
80006ee: bfde ittt le
|
|
80006f0: 2000 movle r0, #0
|
|
80006f2: f001 4100 andle.w r1, r1, #2147483648 ; 0x80000000
|
|
80006f6: bd70 pople {r4, r5, r6, pc}
|
|
80006f8: f1c4 0400 rsb r4, r4, #0
|
|
80006fc: 3c20 subs r4, #32
|
|
80006fe: da35 bge.n 800076c <__aeabi_dmul+0x164>
|
|
8000700: 340c adds r4, #12
|
|
8000702: dc1b bgt.n 800073c <__aeabi_dmul+0x134>
|
|
8000704: f104 0414 add.w r4, r4, #20
|
|
8000708: f1c4 0520 rsb r5, r4, #32
|
|
800070c: fa00 f305 lsl.w r3, r0, r5
|
|
8000710: fa20 f004 lsr.w r0, r0, r4
|
|
8000714: fa01 f205 lsl.w r2, r1, r5
|
|
8000718: ea40 0002 orr.w r0, r0, r2
|
|
800071c: f001 4200 and.w r2, r1, #2147483648 ; 0x80000000
|
|
8000720: f021 4100 bic.w r1, r1, #2147483648 ; 0x80000000
|
|
8000724: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
|
8000728: fa21 f604 lsr.w r6, r1, r4
|
|
800072c: eb42 0106 adc.w r1, r2, r6
|
|
8000730: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
|
8000734: bf08 it eq
|
|
8000736: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
|
800073a: bd70 pop {r4, r5, r6, pc}
|
|
800073c: f1c4 040c rsb r4, r4, #12
|
|
8000740: f1c4 0520 rsb r5, r4, #32
|
|
8000744: fa00 f304 lsl.w r3, r0, r4
|
|
8000748: fa20 f005 lsr.w r0, r0, r5
|
|
800074c: fa01 f204 lsl.w r2, r1, r4
|
|
8000750: ea40 0002 orr.w r0, r0, r2
|
|
8000754: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
|
8000758: eb10 70d3 adds.w r0, r0, r3, lsr #31
|
|
800075c: f141 0100 adc.w r1, r1, #0
|
|
8000760: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
|
8000764: bf08 it eq
|
|
8000766: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
|
800076a: bd70 pop {r4, r5, r6, pc}
|
|
800076c: f1c4 0520 rsb r5, r4, #32
|
|
8000770: fa00 f205 lsl.w r2, r0, r5
|
|
8000774: ea4e 0e02 orr.w lr, lr, r2
|
|
8000778: fa20 f304 lsr.w r3, r0, r4
|
|
800077c: fa01 f205 lsl.w r2, r1, r5
|
|
8000780: ea43 0302 orr.w r3, r3, r2
|
|
8000784: fa21 f004 lsr.w r0, r1, r4
|
|
8000788: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
|
800078c: fa21 f204 lsr.w r2, r1, r4
|
|
8000790: ea20 0002 bic.w r0, r0, r2
|
|
8000794: eb00 70d3 add.w r0, r0, r3, lsr #31
|
|
8000798: ea5e 0e43 orrs.w lr, lr, r3, lsl #1
|
|
800079c: bf08 it eq
|
|
800079e: ea20 70d3 biceq.w r0, r0, r3, lsr #31
|
|
80007a2: bd70 pop {r4, r5, r6, pc}
|
|
80007a4: f094 0f00 teq r4, #0
|
|
80007a8: d10f bne.n 80007ca <__aeabi_dmul+0x1c2>
|
|
80007aa: f001 4600 and.w r6, r1, #2147483648 ; 0x80000000
|
|
80007ae: 0040 lsls r0, r0, #1
|
|
80007b0: eb41 0101 adc.w r1, r1, r1
|
|
80007b4: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
|
80007b8: bf08 it eq
|
|
80007ba: 3c01 subeq r4, #1
|
|
80007bc: d0f7 beq.n 80007ae <__aeabi_dmul+0x1a6>
|
|
80007be: ea41 0106 orr.w r1, r1, r6
|
|
80007c2: f095 0f00 teq r5, #0
|
|
80007c6: bf18 it ne
|
|
80007c8: 4770 bxne lr
|
|
80007ca: f003 4600 and.w r6, r3, #2147483648 ; 0x80000000
|
|
80007ce: 0052 lsls r2, r2, #1
|
|
80007d0: eb43 0303 adc.w r3, r3, r3
|
|
80007d4: f413 1f80 tst.w r3, #1048576 ; 0x100000
|
|
80007d8: bf08 it eq
|
|
80007da: 3d01 subeq r5, #1
|
|
80007dc: d0f7 beq.n 80007ce <__aeabi_dmul+0x1c6>
|
|
80007de: ea43 0306 orr.w r3, r3, r6
|
|
80007e2: 4770 bx lr
|
|
80007e4: ea94 0f0c teq r4, ip
|
|
80007e8: ea0c 5513 and.w r5, ip, r3, lsr #20
|
|
80007ec: bf18 it ne
|
|
80007ee: ea95 0f0c teqne r5, ip
|
|
80007f2: d00c beq.n 800080e <__aeabi_dmul+0x206>
|
|
80007f4: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
|
80007f8: bf18 it ne
|
|
80007fa: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
|
80007fe: d1d1 bne.n 80007a4 <__aeabi_dmul+0x19c>
|
|
8000800: ea81 0103 eor.w r1, r1, r3
|
|
8000804: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
|
8000808: f04f 0000 mov.w r0, #0
|
|
800080c: bd70 pop {r4, r5, r6, pc}
|
|
800080e: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
|
8000812: bf06 itte eq
|
|
8000814: 4610 moveq r0, r2
|
|
8000816: 4619 moveq r1, r3
|
|
8000818: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
|
800081c: d019 beq.n 8000852 <__aeabi_dmul+0x24a>
|
|
800081e: ea94 0f0c teq r4, ip
|
|
8000822: d102 bne.n 800082a <__aeabi_dmul+0x222>
|
|
8000824: ea50 3601 orrs.w r6, r0, r1, lsl #12
|
|
8000828: d113 bne.n 8000852 <__aeabi_dmul+0x24a>
|
|
800082a: ea95 0f0c teq r5, ip
|
|
800082e: d105 bne.n 800083c <__aeabi_dmul+0x234>
|
|
8000830: ea52 3603 orrs.w r6, r2, r3, lsl #12
|
|
8000834: bf1c itt ne
|
|
8000836: 4610 movne r0, r2
|
|
8000838: 4619 movne r1, r3
|
|
800083a: d10a bne.n 8000852 <__aeabi_dmul+0x24a>
|
|
800083c: ea81 0103 eor.w r1, r1, r3
|
|
8000840: f001 4100 and.w r1, r1, #2147483648 ; 0x80000000
|
|
8000844: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
|
8000848: f441 0170 orr.w r1, r1, #15728640 ; 0xf00000
|
|
800084c: f04f 0000 mov.w r0, #0
|
|
8000850: bd70 pop {r4, r5, r6, pc}
|
|
8000852: f041 41fe orr.w r1, r1, #2130706432 ; 0x7f000000
|
|
8000856: f441 0178 orr.w r1, r1, #16252928 ; 0xf80000
|
|
800085a: bd70 pop {r4, r5, r6, pc}
|
|
|
|
0800085c <__aeabi_ddiv>:
|
|
800085c: b570 push {r4, r5, r6, lr}
|
|
800085e: f04f 0cff mov.w ip, #255 ; 0xff
|
|
8000862: f44c 6ce0 orr.w ip, ip, #1792 ; 0x700
|
|
8000866: ea1c 5411 ands.w r4, ip, r1, lsr #20
|
|
800086a: bf1d ittte ne
|
|
800086c: ea1c 5513 andsne.w r5, ip, r3, lsr #20
|
|
8000870: ea94 0f0c teqne r4, ip
|
|
8000874: ea95 0f0c teqne r5, ip
|
|
8000878: f000 f8a7 bleq 80009ca <__aeabi_ddiv+0x16e>
|
|
800087c: eba4 0405 sub.w r4, r4, r5
|
|
8000880: ea81 0e03 eor.w lr, r1, r3
|
|
8000884: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
|
8000888: ea4f 3101 mov.w r1, r1, lsl #12
|
|
800088c: f000 8088 beq.w 80009a0 <__aeabi_ddiv+0x144>
|
|
8000890: ea4f 3303 mov.w r3, r3, lsl #12
|
|
8000894: f04f 5580 mov.w r5, #268435456 ; 0x10000000
|
|
8000898: ea45 1313 orr.w r3, r5, r3, lsr #4
|
|
800089c: ea43 6312 orr.w r3, r3, r2, lsr #24
|
|
80008a0: ea4f 2202 mov.w r2, r2, lsl #8
|
|
80008a4: ea45 1511 orr.w r5, r5, r1, lsr #4
|
|
80008a8: ea45 6510 orr.w r5, r5, r0, lsr #24
|
|
80008ac: ea4f 2600 mov.w r6, r0, lsl #8
|
|
80008b0: f00e 4100 and.w r1, lr, #2147483648 ; 0x80000000
|
|
80008b4: 429d cmp r5, r3
|
|
80008b6: bf08 it eq
|
|
80008b8: 4296 cmpeq r6, r2
|
|
80008ba: f144 04fd adc.w r4, r4, #253 ; 0xfd
|
|
80008be: f504 7440 add.w r4, r4, #768 ; 0x300
|
|
80008c2: d202 bcs.n 80008ca <__aeabi_ddiv+0x6e>
|
|
80008c4: 085b lsrs r3, r3, #1
|
|
80008c6: ea4f 0232 mov.w r2, r2, rrx
|
|
80008ca: 1ab6 subs r6, r6, r2
|
|
80008cc: eb65 0503 sbc.w r5, r5, r3
|
|
80008d0: 085b lsrs r3, r3, #1
|
|
80008d2: ea4f 0232 mov.w r2, r2, rrx
|
|
80008d6: f44f 1080 mov.w r0, #1048576 ; 0x100000
|
|
80008da: f44f 2c00 mov.w ip, #524288 ; 0x80000
|
|
80008de: ebb6 0e02 subs.w lr, r6, r2
|
|
80008e2: eb75 0e03 sbcs.w lr, r5, r3
|
|
80008e6: bf22 ittt cs
|
|
80008e8: 1ab6 subcs r6, r6, r2
|
|
80008ea: 4675 movcs r5, lr
|
|
80008ec: ea40 000c orrcs.w r0, r0, ip
|
|
80008f0: 085b lsrs r3, r3, #1
|
|
80008f2: ea4f 0232 mov.w r2, r2, rrx
|
|
80008f6: ebb6 0e02 subs.w lr, r6, r2
|
|
80008fa: eb75 0e03 sbcs.w lr, r5, r3
|
|
80008fe: bf22 ittt cs
|
|
8000900: 1ab6 subcs r6, r6, r2
|
|
8000902: 4675 movcs r5, lr
|
|
8000904: ea40 005c orrcs.w r0, r0, ip, lsr #1
|
|
8000908: 085b lsrs r3, r3, #1
|
|
800090a: ea4f 0232 mov.w r2, r2, rrx
|
|
800090e: ebb6 0e02 subs.w lr, r6, r2
|
|
8000912: eb75 0e03 sbcs.w lr, r5, r3
|
|
8000916: bf22 ittt cs
|
|
8000918: 1ab6 subcs r6, r6, r2
|
|
800091a: 4675 movcs r5, lr
|
|
800091c: ea40 009c orrcs.w r0, r0, ip, lsr #2
|
|
8000920: 085b lsrs r3, r3, #1
|
|
8000922: ea4f 0232 mov.w r2, r2, rrx
|
|
8000926: ebb6 0e02 subs.w lr, r6, r2
|
|
800092a: eb75 0e03 sbcs.w lr, r5, r3
|
|
800092e: bf22 ittt cs
|
|
8000930: 1ab6 subcs r6, r6, r2
|
|
8000932: 4675 movcs r5, lr
|
|
8000934: ea40 00dc orrcs.w r0, r0, ip, lsr #3
|
|
8000938: ea55 0e06 orrs.w lr, r5, r6
|
|
800093c: d018 beq.n 8000970 <__aeabi_ddiv+0x114>
|
|
800093e: ea4f 1505 mov.w r5, r5, lsl #4
|
|
8000942: ea45 7516 orr.w r5, r5, r6, lsr #28
|
|
8000946: ea4f 1606 mov.w r6, r6, lsl #4
|
|
800094a: ea4f 03c3 mov.w r3, r3, lsl #3
|
|
800094e: ea43 7352 orr.w r3, r3, r2, lsr #29
|
|
8000952: ea4f 02c2 mov.w r2, r2, lsl #3
|
|
8000956: ea5f 1c1c movs.w ip, ip, lsr #4
|
|
800095a: d1c0 bne.n 80008de <__aeabi_ddiv+0x82>
|
|
800095c: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
|
8000960: d10b bne.n 800097a <__aeabi_ddiv+0x11e>
|
|
8000962: ea41 0100 orr.w r1, r1, r0
|
|
8000966: f04f 0000 mov.w r0, #0
|
|
800096a: f04f 4c00 mov.w ip, #2147483648 ; 0x80000000
|
|
800096e: e7b6 b.n 80008de <__aeabi_ddiv+0x82>
|
|
8000970: f411 1f80 tst.w r1, #1048576 ; 0x100000
|
|
8000974: bf04 itt eq
|
|
8000976: 4301 orreq r1, r0
|
|
8000978: 2000 moveq r0, #0
|
|
800097a: f1b4 0cfd subs.w ip, r4, #253 ; 0xfd
|
|
800097e: bf88 it hi
|
|
8000980: f5bc 6fe0 cmphi.w ip, #1792 ; 0x700
|
|
8000984: f63f aeaf bhi.w 80006e6 <__aeabi_dmul+0xde>
|
|
8000988: ebb5 0c03 subs.w ip, r5, r3
|
|
800098c: bf04 itt eq
|
|
800098e: ebb6 0c02 subseq.w ip, r6, r2
|
|
8000992: ea5f 0c50 movseq.w ip, r0, lsr #1
|
|
8000996: f150 0000 adcs.w r0, r0, #0
|
|
800099a: eb41 5104 adc.w r1, r1, r4, lsl #20
|
|
800099e: bd70 pop {r4, r5, r6, pc}
|
|
80009a0: f00e 4e00 and.w lr, lr, #2147483648 ; 0x80000000
|
|
80009a4: ea4e 3111 orr.w r1, lr, r1, lsr #12
|
|
80009a8: eb14 045c adds.w r4, r4, ip, lsr #1
|
|
80009ac: bfc2 ittt gt
|
|
80009ae: ebd4 050c rsbsgt r5, r4, ip
|
|
80009b2: ea41 5104 orrgt.w r1, r1, r4, lsl #20
|
|
80009b6: bd70 popgt {r4, r5, r6, pc}
|
|
80009b8: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
|
80009bc: f04f 0e00 mov.w lr, #0
|
|
80009c0: 3c01 subs r4, #1
|
|
80009c2: e690 b.n 80006e6 <__aeabi_dmul+0xde>
|
|
80009c4: ea45 0e06 orr.w lr, r5, r6
|
|
80009c8: e68d b.n 80006e6 <__aeabi_dmul+0xde>
|
|
80009ca: ea0c 5513 and.w r5, ip, r3, lsr #20
|
|
80009ce: ea94 0f0c teq r4, ip
|
|
80009d2: bf08 it eq
|
|
80009d4: ea95 0f0c teqeq r5, ip
|
|
80009d8: f43f af3b beq.w 8000852 <__aeabi_dmul+0x24a>
|
|
80009dc: ea94 0f0c teq r4, ip
|
|
80009e0: d10a bne.n 80009f8 <__aeabi_ddiv+0x19c>
|
|
80009e2: ea50 3401 orrs.w r4, r0, r1, lsl #12
|
|
80009e6: f47f af34 bne.w 8000852 <__aeabi_dmul+0x24a>
|
|
80009ea: ea95 0f0c teq r5, ip
|
|
80009ee: f47f af25 bne.w 800083c <__aeabi_dmul+0x234>
|
|
80009f2: 4610 mov r0, r2
|
|
80009f4: 4619 mov r1, r3
|
|
80009f6: e72c b.n 8000852 <__aeabi_dmul+0x24a>
|
|
80009f8: ea95 0f0c teq r5, ip
|
|
80009fc: d106 bne.n 8000a0c <__aeabi_ddiv+0x1b0>
|
|
80009fe: ea52 3503 orrs.w r5, r2, r3, lsl #12
|
|
8000a02: f43f aefd beq.w 8000800 <__aeabi_dmul+0x1f8>
|
|
8000a06: 4610 mov r0, r2
|
|
8000a08: 4619 mov r1, r3
|
|
8000a0a: e722 b.n 8000852 <__aeabi_dmul+0x24a>
|
|
8000a0c: ea50 0641 orrs.w r6, r0, r1, lsl #1
|
|
8000a10: bf18 it ne
|
|
8000a12: ea52 0643 orrsne.w r6, r2, r3, lsl #1
|
|
8000a16: f47f aec5 bne.w 80007a4 <__aeabi_dmul+0x19c>
|
|
8000a1a: ea50 0441 orrs.w r4, r0, r1, lsl #1
|
|
8000a1e: f47f af0d bne.w 800083c <__aeabi_dmul+0x234>
|
|
8000a22: ea52 0543 orrs.w r5, r2, r3, lsl #1
|
|
8000a26: f47f aeeb bne.w 8000800 <__aeabi_dmul+0x1f8>
|
|
8000a2a: e712 b.n 8000852 <__aeabi_dmul+0x24a>
|
|
|
|
08000a2c <__gedf2>:
|
|
8000a2c: f04f 3cff mov.w ip, #4294967295
|
|
8000a30: e006 b.n 8000a40 <__cmpdf2+0x4>
|
|
8000a32: bf00 nop
|
|
|
|
08000a34 <__ledf2>:
|
|
8000a34: f04f 0c01 mov.w ip, #1
|
|
8000a38: e002 b.n 8000a40 <__cmpdf2+0x4>
|
|
8000a3a: bf00 nop
|
|
|
|
08000a3c <__cmpdf2>:
|
|
8000a3c: f04f 0c01 mov.w ip, #1
|
|
8000a40: f84d cd04 str.w ip, [sp, #-4]!
|
|
8000a44: ea4f 0c41 mov.w ip, r1, lsl #1
|
|
8000a48: ea7f 5c6c mvns.w ip, ip, asr #21
|
|
8000a4c: ea4f 0c43 mov.w ip, r3, lsl #1
|
|
8000a50: bf18 it ne
|
|
8000a52: ea7f 5c6c mvnsne.w ip, ip, asr #21
|
|
8000a56: d01b beq.n 8000a90 <__cmpdf2+0x54>
|
|
8000a58: b001 add sp, #4
|
|
8000a5a: ea50 0c41 orrs.w ip, r0, r1, lsl #1
|
|
8000a5e: bf0c ite eq
|
|
8000a60: ea52 0c43 orrseq.w ip, r2, r3, lsl #1
|
|
8000a64: ea91 0f03 teqne r1, r3
|
|
8000a68: bf02 ittt eq
|
|
8000a6a: ea90 0f02 teqeq r0, r2
|
|
8000a6e: 2000 moveq r0, #0
|
|
8000a70: 4770 bxeq lr
|
|
8000a72: f110 0f00 cmn.w r0, #0
|
|
8000a76: ea91 0f03 teq r1, r3
|
|
8000a7a: bf58 it pl
|
|
8000a7c: 4299 cmppl r1, r3
|
|
8000a7e: bf08 it eq
|
|
8000a80: 4290 cmpeq r0, r2
|
|
8000a82: bf2c ite cs
|
|
8000a84: 17d8 asrcs r0, r3, #31
|
|
8000a86: ea6f 70e3 mvncc.w r0, r3, asr #31
|
|
8000a8a: f040 0001 orr.w r0, r0, #1
|
|
8000a8e: 4770 bx lr
|
|
8000a90: ea4f 0c41 mov.w ip, r1, lsl #1
|
|
8000a94: ea7f 5c6c mvns.w ip, ip, asr #21
|
|
8000a98: d102 bne.n 8000aa0 <__cmpdf2+0x64>
|
|
8000a9a: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
|
8000a9e: d107 bne.n 8000ab0 <__cmpdf2+0x74>
|
|
8000aa0: ea4f 0c43 mov.w ip, r3, lsl #1
|
|
8000aa4: ea7f 5c6c mvns.w ip, ip, asr #21
|
|
8000aa8: d1d6 bne.n 8000a58 <__cmpdf2+0x1c>
|
|
8000aaa: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
|
8000aae: d0d3 beq.n 8000a58 <__cmpdf2+0x1c>
|
|
8000ab0: f85d 0b04 ldr.w r0, [sp], #4
|
|
8000ab4: 4770 bx lr
|
|
8000ab6: bf00 nop
|
|
|
|
08000ab8 <__aeabi_cdrcmple>:
|
|
8000ab8: 4684 mov ip, r0
|
|
8000aba: 4610 mov r0, r2
|
|
8000abc: 4662 mov r2, ip
|
|
8000abe: 468c mov ip, r1
|
|
8000ac0: 4619 mov r1, r3
|
|
8000ac2: 4663 mov r3, ip
|
|
8000ac4: e000 b.n 8000ac8 <__aeabi_cdcmpeq>
|
|
8000ac6: bf00 nop
|
|
|
|
08000ac8 <__aeabi_cdcmpeq>:
|
|
8000ac8: b501 push {r0, lr}
|
|
8000aca: f7ff ffb7 bl 8000a3c <__cmpdf2>
|
|
8000ace: 2800 cmp r0, #0
|
|
8000ad0: bf48 it mi
|
|
8000ad2: f110 0f00 cmnmi.w r0, #0
|
|
8000ad6: bd01 pop {r0, pc}
|
|
|
|
08000ad8 <__aeabi_dcmpeq>:
|
|
8000ad8: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000adc: f7ff fff4 bl 8000ac8 <__aeabi_cdcmpeq>
|
|
8000ae0: bf0c ite eq
|
|
8000ae2: 2001 moveq r0, #1
|
|
8000ae4: 2000 movne r0, #0
|
|
8000ae6: f85d fb08 ldr.w pc, [sp], #8
|
|
8000aea: bf00 nop
|
|
|
|
08000aec <__aeabi_dcmplt>:
|
|
8000aec: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000af0: f7ff ffea bl 8000ac8 <__aeabi_cdcmpeq>
|
|
8000af4: bf34 ite cc
|
|
8000af6: 2001 movcc r0, #1
|
|
8000af8: 2000 movcs r0, #0
|
|
8000afa: f85d fb08 ldr.w pc, [sp], #8
|
|
8000afe: bf00 nop
|
|
|
|
08000b00 <__aeabi_dcmple>:
|
|
8000b00: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000b04: f7ff ffe0 bl 8000ac8 <__aeabi_cdcmpeq>
|
|
8000b08: bf94 ite ls
|
|
8000b0a: 2001 movls r0, #1
|
|
8000b0c: 2000 movhi r0, #0
|
|
8000b0e: f85d fb08 ldr.w pc, [sp], #8
|
|
8000b12: bf00 nop
|
|
|
|
08000b14 <__aeabi_dcmpge>:
|
|
8000b14: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000b18: f7ff ffce bl 8000ab8 <__aeabi_cdrcmple>
|
|
8000b1c: bf94 ite ls
|
|
8000b1e: 2001 movls r0, #1
|
|
8000b20: 2000 movhi r0, #0
|
|
8000b22: f85d fb08 ldr.w pc, [sp], #8
|
|
8000b26: bf00 nop
|
|
|
|
08000b28 <__aeabi_dcmpgt>:
|
|
8000b28: f84d ed08 str.w lr, [sp, #-8]!
|
|
8000b2c: f7ff ffc4 bl 8000ab8 <__aeabi_cdrcmple>
|
|
8000b30: bf34 ite cc
|
|
8000b32: 2001 movcc r0, #1
|
|
8000b34: 2000 movcs r0, #0
|
|
8000b36: f85d fb08 ldr.w pc, [sp], #8
|
|
8000b3a: bf00 nop
|
|
|
|
08000b3c <__aeabi_dcmpun>:
|
|
8000b3c: ea4f 0c41 mov.w ip, r1, lsl #1
|
|
8000b40: ea7f 5c6c mvns.w ip, ip, asr #21
|
|
8000b44: d102 bne.n 8000b4c <__aeabi_dcmpun+0x10>
|
|
8000b46: ea50 3c01 orrs.w ip, r0, r1, lsl #12
|
|
8000b4a: d10a bne.n 8000b62 <__aeabi_dcmpun+0x26>
|
|
8000b4c: ea4f 0c43 mov.w ip, r3, lsl #1
|
|
8000b50: ea7f 5c6c mvns.w ip, ip, asr #21
|
|
8000b54: d102 bne.n 8000b5c <__aeabi_dcmpun+0x20>
|
|
8000b56: ea52 3c03 orrs.w ip, r2, r3, lsl #12
|
|
8000b5a: d102 bne.n 8000b62 <__aeabi_dcmpun+0x26>
|
|
8000b5c: f04f 0000 mov.w r0, #0
|
|
8000b60: 4770 bx lr
|
|
8000b62: f04f 0001 mov.w r0, #1
|
|
8000b66: 4770 bx lr
|
|
|
|
08000b68 <__aeabi_d2iz>:
|
|
8000b68: ea4f 0241 mov.w r2, r1, lsl #1
|
|
8000b6c: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
|
|
8000b70: d215 bcs.n 8000b9e <__aeabi_d2iz+0x36>
|
|
8000b72: d511 bpl.n 8000b98 <__aeabi_d2iz+0x30>
|
|
8000b74: f46f 7378 mvn.w r3, #992 ; 0x3e0
|
|
8000b78: ebb3 5262 subs.w r2, r3, r2, asr #21
|
|
8000b7c: d912 bls.n 8000ba4 <__aeabi_d2iz+0x3c>
|
|
8000b7e: ea4f 23c1 mov.w r3, r1, lsl #11
|
|
8000b82: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8000b86: ea43 5350 orr.w r3, r3, r0, lsr #21
|
|
8000b8a: f011 4f00 tst.w r1, #2147483648 ; 0x80000000
|
|
8000b8e: fa23 f002 lsr.w r0, r3, r2
|
|
8000b92: bf18 it ne
|
|
8000b94: 4240 negne r0, r0
|
|
8000b96: 4770 bx lr
|
|
8000b98: f04f 0000 mov.w r0, #0
|
|
8000b9c: 4770 bx lr
|
|
8000b9e: ea50 3001 orrs.w r0, r0, r1, lsl #12
|
|
8000ba2: d105 bne.n 8000bb0 <__aeabi_d2iz+0x48>
|
|
8000ba4: f011 4000 ands.w r0, r1, #2147483648 ; 0x80000000
|
|
8000ba8: bf08 it eq
|
|
8000baa: f06f 4000 mvneq.w r0, #2147483648 ; 0x80000000
|
|
8000bae: 4770 bx lr
|
|
8000bb0: f04f 0000 mov.w r0, #0
|
|
8000bb4: 4770 bx lr
|
|
8000bb6: bf00 nop
|
|
|
|
08000bb8 <__aeabi_d2uiz>:
|
|
8000bb8: 004a lsls r2, r1, #1
|
|
8000bba: d211 bcs.n 8000be0 <__aeabi_d2uiz+0x28>
|
|
8000bbc: f512 1200 adds.w r2, r2, #2097152 ; 0x200000
|
|
8000bc0: d211 bcs.n 8000be6 <__aeabi_d2uiz+0x2e>
|
|
8000bc2: d50d bpl.n 8000be0 <__aeabi_d2uiz+0x28>
|
|
8000bc4: f46f 7378 mvn.w r3, #992 ; 0x3e0
|
|
8000bc8: ebb3 5262 subs.w r2, r3, r2, asr #21
|
|
8000bcc: d40e bmi.n 8000bec <__aeabi_d2uiz+0x34>
|
|
8000bce: ea4f 23c1 mov.w r3, r1, lsl #11
|
|
8000bd2: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8000bd6: ea43 5350 orr.w r3, r3, r0, lsr #21
|
|
8000bda: fa23 f002 lsr.w r0, r3, r2
|
|
8000bde: 4770 bx lr
|
|
8000be0: f04f 0000 mov.w r0, #0
|
|
8000be4: 4770 bx lr
|
|
8000be6: ea50 3001 orrs.w r0, r0, r1, lsl #12
|
|
8000bea: d102 bne.n 8000bf2 <__aeabi_d2uiz+0x3a>
|
|
8000bec: f04f 30ff mov.w r0, #4294967295
|
|
8000bf0: 4770 bx lr
|
|
8000bf2: f04f 0000 mov.w r0, #0
|
|
8000bf6: 4770 bx lr
|
|
|
|
08000bf8 <__aeabi_d2f>:
|
|
8000bf8: ea4f 0241 mov.w r2, r1, lsl #1
|
|
8000bfc: f1b2 43e0 subs.w r3, r2, #1879048192 ; 0x70000000
|
|
8000c00: bf24 itt cs
|
|
8000c02: f5b3 1c00 subscs.w ip, r3, #2097152 ; 0x200000
|
|
8000c06: f1dc 5cfe rsbscs ip, ip, #532676608 ; 0x1fc00000
|
|
8000c0a: d90d bls.n 8000c28 <__aeabi_d2f+0x30>
|
|
8000c0c: f001 4c00 and.w ip, r1, #2147483648 ; 0x80000000
|
|
8000c10: ea4f 02c0 mov.w r2, r0, lsl #3
|
|
8000c14: ea4c 7050 orr.w r0, ip, r0, lsr #29
|
|
8000c18: f1b2 4f00 cmp.w r2, #2147483648 ; 0x80000000
|
|
8000c1c: eb40 0083 adc.w r0, r0, r3, lsl #2
|
|
8000c20: bf08 it eq
|
|
8000c22: f020 0001 biceq.w r0, r0, #1
|
|
8000c26: 4770 bx lr
|
|
8000c28: f011 4f80 tst.w r1, #1073741824 ; 0x40000000
|
|
8000c2c: d121 bne.n 8000c72 <__aeabi_d2f+0x7a>
|
|
8000c2e: f113 7238 adds.w r2, r3, #48234496 ; 0x2e00000
|
|
8000c32: bfbc itt lt
|
|
8000c34: f001 4000 andlt.w r0, r1, #2147483648 ; 0x80000000
|
|
8000c38: 4770 bxlt lr
|
|
8000c3a: f441 1180 orr.w r1, r1, #1048576 ; 0x100000
|
|
8000c3e: ea4f 5252 mov.w r2, r2, lsr #21
|
|
8000c42: f1c2 0218 rsb r2, r2, #24
|
|
8000c46: f1c2 0c20 rsb ip, r2, #32
|
|
8000c4a: fa10 f30c lsls.w r3, r0, ip
|
|
8000c4e: fa20 f002 lsr.w r0, r0, r2
|
|
8000c52: bf18 it ne
|
|
8000c54: f040 0001 orrne.w r0, r0, #1
|
|
8000c58: ea4f 23c1 mov.w r3, r1, lsl #11
|
|
8000c5c: ea4f 23d3 mov.w r3, r3, lsr #11
|
|
8000c60: fa03 fc0c lsl.w ip, r3, ip
|
|
8000c64: ea40 000c orr.w r0, r0, ip
|
|
8000c68: fa23 f302 lsr.w r3, r3, r2
|
|
8000c6c: ea4f 0343 mov.w r3, r3, lsl #1
|
|
8000c70: e7cc b.n 8000c0c <__aeabi_d2f+0x14>
|
|
8000c72: ea7f 5362 mvns.w r3, r2, asr #21
|
|
8000c76: d107 bne.n 8000c88 <__aeabi_d2f+0x90>
|
|
8000c78: ea50 3301 orrs.w r3, r0, r1, lsl #12
|
|
8000c7c: bf1e ittt ne
|
|
8000c7e: f04f 40fe movne.w r0, #2130706432 ; 0x7f000000
|
|
8000c82: f440 0040 orrne.w r0, r0, #12582912 ; 0xc00000
|
|
8000c86: 4770 bxne lr
|
|
8000c88: f001 4000 and.w r0, r1, #2147483648 ; 0x80000000
|
|
8000c8c: f040 40fe orr.w r0, r0, #2130706432 ; 0x7f000000
|
|
8000c90: f440 0000 orr.w r0, r0, #8388608 ; 0x800000
|
|
8000c94: 4770 bx lr
|
|
8000c96: bf00 nop
|
|
|
|
08000c98 <__aeabi_uldivmod>:
|
|
8000c98: b953 cbnz r3, 8000cb0 <__aeabi_uldivmod+0x18>
|
|
8000c9a: b94a cbnz r2, 8000cb0 <__aeabi_uldivmod+0x18>
|
|
8000c9c: 2900 cmp r1, #0
|
|
8000c9e: bf08 it eq
|
|
8000ca0: 2800 cmpeq r0, #0
|
|
8000ca2: bf1c itt ne
|
|
8000ca4: f04f 31ff movne.w r1, #4294967295
|
|
8000ca8: f04f 30ff movne.w r0, #4294967295
|
|
8000cac: f000 b972 b.w 8000f94 <__aeabi_idiv0>
|
|
8000cb0: f1ad 0c08 sub.w ip, sp, #8
|
|
8000cb4: e96d ce04 strd ip, lr, [sp, #-16]!
|
|
8000cb8: f000 f806 bl 8000cc8 <__udivmoddi4>
|
|
8000cbc: f8dd e004 ldr.w lr, [sp, #4]
|
|
8000cc0: e9dd 2302 ldrd r2, r3, [sp, #8]
|
|
8000cc4: b004 add sp, #16
|
|
8000cc6: 4770 bx lr
|
|
|
|
08000cc8 <__udivmoddi4>:
|
|
8000cc8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
8000ccc: 9e08 ldr r6, [sp, #32]
|
|
8000cce: 4604 mov r4, r0
|
|
8000cd0: 4688 mov r8, r1
|
|
8000cd2: 2b00 cmp r3, #0
|
|
8000cd4: d14b bne.n 8000d6e <__udivmoddi4+0xa6>
|
|
8000cd6: 428a cmp r2, r1
|
|
8000cd8: 4615 mov r5, r2
|
|
8000cda: d967 bls.n 8000dac <__udivmoddi4+0xe4>
|
|
8000cdc: fab2 f282 clz r2, r2
|
|
8000ce0: b14a cbz r2, 8000cf6 <__udivmoddi4+0x2e>
|
|
8000ce2: f1c2 0720 rsb r7, r2, #32
|
|
8000ce6: fa01 f302 lsl.w r3, r1, r2
|
|
8000cea: fa20 f707 lsr.w r7, r0, r7
|
|
8000cee: 4095 lsls r5, r2
|
|
8000cf0: ea47 0803 orr.w r8, r7, r3
|
|
8000cf4: 4094 lsls r4, r2
|
|
8000cf6: ea4f 4e15 mov.w lr, r5, lsr #16
|
|
8000cfa: 0c23 lsrs r3, r4, #16
|
|
8000cfc: fbb8 f7fe udiv r7, r8, lr
|
|
8000d00: fa1f fc85 uxth.w ip, r5
|
|
8000d04: fb0e 8817 mls r8, lr, r7, r8
|
|
8000d08: ea43 4308 orr.w r3, r3, r8, lsl #16
|
|
8000d0c: fb07 f10c mul.w r1, r7, ip
|
|
8000d10: 4299 cmp r1, r3
|
|
8000d12: d909 bls.n 8000d28 <__udivmoddi4+0x60>
|
|
8000d14: 18eb adds r3, r5, r3
|
|
8000d16: f107 30ff add.w r0, r7, #4294967295
|
|
8000d1a: f080 811b bcs.w 8000f54 <__udivmoddi4+0x28c>
|
|
8000d1e: 4299 cmp r1, r3
|
|
8000d20: f240 8118 bls.w 8000f54 <__udivmoddi4+0x28c>
|
|
8000d24: 3f02 subs r7, #2
|
|
8000d26: 442b add r3, r5
|
|
8000d28: 1a5b subs r3, r3, r1
|
|
8000d2a: b2a4 uxth r4, r4
|
|
8000d2c: fbb3 f0fe udiv r0, r3, lr
|
|
8000d30: fb0e 3310 mls r3, lr, r0, r3
|
|
8000d34: ea44 4403 orr.w r4, r4, r3, lsl #16
|
|
8000d38: fb00 fc0c mul.w ip, r0, ip
|
|
8000d3c: 45a4 cmp ip, r4
|
|
8000d3e: d909 bls.n 8000d54 <__udivmoddi4+0x8c>
|
|
8000d40: 192c adds r4, r5, r4
|
|
8000d42: f100 33ff add.w r3, r0, #4294967295
|
|
8000d46: f080 8107 bcs.w 8000f58 <__udivmoddi4+0x290>
|
|
8000d4a: 45a4 cmp ip, r4
|
|
8000d4c: f240 8104 bls.w 8000f58 <__udivmoddi4+0x290>
|
|
8000d50: 3802 subs r0, #2
|
|
8000d52: 442c add r4, r5
|
|
8000d54: ea40 4007 orr.w r0, r0, r7, lsl #16
|
|
8000d58: eba4 040c sub.w r4, r4, ip
|
|
8000d5c: 2700 movs r7, #0
|
|
8000d5e: b11e cbz r6, 8000d68 <__udivmoddi4+0xa0>
|
|
8000d60: 40d4 lsrs r4, r2
|
|
8000d62: 2300 movs r3, #0
|
|
8000d64: e9c6 4300 strd r4, r3, [r6]
|
|
8000d68: 4639 mov r1, r7
|
|
8000d6a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
8000d6e: 428b cmp r3, r1
|
|
8000d70: d909 bls.n 8000d86 <__udivmoddi4+0xbe>
|
|
8000d72: 2e00 cmp r6, #0
|
|
8000d74: f000 80eb beq.w 8000f4e <__udivmoddi4+0x286>
|
|
8000d78: 2700 movs r7, #0
|
|
8000d7a: e9c6 0100 strd r0, r1, [r6]
|
|
8000d7e: 4638 mov r0, r7
|
|
8000d80: 4639 mov r1, r7
|
|
8000d82: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
8000d86: fab3 f783 clz r7, r3
|
|
8000d8a: 2f00 cmp r7, #0
|
|
8000d8c: d147 bne.n 8000e1e <__udivmoddi4+0x156>
|
|
8000d8e: 428b cmp r3, r1
|
|
8000d90: d302 bcc.n 8000d98 <__udivmoddi4+0xd0>
|
|
8000d92: 4282 cmp r2, r0
|
|
8000d94: f200 80fa bhi.w 8000f8c <__udivmoddi4+0x2c4>
|
|
8000d98: 1a84 subs r4, r0, r2
|
|
8000d9a: eb61 0303 sbc.w r3, r1, r3
|
|
8000d9e: 2001 movs r0, #1
|
|
8000da0: 4698 mov r8, r3
|
|
8000da2: 2e00 cmp r6, #0
|
|
8000da4: d0e0 beq.n 8000d68 <__udivmoddi4+0xa0>
|
|
8000da6: e9c6 4800 strd r4, r8, [r6]
|
|
8000daa: e7dd b.n 8000d68 <__udivmoddi4+0xa0>
|
|
8000dac: b902 cbnz r2, 8000db0 <__udivmoddi4+0xe8>
|
|
8000dae: deff udf #255 ; 0xff
|
|
8000db0: fab2 f282 clz r2, r2
|
|
8000db4: 2a00 cmp r2, #0
|
|
8000db6: f040 808f bne.w 8000ed8 <__udivmoddi4+0x210>
|
|
8000dba: 1b49 subs r1, r1, r5
|
|
8000dbc: ea4f 4e15 mov.w lr, r5, lsr #16
|
|
8000dc0: fa1f f885 uxth.w r8, r5
|
|
8000dc4: 2701 movs r7, #1
|
|
8000dc6: fbb1 fcfe udiv ip, r1, lr
|
|
8000dca: 0c23 lsrs r3, r4, #16
|
|
8000dcc: fb0e 111c mls r1, lr, ip, r1
|
|
8000dd0: ea43 4301 orr.w r3, r3, r1, lsl #16
|
|
8000dd4: fb08 f10c mul.w r1, r8, ip
|
|
8000dd8: 4299 cmp r1, r3
|
|
8000dda: d907 bls.n 8000dec <__udivmoddi4+0x124>
|
|
8000ddc: 18eb adds r3, r5, r3
|
|
8000dde: f10c 30ff add.w r0, ip, #4294967295
|
|
8000de2: d202 bcs.n 8000dea <__udivmoddi4+0x122>
|
|
8000de4: 4299 cmp r1, r3
|
|
8000de6: f200 80cd bhi.w 8000f84 <__udivmoddi4+0x2bc>
|
|
8000dea: 4684 mov ip, r0
|
|
8000dec: 1a59 subs r1, r3, r1
|
|
8000dee: b2a3 uxth r3, r4
|
|
8000df0: fbb1 f0fe udiv r0, r1, lr
|
|
8000df4: fb0e 1410 mls r4, lr, r0, r1
|
|
8000df8: ea43 4404 orr.w r4, r3, r4, lsl #16
|
|
8000dfc: fb08 f800 mul.w r8, r8, r0
|
|
8000e00: 45a0 cmp r8, r4
|
|
8000e02: d907 bls.n 8000e14 <__udivmoddi4+0x14c>
|
|
8000e04: 192c adds r4, r5, r4
|
|
8000e06: f100 33ff add.w r3, r0, #4294967295
|
|
8000e0a: d202 bcs.n 8000e12 <__udivmoddi4+0x14a>
|
|
8000e0c: 45a0 cmp r8, r4
|
|
8000e0e: f200 80b6 bhi.w 8000f7e <__udivmoddi4+0x2b6>
|
|
8000e12: 4618 mov r0, r3
|
|
8000e14: eba4 0408 sub.w r4, r4, r8
|
|
8000e18: ea40 400c orr.w r0, r0, ip, lsl #16
|
|
8000e1c: e79f b.n 8000d5e <__udivmoddi4+0x96>
|
|
8000e1e: f1c7 0c20 rsb ip, r7, #32
|
|
8000e22: 40bb lsls r3, r7
|
|
8000e24: fa22 fe0c lsr.w lr, r2, ip
|
|
8000e28: ea4e 0e03 orr.w lr, lr, r3
|
|
8000e2c: fa01 f407 lsl.w r4, r1, r7
|
|
8000e30: fa20 f50c lsr.w r5, r0, ip
|
|
8000e34: fa21 f30c lsr.w r3, r1, ip
|
|
8000e38: ea4f 481e mov.w r8, lr, lsr #16
|
|
8000e3c: 4325 orrs r5, r4
|
|
8000e3e: fbb3 f9f8 udiv r9, r3, r8
|
|
8000e42: 0c2c lsrs r4, r5, #16
|
|
8000e44: fb08 3319 mls r3, r8, r9, r3
|
|
8000e48: fa1f fa8e uxth.w sl, lr
|
|
8000e4c: ea44 4303 orr.w r3, r4, r3, lsl #16
|
|
8000e50: fb09 f40a mul.w r4, r9, sl
|
|
8000e54: 429c cmp r4, r3
|
|
8000e56: fa02 f207 lsl.w r2, r2, r7
|
|
8000e5a: fa00 f107 lsl.w r1, r0, r7
|
|
8000e5e: d90b bls.n 8000e78 <__udivmoddi4+0x1b0>
|
|
8000e60: eb1e 0303 adds.w r3, lr, r3
|
|
8000e64: f109 30ff add.w r0, r9, #4294967295
|
|
8000e68: f080 8087 bcs.w 8000f7a <__udivmoddi4+0x2b2>
|
|
8000e6c: 429c cmp r4, r3
|
|
8000e6e: f240 8084 bls.w 8000f7a <__udivmoddi4+0x2b2>
|
|
8000e72: f1a9 0902 sub.w r9, r9, #2
|
|
8000e76: 4473 add r3, lr
|
|
8000e78: 1b1b subs r3, r3, r4
|
|
8000e7a: b2ad uxth r5, r5
|
|
8000e7c: fbb3 f0f8 udiv r0, r3, r8
|
|
8000e80: fb08 3310 mls r3, r8, r0, r3
|
|
8000e84: ea45 4403 orr.w r4, r5, r3, lsl #16
|
|
8000e88: fb00 fa0a mul.w sl, r0, sl
|
|
8000e8c: 45a2 cmp sl, r4
|
|
8000e8e: d908 bls.n 8000ea2 <__udivmoddi4+0x1da>
|
|
8000e90: eb1e 0404 adds.w r4, lr, r4
|
|
8000e94: f100 33ff add.w r3, r0, #4294967295
|
|
8000e98: d26b bcs.n 8000f72 <__udivmoddi4+0x2aa>
|
|
8000e9a: 45a2 cmp sl, r4
|
|
8000e9c: d969 bls.n 8000f72 <__udivmoddi4+0x2aa>
|
|
8000e9e: 3802 subs r0, #2
|
|
8000ea0: 4474 add r4, lr
|
|
8000ea2: ea40 4009 orr.w r0, r0, r9, lsl #16
|
|
8000ea6: fba0 8902 umull r8, r9, r0, r2
|
|
8000eaa: eba4 040a sub.w r4, r4, sl
|
|
8000eae: 454c cmp r4, r9
|
|
8000eb0: 46c2 mov sl, r8
|
|
8000eb2: 464b mov r3, r9
|
|
8000eb4: d354 bcc.n 8000f60 <__udivmoddi4+0x298>
|
|
8000eb6: d051 beq.n 8000f5c <__udivmoddi4+0x294>
|
|
8000eb8: 2e00 cmp r6, #0
|
|
8000eba: d069 beq.n 8000f90 <__udivmoddi4+0x2c8>
|
|
8000ebc: ebb1 050a subs.w r5, r1, sl
|
|
8000ec0: eb64 0403 sbc.w r4, r4, r3
|
|
8000ec4: fa04 fc0c lsl.w ip, r4, ip
|
|
8000ec8: 40fd lsrs r5, r7
|
|
8000eca: 40fc lsrs r4, r7
|
|
8000ecc: ea4c 0505 orr.w r5, ip, r5
|
|
8000ed0: e9c6 5400 strd r5, r4, [r6]
|
|
8000ed4: 2700 movs r7, #0
|
|
8000ed6: e747 b.n 8000d68 <__udivmoddi4+0xa0>
|
|
8000ed8: f1c2 0320 rsb r3, r2, #32
|
|
8000edc: fa20 f703 lsr.w r7, r0, r3
|
|
8000ee0: 4095 lsls r5, r2
|
|
8000ee2: fa01 f002 lsl.w r0, r1, r2
|
|
8000ee6: fa21 f303 lsr.w r3, r1, r3
|
|
8000eea: ea4f 4e15 mov.w lr, r5, lsr #16
|
|
8000eee: 4338 orrs r0, r7
|
|
8000ef0: 0c01 lsrs r1, r0, #16
|
|
8000ef2: fbb3 f7fe udiv r7, r3, lr
|
|
8000ef6: fa1f f885 uxth.w r8, r5
|
|
8000efa: fb0e 3317 mls r3, lr, r7, r3
|
|
8000efe: ea41 4103 orr.w r1, r1, r3, lsl #16
|
|
8000f02: fb07 f308 mul.w r3, r7, r8
|
|
8000f06: 428b cmp r3, r1
|
|
8000f08: fa04 f402 lsl.w r4, r4, r2
|
|
8000f0c: d907 bls.n 8000f1e <__udivmoddi4+0x256>
|
|
8000f0e: 1869 adds r1, r5, r1
|
|
8000f10: f107 3cff add.w ip, r7, #4294967295
|
|
8000f14: d22f bcs.n 8000f76 <__udivmoddi4+0x2ae>
|
|
8000f16: 428b cmp r3, r1
|
|
8000f18: d92d bls.n 8000f76 <__udivmoddi4+0x2ae>
|
|
8000f1a: 3f02 subs r7, #2
|
|
8000f1c: 4429 add r1, r5
|
|
8000f1e: 1acb subs r3, r1, r3
|
|
8000f20: b281 uxth r1, r0
|
|
8000f22: fbb3 f0fe udiv r0, r3, lr
|
|
8000f26: fb0e 3310 mls r3, lr, r0, r3
|
|
8000f2a: ea41 4103 orr.w r1, r1, r3, lsl #16
|
|
8000f2e: fb00 f308 mul.w r3, r0, r8
|
|
8000f32: 428b cmp r3, r1
|
|
8000f34: d907 bls.n 8000f46 <__udivmoddi4+0x27e>
|
|
8000f36: 1869 adds r1, r5, r1
|
|
8000f38: f100 3cff add.w ip, r0, #4294967295
|
|
8000f3c: d217 bcs.n 8000f6e <__udivmoddi4+0x2a6>
|
|
8000f3e: 428b cmp r3, r1
|
|
8000f40: d915 bls.n 8000f6e <__udivmoddi4+0x2a6>
|
|
8000f42: 3802 subs r0, #2
|
|
8000f44: 4429 add r1, r5
|
|
8000f46: 1ac9 subs r1, r1, r3
|
|
8000f48: ea40 4707 orr.w r7, r0, r7, lsl #16
|
|
8000f4c: e73b b.n 8000dc6 <__udivmoddi4+0xfe>
|
|
8000f4e: 4637 mov r7, r6
|
|
8000f50: 4630 mov r0, r6
|
|
8000f52: e709 b.n 8000d68 <__udivmoddi4+0xa0>
|
|
8000f54: 4607 mov r7, r0
|
|
8000f56: e6e7 b.n 8000d28 <__udivmoddi4+0x60>
|
|
8000f58: 4618 mov r0, r3
|
|
8000f5a: e6fb b.n 8000d54 <__udivmoddi4+0x8c>
|
|
8000f5c: 4541 cmp r1, r8
|
|
8000f5e: d2ab bcs.n 8000eb8 <__udivmoddi4+0x1f0>
|
|
8000f60: ebb8 0a02 subs.w sl, r8, r2
|
|
8000f64: eb69 020e sbc.w r2, r9, lr
|
|
8000f68: 3801 subs r0, #1
|
|
8000f6a: 4613 mov r3, r2
|
|
8000f6c: e7a4 b.n 8000eb8 <__udivmoddi4+0x1f0>
|
|
8000f6e: 4660 mov r0, ip
|
|
8000f70: e7e9 b.n 8000f46 <__udivmoddi4+0x27e>
|
|
8000f72: 4618 mov r0, r3
|
|
8000f74: e795 b.n 8000ea2 <__udivmoddi4+0x1da>
|
|
8000f76: 4667 mov r7, ip
|
|
8000f78: e7d1 b.n 8000f1e <__udivmoddi4+0x256>
|
|
8000f7a: 4681 mov r9, r0
|
|
8000f7c: e77c b.n 8000e78 <__udivmoddi4+0x1b0>
|
|
8000f7e: 3802 subs r0, #2
|
|
8000f80: 442c add r4, r5
|
|
8000f82: e747 b.n 8000e14 <__udivmoddi4+0x14c>
|
|
8000f84: f1ac 0c02 sub.w ip, ip, #2
|
|
8000f88: 442b add r3, r5
|
|
8000f8a: e72f b.n 8000dec <__udivmoddi4+0x124>
|
|
8000f8c: 4638 mov r0, r7
|
|
8000f8e: e708 b.n 8000da2 <__udivmoddi4+0xda>
|
|
8000f90: 4637 mov r7, r6
|
|
8000f92: e6e9 b.n 8000d68 <__udivmoddi4+0xa0>
|
|
|
|
08000f94 <__aeabi_idiv0>:
|
|
8000f94: 4770 bx lr
|
|
8000f96: bf00 nop
|
|
|
|
08000f98 <setup>:
|
|
extern I2C_HandleTypeDef hi2c1;
|
|
LSM303 eComp;
|
|
COMPASS_LEDS compLeds;
|
|
|
|
void setup(void)
|
|
{
|
|
8000f98: b580 push {r7, lr}
|
|
8000f9a: af00 add r7, sp, #0
|
|
COMPASS_LEDS_Init(&compLeds);
|
|
8000f9c: 481b ldr r0, [pc, #108] ; (800100c <setup+0x74>)
|
|
8000f9e: f000 fe55 bl 8001c4c <COMPASS_LEDS_Init>
|
|
|
|
if(!LSM303_Init(&eComp, &hi2c1))
|
|
8000fa2: 491b ldr r1, [pc, #108] ; (8001010 <setup+0x78>)
|
|
8000fa4: 481b ldr r0, [pc, #108] ; (8001014 <setup+0x7c>)
|
|
8000fa6: f000 ff85 bl 8001eb4 <LSM303_Init>
|
|
8000faa: 4603 mov r3, r0
|
|
8000fac: 2b00 cmp r3, #0
|
|
8000fae: d102 bne.n 8000fb6 <setup+0x1e>
|
|
printf("Failed to init eCompass\r\n");
|
|
8000fb0: 4819 ldr r0, [pc, #100] ; (8001018 <setup+0x80>)
|
|
8000fb2: f00a f94f bl 800b254 <puts>
|
|
|
|
if(!LSM303_EnableTemperatureSensor(&eComp, true))
|
|
8000fb6: 2101 movs r1, #1
|
|
8000fb8: 4816 ldr r0, [pc, #88] ; (8001014 <setup+0x7c>)
|
|
8000fba: f000 ff9a bl 8001ef2 <LSM303_EnableTemperatureSensor>
|
|
8000fbe: 4603 mov r3, r0
|
|
8000fc0: 2b00 cmp r3, #0
|
|
8000fc2: d102 bne.n 8000fca <setup+0x32>
|
|
printf("Failed to enable temp sensor\r\n");
|
|
8000fc4: 4815 ldr r0, [pc, #84] ; (800101c <setup+0x84>)
|
|
8000fc6: f00a f945 bl 800b254 <puts>
|
|
|
|
if(!LSM303_ApplyConfig(&eComp))
|
|
8000fca: 4812 ldr r0, [pc, #72] ; (8001014 <setup+0x7c>)
|
|
8000fcc: f000 ffac bl 8001f28 <LSM303_ApplyConfig>
|
|
8000fd0: 4603 mov r3, r0
|
|
8000fd2: 2b00 cmp r3, #0
|
|
8000fd4: d102 bne.n 8000fdc <setup+0x44>
|
|
printf("Failed to apply config\r\n");
|
|
8000fd6: 4812 ldr r0, [pc, #72] ; (8001020 <setup+0x88>)
|
|
8000fd8: f00a f93c bl 800b254 <puts>
|
|
|
|
if(!LSM303_GetDeviceID(&eComp, id))
|
|
8000fdc: 4911 ldr r1, [pc, #68] ; (8001024 <setup+0x8c>)
|
|
8000fde: 480d ldr r0, [pc, #52] ; (8001014 <setup+0x7c>)
|
|
8000fe0: f000 ffee bl 8001fc0 <LSM303_GetDeviceID>
|
|
8000fe4: 4603 mov r3, r0
|
|
8000fe6: 2b00 cmp r3, #0
|
|
8000fe8: d103 bne.n 8000ff2 <setup+0x5a>
|
|
printf("Failed to retrieve id\r\n");
|
|
8000fea: 480f ldr r0, [pc, #60] ; (8001028 <setup+0x90>)
|
|
8000fec: f00a f932 bl 800b254 <puts>
|
|
else
|
|
printf("LSM303 ID : %#X,%#X,%#X\r\n", id[0], id[1], id[2]);
|
|
}
|
|
8000ff0: e00a b.n 8001008 <setup+0x70>
|
|
printf("LSM303 ID : %#X,%#X,%#X\r\n", id[0], id[1], id[2]);
|
|
8000ff2: 4b0c ldr r3, [pc, #48] ; (8001024 <setup+0x8c>)
|
|
8000ff4: 781b ldrb r3, [r3, #0]
|
|
8000ff6: 4619 mov r1, r3
|
|
8000ff8: 4b0a ldr r3, [pc, #40] ; (8001024 <setup+0x8c>)
|
|
8000ffa: 785b ldrb r3, [r3, #1]
|
|
8000ffc: 461a mov r2, r3
|
|
8000ffe: 4b09 ldr r3, [pc, #36] ; (8001024 <setup+0x8c>)
|
|
8001000: 789b ldrb r3, [r3, #2]
|
|
8001002: 480a ldr r0, [pc, #40] ; (800102c <setup+0x94>)
|
|
8001004: f00a f8b2 bl 800b16c <iprintf>
|
|
}
|
|
8001008: bf00 nop
|
|
800100a: bd80 pop {r7, pc}
|
|
800100c: 20000244 .word 0x20000244
|
|
8001010: 20000294 .word 0x20000294
|
|
8001014: 2000023c .word 0x2000023c
|
|
8001018: 0800e820 .word 0x0800e820
|
|
800101c: 0800e83c .word 0x0800e83c
|
|
8001020: 0800e85c .word 0x0800e85c
|
|
8001024: 20000224 .word 0x20000224
|
|
8001028: 0800e874 .word 0x0800e874
|
|
800102c: 0800e88c .word 0x0800e88c
|
|
|
|
08001030 <loop>:
|
|
|
|
void loop(void)
|
|
{
|
|
8001030: b590 push {r4, r7, lr}
|
|
8001032: b083 sub sp, #12
|
|
8001034: af00 add r7, sp, #0
|
|
if(HAL_GetTick() - ts_print > PRINT_RATE_MS)
|
|
8001036: f001 f971 bl 800231c <HAL_GetTick>
|
|
800103a: 4602 mov r2, r0
|
|
800103c: 4b50 ldr r3, [pc, #320] ; (8001180 <loop+0x150>)
|
|
800103e: 681b ldr r3, [r3, #0]
|
|
8001040: 1ad3 subs r3, r2, r3
|
|
8001042: 2b64 cmp r3, #100 ; 0x64
|
|
8001044: d93a bls.n 80010bc <loop+0x8c>
|
|
{
|
|
//Lets read the temperature :
|
|
float temperature = 0;
|
|
8001046: f04f 0300 mov.w r3, #0
|
|
800104a: 607b str r3, [r7, #4]
|
|
|
|
if(!LSM303_GetTemperature(&eComp, &temperature, NULL))
|
|
800104c: 1d3b adds r3, r7, #4
|
|
800104e: 2200 movs r2, #0
|
|
8001050: 4619 mov r1, r3
|
|
8001052: 484c ldr r0, [pc, #304] ; (8001184 <loop+0x154>)
|
|
8001054: f000 ffe8 bl 8002028 <LSM303_GetTemperature>
|
|
8001058: 4603 mov r3, r0
|
|
800105a: 2b00 cmp r3, #0
|
|
800105c: d103 bne.n 8001066 <loop+0x36>
|
|
printf("Failed to get temperature\r\n");
|
|
800105e: 484a ldr r0, [pc, #296] ; (8001188 <loop+0x158>)
|
|
8001060: f00a f8f8 bl 800b254 <puts>
|
|
8001064: e00a b.n 800107c <loop+0x4c>
|
|
else
|
|
printf("Temp is : %.3f\r\n", temperature);
|
|
8001066: 687b ldr r3, [r7, #4]
|
|
8001068: 4618 mov r0, r3
|
|
800106a: f7ff fa75 bl 8000558 <__aeabi_f2d>
|
|
800106e: 4603 mov r3, r0
|
|
8001070: 460c mov r4, r1
|
|
8001072: 461a mov r2, r3
|
|
8001074: 4623 mov r3, r4
|
|
8001076: 4845 ldr r0, [pc, #276] ; (800118c <loop+0x15c>)
|
|
8001078: f00a f878 bl 800b16c <iprintf>
|
|
|
|
if(!LSM303_GetMagneticFieldData(&eComp, &x, &y, &z))
|
|
800107c: 4b44 ldr r3, [pc, #272] ; (8001190 <loop+0x160>)
|
|
800107e: 4a45 ldr r2, [pc, #276] ; (8001194 <loop+0x164>)
|
|
8001080: 4945 ldr r1, [pc, #276] ; (8001198 <loop+0x168>)
|
|
8001082: 4840 ldr r0, [pc, #256] ; (8001184 <loop+0x154>)
|
|
8001084: f001 f82a bl 80020dc <LSM303_GetMagneticFieldData>
|
|
8001088: 4603 mov r3, r0
|
|
800108a: 2b00 cmp r3, #0
|
|
800108c: d103 bne.n 8001096 <loop+0x66>
|
|
printf("Failed to get magnetic data\r\n");
|
|
800108e: 4843 ldr r0, [pc, #268] ; (800119c <loop+0x16c>)
|
|
8001090: f00a f8e0 bl 800b254 <puts>
|
|
8001094: e00d b.n 80010b2 <loop+0x82>
|
|
else
|
|
printf("x : %d, y : %d, z : %d\r\n", x, y, z);
|
|
8001096: 4b40 ldr r3, [pc, #256] ; (8001198 <loop+0x168>)
|
|
8001098: f9b3 3000 ldrsh.w r3, [r3]
|
|
800109c: 4619 mov r1, r3
|
|
800109e: 4b3d ldr r3, [pc, #244] ; (8001194 <loop+0x164>)
|
|
80010a0: f9b3 3000 ldrsh.w r3, [r3]
|
|
80010a4: 461a mov r2, r3
|
|
80010a6: 4b3a ldr r3, [pc, #232] ; (8001190 <loop+0x160>)
|
|
80010a8: f9b3 3000 ldrsh.w r3, [r3]
|
|
80010ac: 483c ldr r0, [pc, #240] ; (80011a0 <loop+0x170>)
|
|
80010ae: f00a f85d bl 800b16c <iprintf>
|
|
|
|
ts_print = HAL_GetTick();
|
|
80010b2: f001 f933 bl 800231c <HAL_GetTick>
|
|
80010b6: 4602 mov r2, r0
|
|
80010b8: 4b31 ldr r3, [pc, #196] ; (8001180 <loop+0x150>)
|
|
80010ba: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
if(x > 0 && x > abs(y) - 50)
|
|
80010bc: 4b36 ldr r3, [pc, #216] ; (8001198 <loop+0x168>)
|
|
80010be: f9b3 3000 ldrsh.w r3, [r3]
|
|
80010c2: 2b00 cmp r3, #0
|
|
80010c4: dd10 ble.n 80010e8 <loop+0xb8>
|
|
80010c6: 4b34 ldr r3, [pc, #208] ; (8001198 <loop+0x168>)
|
|
80010c8: f9b3 3000 ldrsh.w r3, [r3]
|
|
80010cc: 461a mov r2, r3
|
|
80010ce: 4b31 ldr r3, [pc, #196] ; (8001194 <loop+0x164>)
|
|
80010d0: f9b3 3000 ldrsh.w r3, [r3]
|
|
80010d4: 2b00 cmp r3, #0
|
|
80010d6: bfb8 it lt
|
|
80010d8: 425b neglt r3, r3
|
|
80010da: 3b32 subs r3, #50 ; 0x32
|
|
80010dc: 429a cmp r2, r3
|
|
80010de: dd03 ble.n 80010e8 <loop+0xb8>
|
|
COMPASS_LEDS_Light(&compLeds, NORTH);
|
|
80010e0: 2101 movs r1, #1
|
|
80010e2: 4830 ldr r0, [pc, #192] ; (80011a4 <loop+0x174>)
|
|
80010e4: f000 fe1c bl 8001d20 <COMPASS_LEDS_Light>
|
|
if(x < 0 && abs(x) > abs(y) - 50)
|
|
80010e8: 4b2b ldr r3, [pc, #172] ; (8001198 <loop+0x168>)
|
|
80010ea: f9b3 3000 ldrsh.w r3, [r3]
|
|
80010ee: 2b00 cmp r3, #0
|
|
80010f0: da13 bge.n 800111a <loop+0xea>
|
|
80010f2: 4b29 ldr r3, [pc, #164] ; (8001198 <loop+0x168>)
|
|
80010f4: f9b3 3000 ldrsh.w r3, [r3]
|
|
80010f8: ea83 72e3 eor.w r2, r3, r3, asr #31
|
|
80010fc: eba2 72e3 sub.w r2, r2, r3, asr #31
|
|
8001100: 4b24 ldr r3, [pc, #144] ; (8001194 <loop+0x164>)
|
|
8001102: f9b3 3000 ldrsh.w r3, [r3]
|
|
8001106: 2b00 cmp r3, #0
|
|
8001108: bfb8 it lt
|
|
800110a: 425b neglt r3, r3
|
|
800110c: 3b32 subs r3, #50 ; 0x32
|
|
800110e: 429a cmp r2, r3
|
|
8001110: dd03 ble.n 800111a <loop+0xea>
|
|
COMPASS_LEDS_Light(&compLeds, SOUTH);
|
|
8001112: 2102 movs r1, #2
|
|
8001114: 4823 ldr r0, [pc, #140] ; (80011a4 <loop+0x174>)
|
|
8001116: f000 fe03 bl 8001d20 <COMPASS_LEDS_Light>
|
|
if(y > 0 && y > abs(x) - 50)
|
|
800111a: 4b1e ldr r3, [pc, #120] ; (8001194 <loop+0x164>)
|
|
800111c: f9b3 3000 ldrsh.w r3, [r3]
|
|
8001120: 2b00 cmp r3, #0
|
|
8001122: dd10 ble.n 8001146 <loop+0x116>
|
|
8001124: 4b1b ldr r3, [pc, #108] ; (8001194 <loop+0x164>)
|
|
8001126: f9b3 3000 ldrsh.w r3, [r3]
|
|
800112a: 461a mov r2, r3
|
|
800112c: 4b1a ldr r3, [pc, #104] ; (8001198 <loop+0x168>)
|
|
800112e: f9b3 3000 ldrsh.w r3, [r3]
|
|
8001132: 2b00 cmp r3, #0
|
|
8001134: bfb8 it lt
|
|
8001136: 425b neglt r3, r3
|
|
8001138: 3b32 subs r3, #50 ; 0x32
|
|
800113a: 429a cmp r2, r3
|
|
800113c: dd03 ble.n 8001146 <loop+0x116>
|
|
COMPASS_LEDS_Light(&compLeds, EAST);
|
|
800113e: 2108 movs r1, #8
|
|
8001140: 4818 ldr r0, [pc, #96] ; (80011a4 <loop+0x174>)
|
|
8001142: f000 fded bl 8001d20 <COMPASS_LEDS_Light>
|
|
if(y < 0 && abs(y) > abs(x) - 50)
|
|
8001146: 4b13 ldr r3, [pc, #76] ; (8001194 <loop+0x164>)
|
|
8001148: f9b3 3000 ldrsh.w r3, [r3]
|
|
800114c: 2b00 cmp r3, #0
|
|
800114e: da13 bge.n 8001178 <loop+0x148>
|
|
8001150: 4b10 ldr r3, [pc, #64] ; (8001194 <loop+0x164>)
|
|
8001152: f9b3 3000 ldrsh.w r3, [r3]
|
|
8001156: ea83 72e3 eor.w r2, r3, r3, asr #31
|
|
800115a: eba2 72e3 sub.w r2, r2, r3, asr #31
|
|
800115e: 4b0e ldr r3, [pc, #56] ; (8001198 <loop+0x168>)
|
|
8001160: f9b3 3000 ldrsh.w r3, [r3]
|
|
8001164: 2b00 cmp r3, #0
|
|
8001166: bfb8 it lt
|
|
8001168: 425b neglt r3, r3
|
|
800116a: 3b32 subs r3, #50 ; 0x32
|
|
800116c: 429a cmp r2, r3
|
|
800116e: dd03 ble.n 8001178 <loop+0x148>
|
|
COMPASS_LEDS_Light(&compLeds, WEST);
|
|
8001170: 2104 movs r1, #4
|
|
8001172: 480c ldr r0, [pc, #48] ; (80011a4 <loop+0x174>)
|
|
8001174: f000 fdd4 bl 8001d20 <COMPASS_LEDS_Light>
|
|
}
|
|
8001178: bf00 nop
|
|
800117a: 370c adds r7, #12
|
|
800117c: 46bd mov sp, r7
|
|
800117e: bd90 pop {r4, r7, pc}
|
|
8001180: 20000218 .word 0x20000218
|
|
8001184: 2000023c .word 0x2000023c
|
|
8001188: 0800e8a8 .word 0x0800e8a8
|
|
800118c: 0800e8c4 .word 0x0800e8c4
|
|
8001190: 20000220 .word 0x20000220
|
|
8001194: 2000021e .word 0x2000021e
|
|
8001198: 2000021c .word 0x2000021c
|
|
800119c: 0800e8d8 .word 0x0800e8d8
|
|
80011a0: 0800e8f8 .word 0x0800e8f8
|
|
80011a4: 20000244 .word 0x20000244
|
|
|
|
080011a8 <__io_putchar>:
|
|
/* USER CODE END PFP */
|
|
|
|
/* Private user code ---------------------------------------------------------*/
|
|
/* USER CODE BEGIN 0 */
|
|
int __io_putchar(int ch)
|
|
{
|
|
80011a8: b580 push {r7, lr}
|
|
80011aa: b082 sub sp, #8
|
|
80011ac: af00 add r7, sp, #0
|
|
80011ae: 6078 str r0, [r7, #4]
|
|
HAL_UART_Transmit(&huart2, (uint8_t*)&ch, 1, HAL_MAX_DELAY);
|
|
80011b0: 1d39 adds r1, r7, #4
|
|
80011b2: f04f 33ff mov.w r3, #4294967295
|
|
80011b6: 2201 movs r2, #1
|
|
80011b8: 4803 ldr r0, [pc, #12] ; (80011c8 <__io_putchar+0x20>)
|
|
80011ba: f005 fb02 bl 80067c2 <HAL_UART_Transmit>
|
|
return ch;
|
|
80011be: 687b ldr r3, [r7, #4]
|
|
}
|
|
80011c0: 4618 mov r0, r3
|
|
80011c2: 3708 adds r7, #8
|
|
80011c4: 46bd mov sp, r7
|
|
80011c6: bd80 pop {r7, pc}
|
|
80011c8: 20000340 .word 0x20000340
|
|
|
|
080011cc <main>:
|
|
/**
|
|
* @brief The application entry point.
|
|
* @retval int
|
|
*/
|
|
int main(void)
|
|
{
|
|
80011cc: b580 push {r7, lr}
|
|
80011ce: af00 add r7, sp, #0
|
|
/* USER CODE END 1 */
|
|
|
|
/* MCU Configuration--------------------------------------------------------*/
|
|
|
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
|
HAL_Init();
|
|
80011d0: f001 f83e bl 8002250 <HAL_Init>
|
|
/* USER CODE BEGIN Init */
|
|
|
|
/* USER CODE END Init */
|
|
|
|
/* Configure the system clock */
|
|
SystemClock_Config();
|
|
80011d4: f000 f816 bl 8001204 <SystemClock_Config>
|
|
/* USER CODE BEGIN SysInit */
|
|
|
|
/* USER CODE END SysInit */
|
|
|
|
/* Initialize all configured peripherals */
|
|
MX_GPIO_Init();
|
|
80011d8: f000 f984 bl 80014e4 <MX_GPIO_Init>
|
|
MX_I2C1_Init();
|
|
80011dc: f000 f896 bl 800130c <MX_I2C1_Init>
|
|
MX_I2S2_Init();
|
|
80011e0: f000 f8c2 bl 8001368 <MX_I2S2_Init>
|
|
MX_I2S3_Init();
|
|
80011e4: f000 f8ee bl 80013c4 <MX_I2S3_Init>
|
|
MX_SPI1_Init();
|
|
80011e8: f000 f91c bl 8001424 <MX_SPI1_Init>
|
|
MX_USB_HOST_Init();
|
|
80011ec: f008 fd8e bl 8009d0c <MX_USB_HOST_Init>
|
|
MX_USART2_UART_Init();
|
|
80011f0: f000 f94e bl 8001490 <MX_USART2_UART_Init>
|
|
/* USER CODE BEGIN 2 */
|
|
setup();
|
|
80011f4: f7ff fed0 bl 8000f98 <setup>
|
|
/* Infinite loop */
|
|
/* USER CODE BEGIN WHILE */
|
|
while (1)
|
|
{
|
|
/* USER CODE END WHILE */
|
|
MX_USB_HOST_Process();
|
|
80011f8: f008 fdae bl 8009d58 <MX_USB_HOST_Process>
|
|
|
|
/* USER CODE BEGIN 3 */
|
|
loop();
|
|
80011fc: f7ff ff18 bl 8001030 <loop>
|
|
MX_USB_HOST_Process();
|
|
8001200: e7fa b.n 80011f8 <main+0x2c>
|
|
...
|
|
|
|
08001204 <SystemClock_Config>:
|
|
/**
|
|
* @brief System Clock Configuration
|
|
* @retval None
|
|
*/
|
|
void SystemClock_Config(void)
|
|
{
|
|
8001204: b580 push {r7, lr}
|
|
8001206: b098 sub sp, #96 ; 0x60
|
|
8001208: af00 add r7, sp, #0
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
|
800120a: f107 0330 add.w r3, r7, #48 ; 0x30
|
|
800120e: 2230 movs r2, #48 ; 0x30
|
|
8001210: 2100 movs r1, #0
|
|
8001212: 4618 mov r0, r3
|
|
8001214: f009 f8bc bl 800a390 <memset>
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
|
8001218: f107 031c add.w r3, r7, #28
|
|
800121c: 2200 movs r2, #0
|
|
800121e: 601a str r2, [r3, #0]
|
|
8001220: 605a str r2, [r3, #4]
|
|
8001222: 609a str r2, [r3, #8]
|
|
8001224: 60da str r2, [r3, #12]
|
|
8001226: 611a str r2, [r3, #16]
|
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
|
8001228: f107 0308 add.w r3, r7, #8
|
|
800122c: 2200 movs r2, #0
|
|
800122e: 601a str r2, [r3, #0]
|
|
8001230: 605a str r2, [r3, #4]
|
|
8001232: 609a str r2, [r3, #8]
|
|
8001234: 60da str r2, [r3, #12]
|
|
8001236: 611a str r2, [r3, #16]
|
|
|
|
/** Configure the main internal regulator output voltage
|
|
*/
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8001238: 2300 movs r3, #0
|
|
800123a: 607b str r3, [r7, #4]
|
|
800123c: 4b31 ldr r3, [pc, #196] ; (8001304 <SystemClock_Config+0x100>)
|
|
800123e: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8001240: 4a30 ldr r2, [pc, #192] ; (8001304 <SystemClock_Config+0x100>)
|
|
8001242: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
8001246: 6413 str r3, [r2, #64] ; 0x40
|
|
8001248: 4b2e ldr r3, [pc, #184] ; (8001304 <SystemClock_Config+0x100>)
|
|
800124a: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
800124c: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8001250: 607b str r3, [r7, #4]
|
|
8001252: 687b ldr r3, [r7, #4]
|
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
|
8001254: 2300 movs r3, #0
|
|
8001256: 603b str r3, [r7, #0]
|
|
8001258: 4b2b ldr r3, [pc, #172] ; (8001308 <SystemClock_Config+0x104>)
|
|
800125a: 681b ldr r3, [r3, #0]
|
|
800125c: f423 4340 bic.w r3, r3, #49152 ; 0xc000
|
|
8001260: 4a29 ldr r2, [pc, #164] ; (8001308 <SystemClock_Config+0x104>)
|
|
8001262: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8001266: 6013 str r3, [r2, #0]
|
|
8001268: 4b27 ldr r3, [pc, #156] ; (8001308 <SystemClock_Config+0x104>)
|
|
800126a: 681b ldr r3, [r3, #0]
|
|
800126c: f403 4340 and.w r3, r3, #49152 ; 0xc000
|
|
8001270: 603b str r3, [r7, #0]
|
|
8001272: 683b ldr r3, [r7, #0]
|
|
/** Initializes the RCC Oscillators according to the specified parameters
|
|
* in the RCC_OscInitTypeDef structure.
|
|
*/
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
|
8001274: 2301 movs r3, #1
|
|
8001276: 633b str r3, [r7, #48] ; 0x30
|
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|
8001278: f44f 3380 mov.w r3, #65536 ; 0x10000
|
|
800127c: 637b str r3, [r7, #52] ; 0x34
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|
800127e: 2302 movs r3, #2
|
|
8001280: 64bb str r3, [r7, #72] ; 0x48
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|
8001282: f44f 0380 mov.w r3, #4194304 ; 0x400000
|
|
8001286: 64fb str r3, [r7, #76] ; 0x4c
|
|
RCC_OscInitStruct.PLL.PLLM = 8;
|
|
8001288: 2308 movs r3, #8
|
|
800128a: 653b str r3, [r7, #80] ; 0x50
|
|
RCC_OscInitStruct.PLL.PLLN = 336;
|
|
800128c: f44f 73a8 mov.w r3, #336 ; 0x150
|
|
8001290: 657b str r3, [r7, #84] ; 0x54
|
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
|
|
8001292: 2304 movs r3, #4
|
|
8001294: 65bb str r3, [r7, #88] ; 0x58
|
|
RCC_OscInitStruct.PLL.PLLQ = 7;
|
|
8001296: 2307 movs r3, #7
|
|
8001298: 65fb str r3, [r7, #92] ; 0x5c
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
|
800129a: f107 0330 add.w r3, r7, #48 ; 0x30
|
|
800129e: 4618 mov r0, r3
|
|
80012a0: f004 fc32 bl 8005b08 <HAL_RCC_OscConfig>
|
|
80012a4: 4603 mov r3, r0
|
|
80012a6: 2b00 cmp r3, #0
|
|
80012a8: d001 beq.n 80012ae <SystemClock_Config+0xaa>
|
|
{
|
|
Error_Handler();
|
|
80012aa: f000 f9f5 bl 8001698 <Error_Handler>
|
|
}
|
|
/** Initializes the CPU, AHB and APB buses clocks
|
|
*/
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
|
80012ae: 230f movs r3, #15
|
|
80012b0: 61fb str r3, [r7, #28]
|
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|
80012b2: 2302 movs r3, #2
|
|
80012b4: 623b str r3, [r7, #32]
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
|
80012b6: 2300 movs r3, #0
|
|
80012b8: 627b str r3, [r7, #36] ; 0x24
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
|
80012ba: f44f 5380 mov.w r3, #4096 ; 0x1000
|
|
80012be: 62bb str r3, [r7, #40] ; 0x28
|
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
|
80012c0: 2300 movs r3, #0
|
|
80012c2: 62fb str r3, [r7, #44] ; 0x2c
|
|
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
|
80012c4: f107 031c add.w r3, r7, #28
|
|
80012c8: 2102 movs r1, #2
|
|
80012ca: 4618 mov r0, r3
|
|
80012cc: f004 fe8c bl 8005fe8 <HAL_RCC_ClockConfig>
|
|
80012d0: 4603 mov r3, r0
|
|
80012d2: 2b00 cmp r3, #0
|
|
80012d4: d001 beq.n 80012da <SystemClock_Config+0xd6>
|
|
{
|
|
Error_Handler();
|
|
80012d6: f000 f9df bl 8001698 <Error_Handler>
|
|
}
|
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2S;
|
|
80012da: 2301 movs r3, #1
|
|
80012dc: 60bb str r3, [r7, #8]
|
|
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
|
|
80012de: 23c0 movs r3, #192 ; 0xc0
|
|
80012e0: 60fb str r3, [r7, #12]
|
|
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
|
|
80012e2: 2302 movs r3, #2
|
|
80012e4: 613b str r3, [r7, #16]
|
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
|
80012e6: f107 0308 add.w r3, r7, #8
|
|
80012ea: 4618 mov r0, r3
|
|
80012ec: f005 f86e bl 80063cc <HAL_RCCEx_PeriphCLKConfig>
|
|
80012f0: 4603 mov r3, r0
|
|
80012f2: 2b00 cmp r3, #0
|
|
80012f4: d001 beq.n 80012fa <SystemClock_Config+0xf6>
|
|
{
|
|
Error_Handler();
|
|
80012f6: f000 f9cf bl 8001698 <Error_Handler>
|
|
}
|
|
}
|
|
80012fa: bf00 nop
|
|
80012fc: 3760 adds r7, #96 ; 0x60
|
|
80012fe: 46bd mov sp, r7
|
|
8001300: bd80 pop {r7, pc}
|
|
8001302: bf00 nop
|
|
8001304: 40023800 .word 0x40023800
|
|
8001308: 40007000 .word 0x40007000
|
|
|
|
0800130c <MX_I2C1_Init>:
|
|
* @brief I2C1 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_I2C1_Init(void)
|
|
{
|
|
800130c: b580 push {r7, lr}
|
|
800130e: af00 add r7, sp, #0
|
|
/* USER CODE END I2C1_Init 0 */
|
|
|
|
/* USER CODE BEGIN I2C1_Init 1 */
|
|
|
|
/* USER CODE END I2C1_Init 1 */
|
|
hi2c1.Instance = I2C1;
|
|
8001310: 4b12 ldr r3, [pc, #72] ; (800135c <MX_I2C1_Init+0x50>)
|
|
8001312: 4a13 ldr r2, [pc, #76] ; (8001360 <MX_I2C1_Init+0x54>)
|
|
8001314: 601a str r2, [r3, #0]
|
|
hi2c1.Init.ClockSpeed = 100000;
|
|
8001316: 4b11 ldr r3, [pc, #68] ; (800135c <MX_I2C1_Init+0x50>)
|
|
8001318: 4a12 ldr r2, [pc, #72] ; (8001364 <MX_I2C1_Init+0x58>)
|
|
800131a: 605a str r2, [r3, #4]
|
|
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
|
|
800131c: 4b0f ldr r3, [pc, #60] ; (800135c <MX_I2C1_Init+0x50>)
|
|
800131e: 2200 movs r2, #0
|
|
8001320: 609a str r2, [r3, #8]
|
|
hi2c1.Init.OwnAddress1 = 0;
|
|
8001322: 4b0e ldr r3, [pc, #56] ; (800135c <MX_I2C1_Init+0x50>)
|
|
8001324: 2200 movs r2, #0
|
|
8001326: 60da str r2, [r3, #12]
|
|
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
|
8001328: 4b0c ldr r3, [pc, #48] ; (800135c <MX_I2C1_Init+0x50>)
|
|
800132a: f44f 4280 mov.w r2, #16384 ; 0x4000
|
|
800132e: 611a str r2, [r3, #16]
|
|
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
|
|
8001330: 4b0a ldr r3, [pc, #40] ; (800135c <MX_I2C1_Init+0x50>)
|
|
8001332: 2200 movs r2, #0
|
|
8001334: 615a str r2, [r3, #20]
|
|
hi2c1.Init.OwnAddress2 = 0;
|
|
8001336: 4b09 ldr r3, [pc, #36] ; (800135c <MX_I2C1_Init+0x50>)
|
|
8001338: 2200 movs r2, #0
|
|
800133a: 619a str r2, [r3, #24]
|
|
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
|
|
800133c: 4b07 ldr r3, [pc, #28] ; (800135c <MX_I2C1_Init+0x50>)
|
|
800133e: 2200 movs r2, #0
|
|
8001340: 61da str r2, [r3, #28]
|
|
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
|
|
8001342: 4b06 ldr r3, [pc, #24] ; (800135c <MX_I2C1_Init+0x50>)
|
|
8001344: 2200 movs r2, #0
|
|
8001346: 621a str r2, [r3, #32]
|
|
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
|
|
8001348: 4804 ldr r0, [pc, #16] ; (800135c <MX_I2C1_Init+0x50>)
|
|
800134a: f002 ffb3 bl 80042b4 <HAL_I2C_Init>
|
|
800134e: 4603 mov r3, r0
|
|
8001350: 2b00 cmp r3, #0
|
|
8001352: d001 beq.n 8001358 <MX_I2C1_Init+0x4c>
|
|
{
|
|
Error_Handler();
|
|
8001354: f000 f9a0 bl 8001698 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN I2C1_Init 2 */
|
|
|
|
/* USER CODE END I2C1_Init 2 */
|
|
|
|
}
|
|
8001358: bf00 nop
|
|
800135a: bd80 pop {r7, pc}
|
|
800135c: 20000294 .word 0x20000294
|
|
8001360: 40005400 .word 0x40005400
|
|
8001364: 000186a0 .word 0x000186a0
|
|
|
|
08001368 <MX_I2S2_Init>:
|
|
* @brief I2S2 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_I2S2_Init(void)
|
|
{
|
|
8001368: b580 push {r7, lr}
|
|
800136a: af00 add r7, sp, #0
|
|
/* USER CODE END I2S2_Init 0 */
|
|
|
|
/* USER CODE BEGIN I2S2_Init 1 */
|
|
|
|
/* USER CODE END I2S2_Init 1 */
|
|
hi2s2.Instance = SPI2;
|
|
800136c: 4b13 ldr r3, [pc, #76] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
800136e: 4a14 ldr r2, [pc, #80] ; (80013c0 <MX_I2S2_Init+0x58>)
|
|
8001370: 601a str r2, [r3, #0]
|
|
hi2s2.Init.Mode = I2S_MODE_MASTER_TX;
|
|
8001372: 4b12 ldr r3, [pc, #72] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
8001374: f44f 7200 mov.w r2, #512 ; 0x200
|
|
8001378: 605a str r2, [r3, #4]
|
|
hi2s2.Init.Standard = I2S_STANDARD_PHILIPS;
|
|
800137a: 4b10 ldr r3, [pc, #64] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
800137c: 2200 movs r2, #0
|
|
800137e: 609a str r2, [r3, #8]
|
|
hi2s2.Init.DataFormat = I2S_DATAFORMAT_16B;
|
|
8001380: 4b0e ldr r3, [pc, #56] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
8001382: 2200 movs r2, #0
|
|
8001384: 60da str r2, [r3, #12]
|
|
hi2s2.Init.MCLKOutput = I2S_MCLKOUTPUT_DISABLE;
|
|
8001386: 4b0d ldr r3, [pc, #52] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
8001388: 2200 movs r2, #0
|
|
800138a: 611a str r2, [r3, #16]
|
|
hi2s2.Init.AudioFreq = I2S_AUDIOFREQ_8K;
|
|
800138c: 4b0b ldr r3, [pc, #44] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
800138e: f44f 52fa mov.w r2, #8000 ; 0x1f40
|
|
8001392: 615a str r2, [r3, #20]
|
|
hi2s2.Init.CPOL = I2S_CPOL_LOW;
|
|
8001394: 4b09 ldr r3, [pc, #36] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
8001396: 2200 movs r2, #0
|
|
8001398: 619a str r2, [r3, #24]
|
|
hi2s2.Init.ClockSource = I2S_CLOCK_PLL;
|
|
800139a: 4b08 ldr r3, [pc, #32] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
800139c: 2200 movs r2, #0
|
|
800139e: 61da str r2, [r3, #28]
|
|
hi2s2.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_DISABLE;
|
|
80013a0: 4b06 ldr r3, [pc, #24] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
80013a2: 2200 movs r2, #0
|
|
80013a4: 621a str r2, [r3, #32]
|
|
if (HAL_I2S_Init(&hi2s2) != HAL_OK)
|
|
80013a6: 4805 ldr r0, [pc, #20] ; (80013bc <MX_I2S2_Init+0x54>)
|
|
80013a8: f003 ff0e bl 80051c8 <HAL_I2S_Init>
|
|
80013ac: 4603 mov r3, r0
|
|
80013ae: 2b00 cmp r3, #0
|
|
80013b0: d001 beq.n 80013b6 <MX_I2S2_Init+0x4e>
|
|
{
|
|
Error_Handler();
|
|
80013b2: f000 f971 bl 8001698 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN I2S2_Init 2 */
|
|
|
|
/* USER CODE END I2S2_Init 2 */
|
|
|
|
}
|
|
80013b6: bf00 nop
|
|
80013b8: bd80 pop {r7, pc}
|
|
80013ba: bf00 nop
|
|
80013bc: 20000380 .word 0x20000380
|
|
80013c0: 40003800 .word 0x40003800
|
|
|
|
080013c4 <MX_I2S3_Init>:
|
|
* @brief I2S3 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_I2S3_Init(void)
|
|
{
|
|
80013c4: b580 push {r7, lr}
|
|
80013c6: af00 add r7, sp, #0
|
|
/* USER CODE END I2S3_Init 0 */
|
|
|
|
/* USER CODE BEGIN I2S3_Init 1 */
|
|
|
|
/* USER CODE END I2S3_Init 1 */
|
|
hi2s3.Instance = SPI3;
|
|
80013c8: 4b13 ldr r3, [pc, #76] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
80013ca: 4a14 ldr r2, [pc, #80] ; (800141c <MX_I2S3_Init+0x58>)
|
|
80013cc: 601a str r2, [r3, #0]
|
|
hi2s3.Init.Mode = I2S_MODE_MASTER_TX;
|
|
80013ce: 4b12 ldr r3, [pc, #72] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
80013d0: f44f 7200 mov.w r2, #512 ; 0x200
|
|
80013d4: 605a str r2, [r3, #4]
|
|
hi2s3.Init.Standard = I2S_STANDARD_PHILIPS;
|
|
80013d6: 4b10 ldr r3, [pc, #64] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
80013d8: 2200 movs r2, #0
|
|
80013da: 609a str r2, [r3, #8]
|
|
hi2s3.Init.DataFormat = I2S_DATAFORMAT_16B;
|
|
80013dc: 4b0e ldr r3, [pc, #56] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
80013de: 2200 movs r2, #0
|
|
80013e0: 60da str r2, [r3, #12]
|
|
hi2s3.Init.MCLKOutput = I2S_MCLKOUTPUT_ENABLE;
|
|
80013e2: 4b0d ldr r3, [pc, #52] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
80013e4: f44f 7200 mov.w r2, #512 ; 0x200
|
|
80013e8: 611a str r2, [r3, #16]
|
|
hi2s3.Init.AudioFreq = I2S_AUDIOFREQ_96K;
|
|
80013ea: 4b0b ldr r3, [pc, #44] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
80013ec: 4a0c ldr r2, [pc, #48] ; (8001420 <MX_I2S3_Init+0x5c>)
|
|
80013ee: 615a str r2, [r3, #20]
|
|
hi2s3.Init.CPOL = I2S_CPOL_LOW;
|
|
80013f0: 4b09 ldr r3, [pc, #36] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
80013f2: 2200 movs r2, #0
|
|
80013f4: 619a str r2, [r3, #24]
|
|
hi2s3.Init.ClockSource = I2S_CLOCK_PLL;
|
|
80013f6: 4b08 ldr r3, [pc, #32] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
80013f8: 2200 movs r2, #0
|
|
80013fa: 61da str r2, [r3, #28]
|
|
hi2s3.Init.FullDuplexMode = I2S_FULLDUPLEXMODE_DISABLE;
|
|
80013fc: 4b06 ldr r3, [pc, #24] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
80013fe: 2200 movs r2, #0
|
|
8001400: 621a str r2, [r3, #32]
|
|
if (HAL_I2S_Init(&hi2s3) != HAL_OK)
|
|
8001402: 4805 ldr r0, [pc, #20] ; (8001418 <MX_I2S3_Init+0x54>)
|
|
8001404: f003 fee0 bl 80051c8 <HAL_I2S_Init>
|
|
8001408: 4603 mov r3, r0
|
|
800140a: 2b00 cmp r3, #0
|
|
800140c: d001 beq.n 8001412 <MX_I2S3_Init+0x4e>
|
|
{
|
|
Error_Handler();
|
|
800140e: f000 f943 bl 8001698 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN I2S3_Init 2 */
|
|
|
|
/* USER CODE END I2S3_Init 2 */
|
|
|
|
}
|
|
8001412: bf00 nop
|
|
8001414: bd80 pop {r7, pc}
|
|
8001416: bf00 nop
|
|
8001418: 200003c8 .word 0x200003c8
|
|
800141c: 40003c00 .word 0x40003c00
|
|
8001420: 00017700 .word 0x00017700
|
|
|
|
08001424 <MX_SPI1_Init>:
|
|
* @brief SPI1 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_SPI1_Init(void)
|
|
{
|
|
8001424: b580 push {r7, lr}
|
|
8001426: af00 add r7, sp, #0
|
|
|
|
/* USER CODE BEGIN SPI1_Init 1 */
|
|
|
|
/* USER CODE END SPI1_Init 1 */
|
|
/* SPI1 parameter configuration*/
|
|
hspi1.Instance = SPI1;
|
|
8001428: 4b17 ldr r3, [pc, #92] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
800142a: 4a18 ldr r2, [pc, #96] ; (800148c <MX_SPI1_Init+0x68>)
|
|
800142c: 601a str r2, [r3, #0]
|
|
hspi1.Init.Mode = SPI_MODE_MASTER;
|
|
800142e: 4b16 ldr r3, [pc, #88] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
8001430: f44f 7282 mov.w r2, #260 ; 0x104
|
|
8001434: 605a str r2, [r3, #4]
|
|
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
|
|
8001436: 4b14 ldr r3, [pc, #80] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
8001438: 2200 movs r2, #0
|
|
800143a: 609a str r2, [r3, #8]
|
|
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
|
|
800143c: 4b12 ldr r3, [pc, #72] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
800143e: 2200 movs r2, #0
|
|
8001440: 60da str r2, [r3, #12]
|
|
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
|
|
8001442: 4b11 ldr r3, [pc, #68] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
8001444: 2200 movs r2, #0
|
|
8001446: 611a str r2, [r3, #16]
|
|
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
|
|
8001448: 4b0f ldr r3, [pc, #60] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
800144a: 2200 movs r2, #0
|
|
800144c: 615a str r2, [r3, #20]
|
|
hspi1.Init.NSS = SPI_NSS_SOFT;
|
|
800144e: 4b0e ldr r3, [pc, #56] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
8001450: f44f 7200 mov.w r2, #512 ; 0x200
|
|
8001454: 619a str r2, [r3, #24]
|
|
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
|
|
8001456: 4b0c ldr r3, [pc, #48] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
8001458: 2200 movs r2, #0
|
|
800145a: 61da str r2, [r3, #28]
|
|
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
|
800145c: 4b0a ldr r3, [pc, #40] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
800145e: 2200 movs r2, #0
|
|
8001460: 621a str r2, [r3, #32]
|
|
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
|
|
8001462: 4b09 ldr r3, [pc, #36] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
8001464: 2200 movs r2, #0
|
|
8001466: 625a str r2, [r3, #36] ; 0x24
|
|
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
|
8001468: 4b07 ldr r3, [pc, #28] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
800146a: 2200 movs r2, #0
|
|
800146c: 629a str r2, [r3, #40] ; 0x28
|
|
hspi1.Init.CRCPolynomial = 10;
|
|
800146e: 4b06 ldr r3, [pc, #24] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
8001470: 220a movs r2, #10
|
|
8001472: 62da str r2, [r3, #44] ; 0x2c
|
|
if (HAL_SPI_Init(&hspi1) != HAL_OK)
|
|
8001474: 4804 ldr r0, [pc, #16] ; (8001488 <MX_SPI1_Init+0x64>)
|
|
8001476: f005 f8f3 bl 8006660 <HAL_SPI_Init>
|
|
800147a: 4603 mov r3, r0
|
|
800147c: 2b00 cmp r3, #0
|
|
800147e: d001 beq.n 8001484 <MX_SPI1_Init+0x60>
|
|
{
|
|
Error_Handler();
|
|
8001480: f000 f90a bl 8001698 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN SPI1_Init 2 */
|
|
|
|
/* USER CODE END SPI1_Init 2 */
|
|
|
|
}
|
|
8001484: bf00 nop
|
|
8001486: bd80 pop {r7, pc}
|
|
8001488: 200002e8 .word 0x200002e8
|
|
800148c: 40013000 .word 0x40013000
|
|
|
|
08001490 <MX_USART2_UART_Init>:
|
|
* @brief USART2 Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_USART2_UART_Init(void)
|
|
{
|
|
8001490: b580 push {r7, lr}
|
|
8001492: af00 add r7, sp, #0
|
|
/* USER CODE END USART2_Init 0 */
|
|
|
|
/* USER CODE BEGIN USART2_Init 1 */
|
|
|
|
/* USER CODE END USART2_Init 1 */
|
|
huart2.Instance = USART2;
|
|
8001494: 4b11 ldr r3, [pc, #68] ; (80014dc <MX_USART2_UART_Init+0x4c>)
|
|
8001496: 4a12 ldr r2, [pc, #72] ; (80014e0 <MX_USART2_UART_Init+0x50>)
|
|
8001498: 601a str r2, [r3, #0]
|
|
huart2.Init.BaudRate = 115200;
|
|
800149a: 4b10 ldr r3, [pc, #64] ; (80014dc <MX_USART2_UART_Init+0x4c>)
|
|
800149c: f44f 32e1 mov.w r2, #115200 ; 0x1c200
|
|
80014a0: 605a str r2, [r3, #4]
|
|
huart2.Init.WordLength = UART_WORDLENGTH_8B;
|
|
80014a2: 4b0e ldr r3, [pc, #56] ; (80014dc <MX_USART2_UART_Init+0x4c>)
|
|
80014a4: 2200 movs r2, #0
|
|
80014a6: 609a str r2, [r3, #8]
|
|
huart2.Init.StopBits = UART_STOPBITS_1;
|
|
80014a8: 4b0c ldr r3, [pc, #48] ; (80014dc <MX_USART2_UART_Init+0x4c>)
|
|
80014aa: 2200 movs r2, #0
|
|
80014ac: 60da str r2, [r3, #12]
|
|
huart2.Init.Parity = UART_PARITY_NONE;
|
|
80014ae: 4b0b ldr r3, [pc, #44] ; (80014dc <MX_USART2_UART_Init+0x4c>)
|
|
80014b0: 2200 movs r2, #0
|
|
80014b2: 611a str r2, [r3, #16]
|
|
huart2.Init.Mode = UART_MODE_TX_RX;
|
|
80014b4: 4b09 ldr r3, [pc, #36] ; (80014dc <MX_USART2_UART_Init+0x4c>)
|
|
80014b6: 220c movs r2, #12
|
|
80014b8: 615a str r2, [r3, #20]
|
|
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
|
80014ba: 4b08 ldr r3, [pc, #32] ; (80014dc <MX_USART2_UART_Init+0x4c>)
|
|
80014bc: 2200 movs r2, #0
|
|
80014be: 619a str r2, [r3, #24]
|
|
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
|
|
80014c0: 4b06 ldr r3, [pc, #24] ; (80014dc <MX_USART2_UART_Init+0x4c>)
|
|
80014c2: 2200 movs r2, #0
|
|
80014c4: 61da str r2, [r3, #28]
|
|
if (HAL_UART_Init(&huart2) != HAL_OK)
|
|
80014c6: 4805 ldr r0, [pc, #20] ; (80014dc <MX_USART2_UART_Init+0x4c>)
|
|
80014c8: f005 f92e bl 8006728 <HAL_UART_Init>
|
|
80014cc: 4603 mov r3, r0
|
|
80014ce: 2b00 cmp r3, #0
|
|
80014d0: d001 beq.n 80014d6 <MX_USART2_UART_Init+0x46>
|
|
{
|
|
Error_Handler();
|
|
80014d2: f000 f8e1 bl 8001698 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN USART2_Init 2 */
|
|
|
|
/* USER CODE END USART2_Init 2 */
|
|
|
|
}
|
|
80014d6: bf00 nop
|
|
80014d8: bd80 pop {r7, pc}
|
|
80014da: bf00 nop
|
|
80014dc: 20000340 .word 0x20000340
|
|
80014e0: 40004400 .word 0x40004400
|
|
|
|
080014e4 <MX_GPIO_Init>:
|
|
* @brief GPIO Initialization Function
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
static void MX_GPIO_Init(void)
|
|
{
|
|
80014e4: b580 push {r7, lr}
|
|
80014e6: b08c sub sp, #48 ; 0x30
|
|
80014e8: af00 add r7, sp, #0
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
80014ea: f107 031c add.w r3, r7, #28
|
|
80014ee: 2200 movs r2, #0
|
|
80014f0: 601a str r2, [r3, #0]
|
|
80014f2: 605a str r2, [r3, #4]
|
|
80014f4: 609a str r2, [r3, #8]
|
|
80014f6: 60da str r2, [r3, #12]
|
|
80014f8: 611a str r2, [r3, #16]
|
|
|
|
/* GPIO Ports Clock Enable */
|
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
|
80014fa: 2300 movs r3, #0
|
|
80014fc: 61bb str r3, [r7, #24]
|
|
80014fe: 4b60 ldr r3, [pc, #384] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001500: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001502: 4a5f ldr r2, [pc, #380] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001504: f043 0310 orr.w r3, r3, #16
|
|
8001508: 6313 str r3, [r2, #48] ; 0x30
|
|
800150a: 4b5d ldr r3, [pc, #372] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
800150c: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800150e: f003 0310 and.w r3, r3, #16
|
|
8001512: 61bb str r3, [r7, #24]
|
|
8001514: 69bb ldr r3, [r7, #24]
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
8001516: 2300 movs r3, #0
|
|
8001518: 617b str r3, [r7, #20]
|
|
800151a: 4b59 ldr r3, [pc, #356] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
800151c: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800151e: 4a58 ldr r2, [pc, #352] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001520: f043 0304 orr.w r3, r3, #4
|
|
8001524: 6313 str r3, [r2, #48] ; 0x30
|
|
8001526: 4b56 ldr r3, [pc, #344] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001528: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800152a: f003 0304 and.w r3, r3, #4
|
|
800152e: 617b str r3, [r7, #20]
|
|
8001530: 697b ldr r3, [r7, #20]
|
|
__HAL_RCC_GPIOH_CLK_ENABLE();
|
|
8001532: 2300 movs r3, #0
|
|
8001534: 613b str r3, [r7, #16]
|
|
8001536: 4b52 ldr r3, [pc, #328] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001538: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800153a: 4a51 ldr r2, [pc, #324] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
800153c: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8001540: 6313 str r3, [r2, #48] ; 0x30
|
|
8001542: 4b4f ldr r3, [pc, #316] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001544: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001546: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
800154a: 613b str r3, [r7, #16]
|
|
800154c: 693b ldr r3, [r7, #16]
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
800154e: 2300 movs r3, #0
|
|
8001550: 60fb str r3, [r7, #12]
|
|
8001552: 4b4b ldr r3, [pc, #300] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001554: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001556: 4a4a ldr r2, [pc, #296] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001558: f043 0301 orr.w r3, r3, #1
|
|
800155c: 6313 str r3, [r2, #48] ; 0x30
|
|
800155e: 4b48 ldr r3, [pc, #288] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001560: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001562: f003 0301 and.w r3, r3, #1
|
|
8001566: 60fb str r3, [r7, #12]
|
|
8001568: 68fb ldr r3, [r7, #12]
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
800156a: 2300 movs r3, #0
|
|
800156c: 60bb str r3, [r7, #8]
|
|
800156e: 4b44 ldr r3, [pc, #272] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001570: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001572: 4a43 ldr r2, [pc, #268] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001574: f043 0302 orr.w r3, r3, #2
|
|
8001578: 6313 str r3, [r2, #48] ; 0x30
|
|
800157a: 4b41 ldr r3, [pc, #260] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
800157c: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800157e: f003 0302 and.w r3, r3, #2
|
|
8001582: 60bb str r3, [r7, #8]
|
|
8001584: 68bb ldr r3, [r7, #8]
|
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
|
8001586: 2300 movs r3, #0
|
|
8001588: 607b str r3, [r7, #4]
|
|
800158a: 4b3d ldr r3, [pc, #244] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
800158c: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800158e: 4a3c ldr r2, [pc, #240] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001590: f043 0308 orr.w r3, r3, #8
|
|
8001594: 6313 str r3, [r2, #48] ; 0x30
|
|
8001596: 4b3a ldr r3, [pc, #232] ; (8001680 <MX_GPIO_Init+0x19c>)
|
|
8001598: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800159a: f003 0308 and.w r3, r3, #8
|
|
800159e: 607b str r3, [r7, #4]
|
|
80015a0: 687b ldr r3, [r7, #4]
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(CS_I2C_SPI_GPIO_Port, CS_I2C_SPI_Pin, GPIO_PIN_RESET);
|
|
80015a2: 2200 movs r2, #0
|
|
80015a4: 2108 movs r1, #8
|
|
80015a6: 4837 ldr r0, [pc, #220] ; (8001684 <MX_GPIO_Init+0x1a0>)
|
|
80015a8: f001 f97a bl 80028a0 <HAL_GPIO_WritePin>
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(OTG_FS_PowerSwitchOn_GPIO_Port, OTG_FS_PowerSwitchOn_Pin, GPIO_PIN_SET);
|
|
80015ac: 2201 movs r2, #1
|
|
80015ae: 2101 movs r1, #1
|
|
80015b0: 4835 ldr r0, [pc, #212] ; (8001688 <MX_GPIO_Init+0x1a4>)
|
|
80015b2: f001 f975 bl 80028a0 <HAL_GPIO_WritePin>
|
|
|
|
/*Configure GPIO pin Output Level */
|
|
HAL_GPIO_WritePin(GPIOD, LD4_Pin|LD3_Pin|LD5_Pin|LD6_Pin
|
|
80015b6: 2200 movs r2, #0
|
|
80015b8: f24f 0110 movw r1, #61456 ; 0xf010
|
|
80015bc: 4833 ldr r0, [pc, #204] ; (800168c <MX_GPIO_Init+0x1a8>)
|
|
80015be: f001 f96f bl 80028a0 <HAL_GPIO_WritePin>
|
|
|Audio_RST_Pin, GPIO_PIN_RESET);
|
|
|
|
/*Configure GPIO pin : PE2 */
|
|
GPIO_InitStruct.Pin = GPIO_PIN_2;
|
|
80015c2: 2304 movs r3, #4
|
|
80015c4: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
80015c6: 2300 movs r3, #0
|
|
80015c8: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80015ca: 2300 movs r3, #0
|
|
80015cc: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
|
80015ce: f107 031c add.w r3, r7, #28
|
|
80015d2: 4619 mov r1, r3
|
|
80015d4: 482b ldr r0, [pc, #172] ; (8001684 <MX_GPIO_Init+0x1a0>)
|
|
80015d6: f000 ffe1 bl 800259c <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pin : CS_I2C_SPI_Pin */
|
|
GPIO_InitStruct.Pin = CS_I2C_SPI_Pin;
|
|
80015da: 2308 movs r3, #8
|
|
80015dc: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
80015de: 2301 movs r3, #1
|
|
80015e0: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80015e2: 2300 movs r3, #0
|
|
80015e4: 627b str r3, [r7, #36] ; 0x24
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
80015e6: 2300 movs r3, #0
|
|
80015e8: 62bb str r3, [r7, #40] ; 0x28
|
|
HAL_GPIO_Init(CS_I2C_SPI_GPIO_Port, &GPIO_InitStruct);
|
|
80015ea: f107 031c add.w r3, r7, #28
|
|
80015ee: 4619 mov r1, r3
|
|
80015f0: 4824 ldr r0, [pc, #144] ; (8001684 <MX_GPIO_Init+0x1a0>)
|
|
80015f2: f000 ffd3 bl 800259c <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pins : PE4 PE5 MEMS_INT2_Pin */
|
|
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|MEMS_INT2_Pin;
|
|
80015f6: 2332 movs r3, #50 ; 0x32
|
|
80015f8: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
|
|
80015fa: 4b25 ldr r3, [pc, #148] ; (8001690 <MX_GPIO_Init+0x1ac>)
|
|
80015fc: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80015fe: 2300 movs r3, #0
|
|
8001600: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
|
8001602: f107 031c add.w r3, r7, #28
|
|
8001606: 4619 mov r1, r3
|
|
8001608: 481e ldr r0, [pc, #120] ; (8001684 <MX_GPIO_Init+0x1a0>)
|
|
800160a: f000 ffc7 bl 800259c <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pin : OTG_FS_PowerSwitchOn_Pin */
|
|
GPIO_InitStruct.Pin = OTG_FS_PowerSwitchOn_Pin;
|
|
800160e: 2301 movs r3, #1
|
|
8001610: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
8001612: 2301 movs r3, #1
|
|
8001614: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
8001616: 2300 movs r3, #0
|
|
8001618: 627b str r3, [r7, #36] ; 0x24
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
800161a: 2300 movs r3, #0
|
|
800161c: 62bb str r3, [r7, #40] ; 0x28
|
|
HAL_GPIO_Init(OTG_FS_PowerSwitchOn_GPIO_Port, &GPIO_InitStruct);
|
|
800161e: f107 031c add.w r3, r7, #28
|
|
8001622: 4619 mov r1, r3
|
|
8001624: 4818 ldr r0, [pc, #96] ; (8001688 <MX_GPIO_Init+0x1a4>)
|
|
8001626: f000 ffb9 bl 800259c <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pin : B1_Pin */
|
|
GPIO_InitStruct.Pin = B1_Pin;
|
|
800162a: 2301 movs r3, #1
|
|
800162c: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_EVT_RISING;
|
|
800162e: 4b18 ldr r3, [pc, #96] ; (8001690 <MX_GPIO_Init+0x1ac>)
|
|
8001630: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
8001632: 2300 movs r3, #0
|
|
8001634: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
|
|
8001636: f107 031c add.w r3, r7, #28
|
|
800163a: 4619 mov r1, r3
|
|
800163c: 4815 ldr r0, [pc, #84] ; (8001694 <MX_GPIO_Init+0x1b0>)
|
|
800163e: f000 ffad bl 800259c <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pins : LD4_Pin LD3_Pin LD5_Pin LD6_Pin
|
|
Audio_RST_Pin */
|
|
GPIO_InitStruct.Pin = LD4_Pin|LD3_Pin|LD5_Pin|LD6_Pin
|
|
8001642: f24f 0310 movw r3, #61456 ; 0xf010
|
|
8001646: 61fb str r3, [r7, #28]
|
|
|Audio_RST_Pin;
|
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
|
8001648: 2301 movs r3, #1
|
|
800164a: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
800164c: 2300 movs r3, #0
|
|
800164e: 627b str r3, [r7, #36] ; 0x24
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
8001650: 2300 movs r3, #0
|
|
8001652: 62bb str r3, [r7, #40] ; 0x28
|
|
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
|
|
8001654: f107 031c add.w r3, r7, #28
|
|
8001658: 4619 mov r1, r3
|
|
800165a: 480c ldr r0, [pc, #48] ; (800168c <MX_GPIO_Init+0x1a8>)
|
|
800165c: f000 ff9e bl 800259c <HAL_GPIO_Init>
|
|
|
|
/*Configure GPIO pin : OTG_FS_OverCurrent_Pin */
|
|
GPIO_InitStruct.Pin = OTG_FS_OverCurrent_Pin;
|
|
8001660: 2320 movs r3, #32
|
|
8001662: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
8001664: 2300 movs r3, #0
|
|
8001666: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
8001668: 2300 movs r3, #0
|
|
800166a: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(OTG_FS_OverCurrent_GPIO_Port, &GPIO_InitStruct);
|
|
800166c: f107 031c add.w r3, r7, #28
|
|
8001670: 4619 mov r1, r3
|
|
8001672: 4806 ldr r0, [pc, #24] ; (800168c <MX_GPIO_Init+0x1a8>)
|
|
8001674: f000 ff92 bl 800259c <HAL_GPIO_Init>
|
|
|
|
}
|
|
8001678: bf00 nop
|
|
800167a: 3730 adds r7, #48 ; 0x30
|
|
800167c: 46bd mov sp, r7
|
|
800167e: bd80 pop {r7, pc}
|
|
8001680: 40023800 .word 0x40023800
|
|
8001684: 40021000 .word 0x40021000
|
|
8001688: 40020800 .word 0x40020800
|
|
800168c: 40020c00 .word 0x40020c00
|
|
8001690: 10120000 .word 0x10120000
|
|
8001694: 40020000 .word 0x40020000
|
|
|
|
08001698 <Error_Handler>:
|
|
/**
|
|
* @brief This function is executed in case of error occurrence.
|
|
* @retval None
|
|
*/
|
|
void Error_Handler(void)
|
|
{
|
|
8001698: b480 push {r7}
|
|
800169a: af00 add r7, sp, #0
|
|
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
|
Can only be executed in Privileged modes.
|
|
*/
|
|
__STATIC_FORCEINLINE void __disable_irq(void)
|
|
{
|
|
__ASM volatile ("cpsid i" : : : "memory");
|
|
800169c: b672 cpsid i
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
__disable_irq();
|
|
while (1)
|
|
800169e: e7fe b.n 800169e <Error_Handler+0x6>
|
|
|
|
080016a0 <HAL_MspInit>:
|
|
/* USER CODE END 0 */
|
|
/**
|
|
* Initializes the Global MSP.
|
|
*/
|
|
void HAL_MspInit(void)
|
|
{
|
|
80016a0: b580 push {r7, lr}
|
|
80016a2: b082 sub sp, #8
|
|
80016a4: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN MspInit 0 */
|
|
|
|
/* USER CODE END MspInit 0 */
|
|
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
80016a6: 2300 movs r3, #0
|
|
80016a8: 607b str r3, [r7, #4]
|
|
80016aa: 4b10 ldr r3, [pc, #64] ; (80016ec <HAL_MspInit+0x4c>)
|
|
80016ac: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
80016ae: 4a0f ldr r2, [pc, #60] ; (80016ec <HAL_MspInit+0x4c>)
|
|
80016b0: f443 4380 orr.w r3, r3, #16384 ; 0x4000
|
|
80016b4: 6453 str r3, [r2, #68] ; 0x44
|
|
80016b6: 4b0d ldr r3, [pc, #52] ; (80016ec <HAL_MspInit+0x4c>)
|
|
80016b8: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
80016ba: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
80016be: 607b str r3, [r7, #4]
|
|
80016c0: 687b ldr r3, [r7, #4]
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
80016c2: 2300 movs r3, #0
|
|
80016c4: 603b str r3, [r7, #0]
|
|
80016c6: 4b09 ldr r3, [pc, #36] ; (80016ec <HAL_MspInit+0x4c>)
|
|
80016c8: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80016ca: 4a08 ldr r2, [pc, #32] ; (80016ec <HAL_MspInit+0x4c>)
|
|
80016cc: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
80016d0: 6413 str r3, [r2, #64] ; 0x40
|
|
80016d2: 4b06 ldr r3, [pc, #24] ; (80016ec <HAL_MspInit+0x4c>)
|
|
80016d4: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80016d6: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
80016da: 603b str r3, [r7, #0]
|
|
80016dc: 683b ldr r3, [r7, #0]
|
|
|
|
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_0);
|
|
80016de: 2007 movs r0, #7
|
|
80016e0: f000 ff1a bl 8002518 <HAL_NVIC_SetPriorityGrouping>
|
|
/* System interrupt init*/
|
|
|
|
/* USER CODE BEGIN MspInit 1 */
|
|
|
|
/* USER CODE END MspInit 1 */
|
|
}
|
|
80016e4: bf00 nop
|
|
80016e6: 3708 adds r7, #8
|
|
80016e8: 46bd mov sp, r7
|
|
80016ea: bd80 pop {r7, pc}
|
|
80016ec: 40023800 .word 0x40023800
|
|
|
|
080016f0 <HAL_I2C_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hi2c: I2C handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
|
|
{
|
|
80016f0: b580 push {r7, lr}
|
|
80016f2: b08a sub sp, #40 ; 0x28
|
|
80016f4: af00 add r7, sp, #0
|
|
80016f6: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
80016f8: f107 0314 add.w r3, r7, #20
|
|
80016fc: 2200 movs r2, #0
|
|
80016fe: 601a str r2, [r3, #0]
|
|
8001700: 605a str r2, [r3, #4]
|
|
8001702: 609a str r2, [r3, #8]
|
|
8001704: 60da str r2, [r3, #12]
|
|
8001706: 611a str r2, [r3, #16]
|
|
if(hi2c->Instance==I2C1)
|
|
8001708: 687b ldr r3, [r7, #4]
|
|
800170a: 681b ldr r3, [r3, #0]
|
|
800170c: 4a19 ldr r2, [pc, #100] ; (8001774 <HAL_I2C_MspInit+0x84>)
|
|
800170e: 4293 cmp r3, r2
|
|
8001710: d12c bne.n 800176c <HAL_I2C_MspInit+0x7c>
|
|
{
|
|
/* USER CODE BEGIN I2C1_MspInit 0 */
|
|
|
|
/* USER CODE END I2C1_MspInit 0 */
|
|
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
8001712: 2300 movs r3, #0
|
|
8001714: 613b str r3, [r7, #16]
|
|
8001716: 4b18 ldr r3, [pc, #96] ; (8001778 <HAL_I2C_MspInit+0x88>)
|
|
8001718: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800171a: 4a17 ldr r2, [pc, #92] ; (8001778 <HAL_I2C_MspInit+0x88>)
|
|
800171c: f043 0302 orr.w r3, r3, #2
|
|
8001720: 6313 str r3, [r2, #48] ; 0x30
|
|
8001722: 4b15 ldr r3, [pc, #84] ; (8001778 <HAL_I2C_MspInit+0x88>)
|
|
8001724: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001726: f003 0302 and.w r3, r3, #2
|
|
800172a: 613b str r3, [r7, #16]
|
|
800172c: 693b ldr r3, [r7, #16]
|
|
/**I2C1 GPIO Configuration
|
|
PB6 ------> I2C1_SCL
|
|
PB9 ------> I2C1_SDA
|
|
*/
|
|
GPIO_InitStruct.Pin = Audio_SCL_Pin|Audio_SDA_Pin;
|
|
800172e: f44f 7310 mov.w r3, #576 ; 0x240
|
|
8001732: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
|
|
8001734: 2312 movs r3, #18
|
|
8001736: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
|
8001738: 2301 movs r3, #1
|
|
800173a: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
800173c: 2300 movs r3, #0
|
|
800173e: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
|
|
8001740: 2304 movs r3, #4
|
|
8001742: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
8001744: f107 0314 add.w r3, r7, #20
|
|
8001748: 4619 mov r1, r3
|
|
800174a: 480c ldr r0, [pc, #48] ; (800177c <HAL_I2C_MspInit+0x8c>)
|
|
800174c: f000 ff26 bl 800259c <HAL_GPIO_Init>
|
|
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_I2C1_CLK_ENABLE();
|
|
8001750: 2300 movs r3, #0
|
|
8001752: 60fb str r3, [r7, #12]
|
|
8001754: 4b08 ldr r3, [pc, #32] ; (8001778 <HAL_I2C_MspInit+0x88>)
|
|
8001756: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8001758: 4a07 ldr r2, [pc, #28] ; (8001778 <HAL_I2C_MspInit+0x88>)
|
|
800175a: f443 1300 orr.w r3, r3, #2097152 ; 0x200000
|
|
800175e: 6413 str r3, [r2, #64] ; 0x40
|
|
8001760: 4b05 ldr r3, [pc, #20] ; (8001778 <HAL_I2C_MspInit+0x88>)
|
|
8001762: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8001764: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
8001768: 60fb str r3, [r7, #12]
|
|
800176a: 68fb ldr r3, [r7, #12]
|
|
/* USER CODE BEGIN I2C1_MspInit 1 */
|
|
|
|
/* USER CODE END I2C1_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
800176c: bf00 nop
|
|
800176e: 3728 adds r7, #40 ; 0x28
|
|
8001770: 46bd mov sp, r7
|
|
8001772: bd80 pop {r7, pc}
|
|
8001774: 40005400 .word 0x40005400
|
|
8001778: 40023800 .word 0x40023800
|
|
800177c: 40020400 .word 0x40020400
|
|
|
|
08001780 <HAL_I2S_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hi2s: I2S handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_I2S_MspInit(I2S_HandleTypeDef* hi2s)
|
|
{
|
|
8001780: b580 push {r7, lr}
|
|
8001782: b08e sub sp, #56 ; 0x38
|
|
8001784: af00 add r7, sp, #0
|
|
8001786: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8001788: f107 0324 add.w r3, r7, #36 ; 0x24
|
|
800178c: 2200 movs r2, #0
|
|
800178e: 601a str r2, [r3, #0]
|
|
8001790: 605a str r2, [r3, #4]
|
|
8001792: 609a str r2, [r3, #8]
|
|
8001794: 60da str r2, [r3, #12]
|
|
8001796: 611a str r2, [r3, #16]
|
|
if(hi2s->Instance==SPI2)
|
|
8001798: 687b ldr r3, [r7, #4]
|
|
800179a: 681b ldr r3, [r3, #0]
|
|
800179c: 4a51 ldr r2, [pc, #324] ; (80018e4 <HAL_I2S_MspInit+0x164>)
|
|
800179e: 4293 cmp r3, r2
|
|
80017a0: d14b bne.n 800183a <HAL_I2S_MspInit+0xba>
|
|
{
|
|
/* USER CODE BEGIN SPI2_MspInit 0 */
|
|
|
|
/* USER CODE END SPI2_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_SPI2_CLK_ENABLE();
|
|
80017a2: 2300 movs r3, #0
|
|
80017a4: 623b str r3, [r7, #32]
|
|
80017a6: 4b50 ldr r3, [pc, #320] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
80017a8: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80017aa: 4a4f ldr r2, [pc, #316] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
80017ac: f443 4380 orr.w r3, r3, #16384 ; 0x4000
|
|
80017b0: 6413 str r3, [r2, #64] ; 0x40
|
|
80017b2: 4b4d ldr r3, [pc, #308] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
80017b4: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80017b6: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
80017ba: 623b str r3, [r7, #32]
|
|
80017bc: 6a3b ldr r3, [r7, #32]
|
|
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
80017be: 2300 movs r3, #0
|
|
80017c0: 61fb str r3, [r7, #28]
|
|
80017c2: 4b49 ldr r3, [pc, #292] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
80017c4: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
80017c6: 4a48 ldr r2, [pc, #288] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
80017c8: f043 0304 orr.w r3, r3, #4
|
|
80017cc: 6313 str r3, [r2, #48] ; 0x30
|
|
80017ce: 4b46 ldr r3, [pc, #280] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
80017d0: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
80017d2: f003 0304 and.w r3, r3, #4
|
|
80017d6: 61fb str r3, [r7, #28]
|
|
80017d8: 69fb ldr r3, [r7, #28]
|
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
|
80017da: 2300 movs r3, #0
|
|
80017dc: 61bb str r3, [r7, #24]
|
|
80017de: 4b42 ldr r3, [pc, #264] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
80017e0: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
80017e2: 4a41 ldr r2, [pc, #260] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
80017e4: f043 0302 orr.w r3, r3, #2
|
|
80017e8: 6313 str r3, [r2, #48] ; 0x30
|
|
80017ea: 4b3f ldr r3, [pc, #252] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
80017ec: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
80017ee: f003 0302 and.w r3, r3, #2
|
|
80017f2: 61bb str r3, [r7, #24]
|
|
80017f4: 69bb ldr r3, [r7, #24]
|
|
/**I2S2 GPIO Configuration
|
|
PC3 ------> I2S2_SD
|
|
PB10 ------> I2S2_CK
|
|
PB12 ------> I2S2_WS
|
|
*/
|
|
GPIO_InitStruct.Pin = PDM_OUT_Pin;
|
|
80017f6: 2308 movs r3, #8
|
|
80017f8: 627b str r3, [r7, #36] ; 0x24
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
80017fa: 2302 movs r3, #2
|
|
80017fc: 62bb str r3, [r7, #40] ; 0x28
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80017fe: 2300 movs r3, #0
|
|
8001800: 62fb str r3, [r7, #44] ; 0x2c
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
8001802: 2300 movs r3, #0
|
|
8001804: 633b str r3, [r7, #48] ; 0x30
|
|
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
|
8001806: 2305 movs r3, #5
|
|
8001808: 637b str r3, [r7, #52] ; 0x34
|
|
HAL_GPIO_Init(PDM_OUT_GPIO_Port, &GPIO_InitStruct);
|
|
800180a: f107 0324 add.w r3, r7, #36 ; 0x24
|
|
800180e: 4619 mov r1, r3
|
|
8001810: 4836 ldr r0, [pc, #216] ; (80018ec <HAL_I2S_MspInit+0x16c>)
|
|
8001812: f000 fec3 bl 800259c <HAL_GPIO_Init>
|
|
|
|
GPIO_InitStruct.Pin = CLK_IN_Pin|GPIO_PIN_12;
|
|
8001816: f44f 53a0 mov.w r3, #5120 ; 0x1400
|
|
800181a: 627b str r3, [r7, #36] ; 0x24
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
800181c: 2302 movs r3, #2
|
|
800181e: 62bb str r3, [r7, #40] ; 0x28
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
8001820: 2300 movs r3, #0
|
|
8001822: 62fb str r3, [r7, #44] ; 0x2c
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
8001824: 2300 movs r3, #0
|
|
8001826: 633b str r3, [r7, #48] ; 0x30
|
|
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
|
|
8001828: 2305 movs r3, #5
|
|
800182a: 637b str r3, [r7, #52] ; 0x34
|
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
|
800182c: f107 0324 add.w r3, r7, #36 ; 0x24
|
|
8001830: 4619 mov r1, r3
|
|
8001832: 482f ldr r0, [pc, #188] ; (80018f0 <HAL_I2S_MspInit+0x170>)
|
|
8001834: f000 feb2 bl 800259c <HAL_GPIO_Init>
|
|
/* USER CODE BEGIN SPI3_MspInit 1 */
|
|
|
|
/* USER CODE END SPI3_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
8001838: e04f b.n 80018da <HAL_I2S_MspInit+0x15a>
|
|
else if(hi2s->Instance==SPI3)
|
|
800183a: 687b ldr r3, [r7, #4]
|
|
800183c: 681b ldr r3, [r3, #0]
|
|
800183e: 4a2d ldr r2, [pc, #180] ; (80018f4 <HAL_I2S_MspInit+0x174>)
|
|
8001840: 4293 cmp r3, r2
|
|
8001842: d14a bne.n 80018da <HAL_I2S_MspInit+0x15a>
|
|
__HAL_RCC_SPI3_CLK_ENABLE();
|
|
8001844: 2300 movs r3, #0
|
|
8001846: 617b str r3, [r7, #20]
|
|
8001848: 4b27 ldr r3, [pc, #156] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
800184a: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
800184c: 4a26 ldr r2, [pc, #152] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
800184e: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8001852: 6413 str r3, [r2, #64] ; 0x40
|
|
8001854: 4b24 ldr r3, [pc, #144] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
8001856: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8001858: f403 4300 and.w r3, r3, #32768 ; 0x8000
|
|
800185c: 617b str r3, [r7, #20]
|
|
800185e: 697b ldr r3, [r7, #20]
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
8001860: 2300 movs r3, #0
|
|
8001862: 613b str r3, [r7, #16]
|
|
8001864: 4b20 ldr r3, [pc, #128] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
8001866: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001868: 4a1f ldr r2, [pc, #124] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
800186a: f043 0301 orr.w r3, r3, #1
|
|
800186e: 6313 str r3, [r2, #48] ; 0x30
|
|
8001870: 4b1d ldr r3, [pc, #116] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
8001872: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001874: f003 0301 and.w r3, r3, #1
|
|
8001878: 613b str r3, [r7, #16]
|
|
800187a: 693b ldr r3, [r7, #16]
|
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
|
800187c: 2300 movs r3, #0
|
|
800187e: 60fb str r3, [r7, #12]
|
|
8001880: 4b19 ldr r3, [pc, #100] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
8001882: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001884: 4a18 ldr r2, [pc, #96] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
8001886: f043 0304 orr.w r3, r3, #4
|
|
800188a: 6313 str r3, [r2, #48] ; 0x30
|
|
800188c: 4b16 ldr r3, [pc, #88] ; (80018e8 <HAL_I2S_MspInit+0x168>)
|
|
800188e: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001890: f003 0304 and.w r3, r3, #4
|
|
8001894: 60fb str r3, [r7, #12]
|
|
8001896: 68fb ldr r3, [r7, #12]
|
|
GPIO_InitStruct.Pin = I2S3_WS_Pin;
|
|
8001898: 2310 movs r3, #16
|
|
800189a: 627b str r3, [r7, #36] ; 0x24
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
800189c: 2302 movs r3, #2
|
|
800189e: 62bb str r3, [r7, #40] ; 0x28
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80018a0: 2300 movs r3, #0
|
|
80018a2: 62fb str r3, [r7, #44] ; 0x2c
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
80018a4: 2300 movs r3, #0
|
|
80018a6: 633b str r3, [r7, #48] ; 0x30
|
|
GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
|
|
80018a8: 2306 movs r3, #6
|
|
80018aa: 637b str r3, [r7, #52] ; 0x34
|
|
HAL_GPIO_Init(I2S3_WS_GPIO_Port, &GPIO_InitStruct);
|
|
80018ac: f107 0324 add.w r3, r7, #36 ; 0x24
|
|
80018b0: 4619 mov r1, r3
|
|
80018b2: 4811 ldr r0, [pc, #68] ; (80018f8 <HAL_I2S_MspInit+0x178>)
|
|
80018b4: f000 fe72 bl 800259c <HAL_GPIO_Init>
|
|
GPIO_InitStruct.Pin = I2S3_MCK_Pin|I2S3_SCK_Pin|I2S3_SD_Pin;
|
|
80018b8: f44f 53a4 mov.w r3, #5248 ; 0x1480
|
|
80018bc: 627b str r3, [r7, #36] ; 0x24
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
80018be: 2302 movs r3, #2
|
|
80018c0: 62bb str r3, [r7, #40] ; 0x28
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80018c2: 2300 movs r3, #0
|
|
80018c4: 62fb str r3, [r7, #44] ; 0x2c
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
|
80018c6: 2300 movs r3, #0
|
|
80018c8: 633b str r3, [r7, #48] ; 0x30
|
|
GPIO_InitStruct.Alternate = GPIO_AF6_SPI3;
|
|
80018ca: 2306 movs r3, #6
|
|
80018cc: 637b str r3, [r7, #52] ; 0x34
|
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
|
80018ce: f107 0324 add.w r3, r7, #36 ; 0x24
|
|
80018d2: 4619 mov r1, r3
|
|
80018d4: 4805 ldr r0, [pc, #20] ; (80018ec <HAL_I2S_MspInit+0x16c>)
|
|
80018d6: f000 fe61 bl 800259c <HAL_GPIO_Init>
|
|
}
|
|
80018da: bf00 nop
|
|
80018dc: 3738 adds r7, #56 ; 0x38
|
|
80018de: 46bd mov sp, r7
|
|
80018e0: bd80 pop {r7, pc}
|
|
80018e2: bf00 nop
|
|
80018e4: 40003800 .word 0x40003800
|
|
80018e8: 40023800 .word 0x40023800
|
|
80018ec: 40020800 .word 0x40020800
|
|
80018f0: 40020400 .word 0x40020400
|
|
80018f4: 40003c00 .word 0x40003c00
|
|
80018f8: 40020000 .word 0x40020000
|
|
|
|
080018fc <HAL_SPI_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param hspi: SPI handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
|
|
{
|
|
80018fc: b580 push {r7, lr}
|
|
80018fe: b08a sub sp, #40 ; 0x28
|
|
8001900: af00 add r7, sp, #0
|
|
8001902: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8001904: f107 0314 add.w r3, r7, #20
|
|
8001908: 2200 movs r2, #0
|
|
800190a: 601a str r2, [r3, #0]
|
|
800190c: 605a str r2, [r3, #4]
|
|
800190e: 609a str r2, [r3, #8]
|
|
8001910: 60da str r2, [r3, #12]
|
|
8001912: 611a str r2, [r3, #16]
|
|
if(hspi->Instance==SPI1)
|
|
8001914: 687b ldr r3, [r7, #4]
|
|
8001916: 681b ldr r3, [r3, #0]
|
|
8001918: 4a19 ldr r2, [pc, #100] ; (8001980 <HAL_SPI_MspInit+0x84>)
|
|
800191a: 4293 cmp r3, r2
|
|
800191c: d12b bne.n 8001976 <HAL_SPI_MspInit+0x7a>
|
|
{
|
|
/* USER CODE BEGIN SPI1_MspInit 0 */
|
|
|
|
/* USER CODE END SPI1_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_SPI1_CLK_ENABLE();
|
|
800191e: 2300 movs r3, #0
|
|
8001920: 613b str r3, [r7, #16]
|
|
8001922: 4b18 ldr r3, [pc, #96] ; (8001984 <HAL_SPI_MspInit+0x88>)
|
|
8001924: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8001926: 4a17 ldr r2, [pc, #92] ; (8001984 <HAL_SPI_MspInit+0x88>)
|
|
8001928: f443 5380 orr.w r3, r3, #4096 ; 0x1000
|
|
800192c: 6453 str r3, [r2, #68] ; 0x44
|
|
800192e: 4b15 ldr r3, [pc, #84] ; (8001984 <HAL_SPI_MspInit+0x88>)
|
|
8001930: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8001932: f403 5380 and.w r3, r3, #4096 ; 0x1000
|
|
8001936: 613b str r3, [r7, #16]
|
|
8001938: 693b ldr r3, [r7, #16]
|
|
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
800193a: 2300 movs r3, #0
|
|
800193c: 60fb str r3, [r7, #12]
|
|
800193e: 4b11 ldr r3, [pc, #68] ; (8001984 <HAL_SPI_MspInit+0x88>)
|
|
8001940: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8001942: 4a10 ldr r2, [pc, #64] ; (8001984 <HAL_SPI_MspInit+0x88>)
|
|
8001944: f043 0301 orr.w r3, r3, #1
|
|
8001948: 6313 str r3, [r2, #48] ; 0x30
|
|
800194a: 4b0e ldr r3, [pc, #56] ; (8001984 <HAL_SPI_MspInit+0x88>)
|
|
800194c: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
800194e: f003 0301 and.w r3, r3, #1
|
|
8001952: 60fb str r3, [r7, #12]
|
|
8001954: 68fb ldr r3, [r7, #12]
|
|
/**SPI1 GPIO Configuration
|
|
PA5 ------> SPI1_SCK
|
|
PA6 ------> SPI1_MISO
|
|
PA7 ------> SPI1_MOSI
|
|
*/
|
|
GPIO_InitStruct.Pin = SPI1_SCK_Pin|SPI1_MISO_Pin|SPI1_MISOA7_Pin;
|
|
8001956: 23e0 movs r3, #224 ; 0xe0
|
|
8001958: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
800195a: 2302 movs r3, #2
|
|
800195c: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
800195e: 2300 movs r3, #0
|
|
8001960: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
8001962: 2303 movs r3, #3
|
|
8001964: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
|
|
8001966: 2305 movs r3, #5
|
|
8001968: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
800196a: f107 0314 add.w r3, r7, #20
|
|
800196e: 4619 mov r1, r3
|
|
8001970: 4805 ldr r0, [pc, #20] ; (8001988 <HAL_SPI_MspInit+0x8c>)
|
|
8001972: f000 fe13 bl 800259c <HAL_GPIO_Init>
|
|
/* USER CODE BEGIN SPI1_MspInit 1 */
|
|
|
|
/* USER CODE END SPI1_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
8001976: bf00 nop
|
|
8001978: 3728 adds r7, #40 ; 0x28
|
|
800197a: 46bd mov sp, r7
|
|
800197c: bd80 pop {r7, pc}
|
|
800197e: bf00 nop
|
|
8001980: 40013000 .word 0x40013000
|
|
8001984: 40023800 .word 0x40023800
|
|
8001988: 40020000 .word 0x40020000
|
|
|
|
0800198c <HAL_UART_MspInit>:
|
|
* This function configures the hardware resources used in this example
|
|
* @param huart: UART handle pointer
|
|
* @retval None
|
|
*/
|
|
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
|
{
|
|
800198c: b580 push {r7, lr}
|
|
800198e: b08a sub sp, #40 ; 0x28
|
|
8001990: af00 add r7, sp, #0
|
|
8001992: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8001994: f107 0314 add.w r3, r7, #20
|
|
8001998: 2200 movs r2, #0
|
|
800199a: 601a str r2, [r3, #0]
|
|
800199c: 605a str r2, [r3, #4]
|
|
800199e: 609a str r2, [r3, #8]
|
|
80019a0: 60da str r2, [r3, #12]
|
|
80019a2: 611a str r2, [r3, #16]
|
|
if(huart->Instance==USART2)
|
|
80019a4: 687b ldr r3, [r7, #4]
|
|
80019a6: 681b ldr r3, [r3, #0]
|
|
80019a8: 4a19 ldr r2, [pc, #100] ; (8001a10 <HAL_UART_MspInit+0x84>)
|
|
80019aa: 4293 cmp r3, r2
|
|
80019ac: d12b bne.n 8001a06 <HAL_UART_MspInit+0x7a>
|
|
{
|
|
/* USER CODE BEGIN USART2_MspInit 0 */
|
|
|
|
/* USER CODE END USART2_MspInit 0 */
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_USART2_CLK_ENABLE();
|
|
80019ae: 2300 movs r3, #0
|
|
80019b0: 613b str r3, [r7, #16]
|
|
80019b2: 4b18 ldr r3, [pc, #96] ; (8001a14 <HAL_UART_MspInit+0x88>)
|
|
80019b4: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80019b6: 4a17 ldr r2, [pc, #92] ; (8001a14 <HAL_UART_MspInit+0x88>)
|
|
80019b8: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
|
80019bc: 6413 str r3, [r2, #64] ; 0x40
|
|
80019be: 4b15 ldr r3, [pc, #84] ; (8001a14 <HAL_UART_MspInit+0x88>)
|
|
80019c0: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80019c2: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
80019c6: 613b str r3, [r7, #16]
|
|
80019c8: 693b ldr r3, [r7, #16]
|
|
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
80019ca: 2300 movs r3, #0
|
|
80019cc: 60fb str r3, [r7, #12]
|
|
80019ce: 4b11 ldr r3, [pc, #68] ; (8001a14 <HAL_UART_MspInit+0x88>)
|
|
80019d0: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
80019d2: 4a10 ldr r2, [pc, #64] ; (8001a14 <HAL_UART_MspInit+0x88>)
|
|
80019d4: f043 0301 orr.w r3, r3, #1
|
|
80019d8: 6313 str r3, [r2, #48] ; 0x30
|
|
80019da: 4b0e ldr r3, [pc, #56] ; (8001a14 <HAL_UART_MspInit+0x88>)
|
|
80019dc: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
80019de: f003 0301 and.w r3, r3, #1
|
|
80019e2: 60fb str r3, [r7, #12]
|
|
80019e4: 68fb ldr r3, [r7, #12]
|
|
/**USART2 GPIO Configuration
|
|
PA2 ------> USART2_TX
|
|
PA3 ------> USART2_RX
|
|
*/
|
|
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
|
|
80019e6: 230c movs r3, #12
|
|
80019e8: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
80019ea: 2302 movs r3, #2
|
|
80019ec: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
80019ee: 2300 movs r3, #0
|
|
80019f0: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
80019f2: 2303 movs r3, #3
|
|
80019f4: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
|
|
80019f6: 2307 movs r3, #7
|
|
80019f8: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
80019fa: f107 0314 add.w r3, r7, #20
|
|
80019fe: 4619 mov r1, r3
|
|
8001a00: 4805 ldr r0, [pc, #20] ; (8001a18 <HAL_UART_MspInit+0x8c>)
|
|
8001a02: f000 fdcb bl 800259c <HAL_GPIO_Init>
|
|
/* USER CODE BEGIN USART2_MspInit 1 */
|
|
|
|
/* USER CODE END USART2_MspInit 1 */
|
|
}
|
|
|
|
}
|
|
8001a06: bf00 nop
|
|
8001a08: 3728 adds r7, #40 ; 0x28
|
|
8001a0a: 46bd mov sp, r7
|
|
8001a0c: bd80 pop {r7, pc}
|
|
8001a0e: bf00 nop
|
|
8001a10: 40004400 .word 0x40004400
|
|
8001a14: 40023800 .word 0x40023800
|
|
8001a18: 40020000 .word 0x40020000
|
|
|
|
08001a1c <NMI_Handler>:
|
|
/******************************************************************************/
|
|
/**
|
|
* @brief This function handles Non maskable interrupt.
|
|
*/
|
|
void NMI_Handler(void)
|
|
{
|
|
8001a1c: b480 push {r7}
|
|
8001a1e: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
|
|
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
|
while (1)
|
|
8001a20: e7fe b.n 8001a20 <NMI_Handler+0x4>
|
|
|
|
08001a22 <HardFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Hard fault interrupt.
|
|
*/
|
|
void HardFault_Handler(void)
|
|
{
|
|
8001a22: b480 push {r7}
|
|
8001a24: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
|
|
|
/* USER CODE END HardFault_IRQn 0 */
|
|
while (1)
|
|
8001a26: e7fe b.n 8001a26 <HardFault_Handler+0x4>
|
|
|
|
08001a28 <MemManage_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Memory management fault.
|
|
*/
|
|
void MemManage_Handler(void)
|
|
{
|
|
8001a28: b480 push {r7}
|
|
8001a2a: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
|
|
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
|
while (1)
|
|
8001a2c: e7fe b.n 8001a2c <MemManage_Handler+0x4>
|
|
|
|
08001a2e <BusFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Pre-fetch fault, memory access fault.
|
|
*/
|
|
void BusFault_Handler(void)
|
|
{
|
|
8001a2e: b480 push {r7}
|
|
8001a30: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
|
|
|
/* USER CODE END BusFault_IRQn 0 */
|
|
while (1)
|
|
8001a32: e7fe b.n 8001a32 <BusFault_Handler+0x4>
|
|
|
|
08001a34 <UsageFault_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Undefined instruction or illegal state.
|
|
*/
|
|
void UsageFault_Handler(void)
|
|
{
|
|
8001a34: b480 push {r7}
|
|
8001a36: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
|
|
|
/* USER CODE END UsageFault_IRQn 0 */
|
|
while (1)
|
|
8001a38: e7fe b.n 8001a38 <UsageFault_Handler+0x4>
|
|
|
|
08001a3a <SVC_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System service call via SWI instruction.
|
|
*/
|
|
void SVC_Handler(void)
|
|
{
|
|
8001a3a: b480 push {r7}
|
|
8001a3c: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END SVCall_IRQn 0 */
|
|
/* USER CODE BEGIN SVCall_IRQn 1 */
|
|
|
|
/* USER CODE END SVCall_IRQn 1 */
|
|
}
|
|
8001a3e: bf00 nop
|
|
8001a40: 46bd mov sp, r7
|
|
8001a42: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001a46: 4770 bx lr
|
|
|
|
08001a48 <DebugMon_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Debug monitor.
|
|
*/
|
|
void DebugMon_Handler(void)
|
|
{
|
|
8001a48: b480 push {r7}
|
|
8001a4a: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
|
|
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
|
}
|
|
8001a4c: bf00 nop
|
|
8001a4e: 46bd mov sp, r7
|
|
8001a50: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001a54: 4770 bx lr
|
|
|
|
08001a56 <PendSV_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles Pendable request for system service.
|
|
*/
|
|
void PendSV_Handler(void)
|
|
{
|
|
8001a56: b480 push {r7}
|
|
8001a58: af00 add r7, sp, #0
|
|
|
|
/* USER CODE END PendSV_IRQn 0 */
|
|
/* USER CODE BEGIN PendSV_IRQn 1 */
|
|
|
|
/* USER CODE END PendSV_IRQn 1 */
|
|
}
|
|
8001a5a: bf00 nop
|
|
8001a5c: 46bd mov sp, r7
|
|
8001a5e: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001a62: 4770 bx lr
|
|
|
|
08001a64 <SysTick_Handler>:
|
|
|
|
/**
|
|
* @brief This function handles System tick timer.
|
|
*/
|
|
void SysTick_Handler(void)
|
|
{
|
|
8001a64: b580 push {r7, lr}
|
|
8001a66: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
|
|
|
/* USER CODE END SysTick_IRQn 0 */
|
|
HAL_IncTick();
|
|
8001a68: f000 fc44 bl 80022f4 <HAL_IncTick>
|
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
|
|
|
/* USER CODE END SysTick_IRQn 1 */
|
|
}
|
|
8001a6c: bf00 nop
|
|
8001a6e: bd80 pop {r7, pc}
|
|
|
|
08001a70 <OTG_FS_IRQHandler>:
|
|
|
|
/**
|
|
* @brief This function handles USB On The Go FS global interrupt.
|
|
*/
|
|
void OTG_FS_IRQHandler(void)
|
|
{
|
|
8001a70: b580 push {r7, lr}
|
|
8001a72: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN OTG_FS_IRQn 0 */
|
|
|
|
/* USER CODE END OTG_FS_IRQn 0 */
|
|
HAL_HCD_IRQHandler(&hhcd_USB_OTG_FS);
|
|
8001a74: 4802 ldr r0, [pc, #8] ; (8001a80 <OTG_FS_IRQHandler+0x10>)
|
|
8001a76: f001 f9bb bl 8002df0 <HAL_HCD_IRQHandler>
|
|
/* USER CODE BEGIN OTG_FS_IRQn 1 */
|
|
|
|
/* USER CODE END OTG_FS_IRQn 1 */
|
|
}
|
|
8001a7a: bf00 nop
|
|
8001a7c: bd80 pop {r7, pc}
|
|
8001a7e: bf00 nop
|
|
8001a80: 200007ec .word 0x200007ec
|
|
|
|
08001a84 <_read>:
|
|
_kill(status, -1);
|
|
while (1) {} /* Make sure we hang here */
|
|
}
|
|
|
|
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
|
{
|
|
8001a84: b580 push {r7, lr}
|
|
8001a86: b086 sub sp, #24
|
|
8001a88: af00 add r7, sp, #0
|
|
8001a8a: 60f8 str r0, [r7, #12]
|
|
8001a8c: 60b9 str r1, [r7, #8]
|
|
8001a8e: 607a str r2, [r7, #4]
|
|
int DataIdx;
|
|
|
|
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
|
8001a90: 2300 movs r3, #0
|
|
8001a92: 617b str r3, [r7, #20]
|
|
8001a94: e00a b.n 8001aac <_read+0x28>
|
|
{
|
|
*ptr++ = __io_getchar();
|
|
8001a96: f3af 8000 nop.w
|
|
8001a9a: 4601 mov r1, r0
|
|
8001a9c: 68bb ldr r3, [r7, #8]
|
|
8001a9e: 1c5a adds r2, r3, #1
|
|
8001aa0: 60ba str r2, [r7, #8]
|
|
8001aa2: b2ca uxtb r2, r1
|
|
8001aa4: 701a strb r2, [r3, #0]
|
|
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
|
8001aa6: 697b ldr r3, [r7, #20]
|
|
8001aa8: 3301 adds r3, #1
|
|
8001aaa: 617b str r3, [r7, #20]
|
|
8001aac: 697a ldr r2, [r7, #20]
|
|
8001aae: 687b ldr r3, [r7, #4]
|
|
8001ab0: 429a cmp r2, r3
|
|
8001ab2: dbf0 blt.n 8001a96 <_read+0x12>
|
|
}
|
|
|
|
return len;
|
|
8001ab4: 687b ldr r3, [r7, #4]
|
|
}
|
|
8001ab6: 4618 mov r0, r3
|
|
8001ab8: 3718 adds r7, #24
|
|
8001aba: 46bd mov sp, r7
|
|
8001abc: bd80 pop {r7, pc}
|
|
|
|
08001abe <_write>:
|
|
|
|
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
|
{
|
|
8001abe: b580 push {r7, lr}
|
|
8001ac0: b086 sub sp, #24
|
|
8001ac2: af00 add r7, sp, #0
|
|
8001ac4: 60f8 str r0, [r7, #12]
|
|
8001ac6: 60b9 str r1, [r7, #8]
|
|
8001ac8: 607a str r2, [r7, #4]
|
|
int DataIdx;
|
|
|
|
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
|
8001aca: 2300 movs r3, #0
|
|
8001acc: 617b str r3, [r7, #20]
|
|
8001ace: e009 b.n 8001ae4 <_write+0x26>
|
|
{
|
|
__io_putchar(*ptr++);
|
|
8001ad0: 68bb ldr r3, [r7, #8]
|
|
8001ad2: 1c5a adds r2, r3, #1
|
|
8001ad4: 60ba str r2, [r7, #8]
|
|
8001ad6: 781b ldrb r3, [r3, #0]
|
|
8001ad8: 4618 mov r0, r3
|
|
8001ada: f7ff fb65 bl 80011a8 <__io_putchar>
|
|
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
|
8001ade: 697b ldr r3, [r7, #20]
|
|
8001ae0: 3301 adds r3, #1
|
|
8001ae2: 617b str r3, [r7, #20]
|
|
8001ae4: 697a ldr r2, [r7, #20]
|
|
8001ae6: 687b ldr r3, [r7, #4]
|
|
8001ae8: 429a cmp r2, r3
|
|
8001aea: dbf1 blt.n 8001ad0 <_write+0x12>
|
|
}
|
|
return len;
|
|
8001aec: 687b ldr r3, [r7, #4]
|
|
}
|
|
8001aee: 4618 mov r0, r3
|
|
8001af0: 3718 adds r7, #24
|
|
8001af2: 46bd mov sp, r7
|
|
8001af4: bd80 pop {r7, pc}
|
|
|
|
08001af6 <_close>:
|
|
|
|
int _close(int file)
|
|
{
|
|
8001af6: b480 push {r7}
|
|
8001af8: b083 sub sp, #12
|
|
8001afa: af00 add r7, sp, #0
|
|
8001afc: 6078 str r0, [r7, #4]
|
|
return -1;
|
|
8001afe: f04f 33ff mov.w r3, #4294967295
|
|
}
|
|
8001b02: 4618 mov r0, r3
|
|
8001b04: 370c adds r7, #12
|
|
8001b06: 46bd mov sp, r7
|
|
8001b08: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001b0c: 4770 bx lr
|
|
|
|
08001b0e <_fstat>:
|
|
|
|
|
|
int _fstat(int file, struct stat *st)
|
|
{
|
|
8001b0e: b480 push {r7}
|
|
8001b10: b083 sub sp, #12
|
|
8001b12: af00 add r7, sp, #0
|
|
8001b14: 6078 str r0, [r7, #4]
|
|
8001b16: 6039 str r1, [r7, #0]
|
|
st->st_mode = S_IFCHR;
|
|
8001b18: 683b ldr r3, [r7, #0]
|
|
8001b1a: f44f 5200 mov.w r2, #8192 ; 0x2000
|
|
8001b1e: 605a str r2, [r3, #4]
|
|
return 0;
|
|
8001b20: 2300 movs r3, #0
|
|
}
|
|
8001b22: 4618 mov r0, r3
|
|
8001b24: 370c adds r7, #12
|
|
8001b26: 46bd mov sp, r7
|
|
8001b28: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001b2c: 4770 bx lr
|
|
|
|
08001b2e <_isatty>:
|
|
|
|
int _isatty(int file)
|
|
{
|
|
8001b2e: b480 push {r7}
|
|
8001b30: b083 sub sp, #12
|
|
8001b32: af00 add r7, sp, #0
|
|
8001b34: 6078 str r0, [r7, #4]
|
|
return 1;
|
|
8001b36: 2301 movs r3, #1
|
|
}
|
|
8001b38: 4618 mov r0, r3
|
|
8001b3a: 370c adds r7, #12
|
|
8001b3c: 46bd mov sp, r7
|
|
8001b3e: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001b42: 4770 bx lr
|
|
|
|
08001b44 <_lseek>:
|
|
|
|
int _lseek(int file, int ptr, int dir)
|
|
{
|
|
8001b44: b480 push {r7}
|
|
8001b46: b085 sub sp, #20
|
|
8001b48: af00 add r7, sp, #0
|
|
8001b4a: 60f8 str r0, [r7, #12]
|
|
8001b4c: 60b9 str r1, [r7, #8]
|
|
8001b4e: 607a str r2, [r7, #4]
|
|
return 0;
|
|
8001b50: 2300 movs r3, #0
|
|
}
|
|
8001b52: 4618 mov r0, r3
|
|
8001b54: 3714 adds r7, #20
|
|
8001b56: 46bd mov sp, r7
|
|
8001b58: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001b5c: 4770 bx lr
|
|
...
|
|
|
|
08001b60 <_sbrk>:
|
|
*
|
|
* @param incr Memory size
|
|
* @return Pointer to allocated memory
|
|
*/
|
|
void *_sbrk(ptrdiff_t incr)
|
|
{
|
|
8001b60: b580 push {r7, lr}
|
|
8001b62: b086 sub sp, #24
|
|
8001b64: af00 add r7, sp, #0
|
|
8001b66: 6078 str r0, [r7, #4]
|
|
extern uint8_t _end; /* Symbol defined in the linker script */
|
|
extern uint8_t _estack; /* Symbol defined in the linker script */
|
|
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
|
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
|
8001b68: 4a14 ldr r2, [pc, #80] ; (8001bbc <_sbrk+0x5c>)
|
|
8001b6a: 4b15 ldr r3, [pc, #84] ; (8001bc0 <_sbrk+0x60>)
|
|
8001b6c: 1ad3 subs r3, r2, r3
|
|
8001b6e: 617b str r3, [r7, #20]
|
|
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
|
8001b70: 697b ldr r3, [r7, #20]
|
|
8001b72: 613b str r3, [r7, #16]
|
|
uint8_t *prev_heap_end;
|
|
|
|
/* Initialize heap end at first call */
|
|
if (NULL == __sbrk_heap_end)
|
|
8001b74: 4b13 ldr r3, [pc, #76] ; (8001bc4 <_sbrk+0x64>)
|
|
8001b76: 681b ldr r3, [r3, #0]
|
|
8001b78: 2b00 cmp r3, #0
|
|
8001b7a: d102 bne.n 8001b82 <_sbrk+0x22>
|
|
{
|
|
__sbrk_heap_end = &_end;
|
|
8001b7c: 4b11 ldr r3, [pc, #68] ; (8001bc4 <_sbrk+0x64>)
|
|
8001b7e: 4a12 ldr r2, [pc, #72] ; (8001bc8 <_sbrk+0x68>)
|
|
8001b80: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Protect heap from growing into the reserved MSP stack */
|
|
if (__sbrk_heap_end + incr > max_heap)
|
|
8001b82: 4b10 ldr r3, [pc, #64] ; (8001bc4 <_sbrk+0x64>)
|
|
8001b84: 681a ldr r2, [r3, #0]
|
|
8001b86: 687b ldr r3, [r7, #4]
|
|
8001b88: 4413 add r3, r2
|
|
8001b8a: 693a ldr r2, [r7, #16]
|
|
8001b8c: 429a cmp r2, r3
|
|
8001b8e: d207 bcs.n 8001ba0 <_sbrk+0x40>
|
|
{
|
|
errno = ENOMEM;
|
|
8001b90: f008 fbc4 bl 800a31c <__errno>
|
|
8001b94: 4602 mov r2, r0
|
|
8001b96: 230c movs r3, #12
|
|
8001b98: 6013 str r3, [r2, #0]
|
|
return (void *)-1;
|
|
8001b9a: f04f 33ff mov.w r3, #4294967295
|
|
8001b9e: e009 b.n 8001bb4 <_sbrk+0x54>
|
|
}
|
|
|
|
prev_heap_end = __sbrk_heap_end;
|
|
8001ba0: 4b08 ldr r3, [pc, #32] ; (8001bc4 <_sbrk+0x64>)
|
|
8001ba2: 681b ldr r3, [r3, #0]
|
|
8001ba4: 60fb str r3, [r7, #12]
|
|
__sbrk_heap_end += incr;
|
|
8001ba6: 4b07 ldr r3, [pc, #28] ; (8001bc4 <_sbrk+0x64>)
|
|
8001ba8: 681a ldr r2, [r3, #0]
|
|
8001baa: 687b ldr r3, [r7, #4]
|
|
8001bac: 4413 add r3, r2
|
|
8001bae: 4a05 ldr r2, [pc, #20] ; (8001bc4 <_sbrk+0x64>)
|
|
8001bb0: 6013 str r3, [r2, #0]
|
|
|
|
return (void *)prev_heap_end;
|
|
8001bb2: 68fb ldr r3, [r7, #12]
|
|
}
|
|
8001bb4: 4618 mov r0, r3
|
|
8001bb6: 3718 adds r7, #24
|
|
8001bb8: 46bd mov sp, r7
|
|
8001bba: bd80 pop {r7, pc}
|
|
8001bbc: 20010000 .word 0x20010000
|
|
8001bc0: 00000400 .word 0x00000400
|
|
8001bc4: 20000228 .word 0x20000228
|
|
8001bc8: 20000ab8 .word 0x20000ab8
|
|
|
|
08001bcc <SystemInit>:
|
|
* configuration.
|
|
* @param None
|
|
* @retval None
|
|
*/
|
|
void SystemInit(void)
|
|
{
|
|
8001bcc: b480 push {r7}
|
|
8001bce: af00 add r7, sp, #0
|
|
/* FPU settings ------------------------------------------------------------*/
|
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
|
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
|
8001bd0: 4b08 ldr r3, [pc, #32] ; (8001bf4 <SystemInit+0x28>)
|
|
8001bd2: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88
|
|
8001bd6: 4a07 ldr r2, [pc, #28] ; (8001bf4 <SystemInit+0x28>)
|
|
8001bd8: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
|
|
8001bdc: f8c2 3088 str.w r3, [r2, #136] ; 0x88
|
|
|
|
/* Configure the Vector Table location add offset address ------------------*/
|
|
#ifdef VECT_TAB_SRAM
|
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
|
#else
|
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
|
8001be0: 4b04 ldr r3, [pc, #16] ; (8001bf4 <SystemInit+0x28>)
|
|
8001be2: f04f 6200 mov.w r2, #134217728 ; 0x8000000
|
|
8001be6: 609a str r2, [r3, #8]
|
|
#endif
|
|
}
|
|
8001be8: bf00 nop
|
|
8001bea: 46bd mov sp, r7
|
|
8001bec: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001bf0: 4770 bx lr
|
|
8001bf2: bf00 nop
|
|
8001bf4: e000ed00 .word 0xe000ed00
|
|
|
|
08001bf8 <Reset_Handler>:
|
|
|
|
.section .text.Reset_Handler
|
|
.weak Reset_Handler
|
|
.type Reset_Handler, %function
|
|
Reset_Handler:
|
|
ldr sp, =_estack /* set stack pointer */
|
|
8001bf8: f8df d034 ldr.w sp, [pc, #52] ; 8001c30 <LoopFillZerobss+0x14>
|
|
|
|
/* Copy the data segment initializers from flash to SRAM */
|
|
movs r1, #0
|
|
8001bfc: 2100 movs r1, #0
|
|
b LoopCopyDataInit
|
|
8001bfe: e003 b.n 8001c08 <LoopCopyDataInit>
|
|
|
|
08001c00 <CopyDataInit>:
|
|
|
|
CopyDataInit:
|
|
ldr r3, =_sidata
|
|
8001c00: 4b0c ldr r3, [pc, #48] ; (8001c34 <LoopFillZerobss+0x18>)
|
|
ldr r3, [r3, r1]
|
|
8001c02: 585b ldr r3, [r3, r1]
|
|
str r3, [r0, r1]
|
|
8001c04: 5043 str r3, [r0, r1]
|
|
adds r1, r1, #4
|
|
8001c06: 3104 adds r1, #4
|
|
|
|
08001c08 <LoopCopyDataInit>:
|
|
|
|
LoopCopyDataInit:
|
|
ldr r0, =_sdata
|
|
8001c08: 480b ldr r0, [pc, #44] ; (8001c38 <LoopFillZerobss+0x1c>)
|
|
ldr r3, =_edata
|
|
8001c0a: 4b0c ldr r3, [pc, #48] ; (8001c3c <LoopFillZerobss+0x20>)
|
|
adds r2, r0, r1
|
|
8001c0c: 1842 adds r2, r0, r1
|
|
cmp r2, r3
|
|
8001c0e: 429a cmp r2, r3
|
|
bcc CopyDataInit
|
|
8001c10: d3f6 bcc.n 8001c00 <CopyDataInit>
|
|
ldr r2, =_sbss
|
|
8001c12: 4a0b ldr r2, [pc, #44] ; (8001c40 <LoopFillZerobss+0x24>)
|
|
b LoopFillZerobss
|
|
8001c14: e002 b.n 8001c1c <LoopFillZerobss>
|
|
|
|
08001c16 <FillZerobss>:
|
|
/* Zero fill the bss segment. */
|
|
FillZerobss:
|
|
movs r3, #0
|
|
8001c16: 2300 movs r3, #0
|
|
str r3, [r2], #4
|
|
8001c18: f842 3b04 str.w r3, [r2], #4
|
|
|
|
08001c1c <LoopFillZerobss>:
|
|
|
|
LoopFillZerobss:
|
|
ldr r3, = _ebss
|
|
8001c1c: 4b09 ldr r3, [pc, #36] ; (8001c44 <LoopFillZerobss+0x28>)
|
|
cmp r2, r3
|
|
8001c1e: 429a cmp r2, r3
|
|
bcc FillZerobss
|
|
8001c20: d3f9 bcc.n 8001c16 <FillZerobss>
|
|
|
|
/* Call the clock system intitialization function.*/
|
|
bl SystemInit
|
|
8001c22: f7ff ffd3 bl 8001bcc <SystemInit>
|
|
/* Call static constructors */
|
|
bl __libc_init_array
|
|
8001c26: f008 fb7f bl 800a328 <__libc_init_array>
|
|
/* Call the application's entry point.*/
|
|
bl main
|
|
8001c2a: f7ff facf bl 80011cc <main>
|
|
bx lr
|
|
8001c2e: 4770 bx lr
|
|
ldr sp, =_estack /* set stack pointer */
|
|
8001c30: 20010000 .word 0x20010000
|
|
ldr r3, =_sidata
|
|
8001c34: 0800ec68 .word 0x0800ec68
|
|
ldr r0, =_sdata
|
|
8001c38: 20000000 .word 0x20000000
|
|
ldr r3, =_edata
|
|
8001c3c: 200001fc .word 0x200001fc
|
|
ldr r2, =_sbss
|
|
8001c40: 200001fc .word 0x200001fc
|
|
ldr r3, = _ebss
|
|
8001c44: 20000ab4 .word 0x20000ab4
|
|
|
|
08001c48 <ADC_IRQHandler>:
|
|
* @retval None
|
|
*/
|
|
.section .text.Default_Handler,"ax",%progbits
|
|
Default_Handler:
|
|
Infinite_Loop:
|
|
b Infinite_Loop
|
|
8001c48: e7fe b.n 8001c48 <ADC_IRQHandler>
|
|
...
|
|
|
|
08001c4c <COMPASS_LEDS_Init>:
|
|
*/
|
|
|
|
#include "COMPASS_LEDS.h"
|
|
|
|
bool COMPASS_LEDS_Init(COMPASS_LEDS *compassLeds)
|
|
{
|
|
8001c4c: b580 push {r7, lr}
|
|
8001c4e: b082 sub sp, #8
|
|
8001c50: af00 add r7, sp, #0
|
|
8001c52: 6078 str r0, [r7, #4]
|
|
compassLeds->southLed.Pin = GPIO_PIN_15;
|
|
8001c54: 687b ldr r3, [r7, #4]
|
|
8001c56: f44f 4200 mov.w r2, #32768 ; 0x8000
|
|
8001c5a: 615a str r2, [r3, #20]
|
|
compassLeds->eastLed.Pin = GPIO_PIN_12;
|
|
8001c5c: 687b ldr r3, [r7, #4]
|
|
8001c5e: f44f 5280 mov.w r2, #4096 ; 0x1000
|
|
8001c62: 63da str r2, [r3, #60] ; 0x3c
|
|
compassLeds->northLed.Pin = GPIO_PIN_13;
|
|
8001c64: 687b ldr r3, [r7, #4]
|
|
8001c66: f44f 5200 mov.w r2, #8192 ; 0x2000
|
|
8001c6a: 601a str r2, [r3, #0]
|
|
compassLeds->westLed.Pin = GPIO_PIN_14;
|
|
8001c6c: 687b ldr r3, [r7, #4]
|
|
8001c6e: f44f 4280 mov.w r2, #16384 ; 0x4000
|
|
8001c72: 629a str r2, [r3, #40] ; 0x28
|
|
|
|
compassLeds->southLed.Mode = GPIO_MODE_OUTPUT_PP;
|
|
8001c74: 687b ldr r3, [r7, #4]
|
|
8001c76: 2201 movs r2, #1
|
|
8001c78: 619a str r2, [r3, #24]
|
|
compassLeds->eastLed.Mode = GPIO_MODE_OUTPUT_PP;
|
|
8001c7a: 687b ldr r3, [r7, #4]
|
|
8001c7c: 2201 movs r2, #1
|
|
8001c7e: 641a str r2, [r3, #64] ; 0x40
|
|
compassLeds->northLed.Mode = GPIO_MODE_OUTPUT_PP;
|
|
8001c80: 687b ldr r3, [r7, #4]
|
|
8001c82: 2201 movs r2, #1
|
|
8001c84: 605a str r2, [r3, #4]
|
|
compassLeds->westLed.Mode = GPIO_MODE_OUTPUT_PP;
|
|
8001c86: 687b ldr r3, [r7, #4]
|
|
8001c88: 2201 movs r2, #1
|
|
8001c8a: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
compassLeds->southLed.Speed = GPIO_SPEED_LOW;
|
|
8001c8c: 687b ldr r3, [r7, #4]
|
|
8001c8e: 2200 movs r2, #0
|
|
8001c90: 621a str r2, [r3, #32]
|
|
compassLeds->eastLed.Speed = GPIO_SPEED_LOW;
|
|
8001c92: 687b ldr r3, [r7, #4]
|
|
8001c94: 2200 movs r2, #0
|
|
8001c96: 649a str r2, [r3, #72] ; 0x48
|
|
compassLeds->northLed.Speed = GPIO_SPEED_LOW;
|
|
8001c98: 687b ldr r3, [r7, #4]
|
|
8001c9a: 2200 movs r2, #0
|
|
8001c9c: 60da str r2, [r3, #12]
|
|
compassLeds->westLed.Speed = GPIO_SPEED_LOW;
|
|
8001c9e: 687b ldr r3, [r7, #4]
|
|
8001ca0: 2200 movs r2, #0
|
|
8001ca2: 635a str r2, [r3, #52] ; 0x34
|
|
|
|
HAL_GPIO_Init(GPIOD, &compassLeds->southLed);
|
|
8001ca4: 687b ldr r3, [r7, #4]
|
|
8001ca6: 3314 adds r3, #20
|
|
8001ca8: 4619 mov r1, r3
|
|
8001caa: 481c ldr r0, [pc, #112] ; (8001d1c <COMPASS_LEDS_Init+0xd0>)
|
|
8001cac: f000 fc76 bl 800259c <HAL_GPIO_Init>
|
|
HAL_GPIO_Init(GPIOD, &compassLeds->eastLed);
|
|
8001cb0: 687b ldr r3, [r7, #4]
|
|
8001cb2: 333c adds r3, #60 ; 0x3c
|
|
8001cb4: 4619 mov r1, r3
|
|
8001cb6: 4819 ldr r0, [pc, #100] ; (8001d1c <COMPASS_LEDS_Init+0xd0>)
|
|
8001cb8: f000 fc70 bl 800259c <HAL_GPIO_Init>
|
|
HAL_GPIO_Init(GPIOD, &compassLeds->northLed);
|
|
8001cbc: 687b ldr r3, [r7, #4]
|
|
8001cbe: 4619 mov r1, r3
|
|
8001cc0: 4816 ldr r0, [pc, #88] ; (8001d1c <COMPASS_LEDS_Init+0xd0>)
|
|
8001cc2: f000 fc6b bl 800259c <HAL_GPIO_Init>
|
|
HAL_GPIO_Init(GPIOD, &compassLeds->westLed);
|
|
8001cc6: 687b ldr r3, [r7, #4]
|
|
8001cc8: 3328 adds r3, #40 ; 0x28
|
|
8001cca: 4619 mov r1, r3
|
|
8001ccc: 4813 ldr r0, [pc, #76] ; (8001d1c <COMPASS_LEDS_Init+0xd0>)
|
|
8001cce: f000 fc65 bl 800259c <HAL_GPIO_Init>
|
|
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->southLed.Pin, GPIO_PIN_RESET);
|
|
8001cd2: 687b ldr r3, [r7, #4]
|
|
8001cd4: 695b ldr r3, [r3, #20]
|
|
8001cd6: b29b uxth r3, r3
|
|
8001cd8: 2200 movs r2, #0
|
|
8001cda: 4619 mov r1, r3
|
|
8001cdc: 480f ldr r0, [pc, #60] ; (8001d1c <COMPASS_LEDS_Init+0xd0>)
|
|
8001cde: f000 fddf bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->eastLed.Pin, GPIO_PIN_RESET);
|
|
8001ce2: 687b ldr r3, [r7, #4]
|
|
8001ce4: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
8001ce6: b29b uxth r3, r3
|
|
8001ce8: 2200 movs r2, #0
|
|
8001cea: 4619 mov r1, r3
|
|
8001cec: 480b ldr r0, [pc, #44] ; (8001d1c <COMPASS_LEDS_Init+0xd0>)
|
|
8001cee: f000 fdd7 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->northLed.Pin, GPIO_PIN_RESET);
|
|
8001cf2: 687b ldr r3, [r7, #4]
|
|
8001cf4: 681b ldr r3, [r3, #0]
|
|
8001cf6: b29b uxth r3, r3
|
|
8001cf8: 2200 movs r2, #0
|
|
8001cfa: 4619 mov r1, r3
|
|
8001cfc: 4807 ldr r0, [pc, #28] ; (8001d1c <COMPASS_LEDS_Init+0xd0>)
|
|
8001cfe: f000 fdcf bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->westLed.Pin, GPIO_PIN_RESET);
|
|
8001d02: 687b ldr r3, [r7, #4]
|
|
8001d04: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
8001d06: b29b uxth r3, r3
|
|
8001d08: 2200 movs r2, #0
|
|
8001d0a: 4619 mov r1, r3
|
|
8001d0c: 4803 ldr r0, [pc, #12] ; (8001d1c <COMPASS_LEDS_Init+0xd0>)
|
|
8001d0e: f000 fdc7 bl 80028a0 <HAL_GPIO_WritePin>
|
|
|
|
return true;
|
|
8001d12: 2301 movs r3, #1
|
|
}
|
|
8001d14: 4618 mov r0, r3
|
|
8001d16: 3708 adds r7, #8
|
|
8001d18: 46bd mov sp, r7
|
|
8001d1a: bd80 pop {r7, pc}
|
|
8001d1c: 40020c00 .word 0x40020c00
|
|
|
|
08001d20 <COMPASS_LEDS_Light>:
|
|
|
|
bool COMPASS_LEDS_Light(COMPASS_LEDS *compassLeds, Heading heading)
|
|
{
|
|
8001d20: b580 push {r7, lr}
|
|
8001d22: b082 sub sp, #8
|
|
8001d24: af00 add r7, sp, #0
|
|
8001d26: 6078 str r0, [r7, #4]
|
|
8001d28: 460b mov r3, r1
|
|
8001d2a: 70fb strb r3, [r7, #3]
|
|
switch(heading)
|
|
8001d2c: 78fb ldrb r3, [r7, #3]
|
|
8001d2e: 3b01 subs r3, #1
|
|
8001d30: 2b07 cmp r3, #7
|
|
8001d32: f200 8097 bhi.w 8001e64 <COMPASS_LEDS_Light+0x144>
|
|
8001d36: a201 add r2, pc, #4 ; (adr r2, 8001d3c <COMPASS_LEDS_Light+0x1c>)
|
|
8001d38: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8001d3c: 08001d9f .word 0x08001d9f
|
|
8001d40: 08001d5d .word 0x08001d5d
|
|
8001d44: 08001e65 .word 0x08001e65
|
|
8001d48: 08001e23 .word 0x08001e23
|
|
8001d4c: 08001e65 .word 0x08001e65
|
|
8001d50: 08001e65 .word 0x08001e65
|
|
8001d54: 08001e65 .word 0x08001e65
|
|
8001d58: 08001de1 .word 0x08001de1
|
|
{
|
|
case SOUTH:
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->southLed.Pin, GPIO_PIN_SET);
|
|
8001d5c: 687b ldr r3, [r7, #4]
|
|
8001d5e: 695b ldr r3, [r3, #20]
|
|
8001d60: b29b uxth r3, r3
|
|
8001d62: 2201 movs r2, #1
|
|
8001d64: 4619 mov r1, r3
|
|
8001d66: 4852 ldr r0, [pc, #328] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001d68: f000 fd9a bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->eastLed.Pin, GPIO_PIN_RESET);
|
|
8001d6c: 687b ldr r3, [r7, #4]
|
|
8001d6e: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
8001d70: b29b uxth r3, r3
|
|
8001d72: 2200 movs r2, #0
|
|
8001d74: 4619 mov r1, r3
|
|
8001d76: 484e ldr r0, [pc, #312] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001d78: f000 fd92 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->northLed.Pin, GPIO_PIN_RESET);
|
|
8001d7c: 687b ldr r3, [r7, #4]
|
|
8001d7e: 681b ldr r3, [r3, #0]
|
|
8001d80: b29b uxth r3, r3
|
|
8001d82: 2200 movs r2, #0
|
|
8001d84: 4619 mov r1, r3
|
|
8001d86: 484a ldr r0, [pc, #296] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001d88: f000 fd8a bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->westLed.Pin, GPIO_PIN_RESET);
|
|
8001d8c: 687b ldr r3, [r7, #4]
|
|
8001d8e: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
8001d90: b29b uxth r3, r3
|
|
8001d92: 2200 movs r2, #0
|
|
8001d94: 4619 mov r1, r3
|
|
8001d96: 4846 ldr r0, [pc, #280] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001d98: f000 fd82 bl 80028a0 <HAL_GPIO_WritePin>
|
|
break;
|
|
8001d9c: e082 b.n 8001ea4 <COMPASS_LEDS_Light+0x184>
|
|
case NORTH:
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->southLed.Pin, GPIO_PIN_RESET);
|
|
8001d9e: 687b ldr r3, [r7, #4]
|
|
8001da0: 695b ldr r3, [r3, #20]
|
|
8001da2: b29b uxth r3, r3
|
|
8001da4: 2200 movs r2, #0
|
|
8001da6: 4619 mov r1, r3
|
|
8001da8: 4841 ldr r0, [pc, #260] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001daa: f000 fd79 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->eastLed.Pin, GPIO_PIN_RESET);
|
|
8001dae: 687b ldr r3, [r7, #4]
|
|
8001db0: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
8001db2: b29b uxth r3, r3
|
|
8001db4: 2200 movs r2, #0
|
|
8001db6: 4619 mov r1, r3
|
|
8001db8: 483d ldr r0, [pc, #244] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001dba: f000 fd71 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->northLed.Pin, GPIO_PIN_SET);
|
|
8001dbe: 687b ldr r3, [r7, #4]
|
|
8001dc0: 681b ldr r3, [r3, #0]
|
|
8001dc2: b29b uxth r3, r3
|
|
8001dc4: 2201 movs r2, #1
|
|
8001dc6: 4619 mov r1, r3
|
|
8001dc8: 4839 ldr r0, [pc, #228] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001dca: f000 fd69 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->westLed.Pin, GPIO_PIN_RESET);
|
|
8001dce: 687b ldr r3, [r7, #4]
|
|
8001dd0: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
8001dd2: b29b uxth r3, r3
|
|
8001dd4: 2200 movs r2, #0
|
|
8001dd6: 4619 mov r1, r3
|
|
8001dd8: 4835 ldr r0, [pc, #212] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001dda: f000 fd61 bl 80028a0 <HAL_GPIO_WritePin>
|
|
break;
|
|
8001dde: e061 b.n 8001ea4 <COMPASS_LEDS_Light+0x184>
|
|
case EAST:
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->southLed.Pin, GPIO_PIN_RESET);
|
|
8001de0: 687b ldr r3, [r7, #4]
|
|
8001de2: 695b ldr r3, [r3, #20]
|
|
8001de4: b29b uxth r3, r3
|
|
8001de6: 2200 movs r2, #0
|
|
8001de8: 4619 mov r1, r3
|
|
8001dea: 4831 ldr r0, [pc, #196] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001dec: f000 fd58 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->eastLed.Pin, GPIO_PIN_SET);
|
|
8001df0: 687b ldr r3, [r7, #4]
|
|
8001df2: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
8001df4: b29b uxth r3, r3
|
|
8001df6: 2201 movs r2, #1
|
|
8001df8: 4619 mov r1, r3
|
|
8001dfa: 482d ldr r0, [pc, #180] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001dfc: f000 fd50 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->northLed.Pin, GPIO_PIN_RESET);
|
|
8001e00: 687b ldr r3, [r7, #4]
|
|
8001e02: 681b ldr r3, [r3, #0]
|
|
8001e04: b29b uxth r3, r3
|
|
8001e06: 2200 movs r2, #0
|
|
8001e08: 4619 mov r1, r3
|
|
8001e0a: 4829 ldr r0, [pc, #164] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001e0c: f000 fd48 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->westLed.Pin, GPIO_PIN_RESET);
|
|
8001e10: 687b ldr r3, [r7, #4]
|
|
8001e12: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
8001e14: b29b uxth r3, r3
|
|
8001e16: 2200 movs r2, #0
|
|
8001e18: 4619 mov r1, r3
|
|
8001e1a: 4825 ldr r0, [pc, #148] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001e1c: f000 fd40 bl 80028a0 <HAL_GPIO_WritePin>
|
|
break;
|
|
8001e20: e040 b.n 8001ea4 <COMPASS_LEDS_Light+0x184>
|
|
case WEST:
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->southLed.Pin, GPIO_PIN_RESET);
|
|
8001e22: 687b ldr r3, [r7, #4]
|
|
8001e24: 695b ldr r3, [r3, #20]
|
|
8001e26: b29b uxth r3, r3
|
|
8001e28: 2200 movs r2, #0
|
|
8001e2a: 4619 mov r1, r3
|
|
8001e2c: 4820 ldr r0, [pc, #128] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001e2e: f000 fd37 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->eastLed.Pin, GPIO_PIN_RESET);
|
|
8001e32: 687b ldr r3, [r7, #4]
|
|
8001e34: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
8001e36: b29b uxth r3, r3
|
|
8001e38: 2200 movs r2, #0
|
|
8001e3a: 4619 mov r1, r3
|
|
8001e3c: 481c ldr r0, [pc, #112] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001e3e: f000 fd2f bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->northLed.Pin, GPIO_PIN_RESET);
|
|
8001e42: 687b ldr r3, [r7, #4]
|
|
8001e44: 681b ldr r3, [r3, #0]
|
|
8001e46: b29b uxth r3, r3
|
|
8001e48: 2200 movs r2, #0
|
|
8001e4a: 4619 mov r1, r3
|
|
8001e4c: 4818 ldr r0, [pc, #96] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001e4e: f000 fd27 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->westLed.Pin, GPIO_PIN_SET);
|
|
8001e52: 687b ldr r3, [r7, #4]
|
|
8001e54: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
8001e56: b29b uxth r3, r3
|
|
8001e58: 2201 movs r2, #1
|
|
8001e5a: 4619 mov r1, r3
|
|
8001e5c: 4814 ldr r0, [pc, #80] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001e5e: f000 fd1f bl 80028a0 <HAL_GPIO_WritePin>
|
|
break;
|
|
8001e62: e01f b.n 8001ea4 <COMPASS_LEDS_Light+0x184>
|
|
default:
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->southLed.Pin, GPIO_PIN_RESET);
|
|
8001e64: 687b ldr r3, [r7, #4]
|
|
8001e66: 695b ldr r3, [r3, #20]
|
|
8001e68: b29b uxth r3, r3
|
|
8001e6a: 2200 movs r2, #0
|
|
8001e6c: 4619 mov r1, r3
|
|
8001e6e: 4810 ldr r0, [pc, #64] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001e70: f000 fd16 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->eastLed.Pin, GPIO_PIN_RESET);
|
|
8001e74: 687b ldr r3, [r7, #4]
|
|
8001e76: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
8001e78: b29b uxth r3, r3
|
|
8001e7a: 2200 movs r2, #0
|
|
8001e7c: 4619 mov r1, r3
|
|
8001e7e: 480c ldr r0, [pc, #48] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001e80: f000 fd0e bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->northLed.Pin, GPIO_PIN_RESET);
|
|
8001e84: 687b ldr r3, [r7, #4]
|
|
8001e86: 681b ldr r3, [r3, #0]
|
|
8001e88: b29b uxth r3, r3
|
|
8001e8a: 2200 movs r2, #0
|
|
8001e8c: 4619 mov r1, r3
|
|
8001e8e: 4808 ldr r0, [pc, #32] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001e90: f000 fd06 bl 80028a0 <HAL_GPIO_WritePin>
|
|
HAL_GPIO_WritePin(GPIOD, compassLeds->westLed.Pin, GPIO_PIN_RESET);
|
|
8001e94: 687b ldr r3, [r7, #4]
|
|
8001e96: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
8001e98: b29b uxth r3, r3
|
|
8001e9a: 2200 movs r2, #0
|
|
8001e9c: 4619 mov r1, r3
|
|
8001e9e: 4804 ldr r0, [pc, #16] ; (8001eb0 <COMPASS_LEDS_Light+0x190>)
|
|
8001ea0: f000 fcfe bl 80028a0 <HAL_GPIO_WritePin>
|
|
}
|
|
return true;
|
|
8001ea4: 2301 movs r3, #1
|
|
}
|
|
8001ea6: 4618 mov r0, r3
|
|
8001ea8: 3708 adds r7, #8
|
|
8001eaa: 46bd mov sp, r7
|
|
8001eac: bd80 pop {r7, pc}
|
|
8001eae: bf00 nop
|
|
8001eb0: 40020c00 .word 0x40020c00
|
|
|
|
08001eb4 <LSM303_Init>:
|
|
static const uint8_t _IRC_REG_M = 0x0C;
|
|
static const uint8_t _TEMP_OUT_H_M = 0x31;
|
|
static const uint8_t _TEMP_OUT_L_M = 0x32;
|
|
|
|
bool LSM303_Init(LSM303 *device, I2C_HandleTypeDef *i2cHandler)
|
|
{
|
|
8001eb4: b480 push {r7}
|
|
8001eb6: b083 sub sp, #12
|
|
8001eb8: af00 add r7, sp, #0
|
|
8001eba: 6078 str r0, [r7, #4]
|
|
8001ebc: 6039 str r1, [r7, #0]
|
|
if(!device || !i2cHandler)return false;
|
|
8001ebe: 687b ldr r3, [r7, #4]
|
|
8001ec0: 2b00 cmp r3, #0
|
|
8001ec2: d002 beq.n 8001eca <LSM303_Init+0x16>
|
|
8001ec4: 683b ldr r3, [r7, #0]
|
|
8001ec6: 2b00 cmp r3, #0
|
|
8001ec8: d101 bne.n 8001ece <LSM303_Init+0x1a>
|
|
8001eca: 2300 movs r3, #0
|
|
8001ecc: e00b b.n 8001ee6 <LSM303_Init+0x32>
|
|
|
|
device->i2cHandler = i2cHandler;
|
|
8001ece: 687b ldr r3, [r7, #4]
|
|
8001ed0: 683a ldr r2, [r7, #0]
|
|
8001ed2: 601a str r2, [r3, #0]
|
|
device->opMode = CONTINUOUS_CONVERSION;
|
|
8001ed4: 687b ldr r3, [r7, #4]
|
|
8001ed6: 2200 movs r2, #0
|
|
8001ed8: 711a strb r2, [r3, #4]
|
|
device->enableTempSensor = false;
|
|
8001eda: 687a ldr r2, [r7, #4]
|
|
8001edc: 7953 ldrb r3, [r2, #5]
|
|
8001ede: f36f 0300 bfc r3, #0, #1
|
|
8001ee2: 7153 strb r3, [r2, #5]
|
|
|
|
return true;
|
|
8001ee4: 2301 movs r3, #1
|
|
}
|
|
8001ee6: 4618 mov r0, r3
|
|
8001ee8: 370c adds r7, #12
|
|
8001eea: 46bd mov sp, r7
|
|
8001eec: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001ef0: 4770 bx lr
|
|
|
|
08001ef2 <LSM303_EnableTemperatureSensor>:
|
|
|
|
bool LSM303_EnableTemperatureSensor(LSM303 *device, bool enable)
|
|
{
|
|
8001ef2: b480 push {r7}
|
|
8001ef4: b083 sub sp, #12
|
|
8001ef6: af00 add r7, sp, #0
|
|
8001ef8: 6078 str r0, [r7, #4]
|
|
8001efa: 460b mov r3, r1
|
|
8001efc: 70fb strb r3, [r7, #3]
|
|
if(!device) return false;
|
|
8001efe: 687b ldr r3, [r7, #4]
|
|
8001f00: 2b00 cmp r3, #0
|
|
8001f02: d101 bne.n 8001f08 <LSM303_EnableTemperatureSensor+0x16>
|
|
8001f04: 2300 movs r3, #0
|
|
8001f06: e009 b.n 8001f1c <LSM303_EnableTemperatureSensor+0x2a>
|
|
|
|
device->enableTempSensor = enable;
|
|
8001f08: 78fb ldrb r3, [r7, #3]
|
|
8001f0a: f003 0301 and.w r3, r3, #1
|
|
8001f0e: b2d9 uxtb r1, r3
|
|
8001f10: 687a ldr r2, [r7, #4]
|
|
8001f12: 7953 ldrb r3, [r2, #5]
|
|
8001f14: f361 0300 bfi r3, r1, #0, #1
|
|
8001f18: 7153 strb r3, [r2, #5]
|
|
|
|
return true;
|
|
8001f1a: 2301 movs r3, #1
|
|
}
|
|
8001f1c: 4618 mov r0, r3
|
|
8001f1e: 370c adds r7, #12
|
|
8001f20: 46bd mov sp, r7
|
|
8001f22: f85d 7b04 ldr.w r7, [sp], #4
|
|
8001f26: 4770 bx lr
|
|
|
|
08001f28 <LSM303_ApplyConfig>:
|
|
|
|
return true;
|
|
}
|
|
|
|
bool LSM303_ApplyConfig(LSM303 *device)
|
|
{
|
|
8001f28: b580 push {r7, lr}
|
|
8001f2a: b084 sub sp, #16
|
|
8001f2c: af00 add r7, sp, #0
|
|
8001f2e: 6078 str r0, [r7, #4]
|
|
if(!device) return false;
|
|
8001f30: 687b ldr r3, [r7, #4]
|
|
8001f32: 2b00 cmp r3, #0
|
|
8001f34: d101 bne.n 8001f3a <LSM303_ApplyConfig+0x12>
|
|
8001f36: 2300 movs r3, #0
|
|
8001f38: e03d b.n 8001fb6 <LSM303_ApplyConfig+0x8e>
|
|
|
|
//We apply the temperature config
|
|
uint8_t data = 0;
|
|
8001f3a: 2300 movs r3, #0
|
|
8001f3c: 73fb strb r3, [r7, #15]
|
|
if(!LSM303_ReadRegister(device, CRA_REG_M, &data))
|
|
8001f3e: f107 030f add.w r3, r7, #15
|
|
8001f42: 461a mov r2, r3
|
|
8001f44: 2100 movs r1, #0
|
|
8001f46: 6878 ldr r0, [r7, #4]
|
|
8001f48: f000 f930 bl 80021ac <LSM303_ReadRegister>
|
|
8001f4c: 4603 mov r3, r0
|
|
8001f4e: 2b00 cmp r3, #0
|
|
8001f50: d101 bne.n 8001f56 <LSM303_ApplyConfig+0x2e>
|
|
return false;
|
|
8001f52: 2300 movs r3, #0
|
|
8001f54: e02f b.n 8001fb6 <LSM303_ApplyConfig+0x8e>
|
|
|
|
if(device->enableTempSensor)
|
|
8001f56: 687b ldr r3, [r7, #4]
|
|
8001f58: 795b ldrb r3, [r3, #5]
|
|
8001f5a: f003 0301 and.w r3, r3, #1
|
|
8001f5e: b2db uxtb r3, r3
|
|
8001f60: 2b00 cmp r3, #0
|
|
8001f62: d00d beq.n 8001f80 <LSM303_ApplyConfig+0x58>
|
|
{
|
|
if(!LSM303_WriteRegister(device, CRA_REG_M, data | (1 << 7)))
|
|
8001f64: 7bfb ldrb r3, [r7, #15]
|
|
8001f66: f063 037f orn r3, r3, #127 ; 0x7f
|
|
8001f6a: b2db uxtb r3, r3
|
|
8001f6c: 461a mov r2, r3
|
|
8001f6e: 2100 movs r1, #0
|
|
8001f70: 6878 ldr r0, [r7, #4]
|
|
8001f72: f000 f94a bl 800220a <LSM303_WriteRegister>
|
|
8001f76: 4603 mov r3, r0
|
|
8001f78: 2b00 cmp r3, #0
|
|
8001f7a: d10f bne.n 8001f9c <LSM303_ApplyConfig+0x74>
|
|
return false;
|
|
8001f7c: 2300 movs r3, #0
|
|
8001f7e: e01a b.n 8001fb6 <LSM303_ApplyConfig+0x8e>
|
|
}
|
|
else
|
|
{
|
|
if(!LSM303_WriteRegister(device, CRA_REG_M, data & ~(1 << 7)))
|
|
8001f80: 7bfb ldrb r3, [r7, #15]
|
|
8001f82: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
8001f86: b2db uxtb r3, r3
|
|
8001f88: 461a mov r2, r3
|
|
8001f8a: 2100 movs r1, #0
|
|
8001f8c: 6878 ldr r0, [r7, #4]
|
|
8001f8e: f000 f93c bl 800220a <LSM303_WriteRegister>
|
|
8001f92: 4603 mov r3, r0
|
|
8001f94: 2b00 cmp r3, #0
|
|
8001f96: d101 bne.n 8001f9c <LSM303_ApplyConfig+0x74>
|
|
return false;
|
|
8001f98: 2300 movs r3, #0
|
|
8001f9a: e00c b.n 8001fb6 <LSM303_ApplyConfig+0x8e>
|
|
}
|
|
|
|
//We apply the operation mode
|
|
if(!LSM303_WriteRegister(device, MR_REG_M, device->opMode))
|
|
8001f9c: 687b ldr r3, [r7, #4]
|
|
8001f9e: 791b ldrb r3, [r3, #4]
|
|
8001fa0: 461a mov r2, r3
|
|
8001fa2: 2102 movs r1, #2
|
|
8001fa4: 6878 ldr r0, [r7, #4]
|
|
8001fa6: f000 f930 bl 800220a <LSM303_WriteRegister>
|
|
8001faa: 4603 mov r3, r0
|
|
8001fac: 2b00 cmp r3, #0
|
|
8001fae: d101 bne.n 8001fb4 <LSM303_ApplyConfig+0x8c>
|
|
return false;
|
|
8001fb0: 2300 movs r3, #0
|
|
8001fb2: e000 b.n 8001fb6 <LSM303_ApplyConfig+0x8e>
|
|
|
|
return true;
|
|
8001fb4: 2301 movs r3, #1
|
|
}
|
|
8001fb6: 4618 mov r0, r3
|
|
8001fb8: 3710 adds r7, #16
|
|
8001fba: 46bd mov sp, r7
|
|
8001fbc: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08001fc0 <LSM303_GetDeviceID>:
|
|
|
|
bool LSM303_GetDeviceID(LSM303 *device, uint8_t id[3])
|
|
{
|
|
8001fc0: b580 push {r7, lr}
|
|
8001fc2: b086 sub sp, #24
|
|
8001fc4: af02 add r7, sp, #8
|
|
8001fc6: 6078 str r0, [r7, #4]
|
|
8001fc8: 6039 str r1, [r7, #0]
|
|
if(!device) return false;
|
|
8001fca: 687b ldr r3, [r7, #4]
|
|
8001fcc: 2b00 cmp r3, #0
|
|
8001fce: d101 bne.n 8001fd4 <LSM303_GetDeviceID+0x14>
|
|
8001fd0: 2300 movs r3, #0
|
|
8001fd2: e022 b.n 800201a <LSM303_GetDeviceID+0x5a>
|
|
|
|
HAL_StatusTypeDef status = HAL_I2C_Master_Transmit(device->i2cHandler, LMS303DLHC_COMP_ADDR, (uint8_t *)&_IRA_REG_M, 1, HAL_MAX_DELAY);
|
|
8001fd4: 687b ldr r3, [r7, #4]
|
|
8001fd6: 6818 ldr r0, [r3, #0]
|
|
8001fd8: 233c movs r3, #60 ; 0x3c
|
|
8001fda: b299 uxth r1, r3
|
|
8001fdc: f04f 33ff mov.w r3, #4294967295
|
|
8001fe0: 9300 str r3, [sp, #0]
|
|
8001fe2: 2301 movs r3, #1
|
|
8001fe4: 4a0f ldr r2, [pc, #60] ; (8002024 <LSM303_GetDeviceID+0x64>)
|
|
8001fe6: f002 fa9d bl 8004524 <HAL_I2C_Master_Transmit>
|
|
8001fea: 4603 mov r3, r0
|
|
8001fec: 73fb strb r3, [r7, #15]
|
|
if(status != HAL_OK)
|
|
8001fee: 7bfb ldrb r3, [r7, #15]
|
|
8001ff0: 2b00 cmp r3, #0
|
|
8001ff2: d001 beq.n 8001ff8 <LSM303_GetDeviceID+0x38>
|
|
return false;
|
|
8001ff4: 2300 movs r3, #0
|
|
8001ff6: e010 b.n 800201a <LSM303_GetDeviceID+0x5a>
|
|
|
|
return HAL_I2C_Master_Receive(device->i2cHandler, LMS303DLHC_COMP_ADDR, id, 3, HAL_MAX_DELAY) == HAL_OK ? true : false;
|
|
8001ff8: 687b ldr r3, [r7, #4]
|
|
8001ffa: 6818 ldr r0, [r3, #0]
|
|
8001ffc: 233c movs r3, #60 ; 0x3c
|
|
8001ffe: b299 uxth r1, r3
|
|
8002000: f04f 33ff mov.w r3, #4294967295
|
|
8002004: 9300 str r3, [sp, #0]
|
|
8002006: 2303 movs r3, #3
|
|
8002008: 683a ldr r2, [r7, #0]
|
|
800200a: f002 fb89 bl 8004720 <HAL_I2C_Master_Receive>
|
|
800200e: 4603 mov r3, r0
|
|
8002010: 2b00 cmp r3, #0
|
|
8002012: bf0c ite eq
|
|
8002014: 2301 moveq r3, #1
|
|
8002016: 2300 movne r3, #0
|
|
8002018: b2db uxtb r3, r3
|
|
}
|
|
800201a: 4618 mov r0, r3
|
|
800201c: 3710 adds r7, #16
|
|
800201e: 46bd mov sp, r7
|
|
8002020: bd80 pop {r7, pc}
|
|
8002022: bf00 nop
|
|
8002024: 0800e931 .word 0x0800e931
|
|
|
|
08002028 <LSM303_GetTemperature>:
|
|
|
|
bool LSM303_GetTemperature(LSM303 *device, float *temperature, int16_t *rawValue)
|
|
{
|
|
8002028: b580 push {r7, lr}
|
|
800202a: b088 sub sp, #32
|
|
800202c: af02 add r7, sp, #8
|
|
800202e: 60f8 str r0, [r7, #12]
|
|
8002030: 60b9 str r1, [r7, #8]
|
|
8002032: 607a str r2, [r7, #4]
|
|
if(!device) return false;
|
|
8002034: 68fb ldr r3, [r7, #12]
|
|
8002036: 2b00 cmp r3, #0
|
|
8002038: d101 bne.n 800203e <LSM303_GetTemperature+0x16>
|
|
800203a: 2300 movs r3, #0
|
|
800203c: e045 b.n 80020ca <LSM303_GetTemperature+0xa2>
|
|
uint8_t data[2];
|
|
int16_t orderedData;
|
|
|
|
HAL_StatusTypeDef status = HAL_I2C_Master_Transmit(device->i2cHandler, LMS303DLHC_COMP_ADDR, (uint8_t *)&_TEMP_OUT_H_M, 1, HAL_MAX_DELAY);
|
|
800203e: 68fb ldr r3, [r7, #12]
|
|
8002040: 6818 ldr r0, [r3, #0]
|
|
8002042: 233c movs r3, #60 ; 0x3c
|
|
8002044: b299 uxth r1, r3
|
|
8002046: f04f 33ff mov.w r3, #4294967295
|
|
800204a: 9300 str r3, [sp, #0]
|
|
800204c: 2301 movs r3, #1
|
|
800204e: 4a21 ldr r2, [pc, #132] ; (80020d4 <LSM303_GetTemperature+0xac>)
|
|
8002050: f002 fa68 bl 8004524 <HAL_I2C_Master_Transmit>
|
|
8002054: 4603 mov r3, r0
|
|
8002056: 75fb strb r3, [r7, #23]
|
|
if(status != HAL_OK)
|
|
8002058: 7dfb ldrb r3, [r7, #23]
|
|
800205a: 2b00 cmp r3, #0
|
|
800205c: d001 beq.n 8002062 <LSM303_GetTemperature+0x3a>
|
|
return false;
|
|
800205e: 2300 movs r3, #0
|
|
8002060: e033 b.n 80020ca <LSM303_GetTemperature+0xa2>
|
|
|
|
status = HAL_I2C_Master_Receive(device->i2cHandler, LMS303DLHC_COMP_ADDR, data, 2, HAL_MAX_DELAY);
|
|
8002062: 68fb ldr r3, [r7, #12]
|
|
8002064: 6818 ldr r0, [r3, #0]
|
|
8002066: 233c movs r3, #60 ; 0x3c
|
|
8002068: b299 uxth r1, r3
|
|
800206a: f107 0214 add.w r2, r7, #20
|
|
800206e: f04f 33ff mov.w r3, #4294967295
|
|
8002072: 9300 str r3, [sp, #0]
|
|
8002074: 2302 movs r3, #2
|
|
8002076: f002 fb53 bl 8004720 <HAL_I2C_Master_Receive>
|
|
800207a: 4603 mov r3, r0
|
|
800207c: 75fb strb r3, [r7, #23]
|
|
if(status != HAL_OK)
|
|
800207e: 7dfb ldrb r3, [r7, #23]
|
|
8002080: 2b00 cmp r3, #0
|
|
8002082: d001 beq.n 8002088 <LSM303_GetTemperature+0x60>
|
|
return false;
|
|
8002084: 2300 movs r3, #0
|
|
8002086: e020 b.n 80020ca <LSM303_GetTemperature+0xa2>
|
|
|
|
//We switch the bytes...
|
|
((uint8_t *)&orderedData)[0] = data[1];
|
|
8002088: f107 0312 add.w r3, r7, #18
|
|
800208c: 7d7a ldrb r2, [r7, #21]
|
|
800208e: 701a strb r2, [r3, #0]
|
|
((uint8_t *)&orderedData)[1] = data[0];
|
|
8002090: f107 0312 add.w r3, r7, #18
|
|
8002094: 3301 adds r3, #1
|
|
8002096: 7d3a ldrb r2, [r7, #20]
|
|
8002098: 701a strb r2, [r3, #0]
|
|
|
|
if(rawValue)
|
|
800209a: 687b ldr r3, [r7, #4]
|
|
800209c: 2b00 cmp r3, #0
|
|
800209e: d003 beq.n 80020a8 <LSM303_GetTemperature+0x80>
|
|
*rawValue = orderedData;
|
|
80020a0: f9b7 2012 ldrsh.w r2, [r7, #18]
|
|
80020a4: 687b ldr r3, [r7, #4]
|
|
80020a6: 801a strh r2, [r3, #0]
|
|
|
|
if(temperature)
|
|
80020a8: 68bb ldr r3, [r7, #8]
|
|
80020aa: 2b00 cmp r3, #0
|
|
80020ac: d00c beq.n 80020c8 <LSM303_GetTemperature+0xa0>
|
|
*temperature = (float)orderedData / 256;
|
|
80020ae: f9b7 3012 ldrsh.w r3, [r7, #18]
|
|
80020b2: ee07 3a90 vmov s15, r3
|
|
80020b6: eeb8 7ae7 vcvt.f32.s32 s14, s15
|
|
80020ba: eddf 6a07 vldr s13, [pc, #28] ; 80020d8 <LSM303_GetTemperature+0xb0>
|
|
80020be: eec7 7a26 vdiv.f32 s15, s14, s13
|
|
80020c2: 68bb ldr r3, [r7, #8]
|
|
80020c4: edc3 7a00 vstr s15, [r3]
|
|
|
|
return true;
|
|
80020c8: 2301 movs r3, #1
|
|
}
|
|
80020ca: 4618 mov r0, r3
|
|
80020cc: 3718 adds r7, #24
|
|
80020ce: 46bd mov sp, r7
|
|
80020d0: bd80 pop {r7, pc}
|
|
80020d2: bf00 nop
|
|
80020d4: 0800e932 .word 0x0800e932
|
|
80020d8: 43800000 .word 0x43800000
|
|
|
|
080020dc <LSM303_GetMagneticFieldData>:
|
|
|
|
bool LSM303_GetMagneticFieldData(LSM303 *device, int16_t *xAxis, int16_t *yAxis, int16_t *zAxis)
|
|
{
|
|
80020dc: b580 push {r7, lr}
|
|
80020de: b08a sub sp, #40 ; 0x28
|
|
80020e0: af02 add r7, sp, #8
|
|
80020e2: 60f8 str r0, [r7, #12]
|
|
80020e4: 60b9 str r1, [r7, #8]
|
|
80020e6: 607a str r2, [r7, #4]
|
|
80020e8: 603b str r3, [r7, #0]
|
|
if(!device) return false;
|
|
80020ea: 68fb ldr r3, [r7, #12]
|
|
80020ec: 2b00 cmp r3, #0
|
|
80020ee: d101 bne.n 80020f4 <LSM303_GetMagneticFieldData+0x18>
|
|
80020f0: 2300 movs r3, #0
|
|
80020f2: e055 b.n 80021a0 <LSM303_GetMagneticFieldData+0xc4>
|
|
|
|
uint8_t data[6];
|
|
int16_t x,y,z;
|
|
|
|
HAL_StatusTypeDef status = HAL_I2C_Master_Transmit(device->i2cHandler, LMS303DLHC_COMP_ADDR, (uint8_t *)&_OUT_X_H_M, 1, HAL_MAX_DELAY);
|
|
80020f4: 68fb ldr r3, [r7, #12]
|
|
80020f6: 6818 ldr r0, [r3, #0]
|
|
80020f8: 233c movs r3, #60 ; 0x3c
|
|
80020fa: b299 uxth r1, r3
|
|
80020fc: f04f 33ff mov.w r3, #4294967295
|
|
8002100: 9300 str r3, [sp, #0]
|
|
8002102: 2301 movs r3, #1
|
|
8002104: 4a28 ldr r2, [pc, #160] ; (80021a8 <LSM303_GetMagneticFieldData+0xcc>)
|
|
8002106: f002 fa0d bl 8004524 <HAL_I2C_Master_Transmit>
|
|
800210a: 4603 mov r3, r0
|
|
800210c: 77fb strb r3, [r7, #31]
|
|
if(status != HAL_OK)
|
|
800210e: 7ffb ldrb r3, [r7, #31]
|
|
8002110: 2b00 cmp r3, #0
|
|
8002112: d001 beq.n 8002118 <LSM303_GetMagneticFieldData+0x3c>
|
|
return false;
|
|
8002114: 2300 movs r3, #0
|
|
8002116: e043 b.n 80021a0 <LSM303_GetMagneticFieldData+0xc4>
|
|
|
|
//We now read all six registers
|
|
status = HAL_I2C_Master_Receive(device->i2cHandler, LMS303DLHC_COMP_ADDR, data, 8, HAL_MAX_DELAY);
|
|
8002118: 68fb ldr r3, [r7, #12]
|
|
800211a: 6818 ldr r0, [r3, #0]
|
|
800211c: 233c movs r3, #60 ; 0x3c
|
|
800211e: b299 uxth r1, r3
|
|
8002120: f107 0218 add.w r2, r7, #24
|
|
8002124: f04f 33ff mov.w r3, #4294967295
|
|
8002128: 9300 str r3, [sp, #0]
|
|
800212a: 2308 movs r3, #8
|
|
800212c: f002 faf8 bl 8004720 <HAL_I2C_Master_Receive>
|
|
8002130: 4603 mov r3, r0
|
|
8002132: 77fb strb r3, [r7, #31]
|
|
if(status != HAL_OK)
|
|
8002134: 7ffb ldrb r3, [r7, #31]
|
|
8002136: 2b00 cmp r3, #0
|
|
8002138: d001 beq.n 800213e <LSM303_GetMagneticFieldData+0x62>
|
|
return false;
|
|
800213a: 2300 movs r3, #0
|
|
800213c: e030 b.n 80021a0 <LSM303_GetMagneticFieldData+0xc4>
|
|
|
|
//We switch the bytes...
|
|
((uint8_t *)&x)[0] = data[1];
|
|
800213e: f107 0316 add.w r3, r7, #22
|
|
8002142: 7e7a ldrb r2, [r7, #25]
|
|
8002144: 701a strb r2, [r3, #0]
|
|
((uint8_t *)&x)[1] = data[0];
|
|
8002146: f107 0316 add.w r3, r7, #22
|
|
800214a: 3301 adds r3, #1
|
|
800214c: 7e3a ldrb r2, [r7, #24]
|
|
800214e: 701a strb r2, [r3, #0]
|
|
((uint8_t *)&z)[0] = data[3];
|
|
8002150: f107 0312 add.w r3, r7, #18
|
|
8002154: 7efa ldrb r2, [r7, #27]
|
|
8002156: 701a strb r2, [r3, #0]
|
|
((uint8_t *)&z)[1] = data[2];
|
|
8002158: f107 0312 add.w r3, r7, #18
|
|
800215c: 3301 adds r3, #1
|
|
800215e: 7eba ldrb r2, [r7, #26]
|
|
8002160: 701a strb r2, [r3, #0]
|
|
((uint8_t *)&y)[0] = data[5];
|
|
8002162: f107 0314 add.w r3, r7, #20
|
|
8002166: 7f7a ldrb r2, [r7, #29]
|
|
8002168: 701a strb r2, [r3, #0]
|
|
((uint8_t *)&y)[1] = data[4];
|
|
800216a: f107 0314 add.w r3, r7, #20
|
|
800216e: 3301 adds r3, #1
|
|
8002170: 7f3a ldrb r2, [r7, #28]
|
|
8002172: 701a strb r2, [r3, #0]
|
|
|
|
if(xAxis)
|
|
8002174: 68bb ldr r3, [r7, #8]
|
|
8002176: 2b00 cmp r3, #0
|
|
8002178: d003 beq.n 8002182 <LSM303_GetMagneticFieldData+0xa6>
|
|
*xAxis = x;
|
|
800217a: f9b7 2016 ldrsh.w r2, [r7, #22]
|
|
800217e: 68bb ldr r3, [r7, #8]
|
|
8002180: 801a strh r2, [r3, #0]
|
|
if(yAxis)
|
|
8002182: 687b ldr r3, [r7, #4]
|
|
8002184: 2b00 cmp r3, #0
|
|
8002186: d003 beq.n 8002190 <LSM303_GetMagneticFieldData+0xb4>
|
|
*yAxis = y;
|
|
8002188: f9b7 2014 ldrsh.w r2, [r7, #20]
|
|
800218c: 687b ldr r3, [r7, #4]
|
|
800218e: 801a strh r2, [r3, #0]
|
|
if(zAxis)
|
|
8002190: 683b ldr r3, [r7, #0]
|
|
8002192: 2b00 cmp r3, #0
|
|
8002194: d003 beq.n 800219e <LSM303_GetMagneticFieldData+0xc2>
|
|
*zAxis = z;
|
|
8002196: f9b7 2012 ldrsh.w r2, [r7, #18]
|
|
800219a: 683b ldr r3, [r7, #0]
|
|
800219c: 801a strh r2, [r3, #0]
|
|
|
|
return true;
|
|
800219e: 2301 movs r3, #1
|
|
}
|
|
80021a0: 4618 mov r0, r3
|
|
80021a2: 3720 adds r7, #32
|
|
80021a4: 46bd mov sp, r7
|
|
80021a6: bd80 pop {r7, pc}
|
|
80021a8: 0800e930 .word 0x0800e930
|
|
|
|
080021ac <LSM303_ReadRegister>:
|
|
|
|
bool LSM303_ReadRegister(LSM303 *device, uint8_t registerAddr, uint8_t *data)
|
|
{
|
|
80021ac: b580 push {r7, lr}
|
|
80021ae: b088 sub sp, #32
|
|
80021b0: af02 add r7, sp, #8
|
|
80021b2: 60f8 str r0, [r7, #12]
|
|
80021b4: 460b mov r3, r1
|
|
80021b6: 607a str r2, [r7, #4]
|
|
80021b8: 72fb strb r3, [r7, #11]
|
|
HAL_StatusTypeDef status = HAL_I2C_Master_Transmit(device->i2cHandler, LMS303DLHC_COMP_ADDR, ®isterAddr, 1, HAL_MAX_DELAY);
|
|
80021ba: 68fb ldr r3, [r7, #12]
|
|
80021bc: 6818 ldr r0, [r3, #0]
|
|
80021be: 233c movs r3, #60 ; 0x3c
|
|
80021c0: b299 uxth r1, r3
|
|
80021c2: f107 020b add.w r2, r7, #11
|
|
80021c6: f04f 33ff mov.w r3, #4294967295
|
|
80021ca: 9300 str r3, [sp, #0]
|
|
80021cc: 2301 movs r3, #1
|
|
80021ce: f002 f9a9 bl 8004524 <HAL_I2C_Master_Transmit>
|
|
80021d2: 4603 mov r3, r0
|
|
80021d4: 75fb strb r3, [r7, #23]
|
|
if(status != HAL_OK)
|
|
80021d6: 7dfb ldrb r3, [r7, #23]
|
|
80021d8: 2b00 cmp r3, #0
|
|
80021da: d001 beq.n 80021e0 <LSM303_ReadRegister+0x34>
|
|
return false;
|
|
80021dc: 2300 movs r3, #0
|
|
80021de: e010 b.n 8002202 <LSM303_ReadRegister+0x56>
|
|
return HAL_I2C_Master_Receive(device->i2cHandler, LMS303DLHC_COMP_ADDR, data, 1, HAL_MAX_DELAY) == HAL_OK ? true : false;
|
|
80021e0: 68fb ldr r3, [r7, #12]
|
|
80021e2: 6818 ldr r0, [r3, #0]
|
|
80021e4: 233c movs r3, #60 ; 0x3c
|
|
80021e6: b299 uxth r1, r3
|
|
80021e8: f04f 33ff mov.w r3, #4294967295
|
|
80021ec: 9300 str r3, [sp, #0]
|
|
80021ee: 2301 movs r3, #1
|
|
80021f0: 687a ldr r2, [r7, #4]
|
|
80021f2: f002 fa95 bl 8004720 <HAL_I2C_Master_Receive>
|
|
80021f6: 4603 mov r3, r0
|
|
80021f8: 2b00 cmp r3, #0
|
|
80021fa: bf0c ite eq
|
|
80021fc: 2301 moveq r3, #1
|
|
80021fe: 2300 movne r3, #0
|
|
8002200: b2db uxtb r3, r3
|
|
}
|
|
8002202: 4618 mov r0, r3
|
|
8002204: 3718 adds r7, #24
|
|
8002206: 46bd mov sp, r7
|
|
8002208: bd80 pop {r7, pc}
|
|
|
|
0800220a <LSM303_WriteRegister>:
|
|
|
|
bool LSM303_WriteRegister(LSM303 *device, uint8_t registerAddr, uint8_t data)
|
|
{
|
|
800220a: b580 push {r7, lr}
|
|
800220c: b086 sub sp, #24
|
|
800220e: af02 add r7, sp, #8
|
|
8002210: 6078 str r0, [r7, #4]
|
|
8002212: 460b mov r3, r1
|
|
8002214: 70fb strb r3, [r7, #3]
|
|
8002216: 4613 mov r3, r2
|
|
8002218: 70bb strb r3, [r7, #2]
|
|
uint8_t regAndData[] = {registerAddr, data};
|
|
800221a: 78fb ldrb r3, [r7, #3]
|
|
800221c: 733b strb r3, [r7, #12]
|
|
800221e: 78bb ldrb r3, [r7, #2]
|
|
8002220: 737b strb r3, [r7, #13]
|
|
return HAL_I2C_Master_Transmit(device->i2cHandler, LMS303DLHC_COMP_ADDR, regAndData, 2, HAL_MAX_DELAY) == HAL_OK ? true : false;
|
|
8002222: 687b ldr r3, [r7, #4]
|
|
8002224: 6818 ldr r0, [r3, #0]
|
|
8002226: 233c movs r3, #60 ; 0x3c
|
|
8002228: b299 uxth r1, r3
|
|
800222a: f107 020c add.w r2, r7, #12
|
|
800222e: f04f 33ff mov.w r3, #4294967295
|
|
8002232: 9300 str r3, [sp, #0]
|
|
8002234: 2302 movs r3, #2
|
|
8002236: f002 f975 bl 8004524 <HAL_I2C_Master_Transmit>
|
|
800223a: 4603 mov r3, r0
|
|
800223c: 2b00 cmp r3, #0
|
|
800223e: bf0c ite eq
|
|
8002240: 2301 moveq r3, #1
|
|
8002242: 2300 movne r3, #0
|
|
8002244: b2db uxtb r3, r3
|
|
}
|
|
8002246: 4618 mov r0, r3
|
|
8002248: 3710 adds r7, #16
|
|
800224a: 46bd mov sp, r7
|
|
800224c: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08002250 <HAL_Init>:
|
|
* need to ensure that the SysTick time base is always set to 1 millisecond
|
|
* to have correct HAL operation.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_Init(void)
|
|
{
|
|
8002250: b580 push {r7, lr}
|
|
8002252: af00 add r7, sp, #0
|
|
/* Configure Flash prefetch, Instruction cache, Data cache */
|
|
#if (INSTRUCTION_CACHE_ENABLE != 0U)
|
|
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
|
|
8002254: 4b0e ldr r3, [pc, #56] ; (8002290 <HAL_Init+0x40>)
|
|
8002256: 681b ldr r3, [r3, #0]
|
|
8002258: 4a0d ldr r2, [pc, #52] ; (8002290 <HAL_Init+0x40>)
|
|
800225a: f443 7300 orr.w r3, r3, #512 ; 0x200
|
|
800225e: 6013 str r3, [r2, #0]
|
|
#endif /* INSTRUCTION_CACHE_ENABLE */
|
|
|
|
#if (DATA_CACHE_ENABLE != 0U)
|
|
__HAL_FLASH_DATA_CACHE_ENABLE();
|
|
8002260: 4b0b ldr r3, [pc, #44] ; (8002290 <HAL_Init+0x40>)
|
|
8002262: 681b ldr r3, [r3, #0]
|
|
8002264: 4a0a ldr r2, [pc, #40] ; (8002290 <HAL_Init+0x40>)
|
|
8002266: f443 6380 orr.w r3, r3, #1024 ; 0x400
|
|
800226a: 6013 str r3, [r2, #0]
|
|
#endif /* DATA_CACHE_ENABLE */
|
|
|
|
#if (PREFETCH_ENABLE != 0U)
|
|
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
|
|
800226c: 4b08 ldr r3, [pc, #32] ; (8002290 <HAL_Init+0x40>)
|
|
800226e: 681b ldr r3, [r3, #0]
|
|
8002270: 4a07 ldr r2, [pc, #28] ; (8002290 <HAL_Init+0x40>)
|
|
8002272: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
8002276: 6013 str r3, [r2, #0]
|
|
#endif /* PREFETCH_ENABLE */
|
|
|
|
/* Set Interrupt Group Priority */
|
|
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
|
|
8002278: 2003 movs r0, #3
|
|
800227a: f000 f94d bl 8002518 <HAL_NVIC_SetPriorityGrouping>
|
|
|
|
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
|
|
HAL_InitTick(TICK_INT_PRIORITY);
|
|
800227e: 2000 movs r0, #0
|
|
8002280: f000 f808 bl 8002294 <HAL_InitTick>
|
|
|
|
/* Init the low level hardware */
|
|
HAL_MspInit();
|
|
8002284: f7ff fa0c bl 80016a0 <HAL_MspInit>
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
8002288: 2300 movs r3, #0
|
|
}
|
|
800228a: 4618 mov r0, r3
|
|
800228c: bd80 pop {r7, pc}
|
|
800228e: bf00 nop
|
|
8002290: 40023c00 .word 0x40023c00
|
|
|
|
08002294 <HAL_InitTick>:
|
|
* implementation in user file.
|
|
* @param TickPriority Tick interrupt priority.
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
|
|
{
|
|
8002294: b580 push {r7, lr}
|
|
8002296: b082 sub sp, #8
|
|
8002298: af00 add r7, sp, #0
|
|
800229a: 6078 str r0, [r7, #4]
|
|
/* Configure the SysTick to have interrupt in 1ms time basis*/
|
|
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
|
|
800229c: 4b12 ldr r3, [pc, #72] ; (80022e8 <HAL_InitTick+0x54>)
|
|
800229e: 681a ldr r2, [r3, #0]
|
|
80022a0: 4b12 ldr r3, [pc, #72] ; (80022ec <HAL_InitTick+0x58>)
|
|
80022a2: 781b ldrb r3, [r3, #0]
|
|
80022a4: 4619 mov r1, r3
|
|
80022a6: f44f 737a mov.w r3, #1000 ; 0x3e8
|
|
80022aa: fbb3 f3f1 udiv r3, r3, r1
|
|
80022ae: fbb2 f3f3 udiv r3, r2, r3
|
|
80022b2: 4618 mov r0, r3
|
|
80022b4: f000 f965 bl 8002582 <HAL_SYSTICK_Config>
|
|
80022b8: 4603 mov r3, r0
|
|
80022ba: 2b00 cmp r3, #0
|
|
80022bc: d001 beq.n 80022c2 <HAL_InitTick+0x2e>
|
|
{
|
|
return HAL_ERROR;
|
|
80022be: 2301 movs r3, #1
|
|
80022c0: e00e b.n 80022e0 <HAL_InitTick+0x4c>
|
|
}
|
|
|
|
/* Configure the SysTick IRQ priority */
|
|
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
|
|
80022c2: 687b ldr r3, [r7, #4]
|
|
80022c4: 2b0f cmp r3, #15
|
|
80022c6: d80a bhi.n 80022de <HAL_InitTick+0x4a>
|
|
{
|
|
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
|
|
80022c8: 2200 movs r2, #0
|
|
80022ca: 6879 ldr r1, [r7, #4]
|
|
80022cc: f04f 30ff mov.w r0, #4294967295
|
|
80022d0: f000 f92d bl 800252e <HAL_NVIC_SetPriority>
|
|
uwTickPrio = TickPriority;
|
|
80022d4: 4a06 ldr r2, [pc, #24] ; (80022f0 <HAL_InitTick+0x5c>)
|
|
80022d6: 687b ldr r3, [r7, #4]
|
|
80022d8: 6013 str r3, [r2, #0]
|
|
{
|
|
return HAL_ERROR;
|
|
}
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
80022da: 2300 movs r3, #0
|
|
80022dc: e000 b.n 80022e0 <HAL_InitTick+0x4c>
|
|
return HAL_ERROR;
|
|
80022de: 2301 movs r3, #1
|
|
}
|
|
80022e0: 4618 mov r0, r3
|
|
80022e2: 3708 adds r7, #8
|
|
80022e4: 46bd mov sp, r7
|
|
80022e6: bd80 pop {r7, pc}
|
|
80022e8: 20000000 .word 0x20000000
|
|
80022ec: 20000008 .word 0x20000008
|
|
80022f0: 20000004 .word 0x20000004
|
|
|
|
080022f4 <HAL_IncTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_IncTick(void)
|
|
{
|
|
80022f4: b480 push {r7}
|
|
80022f6: af00 add r7, sp, #0
|
|
uwTick += uwTickFreq;
|
|
80022f8: 4b06 ldr r3, [pc, #24] ; (8002314 <HAL_IncTick+0x20>)
|
|
80022fa: 781b ldrb r3, [r3, #0]
|
|
80022fc: 461a mov r2, r3
|
|
80022fe: 4b06 ldr r3, [pc, #24] ; (8002318 <HAL_IncTick+0x24>)
|
|
8002300: 681b ldr r3, [r3, #0]
|
|
8002302: 4413 add r3, r2
|
|
8002304: 4a04 ldr r2, [pc, #16] ; (8002318 <HAL_IncTick+0x24>)
|
|
8002306: 6013 str r3, [r2, #0]
|
|
}
|
|
8002308: bf00 nop
|
|
800230a: 46bd mov sp, r7
|
|
800230c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8002310: 4770 bx lr
|
|
8002312: bf00 nop
|
|
8002314: 20000008 .word 0x20000008
|
|
8002318: 20000410 .word 0x20000410
|
|
|
|
0800231c <HAL_GetTick>:
|
|
* @note This function is declared as __weak to be overwritten in case of other
|
|
* implementations in user file.
|
|
* @retval tick value
|
|
*/
|
|
__weak uint32_t HAL_GetTick(void)
|
|
{
|
|
800231c: b480 push {r7}
|
|
800231e: af00 add r7, sp, #0
|
|
return uwTick;
|
|
8002320: 4b03 ldr r3, [pc, #12] ; (8002330 <HAL_GetTick+0x14>)
|
|
8002322: 681b ldr r3, [r3, #0]
|
|
}
|
|
8002324: 4618 mov r0, r3
|
|
8002326: 46bd mov sp, r7
|
|
8002328: f85d 7b04 ldr.w r7, [sp], #4
|
|
800232c: 4770 bx lr
|
|
800232e: bf00 nop
|
|
8002330: 20000410 .word 0x20000410
|
|
|
|
08002334 <HAL_Delay>:
|
|
* implementations in user file.
|
|
* @param Delay specifies the delay time length, in milliseconds.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_Delay(uint32_t Delay)
|
|
{
|
|
8002334: b580 push {r7, lr}
|
|
8002336: b084 sub sp, #16
|
|
8002338: af00 add r7, sp, #0
|
|
800233a: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = HAL_GetTick();
|
|
800233c: f7ff ffee bl 800231c <HAL_GetTick>
|
|
8002340: 60b8 str r0, [r7, #8]
|
|
uint32_t wait = Delay;
|
|
8002342: 687b ldr r3, [r7, #4]
|
|
8002344: 60fb str r3, [r7, #12]
|
|
|
|
/* Add a freq to guarantee minimum wait */
|
|
if (wait < HAL_MAX_DELAY)
|
|
8002346: 68fb ldr r3, [r7, #12]
|
|
8002348: f1b3 3fff cmp.w r3, #4294967295
|
|
800234c: d005 beq.n 800235a <HAL_Delay+0x26>
|
|
{
|
|
wait += (uint32_t)(uwTickFreq);
|
|
800234e: 4b09 ldr r3, [pc, #36] ; (8002374 <HAL_Delay+0x40>)
|
|
8002350: 781b ldrb r3, [r3, #0]
|
|
8002352: 461a mov r2, r3
|
|
8002354: 68fb ldr r3, [r7, #12]
|
|
8002356: 4413 add r3, r2
|
|
8002358: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
while((HAL_GetTick() - tickstart) < wait)
|
|
800235a: bf00 nop
|
|
800235c: f7ff ffde bl 800231c <HAL_GetTick>
|
|
8002360: 4602 mov r2, r0
|
|
8002362: 68bb ldr r3, [r7, #8]
|
|
8002364: 1ad3 subs r3, r2, r3
|
|
8002366: 68fa ldr r2, [r7, #12]
|
|
8002368: 429a cmp r2, r3
|
|
800236a: d8f7 bhi.n 800235c <HAL_Delay+0x28>
|
|
{
|
|
}
|
|
}
|
|
800236c: bf00 nop
|
|
800236e: 3710 adds r7, #16
|
|
8002370: 46bd mov sp, r7
|
|
8002372: bd80 pop {r7, pc}
|
|
8002374: 20000008 .word 0x20000008
|
|
|
|
08002378 <__NVIC_SetPriorityGrouping>:
|
|
In case of a conflict between priority grouping and available
|
|
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
|
|
\param [in] PriorityGroup Priority grouping field.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
|
{
|
|
8002378: b480 push {r7}
|
|
800237a: b085 sub sp, #20
|
|
800237c: af00 add r7, sp, #0
|
|
800237e: 6078 str r0, [r7, #4]
|
|
uint32_t reg_value;
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
8002380: 687b ldr r3, [r7, #4]
|
|
8002382: f003 0307 and.w r3, r3, #7
|
|
8002386: 60fb str r3, [r7, #12]
|
|
|
|
reg_value = SCB->AIRCR; /* read old register configuration */
|
|
8002388: 4b0c ldr r3, [pc, #48] ; (80023bc <__NVIC_SetPriorityGrouping+0x44>)
|
|
800238a: 68db ldr r3, [r3, #12]
|
|
800238c: 60bb str r3, [r7, #8]
|
|
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
|
|
800238e: 68ba ldr r2, [r7, #8]
|
|
8002390: f64f 03ff movw r3, #63743 ; 0xf8ff
|
|
8002394: 4013 ands r3, r2
|
|
8002396: 60bb str r3, [r7, #8]
|
|
reg_value = (reg_value |
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
|
|
8002398: 68fb ldr r3, [r7, #12]
|
|
800239a: 021a lsls r2, r3, #8
|
|
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
|
|
800239c: 68bb ldr r3, [r7, #8]
|
|
800239e: 4313 orrs r3, r2
|
|
reg_value = (reg_value |
|
|
80023a0: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000
|
|
80023a4: f443 3300 orr.w r3, r3, #131072 ; 0x20000
|
|
80023a8: 60bb str r3, [r7, #8]
|
|
SCB->AIRCR = reg_value;
|
|
80023aa: 4a04 ldr r2, [pc, #16] ; (80023bc <__NVIC_SetPriorityGrouping+0x44>)
|
|
80023ac: 68bb ldr r3, [r7, #8]
|
|
80023ae: 60d3 str r3, [r2, #12]
|
|
}
|
|
80023b0: bf00 nop
|
|
80023b2: 3714 adds r7, #20
|
|
80023b4: 46bd mov sp, r7
|
|
80023b6: f85d 7b04 ldr.w r7, [sp], #4
|
|
80023ba: 4770 bx lr
|
|
80023bc: e000ed00 .word 0xe000ed00
|
|
|
|
080023c0 <__NVIC_GetPriorityGrouping>:
|
|
\brief Get Priority Grouping
|
|
\details Reads the priority grouping field from the NVIC Interrupt Controller.
|
|
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
|
|
*/
|
|
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
|
|
{
|
|
80023c0: b480 push {r7}
|
|
80023c2: af00 add r7, sp, #0
|
|
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
|
|
80023c4: 4b04 ldr r3, [pc, #16] ; (80023d8 <__NVIC_GetPriorityGrouping+0x18>)
|
|
80023c6: 68db ldr r3, [r3, #12]
|
|
80023c8: 0a1b lsrs r3, r3, #8
|
|
80023ca: f003 0307 and.w r3, r3, #7
|
|
}
|
|
80023ce: 4618 mov r0, r3
|
|
80023d0: 46bd mov sp, r7
|
|
80023d2: f85d 7b04 ldr.w r7, [sp], #4
|
|
80023d6: 4770 bx lr
|
|
80023d8: e000ed00 .word 0xe000ed00
|
|
|
|
080023dc <__NVIC_EnableIRQ>:
|
|
\details Enables a device specific interrupt in the NVIC interrupt controller.
|
|
\param [in] IRQn Device specific interrupt number.
|
|
\note IRQn must not be negative.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
|
|
{
|
|
80023dc: b480 push {r7}
|
|
80023de: b083 sub sp, #12
|
|
80023e0: af00 add r7, sp, #0
|
|
80023e2: 4603 mov r3, r0
|
|
80023e4: 71fb strb r3, [r7, #7]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
80023e6: f997 3007 ldrsb.w r3, [r7, #7]
|
|
80023ea: 2b00 cmp r3, #0
|
|
80023ec: db0b blt.n 8002406 <__NVIC_EnableIRQ+0x2a>
|
|
{
|
|
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
|
|
80023ee: 79fb ldrb r3, [r7, #7]
|
|
80023f0: f003 021f and.w r2, r3, #31
|
|
80023f4: 4907 ldr r1, [pc, #28] ; (8002414 <__NVIC_EnableIRQ+0x38>)
|
|
80023f6: f997 3007 ldrsb.w r3, [r7, #7]
|
|
80023fa: 095b lsrs r3, r3, #5
|
|
80023fc: 2001 movs r0, #1
|
|
80023fe: fa00 f202 lsl.w r2, r0, r2
|
|
8002402: f841 2023 str.w r2, [r1, r3, lsl #2]
|
|
}
|
|
}
|
|
8002406: bf00 nop
|
|
8002408: 370c adds r7, #12
|
|
800240a: 46bd mov sp, r7
|
|
800240c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8002410: 4770 bx lr
|
|
8002412: bf00 nop
|
|
8002414: e000e100 .word 0xe000e100
|
|
|
|
08002418 <__NVIC_SetPriority>:
|
|
\param [in] IRQn Interrupt number.
|
|
\param [in] priority Priority to set.
|
|
\note The priority cannot be set for every processor exception.
|
|
*/
|
|
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
|
|
{
|
|
8002418: b480 push {r7}
|
|
800241a: b083 sub sp, #12
|
|
800241c: af00 add r7, sp, #0
|
|
800241e: 4603 mov r3, r0
|
|
8002420: 6039 str r1, [r7, #0]
|
|
8002422: 71fb strb r3, [r7, #7]
|
|
if ((int32_t)(IRQn) >= 0)
|
|
8002424: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8002428: 2b00 cmp r3, #0
|
|
800242a: db0a blt.n 8002442 <__NVIC_SetPriority+0x2a>
|
|
{
|
|
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
800242c: 683b ldr r3, [r7, #0]
|
|
800242e: b2da uxtb r2, r3
|
|
8002430: 490c ldr r1, [pc, #48] ; (8002464 <__NVIC_SetPriority+0x4c>)
|
|
8002432: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8002436: 0112 lsls r2, r2, #4
|
|
8002438: b2d2 uxtb r2, r2
|
|
800243a: 440b add r3, r1
|
|
800243c: f883 2300 strb.w r2, [r3, #768] ; 0x300
|
|
}
|
|
else
|
|
{
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
}
|
|
}
|
|
8002440: e00a b.n 8002458 <__NVIC_SetPriority+0x40>
|
|
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
|
|
8002442: 683b ldr r3, [r7, #0]
|
|
8002444: b2da uxtb r2, r3
|
|
8002446: 4908 ldr r1, [pc, #32] ; (8002468 <__NVIC_SetPriority+0x50>)
|
|
8002448: 79fb ldrb r3, [r7, #7]
|
|
800244a: f003 030f and.w r3, r3, #15
|
|
800244e: 3b04 subs r3, #4
|
|
8002450: 0112 lsls r2, r2, #4
|
|
8002452: b2d2 uxtb r2, r2
|
|
8002454: 440b add r3, r1
|
|
8002456: 761a strb r2, [r3, #24]
|
|
}
|
|
8002458: bf00 nop
|
|
800245a: 370c adds r7, #12
|
|
800245c: 46bd mov sp, r7
|
|
800245e: f85d 7b04 ldr.w r7, [sp], #4
|
|
8002462: 4770 bx lr
|
|
8002464: e000e100 .word 0xe000e100
|
|
8002468: e000ed00 .word 0xe000ed00
|
|
|
|
0800246c <NVIC_EncodePriority>:
|
|
\param [in] PreemptPriority Preemptive priority value (starting from 0).
|
|
\param [in] SubPriority Subpriority value (starting from 0).
|
|
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
|
|
*/
|
|
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
800246c: b480 push {r7}
|
|
800246e: b089 sub sp, #36 ; 0x24
|
|
8002470: af00 add r7, sp, #0
|
|
8002472: 60f8 str r0, [r7, #12]
|
|
8002474: 60b9 str r1, [r7, #8]
|
|
8002476: 607a str r2, [r7, #4]
|
|
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
|
|
8002478: 68fb ldr r3, [r7, #12]
|
|
800247a: f003 0307 and.w r3, r3, #7
|
|
800247e: 61fb str r3, [r7, #28]
|
|
uint32_t PreemptPriorityBits;
|
|
uint32_t SubPriorityBits;
|
|
|
|
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
|
|
8002480: 69fb ldr r3, [r7, #28]
|
|
8002482: f1c3 0307 rsb r3, r3, #7
|
|
8002486: 2b04 cmp r3, #4
|
|
8002488: bf28 it cs
|
|
800248a: 2304 movcs r3, #4
|
|
800248c: 61bb str r3, [r7, #24]
|
|
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
|
|
800248e: 69fb ldr r3, [r7, #28]
|
|
8002490: 3304 adds r3, #4
|
|
8002492: 2b06 cmp r3, #6
|
|
8002494: d902 bls.n 800249c <NVIC_EncodePriority+0x30>
|
|
8002496: 69fb ldr r3, [r7, #28]
|
|
8002498: 3b03 subs r3, #3
|
|
800249a: e000 b.n 800249e <NVIC_EncodePriority+0x32>
|
|
800249c: 2300 movs r3, #0
|
|
800249e: 617b str r3, [r7, #20]
|
|
|
|
return (
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
80024a0: f04f 32ff mov.w r2, #4294967295
|
|
80024a4: 69bb ldr r3, [r7, #24]
|
|
80024a6: fa02 f303 lsl.w r3, r2, r3
|
|
80024aa: 43da mvns r2, r3
|
|
80024ac: 68bb ldr r3, [r7, #8]
|
|
80024ae: 401a ands r2, r3
|
|
80024b0: 697b ldr r3, [r7, #20]
|
|
80024b2: 409a lsls r2, r3
|
|
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
|
|
80024b4: f04f 31ff mov.w r1, #4294967295
|
|
80024b8: 697b ldr r3, [r7, #20]
|
|
80024ba: fa01 f303 lsl.w r3, r1, r3
|
|
80024be: 43d9 mvns r1, r3
|
|
80024c0: 687b ldr r3, [r7, #4]
|
|
80024c2: 400b ands r3, r1
|
|
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
|
|
80024c4: 4313 orrs r3, r2
|
|
);
|
|
}
|
|
80024c6: 4618 mov r0, r3
|
|
80024c8: 3724 adds r7, #36 ; 0x24
|
|
80024ca: 46bd mov sp, r7
|
|
80024cc: f85d 7b04 ldr.w r7, [sp], #4
|
|
80024d0: 4770 bx lr
|
|
...
|
|
|
|
080024d4 <SysTick_Config>:
|
|
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
|
|
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
|
|
must contain a vendor-specific implementation of this function.
|
|
*/
|
|
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
|
|
{
|
|
80024d4: b580 push {r7, lr}
|
|
80024d6: b082 sub sp, #8
|
|
80024d8: af00 add r7, sp, #0
|
|
80024da: 6078 str r0, [r7, #4]
|
|
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
|
|
80024dc: 687b ldr r3, [r7, #4]
|
|
80024de: 3b01 subs r3, #1
|
|
80024e0: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
|
80024e4: d301 bcc.n 80024ea <SysTick_Config+0x16>
|
|
{
|
|
return (1UL); /* Reload value impossible */
|
|
80024e6: 2301 movs r3, #1
|
|
80024e8: e00f b.n 800250a <SysTick_Config+0x36>
|
|
}
|
|
|
|
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
|
|
80024ea: 4a0a ldr r2, [pc, #40] ; (8002514 <SysTick_Config+0x40>)
|
|
80024ec: 687b ldr r3, [r7, #4]
|
|
80024ee: 3b01 subs r3, #1
|
|
80024f0: 6053 str r3, [r2, #4]
|
|
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
|
|
80024f2: 210f movs r1, #15
|
|
80024f4: f04f 30ff mov.w r0, #4294967295
|
|
80024f8: f7ff ff8e bl 8002418 <__NVIC_SetPriority>
|
|
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
|
|
80024fc: 4b05 ldr r3, [pc, #20] ; (8002514 <SysTick_Config+0x40>)
|
|
80024fe: 2200 movs r2, #0
|
|
8002500: 609a str r2, [r3, #8]
|
|
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
|
|
8002502: 4b04 ldr r3, [pc, #16] ; (8002514 <SysTick_Config+0x40>)
|
|
8002504: 2207 movs r2, #7
|
|
8002506: 601a str r2, [r3, #0]
|
|
SysTick_CTRL_TICKINT_Msk |
|
|
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
|
|
return (0UL); /* Function successful */
|
|
8002508: 2300 movs r3, #0
|
|
}
|
|
800250a: 4618 mov r0, r3
|
|
800250c: 3708 adds r7, #8
|
|
800250e: 46bd mov sp, r7
|
|
8002510: bd80 pop {r7, pc}
|
|
8002512: bf00 nop
|
|
8002514: e000e010 .word 0xe000e010
|
|
|
|
08002518 <HAL_NVIC_SetPriorityGrouping>:
|
|
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
|
|
* The pending IRQ priority will be managed only by the subpriority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
|
|
{
|
|
8002518: b580 push {r7, lr}
|
|
800251a: b082 sub sp, #8
|
|
800251c: af00 add r7, sp, #0
|
|
800251e: 6078 str r0, [r7, #4]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
|
|
|
|
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
|
|
NVIC_SetPriorityGrouping(PriorityGroup);
|
|
8002520: 6878 ldr r0, [r7, #4]
|
|
8002522: f7ff ff29 bl 8002378 <__NVIC_SetPriorityGrouping>
|
|
}
|
|
8002526: bf00 nop
|
|
8002528: 3708 adds r7, #8
|
|
800252a: 46bd mov sp, r7
|
|
800252c: bd80 pop {r7, pc}
|
|
|
|
0800252e <HAL_NVIC_SetPriority>:
|
|
* This parameter can be a value between 0 and 15
|
|
* A lower priority value indicates a higher priority.
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
|
|
{
|
|
800252e: b580 push {r7, lr}
|
|
8002530: b086 sub sp, #24
|
|
8002532: af00 add r7, sp, #0
|
|
8002534: 4603 mov r3, r0
|
|
8002536: 60b9 str r1, [r7, #8]
|
|
8002538: 607a str r2, [r7, #4]
|
|
800253a: 73fb strb r3, [r7, #15]
|
|
uint32_t prioritygroup = 0x00U;
|
|
800253c: 2300 movs r3, #0
|
|
800253e: 617b str r3, [r7, #20]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
|
|
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
|
|
|
|
prioritygroup = NVIC_GetPriorityGrouping();
|
|
8002540: f7ff ff3e bl 80023c0 <__NVIC_GetPriorityGrouping>
|
|
8002544: 6178 str r0, [r7, #20]
|
|
|
|
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
|
|
8002546: 687a ldr r2, [r7, #4]
|
|
8002548: 68b9 ldr r1, [r7, #8]
|
|
800254a: 6978 ldr r0, [r7, #20]
|
|
800254c: f7ff ff8e bl 800246c <NVIC_EncodePriority>
|
|
8002550: 4602 mov r2, r0
|
|
8002552: f997 300f ldrsb.w r3, [r7, #15]
|
|
8002556: 4611 mov r1, r2
|
|
8002558: 4618 mov r0, r3
|
|
800255a: f7ff ff5d bl 8002418 <__NVIC_SetPriority>
|
|
}
|
|
800255e: bf00 nop
|
|
8002560: 3718 adds r7, #24
|
|
8002562: 46bd mov sp, r7
|
|
8002564: bd80 pop {r7, pc}
|
|
|
|
08002566 <HAL_NVIC_EnableIRQ>:
|
|
* This parameter can be an enumerator of IRQn_Type enumeration
|
|
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
|
|
* @retval None
|
|
*/
|
|
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
|
|
{
|
|
8002566: b580 push {r7, lr}
|
|
8002568: b082 sub sp, #8
|
|
800256a: af00 add r7, sp, #0
|
|
800256c: 4603 mov r3, r0
|
|
800256e: 71fb strb r3, [r7, #7]
|
|
/* Check the parameters */
|
|
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
|
|
|
|
/* Enable interrupt */
|
|
NVIC_EnableIRQ(IRQn);
|
|
8002570: f997 3007 ldrsb.w r3, [r7, #7]
|
|
8002574: 4618 mov r0, r3
|
|
8002576: f7ff ff31 bl 80023dc <__NVIC_EnableIRQ>
|
|
}
|
|
800257a: bf00 nop
|
|
800257c: 3708 adds r7, #8
|
|
800257e: 46bd mov sp, r7
|
|
8002580: bd80 pop {r7, pc}
|
|
|
|
08002582 <HAL_SYSTICK_Config>:
|
|
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
|
|
* @retval status: - 0 Function succeeded.
|
|
* - 1 Function failed.
|
|
*/
|
|
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
|
|
{
|
|
8002582: b580 push {r7, lr}
|
|
8002584: b082 sub sp, #8
|
|
8002586: af00 add r7, sp, #0
|
|
8002588: 6078 str r0, [r7, #4]
|
|
return SysTick_Config(TicksNumb);
|
|
800258a: 6878 ldr r0, [r7, #4]
|
|
800258c: f7ff ffa2 bl 80024d4 <SysTick_Config>
|
|
8002590: 4603 mov r3, r0
|
|
}
|
|
8002592: 4618 mov r0, r3
|
|
8002594: 3708 adds r7, #8
|
|
8002596: 46bd mov sp, r7
|
|
8002598: bd80 pop {r7, pc}
|
|
...
|
|
|
|
0800259c <HAL_GPIO_Init>:
|
|
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
|
|
* the configuration information for the specified GPIO peripheral.
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
|
|
{
|
|
800259c: b480 push {r7}
|
|
800259e: b089 sub sp, #36 ; 0x24
|
|
80025a0: af00 add r7, sp, #0
|
|
80025a2: 6078 str r0, [r7, #4]
|
|
80025a4: 6039 str r1, [r7, #0]
|
|
uint32_t position;
|
|
uint32_t ioposition = 0x00U;
|
|
80025a6: 2300 movs r3, #0
|
|
80025a8: 617b str r3, [r7, #20]
|
|
uint32_t iocurrent = 0x00U;
|
|
80025aa: 2300 movs r3, #0
|
|
80025ac: 613b str r3, [r7, #16]
|
|
uint32_t temp = 0x00U;
|
|
80025ae: 2300 movs r3, #0
|
|
80025b0: 61bb str r3, [r7, #24]
|
|
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
|
|
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
|
|
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
|
|
|
|
/* Configure the port pins */
|
|
for(position = 0U; position < GPIO_NUMBER; position++)
|
|
80025b2: 2300 movs r3, #0
|
|
80025b4: 61fb str r3, [r7, #28]
|
|
80025b6: e159 b.n 800286c <HAL_GPIO_Init+0x2d0>
|
|
{
|
|
/* Get the IO position */
|
|
ioposition = 0x01U << position;
|
|
80025b8: 2201 movs r2, #1
|
|
80025ba: 69fb ldr r3, [r7, #28]
|
|
80025bc: fa02 f303 lsl.w r3, r2, r3
|
|
80025c0: 617b str r3, [r7, #20]
|
|
/* Get the current IO position */
|
|
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
|
|
80025c2: 683b ldr r3, [r7, #0]
|
|
80025c4: 681b ldr r3, [r3, #0]
|
|
80025c6: 697a ldr r2, [r7, #20]
|
|
80025c8: 4013 ands r3, r2
|
|
80025ca: 613b str r3, [r7, #16]
|
|
|
|
if(iocurrent == ioposition)
|
|
80025cc: 693a ldr r2, [r7, #16]
|
|
80025ce: 697b ldr r3, [r7, #20]
|
|
80025d0: 429a cmp r2, r3
|
|
80025d2: f040 8148 bne.w 8002866 <HAL_GPIO_Init+0x2ca>
|
|
{
|
|
/*--------------------- GPIO Mode Configuration ------------------------*/
|
|
/* In case of Output or Alternate function mode selection */
|
|
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
|
|
80025d6: 683b ldr r3, [r7, #0]
|
|
80025d8: 685b ldr r3, [r3, #4]
|
|
80025da: 2b01 cmp r3, #1
|
|
80025dc: d00b beq.n 80025f6 <HAL_GPIO_Init+0x5a>
|
|
80025de: 683b ldr r3, [r7, #0]
|
|
80025e0: 685b ldr r3, [r3, #4]
|
|
80025e2: 2b02 cmp r3, #2
|
|
80025e4: d007 beq.n 80025f6 <HAL_GPIO_Init+0x5a>
|
|
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
|
|
80025e6: 683b ldr r3, [r7, #0]
|
|
80025e8: 685b ldr r3, [r3, #4]
|
|
if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
|
|
80025ea: 2b11 cmp r3, #17
|
|
80025ec: d003 beq.n 80025f6 <HAL_GPIO_Init+0x5a>
|
|
(GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
|
|
80025ee: 683b ldr r3, [r7, #0]
|
|
80025f0: 685b ldr r3, [r3, #4]
|
|
80025f2: 2b12 cmp r3, #18
|
|
80025f4: d130 bne.n 8002658 <HAL_GPIO_Init+0xbc>
|
|
{
|
|
/* Check the Speed parameter */
|
|
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
|
|
/* Configure the IO Speed */
|
|
temp = GPIOx->OSPEEDR;
|
|
80025f6: 687b ldr r3, [r7, #4]
|
|
80025f8: 689b ldr r3, [r3, #8]
|
|
80025fa: 61bb str r3, [r7, #24]
|
|
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
|
|
80025fc: 69fb ldr r3, [r7, #28]
|
|
80025fe: 005b lsls r3, r3, #1
|
|
8002600: 2203 movs r2, #3
|
|
8002602: fa02 f303 lsl.w r3, r2, r3
|
|
8002606: 43db mvns r3, r3
|
|
8002608: 69ba ldr r2, [r7, #24]
|
|
800260a: 4013 ands r3, r2
|
|
800260c: 61bb str r3, [r7, #24]
|
|
temp |= (GPIO_Init->Speed << (position * 2U));
|
|
800260e: 683b ldr r3, [r7, #0]
|
|
8002610: 68da ldr r2, [r3, #12]
|
|
8002612: 69fb ldr r3, [r7, #28]
|
|
8002614: 005b lsls r3, r3, #1
|
|
8002616: fa02 f303 lsl.w r3, r2, r3
|
|
800261a: 69ba ldr r2, [r7, #24]
|
|
800261c: 4313 orrs r3, r2
|
|
800261e: 61bb str r3, [r7, #24]
|
|
GPIOx->OSPEEDR = temp;
|
|
8002620: 687b ldr r3, [r7, #4]
|
|
8002622: 69ba ldr r2, [r7, #24]
|
|
8002624: 609a str r2, [r3, #8]
|
|
|
|
/* Configure the IO Output Type */
|
|
temp = GPIOx->OTYPER;
|
|
8002626: 687b ldr r3, [r7, #4]
|
|
8002628: 685b ldr r3, [r3, #4]
|
|
800262a: 61bb str r3, [r7, #24]
|
|
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
|
|
800262c: 2201 movs r2, #1
|
|
800262e: 69fb ldr r3, [r7, #28]
|
|
8002630: fa02 f303 lsl.w r3, r2, r3
|
|
8002634: 43db mvns r3, r3
|
|
8002636: 69ba ldr r2, [r7, #24]
|
|
8002638: 4013 ands r3, r2
|
|
800263a: 61bb str r3, [r7, #24]
|
|
temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
|
|
800263c: 683b ldr r3, [r7, #0]
|
|
800263e: 685b ldr r3, [r3, #4]
|
|
8002640: 091b lsrs r3, r3, #4
|
|
8002642: f003 0201 and.w r2, r3, #1
|
|
8002646: 69fb ldr r3, [r7, #28]
|
|
8002648: fa02 f303 lsl.w r3, r2, r3
|
|
800264c: 69ba ldr r2, [r7, #24]
|
|
800264e: 4313 orrs r3, r2
|
|
8002650: 61bb str r3, [r7, #24]
|
|
GPIOx->OTYPER = temp;
|
|
8002652: 687b ldr r3, [r7, #4]
|
|
8002654: 69ba ldr r2, [r7, #24]
|
|
8002656: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
/* Activate the Pull-up or Pull down resistor for the current IO */
|
|
temp = GPIOx->PUPDR;
|
|
8002658: 687b ldr r3, [r7, #4]
|
|
800265a: 68db ldr r3, [r3, #12]
|
|
800265c: 61bb str r3, [r7, #24]
|
|
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
|
|
800265e: 69fb ldr r3, [r7, #28]
|
|
8002660: 005b lsls r3, r3, #1
|
|
8002662: 2203 movs r2, #3
|
|
8002664: fa02 f303 lsl.w r3, r2, r3
|
|
8002668: 43db mvns r3, r3
|
|
800266a: 69ba ldr r2, [r7, #24]
|
|
800266c: 4013 ands r3, r2
|
|
800266e: 61bb str r3, [r7, #24]
|
|
temp |= ((GPIO_Init->Pull) << (position * 2U));
|
|
8002670: 683b ldr r3, [r7, #0]
|
|
8002672: 689a ldr r2, [r3, #8]
|
|
8002674: 69fb ldr r3, [r7, #28]
|
|
8002676: 005b lsls r3, r3, #1
|
|
8002678: fa02 f303 lsl.w r3, r2, r3
|
|
800267c: 69ba ldr r2, [r7, #24]
|
|
800267e: 4313 orrs r3, r2
|
|
8002680: 61bb str r3, [r7, #24]
|
|
GPIOx->PUPDR = temp;
|
|
8002682: 687b ldr r3, [r7, #4]
|
|
8002684: 69ba ldr r2, [r7, #24]
|
|
8002686: 60da str r2, [r3, #12]
|
|
|
|
/* In case of Alternate function mode selection */
|
|
if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
|
|
8002688: 683b ldr r3, [r7, #0]
|
|
800268a: 685b ldr r3, [r3, #4]
|
|
800268c: 2b02 cmp r3, #2
|
|
800268e: d003 beq.n 8002698 <HAL_GPIO_Init+0xfc>
|
|
8002690: 683b ldr r3, [r7, #0]
|
|
8002692: 685b ldr r3, [r3, #4]
|
|
8002694: 2b12 cmp r3, #18
|
|
8002696: d123 bne.n 80026e0 <HAL_GPIO_Init+0x144>
|
|
{
|
|
/* Check the Alternate function parameter */
|
|
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
|
|
/* Configure Alternate function mapped with the current IO */
|
|
temp = GPIOx->AFR[position >> 3U];
|
|
8002698: 69fb ldr r3, [r7, #28]
|
|
800269a: 08da lsrs r2, r3, #3
|
|
800269c: 687b ldr r3, [r7, #4]
|
|
800269e: 3208 adds r2, #8
|
|
80026a0: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
|
80026a4: 61bb str r3, [r7, #24]
|
|
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
|
|
80026a6: 69fb ldr r3, [r7, #28]
|
|
80026a8: f003 0307 and.w r3, r3, #7
|
|
80026ac: 009b lsls r3, r3, #2
|
|
80026ae: 220f movs r2, #15
|
|
80026b0: fa02 f303 lsl.w r3, r2, r3
|
|
80026b4: 43db mvns r3, r3
|
|
80026b6: 69ba ldr r2, [r7, #24]
|
|
80026b8: 4013 ands r3, r2
|
|
80026ba: 61bb str r3, [r7, #24]
|
|
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
|
|
80026bc: 683b ldr r3, [r7, #0]
|
|
80026be: 691a ldr r2, [r3, #16]
|
|
80026c0: 69fb ldr r3, [r7, #28]
|
|
80026c2: f003 0307 and.w r3, r3, #7
|
|
80026c6: 009b lsls r3, r3, #2
|
|
80026c8: fa02 f303 lsl.w r3, r2, r3
|
|
80026cc: 69ba ldr r2, [r7, #24]
|
|
80026ce: 4313 orrs r3, r2
|
|
80026d0: 61bb str r3, [r7, #24]
|
|
GPIOx->AFR[position >> 3U] = temp;
|
|
80026d2: 69fb ldr r3, [r7, #28]
|
|
80026d4: 08da lsrs r2, r3, #3
|
|
80026d6: 687b ldr r3, [r7, #4]
|
|
80026d8: 3208 adds r2, #8
|
|
80026da: 69b9 ldr r1, [r7, #24]
|
|
80026dc: f843 1022 str.w r1, [r3, r2, lsl #2]
|
|
}
|
|
|
|
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
|
|
temp = GPIOx->MODER;
|
|
80026e0: 687b ldr r3, [r7, #4]
|
|
80026e2: 681b ldr r3, [r3, #0]
|
|
80026e4: 61bb str r3, [r7, #24]
|
|
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
|
|
80026e6: 69fb ldr r3, [r7, #28]
|
|
80026e8: 005b lsls r3, r3, #1
|
|
80026ea: 2203 movs r2, #3
|
|
80026ec: fa02 f303 lsl.w r3, r2, r3
|
|
80026f0: 43db mvns r3, r3
|
|
80026f2: 69ba ldr r2, [r7, #24]
|
|
80026f4: 4013 ands r3, r2
|
|
80026f6: 61bb str r3, [r7, #24]
|
|
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
|
|
80026f8: 683b ldr r3, [r7, #0]
|
|
80026fa: 685b ldr r3, [r3, #4]
|
|
80026fc: f003 0203 and.w r2, r3, #3
|
|
8002700: 69fb ldr r3, [r7, #28]
|
|
8002702: 005b lsls r3, r3, #1
|
|
8002704: fa02 f303 lsl.w r3, r2, r3
|
|
8002708: 69ba ldr r2, [r7, #24]
|
|
800270a: 4313 orrs r3, r2
|
|
800270c: 61bb str r3, [r7, #24]
|
|
GPIOx->MODER = temp;
|
|
800270e: 687b ldr r3, [r7, #4]
|
|
8002710: 69ba ldr r2, [r7, #24]
|
|
8002712: 601a str r2, [r3, #0]
|
|
|
|
/*--------------------- EXTI Mode Configuration ------------------------*/
|
|
/* Configure the External Interrupt or event for the current IO */
|
|
if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
|
|
8002714: 683b ldr r3, [r7, #0]
|
|
8002716: 685b ldr r3, [r3, #4]
|
|
8002718: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
800271c: 2b00 cmp r3, #0
|
|
800271e: f000 80a2 beq.w 8002866 <HAL_GPIO_Init+0x2ca>
|
|
{
|
|
/* Enable SYSCFG Clock */
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
|
8002722: 2300 movs r3, #0
|
|
8002724: 60fb str r3, [r7, #12]
|
|
8002726: 4b56 ldr r3, [pc, #344] ; (8002880 <HAL_GPIO_Init+0x2e4>)
|
|
8002728: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
800272a: 4a55 ldr r2, [pc, #340] ; (8002880 <HAL_GPIO_Init+0x2e4>)
|
|
800272c: f443 4380 orr.w r3, r3, #16384 ; 0x4000
|
|
8002730: 6453 str r3, [r2, #68] ; 0x44
|
|
8002732: 4b53 ldr r3, [pc, #332] ; (8002880 <HAL_GPIO_Init+0x2e4>)
|
|
8002734: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8002736: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
800273a: 60fb str r3, [r7, #12]
|
|
800273c: 68fb ldr r3, [r7, #12]
|
|
|
|
temp = SYSCFG->EXTICR[position >> 2U];
|
|
800273e: 4a51 ldr r2, [pc, #324] ; (8002884 <HAL_GPIO_Init+0x2e8>)
|
|
8002740: 69fb ldr r3, [r7, #28]
|
|
8002742: 089b lsrs r3, r3, #2
|
|
8002744: 3302 adds r3, #2
|
|
8002746: f852 3023 ldr.w r3, [r2, r3, lsl #2]
|
|
800274a: 61bb str r3, [r7, #24]
|
|
temp &= ~(0x0FU << (4U * (position & 0x03U)));
|
|
800274c: 69fb ldr r3, [r7, #28]
|
|
800274e: f003 0303 and.w r3, r3, #3
|
|
8002752: 009b lsls r3, r3, #2
|
|
8002754: 220f movs r2, #15
|
|
8002756: fa02 f303 lsl.w r3, r2, r3
|
|
800275a: 43db mvns r3, r3
|
|
800275c: 69ba ldr r2, [r7, #24]
|
|
800275e: 4013 ands r3, r2
|
|
8002760: 61bb str r3, [r7, #24]
|
|
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
|
|
8002762: 687b ldr r3, [r7, #4]
|
|
8002764: 4a48 ldr r2, [pc, #288] ; (8002888 <HAL_GPIO_Init+0x2ec>)
|
|
8002766: 4293 cmp r3, r2
|
|
8002768: d019 beq.n 800279e <HAL_GPIO_Init+0x202>
|
|
800276a: 687b ldr r3, [r7, #4]
|
|
800276c: 4a47 ldr r2, [pc, #284] ; (800288c <HAL_GPIO_Init+0x2f0>)
|
|
800276e: 4293 cmp r3, r2
|
|
8002770: d013 beq.n 800279a <HAL_GPIO_Init+0x1fe>
|
|
8002772: 687b ldr r3, [r7, #4]
|
|
8002774: 4a46 ldr r2, [pc, #280] ; (8002890 <HAL_GPIO_Init+0x2f4>)
|
|
8002776: 4293 cmp r3, r2
|
|
8002778: d00d beq.n 8002796 <HAL_GPIO_Init+0x1fa>
|
|
800277a: 687b ldr r3, [r7, #4]
|
|
800277c: 4a45 ldr r2, [pc, #276] ; (8002894 <HAL_GPIO_Init+0x2f8>)
|
|
800277e: 4293 cmp r3, r2
|
|
8002780: d007 beq.n 8002792 <HAL_GPIO_Init+0x1f6>
|
|
8002782: 687b ldr r3, [r7, #4]
|
|
8002784: 4a44 ldr r2, [pc, #272] ; (8002898 <HAL_GPIO_Init+0x2fc>)
|
|
8002786: 4293 cmp r3, r2
|
|
8002788: d101 bne.n 800278e <HAL_GPIO_Init+0x1f2>
|
|
800278a: 2304 movs r3, #4
|
|
800278c: e008 b.n 80027a0 <HAL_GPIO_Init+0x204>
|
|
800278e: 2307 movs r3, #7
|
|
8002790: e006 b.n 80027a0 <HAL_GPIO_Init+0x204>
|
|
8002792: 2303 movs r3, #3
|
|
8002794: e004 b.n 80027a0 <HAL_GPIO_Init+0x204>
|
|
8002796: 2302 movs r3, #2
|
|
8002798: e002 b.n 80027a0 <HAL_GPIO_Init+0x204>
|
|
800279a: 2301 movs r3, #1
|
|
800279c: e000 b.n 80027a0 <HAL_GPIO_Init+0x204>
|
|
800279e: 2300 movs r3, #0
|
|
80027a0: 69fa ldr r2, [r7, #28]
|
|
80027a2: f002 0203 and.w r2, r2, #3
|
|
80027a6: 0092 lsls r2, r2, #2
|
|
80027a8: 4093 lsls r3, r2
|
|
80027aa: 69ba ldr r2, [r7, #24]
|
|
80027ac: 4313 orrs r3, r2
|
|
80027ae: 61bb str r3, [r7, #24]
|
|
SYSCFG->EXTICR[position >> 2U] = temp;
|
|
80027b0: 4934 ldr r1, [pc, #208] ; (8002884 <HAL_GPIO_Init+0x2e8>)
|
|
80027b2: 69fb ldr r3, [r7, #28]
|
|
80027b4: 089b lsrs r3, r3, #2
|
|
80027b6: 3302 adds r3, #2
|
|
80027b8: 69ba ldr r2, [r7, #24]
|
|
80027ba: f841 2023 str.w r2, [r1, r3, lsl #2]
|
|
|
|
/* Clear EXTI line configuration */
|
|
temp = EXTI->IMR;
|
|
80027be: 4b37 ldr r3, [pc, #220] ; (800289c <HAL_GPIO_Init+0x300>)
|
|
80027c0: 681b ldr r3, [r3, #0]
|
|
80027c2: 61bb str r3, [r7, #24]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
80027c4: 693b ldr r3, [r7, #16]
|
|
80027c6: 43db mvns r3, r3
|
|
80027c8: 69ba ldr r2, [r7, #24]
|
|
80027ca: 4013 ands r3, r2
|
|
80027cc: 61bb str r3, [r7, #24]
|
|
if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
|
|
80027ce: 683b ldr r3, [r7, #0]
|
|
80027d0: 685b ldr r3, [r3, #4]
|
|
80027d2: f403 3380 and.w r3, r3, #65536 ; 0x10000
|
|
80027d6: 2b00 cmp r3, #0
|
|
80027d8: d003 beq.n 80027e2 <HAL_GPIO_Init+0x246>
|
|
{
|
|
temp |= iocurrent;
|
|
80027da: 69ba ldr r2, [r7, #24]
|
|
80027dc: 693b ldr r3, [r7, #16]
|
|
80027de: 4313 orrs r3, r2
|
|
80027e0: 61bb str r3, [r7, #24]
|
|
}
|
|
EXTI->IMR = temp;
|
|
80027e2: 4a2e ldr r2, [pc, #184] ; (800289c <HAL_GPIO_Init+0x300>)
|
|
80027e4: 69bb ldr r3, [r7, #24]
|
|
80027e6: 6013 str r3, [r2, #0]
|
|
|
|
temp = EXTI->EMR;
|
|
80027e8: 4b2c ldr r3, [pc, #176] ; (800289c <HAL_GPIO_Init+0x300>)
|
|
80027ea: 685b ldr r3, [r3, #4]
|
|
80027ec: 61bb str r3, [r7, #24]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
80027ee: 693b ldr r3, [r7, #16]
|
|
80027f0: 43db mvns r3, r3
|
|
80027f2: 69ba ldr r2, [r7, #24]
|
|
80027f4: 4013 ands r3, r2
|
|
80027f6: 61bb str r3, [r7, #24]
|
|
if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
|
|
80027f8: 683b ldr r3, [r7, #0]
|
|
80027fa: 685b ldr r3, [r3, #4]
|
|
80027fc: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8002800: 2b00 cmp r3, #0
|
|
8002802: d003 beq.n 800280c <HAL_GPIO_Init+0x270>
|
|
{
|
|
temp |= iocurrent;
|
|
8002804: 69ba ldr r2, [r7, #24]
|
|
8002806: 693b ldr r3, [r7, #16]
|
|
8002808: 4313 orrs r3, r2
|
|
800280a: 61bb str r3, [r7, #24]
|
|
}
|
|
EXTI->EMR = temp;
|
|
800280c: 4a23 ldr r2, [pc, #140] ; (800289c <HAL_GPIO_Init+0x300>)
|
|
800280e: 69bb ldr r3, [r7, #24]
|
|
8002810: 6053 str r3, [r2, #4]
|
|
|
|
/* Clear Rising Falling edge configuration */
|
|
temp = EXTI->RTSR;
|
|
8002812: 4b22 ldr r3, [pc, #136] ; (800289c <HAL_GPIO_Init+0x300>)
|
|
8002814: 689b ldr r3, [r3, #8]
|
|
8002816: 61bb str r3, [r7, #24]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
8002818: 693b ldr r3, [r7, #16]
|
|
800281a: 43db mvns r3, r3
|
|
800281c: 69ba ldr r2, [r7, #24]
|
|
800281e: 4013 ands r3, r2
|
|
8002820: 61bb str r3, [r7, #24]
|
|
if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
|
|
8002822: 683b ldr r3, [r7, #0]
|
|
8002824: 685b ldr r3, [r3, #4]
|
|
8002826: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
|
800282a: 2b00 cmp r3, #0
|
|
800282c: d003 beq.n 8002836 <HAL_GPIO_Init+0x29a>
|
|
{
|
|
temp |= iocurrent;
|
|
800282e: 69ba ldr r2, [r7, #24]
|
|
8002830: 693b ldr r3, [r7, #16]
|
|
8002832: 4313 orrs r3, r2
|
|
8002834: 61bb str r3, [r7, #24]
|
|
}
|
|
EXTI->RTSR = temp;
|
|
8002836: 4a19 ldr r2, [pc, #100] ; (800289c <HAL_GPIO_Init+0x300>)
|
|
8002838: 69bb ldr r3, [r7, #24]
|
|
800283a: 6093 str r3, [r2, #8]
|
|
|
|
temp = EXTI->FTSR;
|
|
800283c: 4b17 ldr r3, [pc, #92] ; (800289c <HAL_GPIO_Init+0x300>)
|
|
800283e: 68db ldr r3, [r3, #12]
|
|
8002840: 61bb str r3, [r7, #24]
|
|
temp &= ~((uint32_t)iocurrent);
|
|
8002842: 693b ldr r3, [r7, #16]
|
|
8002844: 43db mvns r3, r3
|
|
8002846: 69ba ldr r2, [r7, #24]
|
|
8002848: 4013 ands r3, r2
|
|
800284a: 61bb str r3, [r7, #24]
|
|
if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
|
|
800284c: 683b ldr r3, [r7, #0]
|
|
800284e: 685b ldr r3, [r3, #4]
|
|
8002850: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
8002854: 2b00 cmp r3, #0
|
|
8002856: d003 beq.n 8002860 <HAL_GPIO_Init+0x2c4>
|
|
{
|
|
temp |= iocurrent;
|
|
8002858: 69ba ldr r2, [r7, #24]
|
|
800285a: 693b ldr r3, [r7, #16]
|
|
800285c: 4313 orrs r3, r2
|
|
800285e: 61bb str r3, [r7, #24]
|
|
}
|
|
EXTI->FTSR = temp;
|
|
8002860: 4a0e ldr r2, [pc, #56] ; (800289c <HAL_GPIO_Init+0x300>)
|
|
8002862: 69bb ldr r3, [r7, #24]
|
|
8002864: 60d3 str r3, [r2, #12]
|
|
for(position = 0U; position < GPIO_NUMBER; position++)
|
|
8002866: 69fb ldr r3, [r7, #28]
|
|
8002868: 3301 adds r3, #1
|
|
800286a: 61fb str r3, [r7, #28]
|
|
800286c: 69fb ldr r3, [r7, #28]
|
|
800286e: 2b0f cmp r3, #15
|
|
8002870: f67f aea2 bls.w 80025b8 <HAL_GPIO_Init+0x1c>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
8002874: bf00 nop
|
|
8002876: 3724 adds r7, #36 ; 0x24
|
|
8002878: 46bd mov sp, r7
|
|
800287a: f85d 7b04 ldr.w r7, [sp], #4
|
|
800287e: 4770 bx lr
|
|
8002880: 40023800 .word 0x40023800
|
|
8002884: 40013800 .word 0x40013800
|
|
8002888: 40020000 .word 0x40020000
|
|
800288c: 40020400 .word 0x40020400
|
|
8002890: 40020800 .word 0x40020800
|
|
8002894: 40020c00 .word 0x40020c00
|
|
8002898: 40021000 .word 0x40021000
|
|
800289c: 40013c00 .word 0x40013c00
|
|
|
|
080028a0 <HAL_GPIO_WritePin>:
|
|
* @arg GPIO_PIN_RESET: to clear the port pin
|
|
* @arg GPIO_PIN_SET: to set the port pin
|
|
* @retval None
|
|
*/
|
|
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
|
|
{
|
|
80028a0: b480 push {r7}
|
|
80028a2: b083 sub sp, #12
|
|
80028a4: af00 add r7, sp, #0
|
|
80028a6: 6078 str r0, [r7, #4]
|
|
80028a8: 460b mov r3, r1
|
|
80028aa: 807b strh r3, [r7, #2]
|
|
80028ac: 4613 mov r3, r2
|
|
80028ae: 707b strb r3, [r7, #1]
|
|
/* Check the parameters */
|
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
|
assert_param(IS_GPIO_PIN_ACTION(PinState));
|
|
|
|
if(PinState != GPIO_PIN_RESET)
|
|
80028b0: 787b ldrb r3, [r7, #1]
|
|
80028b2: 2b00 cmp r3, #0
|
|
80028b4: d003 beq.n 80028be <HAL_GPIO_WritePin+0x1e>
|
|
{
|
|
GPIOx->BSRR = GPIO_Pin;
|
|
80028b6: 887a ldrh r2, [r7, #2]
|
|
80028b8: 687b ldr r3, [r7, #4]
|
|
80028ba: 619a str r2, [r3, #24]
|
|
}
|
|
else
|
|
{
|
|
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
|
|
}
|
|
}
|
|
80028bc: e003 b.n 80028c6 <HAL_GPIO_WritePin+0x26>
|
|
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
|
|
80028be: 887b ldrh r3, [r7, #2]
|
|
80028c0: 041a lsls r2, r3, #16
|
|
80028c2: 687b ldr r3, [r7, #4]
|
|
80028c4: 619a str r2, [r3, #24]
|
|
}
|
|
80028c6: bf00 nop
|
|
80028c8: 370c adds r7, #12
|
|
80028ca: 46bd mov sp, r7
|
|
80028cc: f85d 7b04 ldr.w r7, [sp], #4
|
|
80028d0: 4770 bx lr
|
|
|
|
080028d2 <HAL_HCD_Init>:
|
|
* @brief Initialize the host driver.
|
|
* @param hhcd HCD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
80028d2: b5f0 push {r4, r5, r6, r7, lr}
|
|
80028d4: b08f sub sp, #60 ; 0x3c
|
|
80028d6: af0a add r7, sp, #40 ; 0x28
|
|
80028d8: 6078 str r0, [r7, #4]
|
|
USB_OTG_GlobalTypeDef *USBx;
|
|
|
|
/* Check the HCD handle allocation */
|
|
if (hhcd == NULL)
|
|
80028da: 687b ldr r3, [r7, #4]
|
|
80028dc: 2b00 cmp r3, #0
|
|
80028de: d101 bne.n 80028e4 <HAL_HCD_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
80028e0: 2301 movs r3, #1
|
|
80028e2: e054 b.n 800298e <HAL_HCD_Init+0xbc>
|
|
}
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_HCD_ALL_INSTANCE(hhcd->Instance));
|
|
|
|
USBx = hhcd->Instance;
|
|
80028e4: 687b ldr r3, [r7, #4]
|
|
80028e6: 681b ldr r3, [r3, #0]
|
|
80028e8: 60fb str r3, [r7, #12]
|
|
|
|
if (hhcd->State == HAL_HCD_STATE_RESET)
|
|
80028ea: 687b ldr r3, [r7, #4]
|
|
80028ec: f893 32b9 ldrb.w r3, [r3, #697] ; 0x2b9
|
|
80028f0: b2db uxtb r3, r3
|
|
80028f2: 2b00 cmp r3, #0
|
|
80028f4: d106 bne.n 8002904 <HAL_HCD_Init+0x32>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hhcd->Lock = HAL_UNLOCKED;
|
|
80028f6: 687b ldr r3, [r7, #4]
|
|
80028f8: 2200 movs r2, #0
|
|
80028fa: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
|
|
|
|
/* Init the low level hardware */
|
|
hhcd->MspInitCallback(hhcd);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|
HAL_HCD_MspInit(hhcd);
|
|
80028fe: 6878 ldr r0, [r7, #4]
|
|
8002900: f007 fa62 bl 8009dc8 <HAL_HCD_MspInit>
|
|
#endif /* (USE_HAL_HCD_REGISTER_CALLBACKS) */
|
|
}
|
|
|
|
hhcd->State = HAL_HCD_STATE_BUSY;
|
|
8002904: 687b ldr r3, [r7, #4]
|
|
8002906: 2203 movs r2, #3
|
|
8002908: f883 22b9 strb.w r2, [r3, #697] ; 0x2b9
|
|
|
|
/* Disable DMA mode for FS instance */
|
|
if ((USBx->CID & (0x1U << 8)) == 0U)
|
|
800290c: 68fb ldr r3, [r7, #12]
|
|
800290e: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
8002910: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8002914: 2b00 cmp r3, #0
|
|
8002916: d102 bne.n 800291e <HAL_HCD_Init+0x4c>
|
|
{
|
|
hhcd->Init.dma_enable = 0U;
|
|
8002918: 687b ldr r3, [r7, #4]
|
|
800291a: 2200 movs r2, #0
|
|
800291c: 611a str r2, [r3, #16]
|
|
}
|
|
|
|
/* Disable the Interrupts */
|
|
__HAL_HCD_DISABLE(hhcd);
|
|
800291e: 687b ldr r3, [r7, #4]
|
|
8002920: 681b ldr r3, [r3, #0]
|
|
8002922: 4618 mov r0, r3
|
|
8002924: f004 fc1e bl 8007164 <USB_DisableGlobalInt>
|
|
|
|
/* Init the Core (common init.) */
|
|
(void)USB_CoreInit(hhcd->Instance, hhcd->Init);
|
|
8002928: 687b ldr r3, [r7, #4]
|
|
800292a: 681b ldr r3, [r3, #0]
|
|
800292c: 603b str r3, [r7, #0]
|
|
800292e: 687e ldr r6, [r7, #4]
|
|
8002930: 466d mov r5, sp
|
|
8002932: f106 0410 add.w r4, r6, #16
|
|
8002936: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
8002938: c50f stmia r5!, {r0, r1, r2, r3}
|
|
800293a: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
800293c: c50f stmia r5!, {r0, r1, r2, r3}
|
|
800293e: e894 0003 ldmia.w r4, {r0, r1}
|
|
8002942: e885 0003 stmia.w r5, {r0, r1}
|
|
8002946: 1d33 adds r3, r6, #4
|
|
8002948: cb0e ldmia r3, {r1, r2, r3}
|
|
800294a: 6838 ldr r0, [r7, #0]
|
|
800294c: f004 fb98 bl 8007080 <USB_CoreInit>
|
|
|
|
/* Force Host Mode*/
|
|
(void)USB_SetCurrentMode(hhcd->Instance, USB_HOST_MODE);
|
|
8002950: 687b ldr r3, [r7, #4]
|
|
8002952: 681b ldr r3, [r3, #0]
|
|
8002954: 2101 movs r1, #1
|
|
8002956: 4618 mov r0, r3
|
|
8002958: f004 fc15 bl 8007186 <USB_SetCurrentMode>
|
|
|
|
/* Init Host */
|
|
(void)USB_HostInit(hhcd->Instance, hhcd->Init);
|
|
800295c: 687b ldr r3, [r7, #4]
|
|
800295e: 681b ldr r3, [r3, #0]
|
|
8002960: 603b str r3, [r7, #0]
|
|
8002962: 687e ldr r6, [r7, #4]
|
|
8002964: 466d mov r5, sp
|
|
8002966: f106 0410 add.w r4, r6, #16
|
|
800296a: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
800296c: c50f stmia r5!, {r0, r1, r2, r3}
|
|
800296e: cc0f ldmia r4!, {r0, r1, r2, r3}
|
|
8002970: c50f stmia r5!, {r0, r1, r2, r3}
|
|
8002972: e894 0003 ldmia.w r4, {r0, r1}
|
|
8002976: e885 0003 stmia.w r5, {r0, r1}
|
|
800297a: 1d33 adds r3, r6, #4
|
|
800297c: cb0e ldmia r3, {r1, r2, r3}
|
|
800297e: 6838 ldr r0, [r7, #0]
|
|
8002980: f004 fd28 bl 80073d4 <USB_HostInit>
|
|
|
|
hhcd->State = HAL_HCD_STATE_READY;
|
|
8002984: 687b ldr r3, [r7, #4]
|
|
8002986: 2201 movs r2, #1
|
|
8002988: f883 22b9 strb.w r2, [r3, #697] ; 0x2b9
|
|
|
|
return HAL_OK;
|
|
800298c: 2300 movs r3, #0
|
|
}
|
|
800298e: 4618 mov r0, r3
|
|
8002990: 3714 adds r7, #20
|
|
8002992: 46bd mov sp, r7
|
|
8002994: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
08002996 <HAL_HCD_HC_Init>:
|
|
uint8_t epnum,
|
|
uint8_t dev_address,
|
|
uint8_t speed,
|
|
uint8_t ep_type,
|
|
uint16_t mps)
|
|
{
|
|
8002996: b590 push {r4, r7, lr}
|
|
8002998: b089 sub sp, #36 ; 0x24
|
|
800299a: af04 add r7, sp, #16
|
|
800299c: 6078 str r0, [r7, #4]
|
|
800299e: 4608 mov r0, r1
|
|
80029a0: 4611 mov r1, r2
|
|
80029a2: 461a mov r2, r3
|
|
80029a4: 4603 mov r3, r0
|
|
80029a6: 70fb strb r3, [r7, #3]
|
|
80029a8: 460b mov r3, r1
|
|
80029aa: 70bb strb r3, [r7, #2]
|
|
80029ac: 4613 mov r3, r2
|
|
80029ae: 707b strb r3, [r7, #1]
|
|
HAL_StatusTypeDef status;
|
|
|
|
__HAL_LOCK(hhcd);
|
|
80029b0: 687b ldr r3, [r7, #4]
|
|
80029b2: f893 32b8 ldrb.w r3, [r3, #696] ; 0x2b8
|
|
80029b6: 2b01 cmp r3, #1
|
|
80029b8: d101 bne.n 80029be <HAL_HCD_HC_Init+0x28>
|
|
80029ba: 2302 movs r3, #2
|
|
80029bc: e07f b.n 8002abe <HAL_HCD_HC_Init+0x128>
|
|
80029be: 687b ldr r3, [r7, #4]
|
|
80029c0: 2201 movs r2, #1
|
|
80029c2: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
|
|
hhcd->hc[ch_num].do_ping = 0U;
|
|
80029c6: 78fa ldrb r2, [r7, #3]
|
|
80029c8: 6879 ldr r1, [r7, #4]
|
|
80029ca: 4613 mov r3, r2
|
|
80029cc: 009b lsls r3, r3, #2
|
|
80029ce: 4413 add r3, r2
|
|
80029d0: 00db lsls r3, r3, #3
|
|
80029d2: 440b add r3, r1
|
|
80029d4: 333d adds r3, #61 ; 0x3d
|
|
80029d6: 2200 movs r2, #0
|
|
80029d8: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].dev_addr = dev_address;
|
|
80029da: 78fa ldrb r2, [r7, #3]
|
|
80029dc: 6879 ldr r1, [r7, #4]
|
|
80029de: 4613 mov r3, r2
|
|
80029e0: 009b lsls r3, r3, #2
|
|
80029e2: 4413 add r3, r2
|
|
80029e4: 00db lsls r3, r3, #3
|
|
80029e6: 440b add r3, r1
|
|
80029e8: 3338 adds r3, #56 ; 0x38
|
|
80029ea: 787a ldrb r2, [r7, #1]
|
|
80029ec: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].max_packet = mps;
|
|
80029ee: 78fa ldrb r2, [r7, #3]
|
|
80029f0: 6879 ldr r1, [r7, #4]
|
|
80029f2: 4613 mov r3, r2
|
|
80029f4: 009b lsls r3, r3, #2
|
|
80029f6: 4413 add r3, r2
|
|
80029f8: 00db lsls r3, r3, #3
|
|
80029fa: 440b add r3, r1
|
|
80029fc: 3340 adds r3, #64 ; 0x40
|
|
80029fe: 8d3a ldrh r2, [r7, #40] ; 0x28
|
|
8002a00: 801a strh r2, [r3, #0]
|
|
hhcd->hc[ch_num].ch_num = ch_num;
|
|
8002a02: 78fa ldrb r2, [r7, #3]
|
|
8002a04: 6879 ldr r1, [r7, #4]
|
|
8002a06: 4613 mov r3, r2
|
|
8002a08: 009b lsls r3, r3, #2
|
|
8002a0a: 4413 add r3, r2
|
|
8002a0c: 00db lsls r3, r3, #3
|
|
8002a0e: 440b add r3, r1
|
|
8002a10: 3339 adds r3, #57 ; 0x39
|
|
8002a12: 78fa ldrb r2, [r7, #3]
|
|
8002a14: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].ep_type = ep_type;
|
|
8002a16: 78fa ldrb r2, [r7, #3]
|
|
8002a18: 6879 ldr r1, [r7, #4]
|
|
8002a1a: 4613 mov r3, r2
|
|
8002a1c: 009b lsls r3, r3, #2
|
|
8002a1e: 4413 add r3, r2
|
|
8002a20: 00db lsls r3, r3, #3
|
|
8002a22: 440b add r3, r1
|
|
8002a24: 333f adds r3, #63 ; 0x3f
|
|
8002a26: f897 2024 ldrb.w r2, [r7, #36] ; 0x24
|
|
8002a2a: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].ep_num = epnum & 0x7FU;
|
|
8002a2c: 78fa ldrb r2, [r7, #3]
|
|
8002a2e: 78bb ldrb r3, [r7, #2]
|
|
8002a30: f003 037f and.w r3, r3, #127 ; 0x7f
|
|
8002a34: b2d8 uxtb r0, r3
|
|
8002a36: 6879 ldr r1, [r7, #4]
|
|
8002a38: 4613 mov r3, r2
|
|
8002a3a: 009b lsls r3, r3, #2
|
|
8002a3c: 4413 add r3, r2
|
|
8002a3e: 00db lsls r3, r3, #3
|
|
8002a40: 440b add r3, r1
|
|
8002a42: 333a adds r3, #58 ; 0x3a
|
|
8002a44: 4602 mov r2, r0
|
|
8002a46: 701a strb r2, [r3, #0]
|
|
|
|
if ((epnum & 0x80U) == 0x80U)
|
|
8002a48: f997 3002 ldrsb.w r3, [r7, #2]
|
|
8002a4c: 2b00 cmp r3, #0
|
|
8002a4e: da0a bge.n 8002a66 <HAL_HCD_HC_Init+0xd0>
|
|
{
|
|
hhcd->hc[ch_num].ep_is_in = 1U;
|
|
8002a50: 78fa ldrb r2, [r7, #3]
|
|
8002a52: 6879 ldr r1, [r7, #4]
|
|
8002a54: 4613 mov r3, r2
|
|
8002a56: 009b lsls r3, r3, #2
|
|
8002a58: 4413 add r3, r2
|
|
8002a5a: 00db lsls r3, r3, #3
|
|
8002a5c: 440b add r3, r1
|
|
8002a5e: 333b adds r3, #59 ; 0x3b
|
|
8002a60: 2201 movs r2, #1
|
|
8002a62: 701a strb r2, [r3, #0]
|
|
8002a64: e009 b.n 8002a7a <HAL_HCD_HC_Init+0xe4>
|
|
}
|
|
else
|
|
{
|
|
hhcd->hc[ch_num].ep_is_in = 0U;
|
|
8002a66: 78fa ldrb r2, [r7, #3]
|
|
8002a68: 6879 ldr r1, [r7, #4]
|
|
8002a6a: 4613 mov r3, r2
|
|
8002a6c: 009b lsls r3, r3, #2
|
|
8002a6e: 4413 add r3, r2
|
|
8002a70: 00db lsls r3, r3, #3
|
|
8002a72: 440b add r3, r1
|
|
8002a74: 333b adds r3, #59 ; 0x3b
|
|
8002a76: 2200 movs r2, #0
|
|
8002a78: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
hhcd->hc[ch_num].speed = speed;
|
|
8002a7a: 78fa ldrb r2, [r7, #3]
|
|
8002a7c: 6879 ldr r1, [r7, #4]
|
|
8002a7e: 4613 mov r3, r2
|
|
8002a80: 009b lsls r3, r3, #2
|
|
8002a82: 4413 add r3, r2
|
|
8002a84: 00db lsls r3, r3, #3
|
|
8002a86: 440b add r3, r1
|
|
8002a88: 333c adds r3, #60 ; 0x3c
|
|
8002a8a: f897 2020 ldrb.w r2, [r7, #32]
|
|
8002a8e: 701a strb r2, [r3, #0]
|
|
|
|
status = USB_HC_Init(hhcd->Instance,
|
|
8002a90: 687b ldr r3, [r7, #4]
|
|
8002a92: 6818 ldr r0, [r3, #0]
|
|
8002a94: 787c ldrb r4, [r7, #1]
|
|
8002a96: 78ba ldrb r2, [r7, #2]
|
|
8002a98: 78f9 ldrb r1, [r7, #3]
|
|
8002a9a: 8d3b ldrh r3, [r7, #40] ; 0x28
|
|
8002a9c: 9302 str r3, [sp, #8]
|
|
8002a9e: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
|
|
8002aa2: 9301 str r3, [sp, #4]
|
|
8002aa4: f897 3020 ldrb.w r3, [r7, #32]
|
|
8002aa8: 9300 str r3, [sp, #0]
|
|
8002aaa: 4623 mov r3, r4
|
|
8002aac: f004 fe14 bl 80076d8 <USB_HC_Init>
|
|
8002ab0: 4603 mov r3, r0
|
|
8002ab2: 73fb strb r3, [r7, #15]
|
|
epnum,
|
|
dev_address,
|
|
speed,
|
|
ep_type,
|
|
mps);
|
|
__HAL_UNLOCK(hhcd);
|
|
8002ab4: 687b ldr r3, [r7, #4]
|
|
8002ab6: 2200 movs r2, #0
|
|
8002ab8: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
|
|
|
|
return status;
|
|
8002abc: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8002abe: 4618 mov r0, r3
|
|
8002ac0: 3714 adds r7, #20
|
|
8002ac2: 46bd mov sp, r7
|
|
8002ac4: bd90 pop {r4, r7, pc}
|
|
|
|
08002ac6 <HAL_HCD_HC_Halt>:
|
|
* @param ch_num Channel number.
|
|
* This parameter can be a value from 1 to 15
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num)
|
|
{
|
|
8002ac6: b580 push {r7, lr}
|
|
8002ac8: b084 sub sp, #16
|
|
8002aca: af00 add r7, sp, #0
|
|
8002acc: 6078 str r0, [r7, #4]
|
|
8002ace: 460b mov r3, r1
|
|
8002ad0: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef status = HAL_OK;
|
|
8002ad2: 2300 movs r3, #0
|
|
8002ad4: 73fb strb r3, [r7, #15]
|
|
|
|
__HAL_LOCK(hhcd);
|
|
8002ad6: 687b ldr r3, [r7, #4]
|
|
8002ad8: f893 32b8 ldrb.w r3, [r3, #696] ; 0x2b8
|
|
8002adc: 2b01 cmp r3, #1
|
|
8002ade: d101 bne.n 8002ae4 <HAL_HCD_HC_Halt+0x1e>
|
|
8002ae0: 2302 movs r3, #2
|
|
8002ae2: e00f b.n 8002b04 <HAL_HCD_HC_Halt+0x3e>
|
|
8002ae4: 687b ldr r3, [r7, #4]
|
|
8002ae6: 2201 movs r2, #1
|
|
8002ae8: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8002aec: 687b ldr r3, [r7, #4]
|
|
8002aee: 681b ldr r3, [r3, #0]
|
|
8002af0: 78fa ldrb r2, [r7, #3]
|
|
8002af2: 4611 mov r1, r2
|
|
8002af4: 4618 mov r0, r3
|
|
8002af6: f005 f850 bl 8007b9a <USB_HC_Halt>
|
|
__HAL_UNLOCK(hhcd);
|
|
8002afa: 687b ldr r3, [r7, #4]
|
|
8002afc: 2200 movs r2, #0
|
|
8002afe: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
|
|
|
|
return status;
|
|
8002b02: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8002b04: 4618 mov r0, r3
|
|
8002b06: 3710 adds r7, #16
|
|
8002b08: 46bd mov sp, r7
|
|
8002b0a: bd80 pop {r7, pc}
|
|
|
|
08002b0c <HAL_HCD_HC_SubmitRequest>:
|
|
uint8_t ep_type,
|
|
uint8_t token,
|
|
uint8_t *pbuff,
|
|
uint16_t length,
|
|
uint8_t do_ping)
|
|
{
|
|
8002b0c: b580 push {r7, lr}
|
|
8002b0e: b082 sub sp, #8
|
|
8002b10: af00 add r7, sp, #0
|
|
8002b12: 6078 str r0, [r7, #4]
|
|
8002b14: 4608 mov r0, r1
|
|
8002b16: 4611 mov r1, r2
|
|
8002b18: 461a mov r2, r3
|
|
8002b1a: 4603 mov r3, r0
|
|
8002b1c: 70fb strb r3, [r7, #3]
|
|
8002b1e: 460b mov r3, r1
|
|
8002b20: 70bb strb r3, [r7, #2]
|
|
8002b22: 4613 mov r3, r2
|
|
8002b24: 707b strb r3, [r7, #1]
|
|
hhcd->hc[ch_num].ep_is_in = direction;
|
|
8002b26: 78fa ldrb r2, [r7, #3]
|
|
8002b28: 6879 ldr r1, [r7, #4]
|
|
8002b2a: 4613 mov r3, r2
|
|
8002b2c: 009b lsls r3, r3, #2
|
|
8002b2e: 4413 add r3, r2
|
|
8002b30: 00db lsls r3, r3, #3
|
|
8002b32: 440b add r3, r1
|
|
8002b34: 333b adds r3, #59 ; 0x3b
|
|
8002b36: 78ba ldrb r2, [r7, #2]
|
|
8002b38: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].ep_type = ep_type;
|
|
8002b3a: 78fa ldrb r2, [r7, #3]
|
|
8002b3c: 6879 ldr r1, [r7, #4]
|
|
8002b3e: 4613 mov r3, r2
|
|
8002b40: 009b lsls r3, r3, #2
|
|
8002b42: 4413 add r3, r2
|
|
8002b44: 00db lsls r3, r3, #3
|
|
8002b46: 440b add r3, r1
|
|
8002b48: 333f adds r3, #63 ; 0x3f
|
|
8002b4a: 787a ldrb r2, [r7, #1]
|
|
8002b4c: 701a strb r2, [r3, #0]
|
|
|
|
if (token == 0U)
|
|
8002b4e: 7c3b ldrb r3, [r7, #16]
|
|
8002b50: 2b00 cmp r3, #0
|
|
8002b52: d114 bne.n 8002b7e <HAL_HCD_HC_SubmitRequest+0x72>
|
|
{
|
|
hhcd->hc[ch_num].data_pid = HC_PID_SETUP;
|
|
8002b54: 78fa ldrb r2, [r7, #3]
|
|
8002b56: 6879 ldr r1, [r7, #4]
|
|
8002b58: 4613 mov r3, r2
|
|
8002b5a: 009b lsls r3, r3, #2
|
|
8002b5c: 4413 add r3, r2
|
|
8002b5e: 00db lsls r3, r3, #3
|
|
8002b60: 440b add r3, r1
|
|
8002b62: 3342 adds r3, #66 ; 0x42
|
|
8002b64: 2203 movs r2, #3
|
|
8002b66: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].do_ping = do_ping;
|
|
8002b68: 78fa ldrb r2, [r7, #3]
|
|
8002b6a: 6879 ldr r1, [r7, #4]
|
|
8002b6c: 4613 mov r3, r2
|
|
8002b6e: 009b lsls r3, r3, #2
|
|
8002b70: 4413 add r3, r2
|
|
8002b72: 00db lsls r3, r3, #3
|
|
8002b74: 440b add r3, r1
|
|
8002b76: 333d adds r3, #61 ; 0x3d
|
|
8002b78: 7f3a ldrb r2, [r7, #28]
|
|
8002b7a: 701a strb r2, [r3, #0]
|
|
8002b7c: e009 b.n 8002b92 <HAL_HCD_HC_SubmitRequest+0x86>
|
|
}
|
|
else
|
|
{
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
|
|
8002b7e: 78fa ldrb r2, [r7, #3]
|
|
8002b80: 6879 ldr r1, [r7, #4]
|
|
8002b82: 4613 mov r3, r2
|
|
8002b84: 009b lsls r3, r3, #2
|
|
8002b86: 4413 add r3, r2
|
|
8002b88: 00db lsls r3, r3, #3
|
|
8002b8a: 440b add r3, r1
|
|
8002b8c: 3342 adds r3, #66 ; 0x42
|
|
8002b8e: 2202 movs r2, #2
|
|
8002b90: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
/* Manage Data Toggle */
|
|
switch (ep_type)
|
|
8002b92: 787b ldrb r3, [r7, #1]
|
|
8002b94: 2b03 cmp r3, #3
|
|
8002b96: f200 80d6 bhi.w 8002d46 <HAL_HCD_HC_SubmitRequest+0x23a>
|
|
8002b9a: a201 add r2, pc, #4 ; (adr r2, 8002ba0 <HAL_HCD_HC_SubmitRequest+0x94>)
|
|
8002b9c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8002ba0: 08002bb1 .word 0x08002bb1
|
|
8002ba4: 08002d31 .word 0x08002d31
|
|
8002ba8: 08002c1d .word 0x08002c1d
|
|
8002bac: 08002ca7 .word 0x08002ca7
|
|
{
|
|
case EP_TYPE_CTRL:
|
|
if ((token == 1U) && (direction == 0U)) /*send data */
|
|
8002bb0: 7c3b ldrb r3, [r7, #16]
|
|
8002bb2: 2b01 cmp r3, #1
|
|
8002bb4: f040 80c9 bne.w 8002d4a <HAL_HCD_HC_SubmitRequest+0x23e>
|
|
8002bb8: 78bb ldrb r3, [r7, #2]
|
|
8002bba: 2b00 cmp r3, #0
|
|
8002bbc: f040 80c5 bne.w 8002d4a <HAL_HCD_HC_SubmitRequest+0x23e>
|
|
{
|
|
if (length == 0U)
|
|
8002bc0: 8b3b ldrh r3, [r7, #24]
|
|
8002bc2: 2b00 cmp r3, #0
|
|
8002bc4: d109 bne.n 8002bda <HAL_HCD_HC_SubmitRequest+0xce>
|
|
{
|
|
/* For Status OUT stage, Length==0, Status Out PID = 1 */
|
|
hhcd->hc[ch_num].toggle_out = 1U;
|
|
8002bc6: 78fa ldrb r2, [r7, #3]
|
|
8002bc8: 6879 ldr r1, [r7, #4]
|
|
8002bca: 4613 mov r3, r2
|
|
8002bcc: 009b lsls r3, r3, #2
|
|
8002bce: 4413 add r3, r2
|
|
8002bd0: 00db lsls r3, r3, #3
|
|
8002bd2: 440b add r3, r1
|
|
8002bd4: 3351 adds r3, #81 ; 0x51
|
|
8002bd6: 2201 movs r2, #1
|
|
8002bd8: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
/* Set the Data Toggle bit as per the Flag */
|
|
if (hhcd->hc[ch_num].toggle_out == 0U)
|
|
8002bda: 78fa ldrb r2, [r7, #3]
|
|
8002bdc: 6879 ldr r1, [r7, #4]
|
|
8002bde: 4613 mov r3, r2
|
|
8002be0: 009b lsls r3, r3, #2
|
|
8002be2: 4413 add r3, r2
|
|
8002be4: 00db lsls r3, r3, #3
|
|
8002be6: 440b add r3, r1
|
|
8002be8: 3351 adds r3, #81 ; 0x51
|
|
8002bea: 781b ldrb r3, [r3, #0]
|
|
8002bec: 2b00 cmp r3, #0
|
|
8002bee: d10a bne.n 8002c06 <HAL_HCD_HC_SubmitRequest+0xfa>
|
|
{
|
|
/* Put the PID 0 */
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
|
|
8002bf0: 78fa ldrb r2, [r7, #3]
|
|
8002bf2: 6879 ldr r1, [r7, #4]
|
|
8002bf4: 4613 mov r3, r2
|
|
8002bf6: 009b lsls r3, r3, #2
|
|
8002bf8: 4413 add r3, r2
|
|
8002bfa: 00db lsls r3, r3, #3
|
|
8002bfc: 440b add r3, r1
|
|
8002bfe: 3342 adds r3, #66 ; 0x42
|
|
8002c00: 2200 movs r2, #0
|
|
8002c02: 701a strb r2, [r3, #0]
|
|
{
|
|
/* Put the PID 1 */
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
|
|
}
|
|
}
|
|
break;
|
|
8002c04: e0a1 b.n 8002d4a <HAL_HCD_HC_SubmitRequest+0x23e>
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
|
|
8002c06: 78fa ldrb r2, [r7, #3]
|
|
8002c08: 6879 ldr r1, [r7, #4]
|
|
8002c0a: 4613 mov r3, r2
|
|
8002c0c: 009b lsls r3, r3, #2
|
|
8002c0e: 4413 add r3, r2
|
|
8002c10: 00db lsls r3, r3, #3
|
|
8002c12: 440b add r3, r1
|
|
8002c14: 3342 adds r3, #66 ; 0x42
|
|
8002c16: 2202 movs r2, #2
|
|
8002c18: 701a strb r2, [r3, #0]
|
|
break;
|
|
8002c1a: e096 b.n 8002d4a <HAL_HCD_HC_SubmitRequest+0x23e>
|
|
|
|
case EP_TYPE_BULK:
|
|
if (direction == 0U)
|
|
8002c1c: 78bb ldrb r3, [r7, #2]
|
|
8002c1e: 2b00 cmp r3, #0
|
|
8002c20: d120 bne.n 8002c64 <HAL_HCD_HC_SubmitRequest+0x158>
|
|
{
|
|
/* Set the Data Toggle bit as per the Flag */
|
|
if (hhcd->hc[ch_num].toggle_out == 0U)
|
|
8002c22: 78fa ldrb r2, [r7, #3]
|
|
8002c24: 6879 ldr r1, [r7, #4]
|
|
8002c26: 4613 mov r3, r2
|
|
8002c28: 009b lsls r3, r3, #2
|
|
8002c2a: 4413 add r3, r2
|
|
8002c2c: 00db lsls r3, r3, #3
|
|
8002c2e: 440b add r3, r1
|
|
8002c30: 3351 adds r3, #81 ; 0x51
|
|
8002c32: 781b ldrb r3, [r3, #0]
|
|
8002c34: 2b00 cmp r3, #0
|
|
8002c36: d10a bne.n 8002c4e <HAL_HCD_HC_SubmitRequest+0x142>
|
|
{
|
|
/* Put the PID 0 */
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
|
|
8002c38: 78fa ldrb r2, [r7, #3]
|
|
8002c3a: 6879 ldr r1, [r7, #4]
|
|
8002c3c: 4613 mov r3, r2
|
|
8002c3e: 009b lsls r3, r3, #2
|
|
8002c40: 4413 add r3, r2
|
|
8002c42: 00db lsls r3, r3, #3
|
|
8002c44: 440b add r3, r1
|
|
8002c46: 3342 adds r3, #66 ; 0x42
|
|
8002c48: 2200 movs r2, #0
|
|
8002c4a: 701a strb r2, [r3, #0]
|
|
{
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
|
|
}
|
|
}
|
|
|
|
break;
|
|
8002c4c: e07e b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
|
|
8002c4e: 78fa ldrb r2, [r7, #3]
|
|
8002c50: 6879 ldr r1, [r7, #4]
|
|
8002c52: 4613 mov r3, r2
|
|
8002c54: 009b lsls r3, r3, #2
|
|
8002c56: 4413 add r3, r2
|
|
8002c58: 00db lsls r3, r3, #3
|
|
8002c5a: 440b add r3, r1
|
|
8002c5c: 3342 adds r3, #66 ; 0x42
|
|
8002c5e: 2202 movs r2, #2
|
|
8002c60: 701a strb r2, [r3, #0]
|
|
break;
|
|
8002c62: e073 b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
if (hhcd->hc[ch_num].toggle_in == 0U)
|
|
8002c64: 78fa ldrb r2, [r7, #3]
|
|
8002c66: 6879 ldr r1, [r7, #4]
|
|
8002c68: 4613 mov r3, r2
|
|
8002c6a: 009b lsls r3, r3, #2
|
|
8002c6c: 4413 add r3, r2
|
|
8002c6e: 00db lsls r3, r3, #3
|
|
8002c70: 440b add r3, r1
|
|
8002c72: 3350 adds r3, #80 ; 0x50
|
|
8002c74: 781b ldrb r3, [r3, #0]
|
|
8002c76: 2b00 cmp r3, #0
|
|
8002c78: d10a bne.n 8002c90 <HAL_HCD_HC_SubmitRequest+0x184>
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
|
|
8002c7a: 78fa ldrb r2, [r7, #3]
|
|
8002c7c: 6879 ldr r1, [r7, #4]
|
|
8002c7e: 4613 mov r3, r2
|
|
8002c80: 009b lsls r3, r3, #2
|
|
8002c82: 4413 add r3, r2
|
|
8002c84: 00db lsls r3, r3, #3
|
|
8002c86: 440b add r3, r1
|
|
8002c88: 3342 adds r3, #66 ; 0x42
|
|
8002c8a: 2200 movs r2, #0
|
|
8002c8c: 701a strb r2, [r3, #0]
|
|
break;
|
|
8002c8e: e05d b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
|
|
8002c90: 78fa ldrb r2, [r7, #3]
|
|
8002c92: 6879 ldr r1, [r7, #4]
|
|
8002c94: 4613 mov r3, r2
|
|
8002c96: 009b lsls r3, r3, #2
|
|
8002c98: 4413 add r3, r2
|
|
8002c9a: 00db lsls r3, r3, #3
|
|
8002c9c: 440b add r3, r1
|
|
8002c9e: 3342 adds r3, #66 ; 0x42
|
|
8002ca0: 2202 movs r2, #2
|
|
8002ca2: 701a strb r2, [r3, #0]
|
|
break;
|
|
8002ca4: e052 b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
case EP_TYPE_INTR:
|
|
if (direction == 0U)
|
|
8002ca6: 78bb ldrb r3, [r7, #2]
|
|
8002ca8: 2b00 cmp r3, #0
|
|
8002caa: d120 bne.n 8002cee <HAL_HCD_HC_SubmitRequest+0x1e2>
|
|
{
|
|
/* Set the Data Toggle bit as per the Flag */
|
|
if (hhcd->hc[ch_num].toggle_out == 0U)
|
|
8002cac: 78fa ldrb r2, [r7, #3]
|
|
8002cae: 6879 ldr r1, [r7, #4]
|
|
8002cb0: 4613 mov r3, r2
|
|
8002cb2: 009b lsls r3, r3, #2
|
|
8002cb4: 4413 add r3, r2
|
|
8002cb6: 00db lsls r3, r3, #3
|
|
8002cb8: 440b add r3, r1
|
|
8002cba: 3351 adds r3, #81 ; 0x51
|
|
8002cbc: 781b ldrb r3, [r3, #0]
|
|
8002cbe: 2b00 cmp r3, #0
|
|
8002cc0: d10a bne.n 8002cd8 <HAL_HCD_HC_SubmitRequest+0x1cc>
|
|
{
|
|
/* Put the PID 0 */
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
|
|
8002cc2: 78fa ldrb r2, [r7, #3]
|
|
8002cc4: 6879 ldr r1, [r7, #4]
|
|
8002cc6: 4613 mov r3, r2
|
|
8002cc8: 009b lsls r3, r3, #2
|
|
8002cca: 4413 add r3, r2
|
|
8002ccc: 00db lsls r3, r3, #3
|
|
8002cce: 440b add r3, r1
|
|
8002cd0: 3342 adds r3, #66 ; 0x42
|
|
8002cd2: 2200 movs r2, #0
|
|
8002cd4: 701a strb r2, [r3, #0]
|
|
else
|
|
{
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
|
|
}
|
|
}
|
|
break;
|
|
8002cd6: e039 b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
|
|
8002cd8: 78fa ldrb r2, [r7, #3]
|
|
8002cda: 6879 ldr r1, [r7, #4]
|
|
8002cdc: 4613 mov r3, r2
|
|
8002cde: 009b lsls r3, r3, #2
|
|
8002ce0: 4413 add r3, r2
|
|
8002ce2: 00db lsls r3, r3, #3
|
|
8002ce4: 440b add r3, r1
|
|
8002ce6: 3342 adds r3, #66 ; 0x42
|
|
8002ce8: 2202 movs r2, #2
|
|
8002cea: 701a strb r2, [r3, #0]
|
|
break;
|
|
8002cec: e02e b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
if (hhcd->hc[ch_num].toggle_in == 0U)
|
|
8002cee: 78fa ldrb r2, [r7, #3]
|
|
8002cf0: 6879 ldr r1, [r7, #4]
|
|
8002cf2: 4613 mov r3, r2
|
|
8002cf4: 009b lsls r3, r3, #2
|
|
8002cf6: 4413 add r3, r2
|
|
8002cf8: 00db lsls r3, r3, #3
|
|
8002cfa: 440b add r3, r1
|
|
8002cfc: 3350 adds r3, #80 ; 0x50
|
|
8002cfe: 781b ldrb r3, [r3, #0]
|
|
8002d00: 2b00 cmp r3, #0
|
|
8002d02: d10a bne.n 8002d1a <HAL_HCD_HC_SubmitRequest+0x20e>
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
|
|
8002d04: 78fa ldrb r2, [r7, #3]
|
|
8002d06: 6879 ldr r1, [r7, #4]
|
|
8002d08: 4613 mov r3, r2
|
|
8002d0a: 009b lsls r3, r3, #2
|
|
8002d0c: 4413 add r3, r2
|
|
8002d0e: 00db lsls r3, r3, #3
|
|
8002d10: 440b add r3, r1
|
|
8002d12: 3342 adds r3, #66 ; 0x42
|
|
8002d14: 2200 movs r2, #0
|
|
8002d16: 701a strb r2, [r3, #0]
|
|
break;
|
|
8002d18: e018 b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA1;
|
|
8002d1a: 78fa ldrb r2, [r7, #3]
|
|
8002d1c: 6879 ldr r1, [r7, #4]
|
|
8002d1e: 4613 mov r3, r2
|
|
8002d20: 009b lsls r3, r3, #2
|
|
8002d22: 4413 add r3, r2
|
|
8002d24: 00db lsls r3, r3, #3
|
|
8002d26: 440b add r3, r1
|
|
8002d28: 3342 adds r3, #66 ; 0x42
|
|
8002d2a: 2202 movs r2, #2
|
|
8002d2c: 701a strb r2, [r3, #0]
|
|
break;
|
|
8002d2e: e00d b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
|
|
case EP_TYPE_ISOC:
|
|
hhcd->hc[ch_num].data_pid = HC_PID_DATA0;
|
|
8002d30: 78fa ldrb r2, [r7, #3]
|
|
8002d32: 6879 ldr r1, [r7, #4]
|
|
8002d34: 4613 mov r3, r2
|
|
8002d36: 009b lsls r3, r3, #2
|
|
8002d38: 4413 add r3, r2
|
|
8002d3a: 00db lsls r3, r3, #3
|
|
8002d3c: 440b add r3, r1
|
|
8002d3e: 3342 adds r3, #66 ; 0x42
|
|
8002d40: 2200 movs r2, #0
|
|
8002d42: 701a strb r2, [r3, #0]
|
|
break;
|
|
8002d44: e002 b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
|
|
default:
|
|
break;
|
|
8002d46: bf00 nop
|
|
8002d48: e000 b.n 8002d4c <HAL_HCD_HC_SubmitRequest+0x240>
|
|
break;
|
|
8002d4a: bf00 nop
|
|
}
|
|
|
|
hhcd->hc[ch_num].xfer_buff = pbuff;
|
|
8002d4c: 78fa ldrb r2, [r7, #3]
|
|
8002d4e: 6879 ldr r1, [r7, #4]
|
|
8002d50: 4613 mov r3, r2
|
|
8002d52: 009b lsls r3, r3, #2
|
|
8002d54: 4413 add r3, r2
|
|
8002d56: 00db lsls r3, r3, #3
|
|
8002d58: 440b add r3, r1
|
|
8002d5a: 3344 adds r3, #68 ; 0x44
|
|
8002d5c: 697a ldr r2, [r7, #20]
|
|
8002d5e: 601a str r2, [r3, #0]
|
|
hhcd->hc[ch_num].xfer_len = length;
|
|
8002d60: 78fa ldrb r2, [r7, #3]
|
|
8002d62: 8b39 ldrh r1, [r7, #24]
|
|
8002d64: 6878 ldr r0, [r7, #4]
|
|
8002d66: 4613 mov r3, r2
|
|
8002d68: 009b lsls r3, r3, #2
|
|
8002d6a: 4413 add r3, r2
|
|
8002d6c: 00db lsls r3, r3, #3
|
|
8002d6e: 4403 add r3, r0
|
|
8002d70: 3348 adds r3, #72 ; 0x48
|
|
8002d72: 6019 str r1, [r3, #0]
|
|
hhcd->hc[ch_num].urb_state = URB_IDLE;
|
|
8002d74: 78fa ldrb r2, [r7, #3]
|
|
8002d76: 6879 ldr r1, [r7, #4]
|
|
8002d78: 4613 mov r3, r2
|
|
8002d7a: 009b lsls r3, r3, #2
|
|
8002d7c: 4413 add r3, r2
|
|
8002d7e: 00db lsls r3, r3, #3
|
|
8002d80: 440b add r3, r1
|
|
8002d82: 335c adds r3, #92 ; 0x5c
|
|
8002d84: 2200 movs r2, #0
|
|
8002d86: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].xfer_count = 0U;
|
|
8002d88: 78fa ldrb r2, [r7, #3]
|
|
8002d8a: 6879 ldr r1, [r7, #4]
|
|
8002d8c: 4613 mov r3, r2
|
|
8002d8e: 009b lsls r3, r3, #2
|
|
8002d90: 4413 add r3, r2
|
|
8002d92: 00db lsls r3, r3, #3
|
|
8002d94: 440b add r3, r1
|
|
8002d96: 334c adds r3, #76 ; 0x4c
|
|
8002d98: 2200 movs r2, #0
|
|
8002d9a: 601a str r2, [r3, #0]
|
|
hhcd->hc[ch_num].ch_num = ch_num;
|
|
8002d9c: 78fa ldrb r2, [r7, #3]
|
|
8002d9e: 6879 ldr r1, [r7, #4]
|
|
8002da0: 4613 mov r3, r2
|
|
8002da2: 009b lsls r3, r3, #2
|
|
8002da4: 4413 add r3, r2
|
|
8002da6: 00db lsls r3, r3, #3
|
|
8002da8: 440b add r3, r1
|
|
8002daa: 3339 adds r3, #57 ; 0x39
|
|
8002dac: 78fa ldrb r2, [r7, #3]
|
|
8002dae: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].state = HC_IDLE;
|
|
8002db0: 78fa ldrb r2, [r7, #3]
|
|
8002db2: 6879 ldr r1, [r7, #4]
|
|
8002db4: 4613 mov r3, r2
|
|
8002db6: 009b lsls r3, r3, #2
|
|
8002db8: 4413 add r3, r2
|
|
8002dba: 00db lsls r3, r3, #3
|
|
8002dbc: 440b add r3, r1
|
|
8002dbe: 335d adds r3, #93 ; 0x5d
|
|
8002dc0: 2200 movs r2, #0
|
|
8002dc2: 701a strb r2, [r3, #0]
|
|
|
|
return USB_HC_StartXfer(hhcd->Instance, &hhcd->hc[ch_num], (uint8_t)hhcd->Init.dma_enable);
|
|
8002dc4: 687b ldr r3, [r7, #4]
|
|
8002dc6: 6818 ldr r0, [r3, #0]
|
|
8002dc8: 78fa ldrb r2, [r7, #3]
|
|
8002dca: 4613 mov r3, r2
|
|
8002dcc: 009b lsls r3, r3, #2
|
|
8002dce: 4413 add r3, r2
|
|
8002dd0: 00db lsls r3, r3, #3
|
|
8002dd2: 3338 adds r3, #56 ; 0x38
|
|
8002dd4: 687a ldr r2, [r7, #4]
|
|
8002dd6: 18d1 adds r1, r2, r3
|
|
8002dd8: 687b ldr r3, [r7, #4]
|
|
8002dda: 691b ldr r3, [r3, #16]
|
|
8002ddc: b2db uxtb r3, r3
|
|
8002dde: 461a mov r2, r3
|
|
8002de0: f004 fd84 bl 80078ec <USB_HC_StartXfer>
|
|
8002de4: 4603 mov r3, r0
|
|
}
|
|
8002de6: 4618 mov r0, r3
|
|
8002de8: 3708 adds r7, #8
|
|
8002dea: 46bd mov sp, r7
|
|
8002dec: bd80 pop {r7, pc}
|
|
8002dee: bf00 nop
|
|
|
|
08002df0 <HAL_HCD_IRQHandler>:
|
|
* @brief Handle HCD interrupt request.
|
|
* @param hhcd HCD handle
|
|
* @retval None
|
|
*/
|
|
void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8002df0: b580 push {r7, lr}
|
|
8002df2: b086 sub sp, #24
|
|
8002df4: af00 add r7, sp, #0
|
|
8002df6: 6078 str r0, [r7, #4]
|
|
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
|
|
8002df8: 687b ldr r3, [r7, #4]
|
|
8002dfa: 681b ldr r3, [r3, #0]
|
|
8002dfc: 613b str r3, [r7, #16]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8002dfe: 693b ldr r3, [r7, #16]
|
|
8002e00: 60fb str r3, [r7, #12]
|
|
uint32_t i, interrupt;
|
|
|
|
/* Ensure that we are in device mode */
|
|
if (USB_GetMode(hhcd->Instance) == USB_OTG_MODE_HOST)
|
|
8002e02: 687b ldr r3, [r7, #4]
|
|
8002e04: 681b ldr r3, [r3, #0]
|
|
8002e06: 4618 mov r0, r3
|
|
8002e08: f004 faa1 bl 800734e <USB_GetMode>
|
|
8002e0c: 4603 mov r3, r0
|
|
8002e0e: 2b01 cmp r3, #1
|
|
8002e10: f040 80ef bne.w 8002ff2 <HAL_HCD_IRQHandler+0x202>
|
|
{
|
|
/* Avoid spurious interrupt */
|
|
if (__HAL_HCD_IS_INVALID_INTERRUPT(hhcd))
|
|
8002e14: 687b ldr r3, [r7, #4]
|
|
8002e16: 681b ldr r3, [r3, #0]
|
|
8002e18: 4618 mov r0, r3
|
|
8002e1a: f004 fa85 bl 8007328 <USB_ReadInterrupts>
|
|
8002e1e: 4603 mov r3, r0
|
|
8002e20: 2b00 cmp r3, #0
|
|
8002e22: f000 80e5 beq.w 8002ff0 <HAL_HCD_IRQHandler+0x200>
|
|
{
|
|
return;
|
|
}
|
|
|
|
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT))
|
|
8002e26: 687b ldr r3, [r7, #4]
|
|
8002e28: 681b ldr r3, [r3, #0]
|
|
8002e2a: 4618 mov r0, r3
|
|
8002e2c: f004 fa7c bl 8007328 <USB_ReadInterrupts>
|
|
8002e30: 4603 mov r3, r0
|
|
8002e32: f403 1300 and.w r3, r3, #2097152 ; 0x200000
|
|
8002e36: f5b3 1f00 cmp.w r3, #2097152 ; 0x200000
|
|
8002e3a: d104 bne.n 8002e46 <HAL_HCD_IRQHandler+0x56>
|
|
{
|
|
/* Incorrect mode, acknowledge the interrupt */
|
|
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT);
|
|
8002e3c: 687b ldr r3, [r7, #4]
|
|
8002e3e: 681b ldr r3, [r3, #0]
|
|
8002e40: f44f 1200 mov.w r2, #2097152 ; 0x200000
|
|
8002e44: 615a str r2, [r3, #20]
|
|
}
|
|
|
|
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_IISOIXFR))
|
|
8002e46: 687b ldr r3, [r7, #4]
|
|
8002e48: 681b ldr r3, [r3, #0]
|
|
8002e4a: 4618 mov r0, r3
|
|
8002e4c: f004 fa6c bl 8007328 <USB_ReadInterrupts>
|
|
8002e50: 4603 mov r3, r0
|
|
8002e52: f403 1380 and.w r3, r3, #1048576 ; 0x100000
|
|
8002e56: f5b3 1f80 cmp.w r3, #1048576 ; 0x100000
|
|
8002e5a: d104 bne.n 8002e66 <HAL_HCD_IRQHandler+0x76>
|
|
{
|
|
/* Incorrect mode, acknowledge the interrupt */
|
|
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_IISOIXFR);
|
|
8002e5c: 687b ldr r3, [r7, #4]
|
|
8002e5e: 681b ldr r3, [r3, #0]
|
|
8002e60: f44f 1280 mov.w r2, #1048576 ; 0x100000
|
|
8002e64: 615a str r2, [r3, #20]
|
|
}
|
|
|
|
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_PTXFE))
|
|
8002e66: 687b ldr r3, [r7, #4]
|
|
8002e68: 681b ldr r3, [r3, #0]
|
|
8002e6a: 4618 mov r0, r3
|
|
8002e6c: f004 fa5c bl 8007328 <USB_ReadInterrupts>
|
|
8002e70: 4603 mov r3, r0
|
|
8002e72: f003 6380 and.w r3, r3, #67108864 ; 0x4000000
|
|
8002e76: f1b3 6f80 cmp.w r3, #67108864 ; 0x4000000
|
|
8002e7a: d104 bne.n 8002e86 <HAL_HCD_IRQHandler+0x96>
|
|
{
|
|
/* Incorrect mode, acknowledge the interrupt */
|
|
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_PTXFE);
|
|
8002e7c: 687b ldr r3, [r7, #4]
|
|
8002e7e: 681b ldr r3, [r3, #0]
|
|
8002e80: f04f 6280 mov.w r2, #67108864 ; 0x4000000
|
|
8002e84: 615a str r2, [r3, #20]
|
|
}
|
|
|
|
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_MMIS))
|
|
8002e86: 687b ldr r3, [r7, #4]
|
|
8002e88: 681b ldr r3, [r3, #0]
|
|
8002e8a: 4618 mov r0, r3
|
|
8002e8c: f004 fa4c bl 8007328 <USB_ReadInterrupts>
|
|
8002e90: 4603 mov r3, r0
|
|
8002e92: f003 0302 and.w r3, r3, #2
|
|
8002e96: 2b02 cmp r3, #2
|
|
8002e98: d103 bne.n 8002ea2 <HAL_HCD_IRQHandler+0xb2>
|
|
{
|
|
/* Incorrect mode, acknowledge the interrupt */
|
|
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_MMIS);
|
|
8002e9a: 687b ldr r3, [r7, #4]
|
|
8002e9c: 681b ldr r3, [r3, #0]
|
|
8002e9e: 2202 movs r2, #2
|
|
8002ea0: 615a str r2, [r3, #20]
|
|
}
|
|
|
|
/* Handle Host Disconnect Interrupts */
|
|
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_DISCINT))
|
|
8002ea2: 687b ldr r3, [r7, #4]
|
|
8002ea4: 681b ldr r3, [r3, #0]
|
|
8002ea6: 4618 mov r0, r3
|
|
8002ea8: f004 fa3e bl 8007328 <USB_ReadInterrupts>
|
|
8002eac: 4603 mov r3, r0
|
|
8002eae: f003 5300 and.w r3, r3, #536870912 ; 0x20000000
|
|
8002eb2: f1b3 5f00 cmp.w r3, #536870912 ; 0x20000000
|
|
8002eb6: d115 bne.n 8002ee4 <HAL_HCD_IRQHandler+0xf4>
|
|
{
|
|
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_DISCINT);
|
|
8002eb8: 687b ldr r3, [r7, #4]
|
|
8002eba: 681b ldr r3, [r3, #0]
|
|
8002ebc: f04f 5200 mov.w r2, #536870912 ; 0x20000000
|
|
8002ec0: 615a str r2, [r3, #20]
|
|
|
|
if ((USBx_HPRT0 & USB_OTG_HPRT_PCSTS) == 0U)
|
|
8002ec2: 68fb ldr r3, [r7, #12]
|
|
8002ec4: f503 6388 add.w r3, r3, #1088 ; 0x440
|
|
8002ec8: 681b ldr r3, [r3, #0]
|
|
8002eca: f003 0301 and.w r3, r3, #1
|
|
8002ece: 2b00 cmp r3, #0
|
|
8002ed0: d108 bne.n 8002ee4 <HAL_HCD_IRQHandler+0xf4>
|
|
{
|
|
/* Handle Host Port Disconnect Interrupt */
|
|
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
|
|
hhcd->DisconnectCallback(hhcd);
|
|
#else
|
|
HAL_HCD_Disconnect_Callback(hhcd);
|
|
8002ed2: 6878 ldr r0, [r7, #4]
|
|
8002ed4: f006 fff6 bl 8009ec4 <HAL_HCD_Disconnect_Callback>
|
|
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
|
|
|
|
(void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_48_MHZ);
|
|
8002ed8: 687b ldr r3, [r7, #4]
|
|
8002eda: 681b ldr r3, [r3, #0]
|
|
8002edc: 2101 movs r1, #1
|
|
8002ede: 4618 mov r0, r3
|
|
8002ee0: f004 fb34 bl 800754c <USB_InitFSLSPClkSel>
|
|
}
|
|
}
|
|
|
|
/* Handle Host Port Interrupts */
|
|
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_HPRTINT))
|
|
8002ee4: 687b ldr r3, [r7, #4]
|
|
8002ee6: 681b ldr r3, [r3, #0]
|
|
8002ee8: 4618 mov r0, r3
|
|
8002eea: f004 fa1d bl 8007328 <USB_ReadInterrupts>
|
|
8002eee: 4603 mov r3, r0
|
|
8002ef0: f003 7380 and.w r3, r3, #16777216 ; 0x1000000
|
|
8002ef4: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000
|
|
8002ef8: d102 bne.n 8002f00 <HAL_HCD_IRQHandler+0x110>
|
|
{
|
|
HCD_Port_IRQHandler(hhcd);
|
|
8002efa: 6878 ldr r0, [r7, #4]
|
|
8002efc: f001 f966 bl 80041cc <HCD_Port_IRQHandler>
|
|
}
|
|
|
|
/* Handle Host SOF Interrupt */
|
|
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_SOF))
|
|
8002f00: 687b ldr r3, [r7, #4]
|
|
8002f02: 681b ldr r3, [r3, #0]
|
|
8002f04: 4618 mov r0, r3
|
|
8002f06: f004 fa0f bl 8007328 <USB_ReadInterrupts>
|
|
8002f0a: 4603 mov r3, r0
|
|
8002f0c: f003 0308 and.w r3, r3, #8
|
|
8002f10: 2b08 cmp r3, #8
|
|
8002f12: d106 bne.n 8002f22 <HAL_HCD_IRQHandler+0x132>
|
|
{
|
|
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
|
|
hhcd->SOFCallback(hhcd);
|
|
#else
|
|
HAL_HCD_SOF_Callback(hhcd);
|
|
8002f14: 6878 ldr r0, [r7, #4]
|
|
8002f16: f006 ffb9 bl 8009e8c <HAL_HCD_SOF_Callback>
|
|
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
|
|
|
|
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_SOF);
|
|
8002f1a: 687b ldr r3, [r7, #4]
|
|
8002f1c: 681b ldr r3, [r3, #0]
|
|
8002f1e: 2208 movs r2, #8
|
|
8002f20: 615a str r2, [r3, #20]
|
|
}
|
|
|
|
/* Handle Host channel Interrupt */
|
|
if (__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_HCINT))
|
|
8002f22: 687b ldr r3, [r7, #4]
|
|
8002f24: 681b ldr r3, [r3, #0]
|
|
8002f26: 4618 mov r0, r3
|
|
8002f28: f004 f9fe bl 8007328 <USB_ReadInterrupts>
|
|
8002f2c: 4603 mov r3, r0
|
|
8002f2e: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
8002f32: f1b3 7f00 cmp.w r3, #33554432 ; 0x2000000
|
|
8002f36: d138 bne.n 8002faa <HAL_HCD_IRQHandler+0x1ba>
|
|
{
|
|
interrupt = USB_HC_ReadInterrupt(hhcd->Instance);
|
|
8002f38: 687b ldr r3, [r7, #4]
|
|
8002f3a: 681b ldr r3, [r3, #0]
|
|
8002f3c: 4618 mov r0, r3
|
|
8002f3e: f004 fe1b bl 8007b78 <USB_HC_ReadInterrupt>
|
|
8002f42: 60b8 str r0, [r7, #8]
|
|
for (i = 0U; i < hhcd->Init.Host_channels; i++)
|
|
8002f44: 2300 movs r3, #0
|
|
8002f46: 617b str r3, [r7, #20]
|
|
8002f48: e025 b.n 8002f96 <HAL_HCD_IRQHandler+0x1a6>
|
|
{
|
|
if ((interrupt & (1UL << (i & 0xFU))) != 0U)
|
|
8002f4a: 697b ldr r3, [r7, #20]
|
|
8002f4c: f003 030f and.w r3, r3, #15
|
|
8002f50: 68ba ldr r2, [r7, #8]
|
|
8002f52: fa22 f303 lsr.w r3, r2, r3
|
|
8002f56: f003 0301 and.w r3, r3, #1
|
|
8002f5a: 2b00 cmp r3, #0
|
|
8002f5c: d018 beq.n 8002f90 <HAL_HCD_IRQHandler+0x1a0>
|
|
{
|
|
if ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_EPDIR) == USB_OTG_HCCHAR_EPDIR)
|
|
8002f5e: 697b ldr r3, [r7, #20]
|
|
8002f60: 015a lsls r2, r3, #5
|
|
8002f62: 68fb ldr r3, [r7, #12]
|
|
8002f64: 4413 add r3, r2
|
|
8002f66: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8002f6a: 681b ldr r3, [r3, #0]
|
|
8002f6c: f403 4300 and.w r3, r3, #32768 ; 0x8000
|
|
8002f70: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
|
8002f74: d106 bne.n 8002f84 <HAL_HCD_IRQHandler+0x194>
|
|
{
|
|
HCD_HC_IN_IRQHandler(hhcd, (uint8_t)i);
|
|
8002f76: 697b ldr r3, [r7, #20]
|
|
8002f78: b2db uxtb r3, r3
|
|
8002f7a: 4619 mov r1, r3
|
|
8002f7c: 6878 ldr r0, [r7, #4]
|
|
8002f7e: f000 f8cf bl 8003120 <HCD_HC_IN_IRQHandler>
|
|
8002f82: e005 b.n 8002f90 <HAL_HCD_IRQHandler+0x1a0>
|
|
}
|
|
else
|
|
{
|
|
HCD_HC_OUT_IRQHandler(hhcd, (uint8_t)i);
|
|
8002f84: 697b ldr r3, [r7, #20]
|
|
8002f86: b2db uxtb r3, r3
|
|
8002f88: 4619 mov r1, r3
|
|
8002f8a: 6878 ldr r0, [r7, #4]
|
|
8002f8c: f000 fcfd bl 800398a <HCD_HC_OUT_IRQHandler>
|
|
for (i = 0U; i < hhcd->Init.Host_channels; i++)
|
|
8002f90: 697b ldr r3, [r7, #20]
|
|
8002f92: 3301 adds r3, #1
|
|
8002f94: 617b str r3, [r7, #20]
|
|
8002f96: 687b ldr r3, [r7, #4]
|
|
8002f98: 689b ldr r3, [r3, #8]
|
|
8002f9a: 697a ldr r2, [r7, #20]
|
|
8002f9c: 429a cmp r2, r3
|
|
8002f9e: d3d4 bcc.n 8002f4a <HAL_HCD_IRQHandler+0x15a>
|
|
}
|
|
}
|
|
}
|
|
__HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_HCINT);
|
|
8002fa0: 687b ldr r3, [r7, #4]
|
|
8002fa2: 681b ldr r3, [r3, #0]
|
|
8002fa4: f04f 7200 mov.w r2, #33554432 ; 0x2000000
|
|
8002fa8: 615a str r2, [r3, #20]
|
|
}
|
|
|
|
/* Handle Rx Queue Level Interrupts */
|
|
if ((__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_RXFLVL)) != 0U)
|
|
8002faa: 687b ldr r3, [r7, #4]
|
|
8002fac: 681b ldr r3, [r3, #0]
|
|
8002fae: 4618 mov r0, r3
|
|
8002fb0: f004 f9ba bl 8007328 <USB_ReadInterrupts>
|
|
8002fb4: 4603 mov r3, r0
|
|
8002fb6: f003 0310 and.w r3, r3, #16
|
|
8002fba: 2b10 cmp r3, #16
|
|
8002fbc: d101 bne.n 8002fc2 <HAL_HCD_IRQHandler+0x1d2>
|
|
8002fbe: 2301 movs r3, #1
|
|
8002fc0: e000 b.n 8002fc4 <HAL_HCD_IRQHandler+0x1d4>
|
|
8002fc2: 2300 movs r3, #0
|
|
8002fc4: 2b00 cmp r3, #0
|
|
8002fc6: d014 beq.n 8002ff2 <HAL_HCD_IRQHandler+0x202>
|
|
{
|
|
USB_MASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
|
|
8002fc8: 687b ldr r3, [r7, #4]
|
|
8002fca: 681b ldr r3, [r3, #0]
|
|
8002fcc: 699a ldr r2, [r3, #24]
|
|
8002fce: 687b ldr r3, [r7, #4]
|
|
8002fd0: 681b ldr r3, [r3, #0]
|
|
8002fd2: f022 0210 bic.w r2, r2, #16
|
|
8002fd6: 619a str r2, [r3, #24]
|
|
|
|
HCD_RXQLVL_IRQHandler(hhcd);
|
|
8002fd8: 6878 ldr r0, [r7, #4]
|
|
8002fda: f001 f84b bl 8004074 <HCD_RXQLVL_IRQHandler>
|
|
|
|
USB_UNMASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL);
|
|
8002fde: 687b ldr r3, [r7, #4]
|
|
8002fe0: 681b ldr r3, [r3, #0]
|
|
8002fe2: 699a ldr r2, [r3, #24]
|
|
8002fe4: 687b ldr r3, [r7, #4]
|
|
8002fe6: 681b ldr r3, [r3, #0]
|
|
8002fe8: f042 0210 orr.w r2, r2, #16
|
|
8002fec: 619a str r2, [r3, #24]
|
|
8002fee: e000 b.n 8002ff2 <HAL_HCD_IRQHandler+0x202>
|
|
return;
|
|
8002ff0: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
8002ff2: 3718 adds r7, #24
|
|
8002ff4: 46bd mov sp, r7
|
|
8002ff6: bd80 pop {r7, pc}
|
|
|
|
08002ff8 <HAL_HCD_Start>:
|
|
* @brief Start the host driver.
|
|
* @param hhcd HCD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8002ff8: b580 push {r7, lr}
|
|
8002ffa: b082 sub sp, #8
|
|
8002ffc: af00 add r7, sp, #0
|
|
8002ffe: 6078 str r0, [r7, #4]
|
|
__HAL_LOCK(hhcd);
|
|
8003000: 687b ldr r3, [r7, #4]
|
|
8003002: f893 32b8 ldrb.w r3, [r3, #696] ; 0x2b8
|
|
8003006: 2b01 cmp r3, #1
|
|
8003008: d101 bne.n 800300e <HAL_HCD_Start+0x16>
|
|
800300a: 2302 movs r3, #2
|
|
800300c: e013 b.n 8003036 <HAL_HCD_Start+0x3e>
|
|
800300e: 687b ldr r3, [r7, #4]
|
|
8003010: 2201 movs r2, #1
|
|
8003012: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
|
|
__HAL_HCD_ENABLE(hhcd);
|
|
8003016: 687b ldr r3, [r7, #4]
|
|
8003018: 681b ldr r3, [r3, #0]
|
|
800301a: 4618 mov r0, r3
|
|
800301c: f004 f891 bl 8007142 <USB_EnableGlobalInt>
|
|
(void)USB_DriveVbus(hhcd->Instance, 1U);
|
|
8003020: 687b ldr r3, [r7, #4]
|
|
8003022: 681b ldr r3, [r3, #0]
|
|
8003024: 2101 movs r1, #1
|
|
8003026: 4618 mov r0, r3
|
|
8003028: f004 faf4 bl 8007614 <USB_DriveVbus>
|
|
__HAL_UNLOCK(hhcd);
|
|
800302c: 687b ldr r3, [r7, #4]
|
|
800302e: 2200 movs r2, #0
|
|
8003030: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
|
|
|
|
return HAL_OK;
|
|
8003034: 2300 movs r3, #0
|
|
}
|
|
8003036: 4618 mov r0, r3
|
|
8003038: 3708 adds r7, #8
|
|
800303a: 46bd mov sp, r7
|
|
800303c: bd80 pop {r7, pc}
|
|
|
|
0800303e <HAL_HCD_Stop>:
|
|
* @param hhcd HCD handle
|
|
* @retval HAL status
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
800303e: b580 push {r7, lr}
|
|
8003040: b082 sub sp, #8
|
|
8003042: af00 add r7, sp, #0
|
|
8003044: 6078 str r0, [r7, #4]
|
|
__HAL_LOCK(hhcd);
|
|
8003046: 687b ldr r3, [r7, #4]
|
|
8003048: f893 32b8 ldrb.w r3, [r3, #696] ; 0x2b8
|
|
800304c: 2b01 cmp r3, #1
|
|
800304e: d101 bne.n 8003054 <HAL_HCD_Stop+0x16>
|
|
8003050: 2302 movs r3, #2
|
|
8003052: e00d b.n 8003070 <HAL_HCD_Stop+0x32>
|
|
8003054: 687b ldr r3, [r7, #4]
|
|
8003056: 2201 movs r2, #1
|
|
8003058: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
|
|
(void)USB_StopHost(hhcd->Instance);
|
|
800305c: 687b ldr r3, [r7, #4]
|
|
800305e: 681b ldr r3, [r3, #0]
|
|
8003060: 4618 mov r0, r3
|
|
8003062: f004 fed5 bl 8007e10 <USB_StopHost>
|
|
__HAL_UNLOCK(hhcd);
|
|
8003066: 687b ldr r3, [r7, #4]
|
|
8003068: 2200 movs r2, #0
|
|
800306a: f883 22b8 strb.w r2, [r3, #696] ; 0x2b8
|
|
|
|
return HAL_OK;
|
|
800306e: 2300 movs r3, #0
|
|
}
|
|
8003070: 4618 mov r0, r3
|
|
8003072: 3708 adds r7, #8
|
|
8003074: 46bd mov sp, r7
|
|
8003076: bd80 pop {r7, pc}
|
|
|
|
08003078 <HAL_HCD_ResetPort>:
|
|
* @brief Reset the host port.
|
|
* @param hhcd HCD handle
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8003078: b580 push {r7, lr}
|
|
800307a: b082 sub sp, #8
|
|
800307c: af00 add r7, sp, #0
|
|
800307e: 6078 str r0, [r7, #4]
|
|
return (USB_ResetPort(hhcd->Instance));
|
|
8003080: 687b ldr r3, [r7, #4]
|
|
8003082: 681b ldr r3, [r3, #0]
|
|
8003084: 4618 mov r0, r3
|
|
8003086: f004 fa9b bl 80075c0 <USB_ResetPort>
|
|
800308a: 4603 mov r3, r0
|
|
}
|
|
800308c: 4618 mov r0, r3
|
|
800308e: 3708 adds r7, #8
|
|
8003090: 46bd mov sp, r7
|
|
8003092: bd80 pop {r7, pc}
|
|
|
|
08003094 <HAL_HCD_HC_GetURBState>:
|
|
* URB_NYET/
|
|
* URB_ERROR/
|
|
* URB_STALL
|
|
*/
|
|
HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum)
|
|
{
|
|
8003094: b480 push {r7}
|
|
8003096: b083 sub sp, #12
|
|
8003098: af00 add r7, sp, #0
|
|
800309a: 6078 str r0, [r7, #4]
|
|
800309c: 460b mov r3, r1
|
|
800309e: 70fb strb r3, [r7, #3]
|
|
return hhcd->hc[chnum].urb_state;
|
|
80030a0: 78fa ldrb r2, [r7, #3]
|
|
80030a2: 6879 ldr r1, [r7, #4]
|
|
80030a4: 4613 mov r3, r2
|
|
80030a6: 009b lsls r3, r3, #2
|
|
80030a8: 4413 add r3, r2
|
|
80030aa: 00db lsls r3, r3, #3
|
|
80030ac: 440b add r3, r1
|
|
80030ae: 335c adds r3, #92 ; 0x5c
|
|
80030b0: 781b ldrb r3, [r3, #0]
|
|
}
|
|
80030b2: 4618 mov r0, r3
|
|
80030b4: 370c adds r7, #12
|
|
80030b6: 46bd mov sp, r7
|
|
80030b8: f85d 7b04 ldr.w r7, [sp], #4
|
|
80030bc: 4770 bx lr
|
|
|
|
080030be <HAL_HCD_HC_GetXferCount>:
|
|
* @param chnum Channel number.
|
|
* This parameter can be a value from 1 to 15
|
|
* @retval last transfer size in byte
|
|
*/
|
|
uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum)
|
|
{
|
|
80030be: b480 push {r7}
|
|
80030c0: b083 sub sp, #12
|
|
80030c2: af00 add r7, sp, #0
|
|
80030c4: 6078 str r0, [r7, #4]
|
|
80030c6: 460b mov r3, r1
|
|
80030c8: 70fb strb r3, [r7, #3]
|
|
return hhcd->hc[chnum].xfer_count;
|
|
80030ca: 78fa ldrb r2, [r7, #3]
|
|
80030cc: 6879 ldr r1, [r7, #4]
|
|
80030ce: 4613 mov r3, r2
|
|
80030d0: 009b lsls r3, r3, #2
|
|
80030d2: 4413 add r3, r2
|
|
80030d4: 00db lsls r3, r3, #3
|
|
80030d6: 440b add r3, r1
|
|
80030d8: 334c adds r3, #76 ; 0x4c
|
|
80030da: 681b ldr r3, [r3, #0]
|
|
}
|
|
80030dc: 4618 mov r0, r3
|
|
80030de: 370c adds r7, #12
|
|
80030e0: 46bd mov sp, r7
|
|
80030e2: f85d 7b04 ldr.w r7, [sp], #4
|
|
80030e6: 4770 bx lr
|
|
|
|
080030e8 <HAL_HCD_GetCurrentFrame>:
|
|
* @brief Return the current Host frame number.
|
|
* @param hhcd HCD handle
|
|
* @retval Current Host frame number
|
|
*/
|
|
uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
80030e8: b580 push {r7, lr}
|
|
80030ea: b082 sub sp, #8
|
|
80030ec: af00 add r7, sp, #0
|
|
80030ee: 6078 str r0, [r7, #4]
|
|
return (USB_GetCurrentFrame(hhcd->Instance));
|
|
80030f0: 687b ldr r3, [r7, #4]
|
|
80030f2: 681b ldr r3, [r3, #0]
|
|
80030f4: 4618 mov r0, r3
|
|
80030f6: f004 fadd bl 80076b4 <USB_GetCurrentFrame>
|
|
80030fa: 4603 mov r3, r0
|
|
}
|
|
80030fc: 4618 mov r0, r3
|
|
80030fe: 3708 adds r7, #8
|
|
8003100: 46bd mov sp, r7
|
|
8003102: bd80 pop {r7, pc}
|
|
|
|
08003104 <HAL_HCD_GetCurrentSpeed>:
|
|
* @brief Return the Host enumeration speed.
|
|
* @param hhcd HCD handle
|
|
* @retval Enumeration speed
|
|
*/
|
|
uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8003104: b580 push {r7, lr}
|
|
8003106: b082 sub sp, #8
|
|
8003108: af00 add r7, sp, #0
|
|
800310a: 6078 str r0, [r7, #4]
|
|
return (USB_GetHostSpeed(hhcd->Instance));
|
|
800310c: 687b ldr r3, [r7, #4]
|
|
800310e: 681b ldr r3, [r3, #0]
|
|
8003110: 4618 mov r0, r3
|
|
8003112: f004 fab8 bl 8007686 <USB_GetHostSpeed>
|
|
8003116: 4603 mov r3, r0
|
|
}
|
|
8003118: 4618 mov r0, r3
|
|
800311a: 3708 adds r7, #8
|
|
800311c: 46bd mov sp, r7
|
|
800311e: bd80 pop {r7, pc}
|
|
|
|
08003120 <HCD_HC_IN_IRQHandler>:
|
|
* @param chnum Channel number.
|
|
* This parameter can be a value from 1 to 15
|
|
* @retval none
|
|
*/
|
|
static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
|
|
{
|
|
8003120: b580 push {r7, lr}
|
|
8003122: b086 sub sp, #24
|
|
8003124: af00 add r7, sp, #0
|
|
8003126: 6078 str r0, [r7, #4]
|
|
8003128: 460b mov r3, r1
|
|
800312a: 70fb strb r3, [r7, #3]
|
|
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
|
|
800312c: 687b ldr r3, [r7, #4]
|
|
800312e: 681b ldr r3, [r3, #0]
|
|
8003130: 617b str r3, [r7, #20]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8003132: 697b ldr r3, [r7, #20]
|
|
8003134: 613b str r3, [r7, #16]
|
|
uint32_t ch_num = (uint32_t)chnum;
|
|
8003136: 78fb ldrb r3, [r7, #3]
|
|
8003138: 60fb str r3, [r7, #12]
|
|
|
|
uint32_t tmpreg;
|
|
|
|
if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_AHBERR) == USB_OTG_HCINT_AHBERR)
|
|
800313a: 68fb ldr r3, [r7, #12]
|
|
800313c: 015a lsls r2, r3, #5
|
|
800313e: 693b ldr r3, [r7, #16]
|
|
8003140: 4413 add r3, r2
|
|
8003142: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003146: 689b ldr r3, [r3, #8]
|
|
8003148: f003 0304 and.w r3, r3, #4
|
|
800314c: 2b04 cmp r3, #4
|
|
800314e: d119 bne.n 8003184 <HCD_HC_IN_IRQHandler+0x64>
|
|
{
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
|
|
8003150: 68fb ldr r3, [r7, #12]
|
|
8003152: 015a lsls r2, r3, #5
|
|
8003154: 693b ldr r3, [r7, #16]
|
|
8003156: 4413 add r3, r2
|
|
8003158: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800315c: 461a mov r2, r3
|
|
800315e: 2304 movs r3, #4
|
|
8003160: 6093 str r3, [r2, #8]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003162: 68fb ldr r3, [r7, #12]
|
|
8003164: 015a lsls r2, r3, #5
|
|
8003166: 693b ldr r3, [r7, #16]
|
|
8003168: 4413 add r3, r2
|
|
800316a: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800316e: 68db ldr r3, [r3, #12]
|
|
8003170: 68fa ldr r2, [r7, #12]
|
|
8003172: 0151 lsls r1, r2, #5
|
|
8003174: 693a ldr r2, [r7, #16]
|
|
8003176: 440a add r2, r1
|
|
8003178: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
800317c: f043 0302 orr.w r3, r3, #2
|
|
8003180: 60d3 str r3, [r2, #12]
|
|
8003182: e0ce b.n 8003322 <HCD_HC_IN_IRQHandler+0x202>
|
|
}
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_BBERR) == USB_OTG_HCINT_BBERR)
|
|
8003184: 68fb ldr r3, [r7, #12]
|
|
8003186: 015a lsls r2, r3, #5
|
|
8003188: 693b ldr r3, [r7, #16]
|
|
800318a: 4413 add r3, r2
|
|
800318c: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003190: 689b ldr r3, [r3, #8]
|
|
8003192: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8003196: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
|
800319a: d12c bne.n 80031f6 <HCD_HC_IN_IRQHandler+0xd6>
|
|
{
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_BBERR);
|
|
800319c: 68fb ldr r3, [r7, #12]
|
|
800319e: 015a lsls r2, r3, #5
|
|
80031a0: 693b ldr r3, [r7, #16]
|
|
80031a2: 4413 add r3, r2
|
|
80031a4: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80031a8: 461a mov r2, r3
|
|
80031aa: f44f 7380 mov.w r3, #256 ; 0x100
|
|
80031ae: 6093 str r3, [r2, #8]
|
|
hhcd->hc[ch_num].state = HC_BBLERR;
|
|
80031b0: 6879 ldr r1, [r7, #4]
|
|
80031b2: 68fa ldr r2, [r7, #12]
|
|
80031b4: 4613 mov r3, r2
|
|
80031b6: 009b lsls r3, r3, #2
|
|
80031b8: 4413 add r3, r2
|
|
80031ba: 00db lsls r3, r3, #3
|
|
80031bc: 440b add r3, r1
|
|
80031be: 335d adds r3, #93 ; 0x5d
|
|
80031c0: 2207 movs r2, #7
|
|
80031c2: 701a strb r2, [r3, #0]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
80031c4: 68fb ldr r3, [r7, #12]
|
|
80031c6: 015a lsls r2, r3, #5
|
|
80031c8: 693b ldr r3, [r7, #16]
|
|
80031ca: 4413 add r3, r2
|
|
80031cc: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80031d0: 68db ldr r3, [r3, #12]
|
|
80031d2: 68fa ldr r2, [r7, #12]
|
|
80031d4: 0151 lsls r1, r2, #5
|
|
80031d6: 693a ldr r2, [r7, #16]
|
|
80031d8: 440a add r2, r1
|
|
80031da: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
80031de: f043 0302 orr.w r3, r3, #2
|
|
80031e2: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
80031e4: 687b ldr r3, [r7, #4]
|
|
80031e6: 681b ldr r3, [r3, #0]
|
|
80031e8: 68fa ldr r2, [r7, #12]
|
|
80031ea: b2d2 uxtb r2, r2
|
|
80031ec: 4611 mov r1, r2
|
|
80031ee: 4618 mov r0, r3
|
|
80031f0: f004 fcd3 bl 8007b9a <USB_HC_Halt>
|
|
80031f4: e095 b.n 8003322 <HCD_HC_IN_IRQHandler+0x202>
|
|
}
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK)
|
|
80031f6: 68fb ldr r3, [r7, #12]
|
|
80031f8: 015a lsls r2, r3, #5
|
|
80031fa: 693b ldr r3, [r7, #16]
|
|
80031fc: 4413 add r3, r2
|
|
80031fe: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003202: 689b ldr r3, [r3, #8]
|
|
8003204: f003 0320 and.w r3, r3, #32
|
|
8003208: 2b20 cmp r3, #32
|
|
800320a: d109 bne.n 8003220 <HCD_HC_IN_IRQHandler+0x100>
|
|
{
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
|
|
800320c: 68fb ldr r3, [r7, #12]
|
|
800320e: 015a lsls r2, r3, #5
|
|
8003210: 693b ldr r3, [r7, #16]
|
|
8003212: 4413 add r3, r2
|
|
8003214: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003218: 461a mov r2, r3
|
|
800321a: 2320 movs r3, #32
|
|
800321c: 6093 str r3, [r2, #8]
|
|
800321e: e080 b.n 8003322 <HCD_HC_IN_IRQHandler+0x202>
|
|
}
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_STALL) == USB_OTG_HCINT_STALL)
|
|
8003220: 68fb ldr r3, [r7, #12]
|
|
8003222: 015a lsls r2, r3, #5
|
|
8003224: 693b ldr r3, [r7, #16]
|
|
8003226: 4413 add r3, r2
|
|
8003228: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800322c: 689b ldr r3, [r3, #8]
|
|
800322e: f003 0308 and.w r3, r3, #8
|
|
8003232: 2b08 cmp r3, #8
|
|
8003234: d134 bne.n 80032a0 <HCD_HC_IN_IRQHandler+0x180>
|
|
{
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003236: 68fb ldr r3, [r7, #12]
|
|
8003238: 015a lsls r2, r3, #5
|
|
800323a: 693b ldr r3, [r7, #16]
|
|
800323c: 4413 add r3, r2
|
|
800323e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003242: 68db ldr r3, [r3, #12]
|
|
8003244: 68fa ldr r2, [r7, #12]
|
|
8003246: 0151 lsls r1, r2, #5
|
|
8003248: 693a ldr r2, [r7, #16]
|
|
800324a: 440a add r2, r1
|
|
800324c: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003250: f043 0302 orr.w r3, r3, #2
|
|
8003254: 60d3 str r3, [r2, #12]
|
|
hhcd->hc[ch_num].state = HC_STALL;
|
|
8003256: 6879 ldr r1, [r7, #4]
|
|
8003258: 68fa ldr r2, [r7, #12]
|
|
800325a: 4613 mov r3, r2
|
|
800325c: 009b lsls r3, r3, #2
|
|
800325e: 4413 add r3, r2
|
|
8003260: 00db lsls r3, r3, #3
|
|
8003262: 440b add r3, r1
|
|
8003264: 335d adds r3, #93 ; 0x5d
|
|
8003266: 2205 movs r2, #5
|
|
8003268: 701a strb r2, [r3, #0]
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
|
|
800326a: 68fb ldr r3, [r7, #12]
|
|
800326c: 015a lsls r2, r3, #5
|
|
800326e: 693b ldr r3, [r7, #16]
|
|
8003270: 4413 add r3, r2
|
|
8003272: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003276: 461a mov r2, r3
|
|
8003278: 2310 movs r3, #16
|
|
800327a: 6093 str r3, [r2, #8]
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_STALL);
|
|
800327c: 68fb ldr r3, [r7, #12]
|
|
800327e: 015a lsls r2, r3, #5
|
|
8003280: 693b ldr r3, [r7, #16]
|
|
8003282: 4413 add r3, r2
|
|
8003284: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003288: 461a mov r2, r3
|
|
800328a: 2308 movs r3, #8
|
|
800328c: 6093 str r3, [r2, #8]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
800328e: 687b ldr r3, [r7, #4]
|
|
8003290: 681b ldr r3, [r3, #0]
|
|
8003292: 68fa ldr r2, [r7, #12]
|
|
8003294: b2d2 uxtb r2, r2
|
|
8003296: 4611 mov r1, r2
|
|
8003298: 4618 mov r0, r3
|
|
800329a: f004 fc7e bl 8007b9a <USB_HC_Halt>
|
|
800329e: e040 b.n 8003322 <HCD_HC_IN_IRQHandler+0x202>
|
|
}
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_DTERR) == USB_OTG_HCINT_DTERR)
|
|
80032a0: 68fb ldr r3, [r7, #12]
|
|
80032a2: 015a lsls r2, r3, #5
|
|
80032a4: 693b ldr r3, [r7, #16]
|
|
80032a6: 4413 add r3, r2
|
|
80032a8: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80032ac: 689b ldr r3, [r3, #8]
|
|
80032ae: f403 6380 and.w r3, r3, #1024 ; 0x400
|
|
80032b2: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
|
80032b6: d134 bne.n 8003322 <HCD_HC_IN_IRQHandler+0x202>
|
|
{
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
80032b8: 68fb ldr r3, [r7, #12]
|
|
80032ba: 015a lsls r2, r3, #5
|
|
80032bc: 693b ldr r3, [r7, #16]
|
|
80032be: 4413 add r3, r2
|
|
80032c0: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80032c4: 68db ldr r3, [r3, #12]
|
|
80032c6: 68fa ldr r2, [r7, #12]
|
|
80032c8: 0151 lsls r1, r2, #5
|
|
80032ca: 693a ldr r2, [r7, #16]
|
|
80032cc: 440a add r2, r1
|
|
80032ce: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
80032d2: f043 0302 orr.w r3, r3, #2
|
|
80032d6: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
80032d8: 687b ldr r3, [r7, #4]
|
|
80032da: 681b ldr r3, [r3, #0]
|
|
80032dc: 68fa ldr r2, [r7, #12]
|
|
80032de: b2d2 uxtb r2, r2
|
|
80032e0: 4611 mov r1, r2
|
|
80032e2: 4618 mov r0, r3
|
|
80032e4: f004 fc59 bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
|
|
80032e8: 68fb ldr r3, [r7, #12]
|
|
80032ea: 015a lsls r2, r3, #5
|
|
80032ec: 693b ldr r3, [r7, #16]
|
|
80032ee: 4413 add r3, r2
|
|
80032f0: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80032f4: 461a mov r2, r3
|
|
80032f6: 2310 movs r3, #16
|
|
80032f8: 6093 str r3, [r2, #8]
|
|
hhcd->hc[ch_num].state = HC_DATATGLERR;
|
|
80032fa: 6879 ldr r1, [r7, #4]
|
|
80032fc: 68fa ldr r2, [r7, #12]
|
|
80032fe: 4613 mov r3, r2
|
|
8003300: 009b lsls r3, r3, #2
|
|
8003302: 4413 add r3, r2
|
|
8003304: 00db lsls r3, r3, #3
|
|
8003306: 440b add r3, r1
|
|
8003308: 335d adds r3, #93 ; 0x5d
|
|
800330a: 2208 movs r2, #8
|
|
800330c: 701a strb r2, [r3, #0]
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_DTERR);
|
|
800330e: 68fb ldr r3, [r7, #12]
|
|
8003310: 015a lsls r2, r3, #5
|
|
8003312: 693b ldr r3, [r7, #16]
|
|
8003314: 4413 add r3, r2
|
|
8003316: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800331a: 461a mov r2, r3
|
|
800331c: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8003320: 6093 str r3, [r2, #8]
|
|
else
|
|
{
|
|
/* ... */
|
|
}
|
|
|
|
if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_FRMOR) == USB_OTG_HCINT_FRMOR)
|
|
8003322: 68fb ldr r3, [r7, #12]
|
|
8003324: 015a lsls r2, r3, #5
|
|
8003326: 693b ldr r3, [r7, #16]
|
|
8003328: 4413 add r3, r2
|
|
800332a: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800332e: 689b ldr r3, [r3, #8]
|
|
8003330: f403 7300 and.w r3, r3, #512 ; 0x200
|
|
8003334: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8003338: d122 bne.n 8003380 <HCD_HC_IN_IRQHandler+0x260>
|
|
{
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
800333a: 68fb ldr r3, [r7, #12]
|
|
800333c: 015a lsls r2, r3, #5
|
|
800333e: 693b ldr r3, [r7, #16]
|
|
8003340: 4413 add r3, r2
|
|
8003342: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003346: 68db ldr r3, [r3, #12]
|
|
8003348: 68fa ldr r2, [r7, #12]
|
|
800334a: 0151 lsls r1, r2, #5
|
|
800334c: 693a ldr r2, [r7, #16]
|
|
800334e: 440a add r2, r1
|
|
8003350: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003354: f043 0302 orr.w r3, r3, #2
|
|
8003358: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
800335a: 687b ldr r3, [r7, #4]
|
|
800335c: 681b ldr r3, [r3, #0]
|
|
800335e: 68fa ldr r2, [r7, #12]
|
|
8003360: b2d2 uxtb r2, r2
|
|
8003362: 4611 mov r1, r2
|
|
8003364: 4618 mov r0, r3
|
|
8003366: f004 fc18 bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_FRMOR);
|
|
800336a: 68fb ldr r3, [r7, #12]
|
|
800336c: 015a lsls r2, r3, #5
|
|
800336e: 693b ldr r3, [r7, #16]
|
|
8003370: 4413 add r3, r2
|
|
8003372: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003376: 461a mov r2, r3
|
|
8003378: f44f 7300 mov.w r3, #512 ; 0x200
|
|
800337c: 6093 str r3, [r2, #8]
|
|
}
|
|
else
|
|
{
|
|
/* ... */
|
|
}
|
|
}
|
|
800337e: e300 b.n 8003982 <HCD_HC_IN_IRQHandler+0x862>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_XFRC) == USB_OTG_HCINT_XFRC)
|
|
8003380: 68fb ldr r3, [r7, #12]
|
|
8003382: 015a lsls r2, r3, #5
|
|
8003384: 693b ldr r3, [r7, #16]
|
|
8003386: 4413 add r3, r2
|
|
8003388: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800338c: 689b ldr r3, [r3, #8]
|
|
800338e: f003 0301 and.w r3, r3, #1
|
|
8003392: 2b01 cmp r3, #1
|
|
8003394: f040 80fd bne.w 8003592 <HCD_HC_IN_IRQHandler+0x472>
|
|
if (hhcd->Init.dma_enable != 0U)
|
|
8003398: 687b ldr r3, [r7, #4]
|
|
800339a: 691b ldr r3, [r3, #16]
|
|
800339c: 2b00 cmp r3, #0
|
|
800339e: d01b beq.n 80033d8 <HCD_HC_IN_IRQHandler+0x2b8>
|
|
hhcd->hc[ch_num].xfer_count = hhcd->hc[ch_num].xfer_len - \
|
|
80033a0: 6879 ldr r1, [r7, #4]
|
|
80033a2: 68fa ldr r2, [r7, #12]
|
|
80033a4: 4613 mov r3, r2
|
|
80033a6: 009b lsls r3, r3, #2
|
|
80033a8: 4413 add r3, r2
|
|
80033aa: 00db lsls r3, r3, #3
|
|
80033ac: 440b add r3, r1
|
|
80033ae: 3348 adds r3, #72 ; 0x48
|
|
80033b0: 681a ldr r2, [r3, #0]
|
|
(USBx_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ);
|
|
80033b2: 68fb ldr r3, [r7, #12]
|
|
80033b4: 0159 lsls r1, r3, #5
|
|
80033b6: 693b ldr r3, [r7, #16]
|
|
80033b8: 440b add r3, r1
|
|
80033ba: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80033be: 691b ldr r3, [r3, #16]
|
|
80033c0: f3c3 0312 ubfx r3, r3, #0, #19
|
|
hhcd->hc[ch_num].xfer_count = hhcd->hc[ch_num].xfer_len - \
|
|
80033c4: 1ad1 subs r1, r2, r3
|
|
80033c6: 6878 ldr r0, [r7, #4]
|
|
80033c8: 68fa ldr r2, [r7, #12]
|
|
80033ca: 4613 mov r3, r2
|
|
80033cc: 009b lsls r3, r3, #2
|
|
80033ce: 4413 add r3, r2
|
|
80033d0: 00db lsls r3, r3, #3
|
|
80033d2: 4403 add r3, r0
|
|
80033d4: 334c adds r3, #76 ; 0x4c
|
|
80033d6: 6019 str r1, [r3, #0]
|
|
hhcd->hc[ch_num].state = HC_XFRC;
|
|
80033d8: 6879 ldr r1, [r7, #4]
|
|
80033da: 68fa ldr r2, [r7, #12]
|
|
80033dc: 4613 mov r3, r2
|
|
80033de: 009b lsls r3, r3, #2
|
|
80033e0: 4413 add r3, r2
|
|
80033e2: 00db lsls r3, r3, #3
|
|
80033e4: 440b add r3, r1
|
|
80033e6: 335d adds r3, #93 ; 0x5d
|
|
80033e8: 2201 movs r2, #1
|
|
80033ea: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].ErrCnt = 0U;
|
|
80033ec: 6879 ldr r1, [r7, #4]
|
|
80033ee: 68fa ldr r2, [r7, #12]
|
|
80033f0: 4613 mov r3, r2
|
|
80033f2: 009b lsls r3, r3, #2
|
|
80033f4: 4413 add r3, r2
|
|
80033f6: 00db lsls r3, r3, #3
|
|
80033f8: 440b add r3, r1
|
|
80033fa: 3358 adds r3, #88 ; 0x58
|
|
80033fc: 2200 movs r2, #0
|
|
80033fe: 601a str r2, [r3, #0]
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_XFRC);
|
|
8003400: 68fb ldr r3, [r7, #12]
|
|
8003402: 015a lsls r2, r3, #5
|
|
8003404: 693b ldr r3, [r7, #16]
|
|
8003406: 4413 add r3, r2
|
|
8003408: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800340c: 461a mov r2, r3
|
|
800340e: 2301 movs r3, #1
|
|
8003410: 6093 str r3, [r2, #8]
|
|
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
|
|
8003412: 6879 ldr r1, [r7, #4]
|
|
8003414: 68fa ldr r2, [r7, #12]
|
|
8003416: 4613 mov r3, r2
|
|
8003418: 009b lsls r3, r3, #2
|
|
800341a: 4413 add r3, r2
|
|
800341c: 00db lsls r3, r3, #3
|
|
800341e: 440b add r3, r1
|
|
8003420: 333f adds r3, #63 ; 0x3f
|
|
8003422: 781b ldrb r3, [r3, #0]
|
|
8003424: 2b00 cmp r3, #0
|
|
8003426: d00a beq.n 800343e <HCD_HC_IN_IRQHandler+0x31e>
|
|
(hhcd->hc[ch_num].ep_type == EP_TYPE_BULK))
|
|
8003428: 6879 ldr r1, [r7, #4]
|
|
800342a: 68fa ldr r2, [r7, #12]
|
|
800342c: 4613 mov r3, r2
|
|
800342e: 009b lsls r3, r3, #2
|
|
8003430: 4413 add r3, r2
|
|
8003432: 00db lsls r3, r3, #3
|
|
8003434: 440b add r3, r1
|
|
8003436: 333f adds r3, #63 ; 0x3f
|
|
8003438: 781b ldrb r3, [r3, #0]
|
|
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
|
|
800343a: 2b02 cmp r3, #2
|
|
800343c: d121 bne.n 8003482 <HCD_HC_IN_IRQHandler+0x362>
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
800343e: 68fb ldr r3, [r7, #12]
|
|
8003440: 015a lsls r2, r3, #5
|
|
8003442: 693b ldr r3, [r7, #16]
|
|
8003444: 4413 add r3, r2
|
|
8003446: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800344a: 68db ldr r3, [r3, #12]
|
|
800344c: 68fa ldr r2, [r7, #12]
|
|
800344e: 0151 lsls r1, r2, #5
|
|
8003450: 693a ldr r2, [r7, #16]
|
|
8003452: 440a add r2, r1
|
|
8003454: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003458: f043 0302 orr.w r3, r3, #2
|
|
800345c: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
800345e: 687b ldr r3, [r7, #4]
|
|
8003460: 681b ldr r3, [r3, #0]
|
|
8003462: 68fa ldr r2, [r7, #12]
|
|
8003464: b2d2 uxtb r2, r2
|
|
8003466: 4611 mov r1, r2
|
|
8003468: 4618 mov r0, r3
|
|
800346a: f004 fb96 bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
|
|
800346e: 68fb ldr r3, [r7, #12]
|
|
8003470: 015a lsls r2, r3, #5
|
|
8003472: 693b ldr r3, [r7, #16]
|
|
8003474: 4413 add r3, r2
|
|
8003476: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800347a: 461a mov r2, r3
|
|
800347c: 2310 movs r3, #16
|
|
800347e: 6093 str r3, [r2, #8]
|
|
8003480: e070 b.n 8003564 <HCD_HC_IN_IRQHandler+0x444>
|
|
else if (hhcd->hc[ch_num].ep_type == EP_TYPE_INTR)
|
|
8003482: 6879 ldr r1, [r7, #4]
|
|
8003484: 68fa ldr r2, [r7, #12]
|
|
8003486: 4613 mov r3, r2
|
|
8003488: 009b lsls r3, r3, #2
|
|
800348a: 4413 add r3, r2
|
|
800348c: 00db lsls r3, r3, #3
|
|
800348e: 440b add r3, r1
|
|
8003490: 333f adds r3, #63 ; 0x3f
|
|
8003492: 781b ldrb r3, [r3, #0]
|
|
8003494: 2b03 cmp r3, #3
|
|
8003496: d12a bne.n 80034ee <HCD_HC_IN_IRQHandler+0x3ce>
|
|
USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM;
|
|
8003498: 68fb ldr r3, [r7, #12]
|
|
800349a: 015a lsls r2, r3, #5
|
|
800349c: 693b ldr r3, [r7, #16]
|
|
800349e: 4413 add r3, r2
|
|
80034a0: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80034a4: 681b ldr r3, [r3, #0]
|
|
80034a6: 68fa ldr r2, [r7, #12]
|
|
80034a8: 0151 lsls r1, r2, #5
|
|
80034aa: 693a ldr r2, [r7, #16]
|
|
80034ac: 440a add r2, r1
|
|
80034ae: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
80034b2: f043 5300 orr.w r3, r3, #536870912 ; 0x20000000
|
|
80034b6: 6013 str r3, [r2, #0]
|
|
hhcd->hc[ch_num].urb_state = URB_DONE;
|
|
80034b8: 6879 ldr r1, [r7, #4]
|
|
80034ba: 68fa ldr r2, [r7, #12]
|
|
80034bc: 4613 mov r3, r2
|
|
80034be: 009b lsls r3, r3, #2
|
|
80034c0: 4413 add r3, r2
|
|
80034c2: 00db lsls r3, r3, #3
|
|
80034c4: 440b add r3, r1
|
|
80034c6: 335c adds r3, #92 ; 0x5c
|
|
80034c8: 2201 movs r2, #1
|
|
80034ca: 701a strb r2, [r3, #0]
|
|
HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
|
|
80034cc: 68fb ldr r3, [r7, #12]
|
|
80034ce: b2d8 uxtb r0, r3
|
|
80034d0: 6879 ldr r1, [r7, #4]
|
|
80034d2: 68fa ldr r2, [r7, #12]
|
|
80034d4: 4613 mov r3, r2
|
|
80034d6: 009b lsls r3, r3, #2
|
|
80034d8: 4413 add r3, r2
|
|
80034da: 00db lsls r3, r3, #3
|
|
80034dc: 440b add r3, r1
|
|
80034de: 335c adds r3, #92 ; 0x5c
|
|
80034e0: 781b ldrb r3, [r3, #0]
|
|
80034e2: 461a mov r2, r3
|
|
80034e4: 4601 mov r1, r0
|
|
80034e6: 6878 ldr r0, [r7, #4]
|
|
80034e8: f006 fcfa bl 8009ee0 <HAL_HCD_HC_NotifyURBChange_Callback>
|
|
80034ec: e03a b.n 8003564 <HCD_HC_IN_IRQHandler+0x444>
|
|
else if (hhcd->hc[ch_num].ep_type == EP_TYPE_ISOC)
|
|
80034ee: 6879 ldr r1, [r7, #4]
|
|
80034f0: 68fa ldr r2, [r7, #12]
|
|
80034f2: 4613 mov r3, r2
|
|
80034f4: 009b lsls r3, r3, #2
|
|
80034f6: 4413 add r3, r2
|
|
80034f8: 00db lsls r3, r3, #3
|
|
80034fa: 440b add r3, r1
|
|
80034fc: 333f adds r3, #63 ; 0x3f
|
|
80034fe: 781b ldrb r3, [r3, #0]
|
|
8003500: 2b01 cmp r3, #1
|
|
8003502: d12f bne.n 8003564 <HCD_HC_IN_IRQHandler+0x444>
|
|
hhcd->hc[ch_num].urb_state = URB_DONE;
|
|
8003504: 6879 ldr r1, [r7, #4]
|
|
8003506: 68fa ldr r2, [r7, #12]
|
|
8003508: 4613 mov r3, r2
|
|
800350a: 009b lsls r3, r3, #2
|
|
800350c: 4413 add r3, r2
|
|
800350e: 00db lsls r3, r3, #3
|
|
8003510: 440b add r3, r1
|
|
8003512: 335c adds r3, #92 ; 0x5c
|
|
8003514: 2201 movs r2, #1
|
|
8003516: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].toggle_in ^= 1U;
|
|
8003518: 6879 ldr r1, [r7, #4]
|
|
800351a: 68fa ldr r2, [r7, #12]
|
|
800351c: 4613 mov r3, r2
|
|
800351e: 009b lsls r3, r3, #2
|
|
8003520: 4413 add r3, r2
|
|
8003522: 00db lsls r3, r3, #3
|
|
8003524: 440b add r3, r1
|
|
8003526: 3350 adds r3, #80 ; 0x50
|
|
8003528: 781b ldrb r3, [r3, #0]
|
|
800352a: f083 0301 eor.w r3, r3, #1
|
|
800352e: b2d8 uxtb r0, r3
|
|
8003530: 6879 ldr r1, [r7, #4]
|
|
8003532: 68fa ldr r2, [r7, #12]
|
|
8003534: 4613 mov r3, r2
|
|
8003536: 009b lsls r3, r3, #2
|
|
8003538: 4413 add r3, r2
|
|
800353a: 00db lsls r3, r3, #3
|
|
800353c: 440b add r3, r1
|
|
800353e: 3350 adds r3, #80 ; 0x50
|
|
8003540: 4602 mov r2, r0
|
|
8003542: 701a strb r2, [r3, #0]
|
|
HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
|
|
8003544: 68fb ldr r3, [r7, #12]
|
|
8003546: b2d8 uxtb r0, r3
|
|
8003548: 6879 ldr r1, [r7, #4]
|
|
800354a: 68fa ldr r2, [r7, #12]
|
|
800354c: 4613 mov r3, r2
|
|
800354e: 009b lsls r3, r3, #2
|
|
8003550: 4413 add r3, r2
|
|
8003552: 00db lsls r3, r3, #3
|
|
8003554: 440b add r3, r1
|
|
8003556: 335c adds r3, #92 ; 0x5c
|
|
8003558: 781b ldrb r3, [r3, #0]
|
|
800355a: 461a mov r2, r3
|
|
800355c: 4601 mov r1, r0
|
|
800355e: 6878 ldr r0, [r7, #4]
|
|
8003560: f006 fcbe bl 8009ee0 <HAL_HCD_HC_NotifyURBChange_Callback>
|
|
hhcd->hc[ch_num].toggle_in ^= 1U;
|
|
8003564: 6879 ldr r1, [r7, #4]
|
|
8003566: 68fa ldr r2, [r7, #12]
|
|
8003568: 4613 mov r3, r2
|
|
800356a: 009b lsls r3, r3, #2
|
|
800356c: 4413 add r3, r2
|
|
800356e: 00db lsls r3, r3, #3
|
|
8003570: 440b add r3, r1
|
|
8003572: 3350 adds r3, #80 ; 0x50
|
|
8003574: 781b ldrb r3, [r3, #0]
|
|
8003576: f083 0301 eor.w r3, r3, #1
|
|
800357a: b2d8 uxtb r0, r3
|
|
800357c: 6879 ldr r1, [r7, #4]
|
|
800357e: 68fa ldr r2, [r7, #12]
|
|
8003580: 4613 mov r3, r2
|
|
8003582: 009b lsls r3, r3, #2
|
|
8003584: 4413 add r3, r2
|
|
8003586: 00db lsls r3, r3, #3
|
|
8003588: 440b add r3, r1
|
|
800358a: 3350 adds r3, #80 ; 0x50
|
|
800358c: 4602 mov r2, r0
|
|
800358e: 701a strb r2, [r3, #0]
|
|
}
|
|
8003590: e1f7 b.n 8003982 <HCD_HC_IN_IRQHandler+0x862>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_CHH) == USB_OTG_HCINT_CHH)
|
|
8003592: 68fb ldr r3, [r7, #12]
|
|
8003594: 015a lsls r2, r3, #5
|
|
8003596: 693b ldr r3, [r7, #16]
|
|
8003598: 4413 add r3, r2
|
|
800359a: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800359e: 689b ldr r3, [r3, #8]
|
|
80035a0: f003 0302 and.w r3, r3, #2
|
|
80035a4: 2b02 cmp r3, #2
|
|
80035a6: f040 811a bne.w 80037de <HCD_HC_IN_IRQHandler+0x6be>
|
|
__HAL_HCD_MASK_HALT_HC_INT(ch_num);
|
|
80035aa: 68fb ldr r3, [r7, #12]
|
|
80035ac: 015a lsls r2, r3, #5
|
|
80035ae: 693b ldr r3, [r7, #16]
|
|
80035b0: 4413 add r3, r2
|
|
80035b2: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80035b6: 68db ldr r3, [r3, #12]
|
|
80035b8: 68fa ldr r2, [r7, #12]
|
|
80035ba: 0151 lsls r1, r2, #5
|
|
80035bc: 693a ldr r2, [r7, #16]
|
|
80035be: 440a add r2, r1
|
|
80035c0: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
80035c4: f023 0302 bic.w r3, r3, #2
|
|
80035c8: 60d3 str r3, [r2, #12]
|
|
if (hhcd->hc[ch_num].state == HC_XFRC)
|
|
80035ca: 6879 ldr r1, [r7, #4]
|
|
80035cc: 68fa ldr r2, [r7, #12]
|
|
80035ce: 4613 mov r3, r2
|
|
80035d0: 009b lsls r3, r3, #2
|
|
80035d2: 4413 add r3, r2
|
|
80035d4: 00db lsls r3, r3, #3
|
|
80035d6: 440b add r3, r1
|
|
80035d8: 335d adds r3, #93 ; 0x5d
|
|
80035da: 781b ldrb r3, [r3, #0]
|
|
80035dc: 2b01 cmp r3, #1
|
|
80035de: d10a bne.n 80035f6 <HCD_HC_IN_IRQHandler+0x4d6>
|
|
hhcd->hc[ch_num].urb_state = URB_DONE;
|
|
80035e0: 6879 ldr r1, [r7, #4]
|
|
80035e2: 68fa ldr r2, [r7, #12]
|
|
80035e4: 4613 mov r3, r2
|
|
80035e6: 009b lsls r3, r3, #2
|
|
80035e8: 4413 add r3, r2
|
|
80035ea: 00db lsls r3, r3, #3
|
|
80035ec: 440b add r3, r1
|
|
80035ee: 335c adds r3, #92 ; 0x5c
|
|
80035f0: 2201 movs r2, #1
|
|
80035f2: 701a strb r2, [r3, #0]
|
|
80035f4: e0d9 b.n 80037aa <HCD_HC_IN_IRQHandler+0x68a>
|
|
else if (hhcd->hc[ch_num].state == HC_STALL)
|
|
80035f6: 6879 ldr r1, [r7, #4]
|
|
80035f8: 68fa ldr r2, [r7, #12]
|
|
80035fa: 4613 mov r3, r2
|
|
80035fc: 009b lsls r3, r3, #2
|
|
80035fe: 4413 add r3, r2
|
|
8003600: 00db lsls r3, r3, #3
|
|
8003602: 440b add r3, r1
|
|
8003604: 335d adds r3, #93 ; 0x5d
|
|
8003606: 781b ldrb r3, [r3, #0]
|
|
8003608: 2b05 cmp r3, #5
|
|
800360a: d10a bne.n 8003622 <HCD_HC_IN_IRQHandler+0x502>
|
|
hhcd->hc[ch_num].urb_state = URB_STALL;
|
|
800360c: 6879 ldr r1, [r7, #4]
|
|
800360e: 68fa ldr r2, [r7, #12]
|
|
8003610: 4613 mov r3, r2
|
|
8003612: 009b lsls r3, r3, #2
|
|
8003614: 4413 add r3, r2
|
|
8003616: 00db lsls r3, r3, #3
|
|
8003618: 440b add r3, r1
|
|
800361a: 335c adds r3, #92 ; 0x5c
|
|
800361c: 2205 movs r2, #5
|
|
800361e: 701a strb r2, [r3, #0]
|
|
8003620: e0c3 b.n 80037aa <HCD_HC_IN_IRQHandler+0x68a>
|
|
else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
|
|
8003622: 6879 ldr r1, [r7, #4]
|
|
8003624: 68fa ldr r2, [r7, #12]
|
|
8003626: 4613 mov r3, r2
|
|
8003628: 009b lsls r3, r3, #2
|
|
800362a: 4413 add r3, r2
|
|
800362c: 00db lsls r3, r3, #3
|
|
800362e: 440b add r3, r1
|
|
8003630: 335d adds r3, #93 ; 0x5d
|
|
8003632: 781b ldrb r3, [r3, #0]
|
|
8003634: 2b06 cmp r3, #6
|
|
8003636: d00a beq.n 800364e <HCD_HC_IN_IRQHandler+0x52e>
|
|
(hhcd->hc[ch_num].state == HC_DATATGLERR))
|
|
8003638: 6879 ldr r1, [r7, #4]
|
|
800363a: 68fa ldr r2, [r7, #12]
|
|
800363c: 4613 mov r3, r2
|
|
800363e: 009b lsls r3, r3, #2
|
|
8003640: 4413 add r3, r2
|
|
8003642: 00db lsls r3, r3, #3
|
|
8003644: 440b add r3, r1
|
|
8003646: 335d adds r3, #93 ; 0x5d
|
|
8003648: 781b ldrb r3, [r3, #0]
|
|
else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
|
|
800364a: 2b08 cmp r3, #8
|
|
800364c: d156 bne.n 80036fc <HCD_HC_IN_IRQHandler+0x5dc>
|
|
hhcd->hc[ch_num].ErrCnt++;
|
|
800364e: 6879 ldr r1, [r7, #4]
|
|
8003650: 68fa ldr r2, [r7, #12]
|
|
8003652: 4613 mov r3, r2
|
|
8003654: 009b lsls r3, r3, #2
|
|
8003656: 4413 add r3, r2
|
|
8003658: 00db lsls r3, r3, #3
|
|
800365a: 440b add r3, r1
|
|
800365c: 3358 adds r3, #88 ; 0x58
|
|
800365e: 681b ldr r3, [r3, #0]
|
|
8003660: 1c59 adds r1, r3, #1
|
|
8003662: 6878 ldr r0, [r7, #4]
|
|
8003664: 68fa ldr r2, [r7, #12]
|
|
8003666: 4613 mov r3, r2
|
|
8003668: 009b lsls r3, r3, #2
|
|
800366a: 4413 add r3, r2
|
|
800366c: 00db lsls r3, r3, #3
|
|
800366e: 4403 add r3, r0
|
|
8003670: 3358 adds r3, #88 ; 0x58
|
|
8003672: 6019 str r1, [r3, #0]
|
|
if (hhcd->hc[ch_num].ErrCnt > 3U)
|
|
8003674: 6879 ldr r1, [r7, #4]
|
|
8003676: 68fa ldr r2, [r7, #12]
|
|
8003678: 4613 mov r3, r2
|
|
800367a: 009b lsls r3, r3, #2
|
|
800367c: 4413 add r3, r2
|
|
800367e: 00db lsls r3, r3, #3
|
|
8003680: 440b add r3, r1
|
|
8003682: 3358 adds r3, #88 ; 0x58
|
|
8003684: 681b ldr r3, [r3, #0]
|
|
8003686: 2b03 cmp r3, #3
|
|
8003688: d914 bls.n 80036b4 <HCD_HC_IN_IRQHandler+0x594>
|
|
hhcd->hc[ch_num].ErrCnt = 0U;
|
|
800368a: 6879 ldr r1, [r7, #4]
|
|
800368c: 68fa ldr r2, [r7, #12]
|
|
800368e: 4613 mov r3, r2
|
|
8003690: 009b lsls r3, r3, #2
|
|
8003692: 4413 add r3, r2
|
|
8003694: 00db lsls r3, r3, #3
|
|
8003696: 440b add r3, r1
|
|
8003698: 3358 adds r3, #88 ; 0x58
|
|
800369a: 2200 movs r2, #0
|
|
800369c: 601a str r2, [r3, #0]
|
|
hhcd->hc[ch_num].urb_state = URB_ERROR;
|
|
800369e: 6879 ldr r1, [r7, #4]
|
|
80036a0: 68fa ldr r2, [r7, #12]
|
|
80036a2: 4613 mov r3, r2
|
|
80036a4: 009b lsls r3, r3, #2
|
|
80036a6: 4413 add r3, r2
|
|
80036a8: 00db lsls r3, r3, #3
|
|
80036aa: 440b add r3, r1
|
|
80036ac: 335c adds r3, #92 ; 0x5c
|
|
80036ae: 2204 movs r2, #4
|
|
80036b0: 701a strb r2, [r3, #0]
|
|
80036b2: e009 b.n 80036c8 <HCD_HC_IN_IRQHandler+0x5a8>
|
|
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
|
|
80036b4: 6879 ldr r1, [r7, #4]
|
|
80036b6: 68fa ldr r2, [r7, #12]
|
|
80036b8: 4613 mov r3, r2
|
|
80036ba: 009b lsls r3, r3, #2
|
|
80036bc: 4413 add r3, r2
|
|
80036be: 00db lsls r3, r3, #3
|
|
80036c0: 440b add r3, r1
|
|
80036c2: 335c adds r3, #92 ; 0x5c
|
|
80036c4: 2202 movs r2, #2
|
|
80036c6: 701a strb r2, [r3, #0]
|
|
tmpreg = USBx_HC(ch_num)->HCCHAR;
|
|
80036c8: 68fb ldr r3, [r7, #12]
|
|
80036ca: 015a lsls r2, r3, #5
|
|
80036cc: 693b ldr r3, [r7, #16]
|
|
80036ce: 4413 add r3, r2
|
|
80036d0: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80036d4: 681b ldr r3, [r3, #0]
|
|
80036d6: 60bb str r3, [r7, #8]
|
|
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
|
|
80036d8: 68bb ldr r3, [r7, #8]
|
|
80036da: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
|
|
80036de: 60bb str r3, [r7, #8]
|
|
tmpreg |= USB_OTG_HCCHAR_CHENA;
|
|
80036e0: 68bb ldr r3, [r7, #8]
|
|
80036e2: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
80036e6: 60bb str r3, [r7, #8]
|
|
USBx_HC(ch_num)->HCCHAR = tmpreg;
|
|
80036e8: 68fb ldr r3, [r7, #12]
|
|
80036ea: 015a lsls r2, r3, #5
|
|
80036ec: 693b ldr r3, [r7, #16]
|
|
80036ee: 4413 add r3, r2
|
|
80036f0: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80036f4: 461a mov r2, r3
|
|
80036f6: 68bb ldr r3, [r7, #8]
|
|
80036f8: 6013 str r3, [r2, #0]
|
|
80036fa: e056 b.n 80037aa <HCD_HC_IN_IRQHandler+0x68a>
|
|
else if (hhcd->hc[ch_num].state == HC_NAK)
|
|
80036fc: 6879 ldr r1, [r7, #4]
|
|
80036fe: 68fa ldr r2, [r7, #12]
|
|
8003700: 4613 mov r3, r2
|
|
8003702: 009b lsls r3, r3, #2
|
|
8003704: 4413 add r3, r2
|
|
8003706: 00db lsls r3, r3, #3
|
|
8003708: 440b add r3, r1
|
|
800370a: 335d adds r3, #93 ; 0x5d
|
|
800370c: 781b ldrb r3, [r3, #0]
|
|
800370e: 2b03 cmp r3, #3
|
|
8003710: d123 bne.n 800375a <HCD_HC_IN_IRQHandler+0x63a>
|
|
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
|
|
8003712: 6879 ldr r1, [r7, #4]
|
|
8003714: 68fa ldr r2, [r7, #12]
|
|
8003716: 4613 mov r3, r2
|
|
8003718: 009b lsls r3, r3, #2
|
|
800371a: 4413 add r3, r2
|
|
800371c: 00db lsls r3, r3, #3
|
|
800371e: 440b add r3, r1
|
|
8003720: 335c adds r3, #92 ; 0x5c
|
|
8003722: 2202 movs r2, #2
|
|
8003724: 701a strb r2, [r3, #0]
|
|
tmpreg = USBx_HC(ch_num)->HCCHAR;
|
|
8003726: 68fb ldr r3, [r7, #12]
|
|
8003728: 015a lsls r2, r3, #5
|
|
800372a: 693b ldr r3, [r7, #16]
|
|
800372c: 4413 add r3, r2
|
|
800372e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003732: 681b ldr r3, [r3, #0]
|
|
8003734: 60bb str r3, [r7, #8]
|
|
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
|
|
8003736: 68bb ldr r3, [r7, #8]
|
|
8003738: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
|
|
800373c: 60bb str r3, [r7, #8]
|
|
tmpreg |= USB_OTG_HCCHAR_CHENA;
|
|
800373e: 68bb ldr r3, [r7, #8]
|
|
8003740: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8003744: 60bb str r3, [r7, #8]
|
|
USBx_HC(ch_num)->HCCHAR = tmpreg;
|
|
8003746: 68fb ldr r3, [r7, #12]
|
|
8003748: 015a lsls r2, r3, #5
|
|
800374a: 693b ldr r3, [r7, #16]
|
|
800374c: 4413 add r3, r2
|
|
800374e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003752: 461a mov r2, r3
|
|
8003754: 68bb ldr r3, [r7, #8]
|
|
8003756: 6013 str r3, [r2, #0]
|
|
8003758: e027 b.n 80037aa <HCD_HC_IN_IRQHandler+0x68a>
|
|
else if (hhcd->hc[ch_num].state == HC_BBLERR)
|
|
800375a: 6879 ldr r1, [r7, #4]
|
|
800375c: 68fa ldr r2, [r7, #12]
|
|
800375e: 4613 mov r3, r2
|
|
8003760: 009b lsls r3, r3, #2
|
|
8003762: 4413 add r3, r2
|
|
8003764: 00db lsls r3, r3, #3
|
|
8003766: 440b add r3, r1
|
|
8003768: 335d adds r3, #93 ; 0x5d
|
|
800376a: 781b ldrb r3, [r3, #0]
|
|
800376c: 2b07 cmp r3, #7
|
|
800376e: d11c bne.n 80037aa <HCD_HC_IN_IRQHandler+0x68a>
|
|
hhcd->hc[ch_num].ErrCnt++;
|
|
8003770: 6879 ldr r1, [r7, #4]
|
|
8003772: 68fa ldr r2, [r7, #12]
|
|
8003774: 4613 mov r3, r2
|
|
8003776: 009b lsls r3, r3, #2
|
|
8003778: 4413 add r3, r2
|
|
800377a: 00db lsls r3, r3, #3
|
|
800377c: 440b add r3, r1
|
|
800377e: 3358 adds r3, #88 ; 0x58
|
|
8003780: 681b ldr r3, [r3, #0]
|
|
8003782: 1c59 adds r1, r3, #1
|
|
8003784: 6878 ldr r0, [r7, #4]
|
|
8003786: 68fa ldr r2, [r7, #12]
|
|
8003788: 4613 mov r3, r2
|
|
800378a: 009b lsls r3, r3, #2
|
|
800378c: 4413 add r3, r2
|
|
800378e: 00db lsls r3, r3, #3
|
|
8003790: 4403 add r3, r0
|
|
8003792: 3358 adds r3, #88 ; 0x58
|
|
8003794: 6019 str r1, [r3, #0]
|
|
hhcd->hc[ch_num].urb_state = URB_ERROR;
|
|
8003796: 6879 ldr r1, [r7, #4]
|
|
8003798: 68fa ldr r2, [r7, #12]
|
|
800379a: 4613 mov r3, r2
|
|
800379c: 009b lsls r3, r3, #2
|
|
800379e: 4413 add r3, r2
|
|
80037a0: 00db lsls r3, r3, #3
|
|
80037a2: 440b add r3, r1
|
|
80037a4: 335c adds r3, #92 ; 0x5c
|
|
80037a6: 2204 movs r2, #4
|
|
80037a8: 701a strb r2, [r3, #0]
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_CHH);
|
|
80037aa: 68fb ldr r3, [r7, #12]
|
|
80037ac: 015a lsls r2, r3, #5
|
|
80037ae: 693b ldr r3, [r7, #16]
|
|
80037b0: 4413 add r3, r2
|
|
80037b2: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80037b6: 461a mov r2, r3
|
|
80037b8: 2302 movs r3, #2
|
|
80037ba: 6093 str r3, [r2, #8]
|
|
HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
|
|
80037bc: 68fb ldr r3, [r7, #12]
|
|
80037be: b2d8 uxtb r0, r3
|
|
80037c0: 6879 ldr r1, [r7, #4]
|
|
80037c2: 68fa ldr r2, [r7, #12]
|
|
80037c4: 4613 mov r3, r2
|
|
80037c6: 009b lsls r3, r3, #2
|
|
80037c8: 4413 add r3, r2
|
|
80037ca: 00db lsls r3, r3, #3
|
|
80037cc: 440b add r3, r1
|
|
80037ce: 335c adds r3, #92 ; 0x5c
|
|
80037d0: 781b ldrb r3, [r3, #0]
|
|
80037d2: 461a mov r2, r3
|
|
80037d4: 4601 mov r1, r0
|
|
80037d6: 6878 ldr r0, [r7, #4]
|
|
80037d8: f006 fb82 bl 8009ee0 <HAL_HCD_HC_NotifyURBChange_Callback>
|
|
}
|
|
80037dc: e0d1 b.n 8003982 <HCD_HC_IN_IRQHandler+0x862>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_TXERR) == USB_OTG_HCINT_TXERR)
|
|
80037de: 68fb ldr r3, [r7, #12]
|
|
80037e0: 015a lsls r2, r3, #5
|
|
80037e2: 693b ldr r3, [r7, #16]
|
|
80037e4: 4413 add r3, r2
|
|
80037e6: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80037ea: 689b ldr r3, [r3, #8]
|
|
80037ec: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
80037f0: 2b80 cmp r3, #128 ; 0x80
|
|
80037f2: d13e bne.n 8003872 <HCD_HC_IN_IRQHandler+0x752>
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
80037f4: 68fb ldr r3, [r7, #12]
|
|
80037f6: 015a lsls r2, r3, #5
|
|
80037f8: 693b ldr r3, [r7, #16]
|
|
80037fa: 4413 add r3, r2
|
|
80037fc: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003800: 68db ldr r3, [r3, #12]
|
|
8003802: 68fa ldr r2, [r7, #12]
|
|
8003804: 0151 lsls r1, r2, #5
|
|
8003806: 693a ldr r2, [r7, #16]
|
|
8003808: 440a add r2, r1
|
|
800380a: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
800380e: f043 0302 orr.w r3, r3, #2
|
|
8003812: 60d3 str r3, [r2, #12]
|
|
hhcd->hc[ch_num].ErrCnt++;
|
|
8003814: 6879 ldr r1, [r7, #4]
|
|
8003816: 68fa ldr r2, [r7, #12]
|
|
8003818: 4613 mov r3, r2
|
|
800381a: 009b lsls r3, r3, #2
|
|
800381c: 4413 add r3, r2
|
|
800381e: 00db lsls r3, r3, #3
|
|
8003820: 440b add r3, r1
|
|
8003822: 3358 adds r3, #88 ; 0x58
|
|
8003824: 681b ldr r3, [r3, #0]
|
|
8003826: 1c59 adds r1, r3, #1
|
|
8003828: 6878 ldr r0, [r7, #4]
|
|
800382a: 68fa ldr r2, [r7, #12]
|
|
800382c: 4613 mov r3, r2
|
|
800382e: 009b lsls r3, r3, #2
|
|
8003830: 4413 add r3, r2
|
|
8003832: 00db lsls r3, r3, #3
|
|
8003834: 4403 add r3, r0
|
|
8003836: 3358 adds r3, #88 ; 0x58
|
|
8003838: 6019 str r1, [r3, #0]
|
|
hhcd->hc[ch_num].state = HC_XACTERR;
|
|
800383a: 6879 ldr r1, [r7, #4]
|
|
800383c: 68fa ldr r2, [r7, #12]
|
|
800383e: 4613 mov r3, r2
|
|
8003840: 009b lsls r3, r3, #2
|
|
8003842: 4413 add r3, r2
|
|
8003844: 00db lsls r3, r3, #3
|
|
8003846: 440b add r3, r1
|
|
8003848: 335d adds r3, #93 ; 0x5d
|
|
800384a: 2206 movs r2, #6
|
|
800384c: 701a strb r2, [r3, #0]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
800384e: 687b ldr r3, [r7, #4]
|
|
8003850: 681b ldr r3, [r3, #0]
|
|
8003852: 68fa ldr r2, [r7, #12]
|
|
8003854: b2d2 uxtb r2, r2
|
|
8003856: 4611 mov r1, r2
|
|
8003858: 4618 mov r0, r3
|
|
800385a: f004 f99e bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_TXERR);
|
|
800385e: 68fb ldr r3, [r7, #12]
|
|
8003860: 015a lsls r2, r3, #5
|
|
8003862: 693b ldr r3, [r7, #16]
|
|
8003864: 4413 add r3, r2
|
|
8003866: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800386a: 461a mov r2, r3
|
|
800386c: 2380 movs r3, #128 ; 0x80
|
|
800386e: 6093 str r3, [r2, #8]
|
|
}
|
|
8003870: e087 b.n 8003982 <HCD_HC_IN_IRQHandler+0x862>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NAK) == USB_OTG_HCINT_NAK)
|
|
8003872: 68fb ldr r3, [r7, #12]
|
|
8003874: 015a lsls r2, r3, #5
|
|
8003876: 693b ldr r3, [r7, #16]
|
|
8003878: 4413 add r3, r2
|
|
800387a: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800387e: 689b ldr r3, [r3, #8]
|
|
8003880: f003 0310 and.w r3, r3, #16
|
|
8003884: 2b10 cmp r3, #16
|
|
8003886: d17c bne.n 8003982 <HCD_HC_IN_IRQHandler+0x862>
|
|
if (hhcd->hc[ch_num].ep_type == EP_TYPE_INTR)
|
|
8003888: 6879 ldr r1, [r7, #4]
|
|
800388a: 68fa ldr r2, [r7, #12]
|
|
800388c: 4613 mov r3, r2
|
|
800388e: 009b lsls r3, r3, #2
|
|
8003890: 4413 add r3, r2
|
|
8003892: 00db lsls r3, r3, #3
|
|
8003894: 440b add r3, r1
|
|
8003896: 333f adds r3, #63 ; 0x3f
|
|
8003898: 781b ldrb r3, [r3, #0]
|
|
800389a: 2b03 cmp r3, #3
|
|
800389c: d122 bne.n 80038e4 <HCD_HC_IN_IRQHandler+0x7c4>
|
|
hhcd->hc[ch_num].ErrCnt = 0U;
|
|
800389e: 6879 ldr r1, [r7, #4]
|
|
80038a0: 68fa ldr r2, [r7, #12]
|
|
80038a2: 4613 mov r3, r2
|
|
80038a4: 009b lsls r3, r3, #2
|
|
80038a6: 4413 add r3, r2
|
|
80038a8: 00db lsls r3, r3, #3
|
|
80038aa: 440b add r3, r1
|
|
80038ac: 3358 adds r3, #88 ; 0x58
|
|
80038ae: 2200 movs r2, #0
|
|
80038b0: 601a str r2, [r3, #0]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
80038b2: 68fb ldr r3, [r7, #12]
|
|
80038b4: 015a lsls r2, r3, #5
|
|
80038b6: 693b ldr r3, [r7, #16]
|
|
80038b8: 4413 add r3, r2
|
|
80038ba: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80038be: 68db ldr r3, [r3, #12]
|
|
80038c0: 68fa ldr r2, [r7, #12]
|
|
80038c2: 0151 lsls r1, r2, #5
|
|
80038c4: 693a ldr r2, [r7, #16]
|
|
80038c6: 440a add r2, r1
|
|
80038c8: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
80038cc: f043 0302 orr.w r3, r3, #2
|
|
80038d0: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
80038d2: 687b ldr r3, [r7, #4]
|
|
80038d4: 681b ldr r3, [r3, #0]
|
|
80038d6: 68fa ldr r2, [r7, #12]
|
|
80038d8: b2d2 uxtb r2, r2
|
|
80038da: 4611 mov r1, r2
|
|
80038dc: 4618 mov r0, r3
|
|
80038de: f004 f95c bl 8007b9a <USB_HC_Halt>
|
|
80038e2: e045 b.n 8003970 <HCD_HC_IN_IRQHandler+0x850>
|
|
else if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
|
|
80038e4: 6879 ldr r1, [r7, #4]
|
|
80038e6: 68fa ldr r2, [r7, #12]
|
|
80038e8: 4613 mov r3, r2
|
|
80038ea: 009b lsls r3, r3, #2
|
|
80038ec: 4413 add r3, r2
|
|
80038ee: 00db lsls r3, r3, #3
|
|
80038f0: 440b add r3, r1
|
|
80038f2: 333f adds r3, #63 ; 0x3f
|
|
80038f4: 781b ldrb r3, [r3, #0]
|
|
80038f6: 2b00 cmp r3, #0
|
|
80038f8: d00a beq.n 8003910 <HCD_HC_IN_IRQHandler+0x7f0>
|
|
(hhcd->hc[ch_num].ep_type == EP_TYPE_BULK))
|
|
80038fa: 6879 ldr r1, [r7, #4]
|
|
80038fc: 68fa ldr r2, [r7, #12]
|
|
80038fe: 4613 mov r3, r2
|
|
8003900: 009b lsls r3, r3, #2
|
|
8003902: 4413 add r3, r2
|
|
8003904: 00db lsls r3, r3, #3
|
|
8003906: 440b add r3, r1
|
|
8003908: 333f adds r3, #63 ; 0x3f
|
|
800390a: 781b ldrb r3, [r3, #0]
|
|
else if ((hhcd->hc[ch_num].ep_type == EP_TYPE_CTRL) ||
|
|
800390c: 2b02 cmp r3, #2
|
|
800390e: d12f bne.n 8003970 <HCD_HC_IN_IRQHandler+0x850>
|
|
hhcd->hc[ch_num].ErrCnt = 0U;
|
|
8003910: 6879 ldr r1, [r7, #4]
|
|
8003912: 68fa ldr r2, [r7, #12]
|
|
8003914: 4613 mov r3, r2
|
|
8003916: 009b lsls r3, r3, #2
|
|
8003918: 4413 add r3, r2
|
|
800391a: 00db lsls r3, r3, #3
|
|
800391c: 440b add r3, r1
|
|
800391e: 3358 adds r3, #88 ; 0x58
|
|
8003920: 2200 movs r2, #0
|
|
8003922: 601a str r2, [r3, #0]
|
|
if (hhcd->Init.dma_enable == 0U)
|
|
8003924: 687b ldr r3, [r7, #4]
|
|
8003926: 691b ldr r3, [r3, #16]
|
|
8003928: 2b00 cmp r3, #0
|
|
800392a: d121 bne.n 8003970 <HCD_HC_IN_IRQHandler+0x850>
|
|
hhcd->hc[ch_num].state = HC_NAK;
|
|
800392c: 6879 ldr r1, [r7, #4]
|
|
800392e: 68fa ldr r2, [r7, #12]
|
|
8003930: 4613 mov r3, r2
|
|
8003932: 009b lsls r3, r3, #2
|
|
8003934: 4413 add r3, r2
|
|
8003936: 00db lsls r3, r3, #3
|
|
8003938: 440b add r3, r1
|
|
800393a: 335d adds r3, #93 ; 0x5d
|
|
800393c: 2203 movs r2, #3
|
|
800393e: 701a strb r2, [r3, #0]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003940: 68fb ldr r3, [r7, #12]
|
|
8003942: 015a lsls r2, r3, #5
|
|
8003944: 693b ldr r3, [r7, #16]
|
|
8003946: 4413 add r3, r2
|
|
8003948: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800394c: 68db ldr r3, [r3, #12]
|
|
800394e: 68fa ldr r2, [r7, #12]
|
|
8003950: 0151 lsls r1, r2, #5
|
|
8003952: 693a ldr r2, [r7, #16]
|
|
8003954: 440a add r2, r1
|
|
8003956: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
800395a: f043 0302 orr.w r3, r3, #2
|
|
800395e: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8003960: 687b ldr r3, [r7, #4]
|
|
8003962: 681b ldr r3, [r3, #0]
|
|
8003964: 68fa ldr r2, [r7, #12]
|
|
8003966: b2d2 uxtb r2, r2
|
|
8003968: 4611 mov r1, r2
|
|
800396a: 4618 mov r0, r3
|
|
800396c: f004 f915 bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
|
|
8003970: 68fb ldr r3, [r7, #12]
|
|
8003972: 015a lsls r2, r3, #5
|
|
8003974: 693b ldr r3, [r7, #16]
|
|
8003976: 4413 add r3, r2
|
|
8003978: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800397c: 461a mov r2, r3
|
|
800397e: 2310 movs r3, #16
|
|
8003980: 6093 str r3, [r2, #8]
|
|
}
|
|
8003982: bf00 nop
|
|
8003984: 3718 adds r7, #24
|
|
8003986: 46bd mov sp, r7
|
|
8003988: bd80 pop {r7, pc}
|
|
|
|
0800398a <HCD_HC_OUT_IRQHandler>:
|
|
* @param chnum Channel number.
|
|
* This parameter can be a value from 1 to 15
|
|
* @retval none
|
|
*/
|
|
static void HCD_HC_OUT_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
|
|
{
|
|
800398a: b580 push {r7, lr}
|
|
800398c: b086 sub sp, #24
|
|
800398e: af00 add r7, sp, #0
|
|
8003990: 6078 str r0, [r7, #4]
|
|
8003992: 460b mov r3, r1
|
|
8003994: 70fb strb r3, [r7, #3]
|
|
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
|
|
8003996: 687b ldr r3, [r7, #4]
|
|
8003998: 681b ldr r3, [r3, #0]
|
|
800399a: 617b str r3, [r7, #20]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
800399c: 697b ldr r3, [r7, #20]
|
|
800399e: 613b str r3, [r7, #16]
|
|
uint32_t ch_num = (uint32_t)chnum;
|
|
80039a0: 78fb ldrb r3, [r7, #3]
|
|
80039a2: 60fb str r3, [r7, #12]
|
|
uint32_t tmpreg;
|
|
|
|
if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_AHBERR) == USB_OTG_HCINT_AHBERR)
|
|
80039a4: 68fb ldr r3, [r7, #12]
|
|
80039a6: 015a lsls r2, r3, #5
|
|
80039a8: 693b ldr r3, [r7, #16]
|
|
80039aa: 4413 add r3, r2
|
|
80039ac: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80039b0: 689b ldr r3, [r3, #8]
|
|
80039b2: f003 0304 and.w r3, r3, #4
|
|
80039b6: 2b04 cmp r3, #4
|
|
80039b8: d119 bne.n 80039ee <HCD_HC_OUT_IRQHandler+0x64>
|
|
{
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_AHBERR);
|
|
80039ba: 68fb ldr r3, [r7, #12]
|
|
80039bc: 015a lsls r2, r3, #5
|
|
80039be: 693b ldr r3, [r7, #16]
|
|
80039c0: 4413 add r3, r2
|
|
80039c2: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80039c6: 461a mov r2, r3
|
|
80039c8: 2304 movs r3, #4
|
|
80039ca: 6093 str r3, [r2, #8]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
80039cc: 68fb ldr r3, [r7, #12]
|
|
80039ce: 015a lsls r2, r3, #5
|
|
80039d0: 693b ldr r3, [r7, #16]
|
|
80039d2: 4413 add r3, r2
|
|
80039d4: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80039d8: 68db ldr r3, [r3, #12]
|
|
80039da: 68fa ldr r2, [r7, #12]
|
|
80039dc: 0151 lsls r1, r2, #5
|
|
80039de: 693a ldr r2, [r7, #16]
|
|
80039e0: 440a add r2, r1
|
|
80039e2: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
80039e6: f043 0302 orr.w r3, r3, #2
|
|
80039ea: 60d3 str r3, [r2, #12]
|
|
}
|
|
else
|
|
{
|
|
/* ... */
|
|
}
|
|
}
|
|
80039ec: e33e b.n 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_ACK) == USB_OTG_HCINT_ACK)
|
|
80039ee: 68fb ldr r3, [r7, #12]
|
|
80039f0: 015a lsls r2, r3, #5
|
|
80039f2: 693b ldr r3, [r7, #16]
|
|
80039f4: 4413 add r3, r2
|
|
80039f6: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80039fa: 689b ldr r3, [r3, #8]
|
|
80039fc: f003 0320 and.w r3, r3, #32
|
|
8003a00: 2b20 cmp r3, #32
|
|
8003a02: d141 bne.n 8003a88 <HCD_HC_OUT_IRQHandler+0xfe>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_ACK);
|
|
8003a04: 68fb ldr r3, [r7, #12]
|
|
8003a06: 015a lsls r2, r3, #5
|
|
8003a08: 693b ldr r3, [r7, #16]
|
|
8003a0a: 4413 add r3, r2
|
|
8003a0c: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003a10: 461a mov r2, r3
|
|
8003a12: 2320 movs r3, #32
|
|
8003a14: 6093 str r3, [r2, #8]
|
|
if (hhcd->hc[ch_num].do_ping == 1U)
|
|
8003a16: 6879 ldr r1, [r7, #4]
|
|
8003a18: 68fa ldr r2, [r7, #12]
|
|
8003a1a: 4613 mov r3, r2
|
|
8003a1c: 009b lsls r3, r3, #2
|
|
8003a1e: 4413 add r3, r2
|
|
8003a20: 00db lsls r3, r3, #3
|
|
8003a22: 440b add r3, r1
|
|
8003a24: 333d adds r3, #61 ; 0x3d
|
|
8003a26: 781b ldrb r3, [r3, #0]
|
|
8003a28: 2b01 cmp r3, #1
|
|
8003a2a: f040 831f bne.w 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
hhcd->hc[ch_num].do_ping = 0U;
|
|
8003a2e: 6879 ldr r1, [r7, #4]
|
|
8003a30: 68fa ldr r2, [r7, #12]
|
|
8003a32: 4613 mov r3, r2
|
|
8003a34: 009b lsls r3, r3, #2
|
|
8003a36: 4413 add r3, r2
|
|
8003a38: 00db lsls r3, r3, #3
|
|
8003a3a: 440b add r3, r1
|
|
8003a3c: 333d adds r3, #61 ; 0x3d
|
|
8003a3e: 2200 movs r2, #0
|
|
8003a40: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
|
|
8003a42: 6879 ldr r1, [r7, #4]
|
|
8003a44: 68fa ldr r2, [r7, #12]
|
|
8003a46: 4613 mov r3, r2
|
|
8003a48: 009b lsls r3, r3, #2
|
|
8003a4a: 4413 add r3, r2
|
|
8003a4c: 00db lsls r3, r3, #3
|
|
8003a4e: 440b add r3, r1
|
|
8003a50: 335c adds r3, #92 ; 0x5c
|
|
8003a52: 2202 movs r2, #2
|
|
8003a54: 701a strb r2, [r3, #0]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003a56: 68fb ldr r3, [r7, #12]
|
|
8003a58: 015a lsls r2, r3, #5
|
|
8003a5a: 693b ldr r3, [r7, #16]
|
|
8003a5c: 4413 add r3, r2
|
|
8003a5e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003a62: 68db ldr r3, [r3, #12]
|
|
8003a64: 68fa ldr r2, [r7, #12]
|
|
8003a66: 0151 lsls r1, r2, #5
|
|
8003a68: 693a ldr r2, [r7, #16]
|
|
8003a6a: 440a add r2, r1
|
|
8003a6c: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003a70: f043 0302 orr.w r3, r3, #2
|
|
8003a74: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8003a76: 687b ldr r3, [r7, #4]
|
|
8003a78: 681b ldr r3, [r3, #0]
|
|
8003a7a: 68fa ldr r2, [r7, #12]
|
|
8003a7c: b2d2 uxtb r2, r2
|
|
8003a7e: 4611 mov r1, r2
|
|
8003a80: 4618 mov r0, r3
|
|
8003a82: f004 f88a bl 8007b9a <USB_HC_Halt>
|
|
}
|
|
8003a86: e2f1 b.n 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NYET) == USB_OTG_HCINT_NYET)
|
|
8003a88: 68fb ldr r3, [r7, #12]
|
|
8003a8a: 015a lsls r2, r3, #5
|
|
8003a8c: 693b ldr r3, [r7, #16]
|
|
8003a8e: 4413 add r3, r2
|
|
8003a90: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003a94: 689b ldr r3, [r3, #8]
|
|
8003a96: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8003a9a: 2b40 cmp r3, #64 ; 0x40
|
|
8003a9c: d13f bne.n 8003b1e <HCD_HC_OUT_IRQHandler+0x194>
|
|
hhcd->hc[ch_num].state = HC_NYET;
|
|
8003a9e: 6879 ldr r1, [r7, #4]
|
|
8003aa0: 68fa ldr r2, [r7, #12]
|
|
8003aa2: 4613 mov r3, r2
|
|
8003aa4: 009b lsls r3, r3, #2
|
|
8003aa6: 4413 add r3, r2
|
|
8003aa8: 00db lsls r3, r3, #3
|
|
8003aaa: 440b add r3, r1
|
|
8003aac: 335d adds r3, #93 ; 0x5d
|
|
8003aae: 2204 movs r2, #4
|
|
8003ab0: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].do_ping = 1U;
|
|
8003ab2: 6879 ldr r1, [r7, #4]
|
|
8003ab4: 68fa ldr r2, [r7, #12]
|
|
8003ab6: 4613 mov r3, r2
|
|
8003ab8: 009b lsls r3, r3, #2
|
|
8003aba: 4413 add r3, r2
|
|
8003abc: 00db lsls r3, r3, #3
|
|
8003abe: 440b add r3, r1
|
|
8003ac0: 333d adds r3, #61 ; 0x3d
|
|
8003ac2: 2201 movs r2, #1
|
|
8003ac4: 701a strb r2, [r3, #0]
|
|
hhcd->hc[ch_num].ErrCnt = 0U;
|
|
8003ac6: 6879 ldr r1, [r7, #4]
|
|
8003ac8: 68fa ldr r2, [r7, #12]
|
|
8003aca: 4613 mov r3, r2
|
|
8003acc: 009b lsls r3, r3, #2
|
|
8003ace: 4413 add r3, r2
|
|
8003ad0: 00db lsls r3, r3, #3
|
|
8003ad2: 440b add r3, r1
|
|
8003ad4: 3358 adds r3, #88 ; 0x58
|
|
8003ad6: 2200 movs r2, #0
|
|
8003ad8: 601a str r2, [r3, #0]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003ada: 68fb ldr r3, [r7, #12]
|
|
8003adc: 015a lsls r2, r3, #5
|
|
8003ade: 693b ldr r3, [r7, #16]
|
|
8003ae0: 4413 add r3, r2
|
|
8003ae2: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003ae6: 68db ldr r3, [r3, #12]
|
|
8003ae8: 68fa ldr r2, [r7, #12]
|
|
8003aea: 0151 lsls r1, r2, #5
|
|
8003aec: 693a ldr r2, [r7, #16]
|
|
8003aee: 440a add r2, r1
|
|
8003af0: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003af4: f043 0302 orr.w r3, r3, #2
|
|
8003af8: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8003afa: 687b ldr r3, [r7, #4]
|
|
8003afc: 681b ldr r3, [r3, #0]
|
|
8003afe: 68fa ldr r2, [r7, #12]
|
|
8003b00: b2d2 uxtb r2, r2
|
|
8003b02: 4611 mov r1, r2
|
|
8003b04: 4618 mov r0, r3
|
|
8003b06: f004 f848 bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NYET);
|
|
8003b0a: 68fb ldr r3, [r7, #12]
|
|
8003b0c: 015a lsls r2, r3, #5
|
|
8003b0e: 693b ldr r3, [r7, #16]
|
|
8003b10: 4413 add r3, r2
|
|
8003b12: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003b16: 461a mov r2, r3
|
|
8003b18: 2340 movs r3, #64 ; 0x40
|
|
8003b1a: 6093 str r3, [r2, #8]
|
|
}
|
|
8003b1c: e2a6 b.n 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_FRMOR) == USB_OTG_HCINT_FRMOR)
|
|
8003b1e: 68fb ldr r3, [r7, #12]
|
|
8003b20: 015a lsls r2, r3, #5
|
|
8003b22: 693b ldr r3, [r7, #16]
|
|
8003b24: 4413 add r3, r2
|
|
8003b26: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003b2a: 689b ldr r3, [r3, #8]
|
|
8003b2c: f403 7300 and.w r3, r3, #512 ; 0x200
|
|
8003b30: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8003b34: d122 bne.n 8003b7c <HCD_HC_OUT_IRQHandler+0x1f2>
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003b36: 68fb ldr r3, [r7, #12]
|
|
8003b38: 015a lsls r2, r3, #5
|
|
8003b3a: 693b ldr r3, [r7, #16]
|
|
8003b3c: 4413 add r3, r2
|
|
8003b3e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003b42: 68db ldr r3, [r3, #12]
|
|
8003b44: 68fa ldr r2, [r7, #12]
|
|
8003b46: 0151 lsls r1, r2, #5
|
|
8003b48: 693a ldr r2, [r7, #16]
|
|
8003b4a: 440a add r2, r1
|
|
8003b4c: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003b50: f043 0302 orr.w r3, r3, #2
|
|
8003b54: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8003b56: 687b ldr r3, [r7, #4]
|
|
8003b58: 681b ldr r3, [r3, #0]
|
|
8003b5a: 68fa ldr r2, [r7, #12]
|
|
8003b5c: b2d2 uxtb r2, r2
|
|
8003b5e: 4611 mov r1, r2
|
|
8003b60: 4618 mov r0, r3
|
|
8003b62: f004 f81a bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_FRMOR);
|
|
8003b66: 68fb ldr r3, [r7, #12]
|
|
8003b68: 015a lsls r2, r3, #5
|
|
8003b6a: 693b ldr r3, [r7, #16]
|
|
8003b6c: 4413 add r3, r2
|
|
8003b6e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003b72: 461a mov r2, r3
|
|
8003b74: f44f 7300 mov.w r3, #512 ; 0x200
|
|
8003b78: 6093 str r3, [r2, #8]
|
|
}
|
|
8003b7a: e277 b.n 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_XFRC) == USB_OTG_HCINT_XFRC)
|
|
8003b7c: 68fb ldr r3, [r7, #12]
|
|
8003b7e: 015a lsls r2, r3, #5
|
|
8003b80: 693b ldr r3, [r7, #16]
|
|
8003b82: 4413 add r3, r2
|
|
8003b84: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003b88: 689b ldr r3, [r3, #8]
|
|
8003b8a: f003 0301 and.w r3, r3, #1
|
|
8003b8e: 2b01 cmp r3, #1
|
|
8003b90: d135 bne.n 8003bfe <HCD_HC_OUT_IRQHandler+0x274>
|
|
hhcd->hc[ch_num].ErrCnt = 0U;
|
|
8003b92: 6879 ldr r1, [r7, #4]
|
|
8003b94: 68fa ldr r2, [r7, #12]
|
|
8003b96: 4613 mov r3, r2
|
|
8003b98: 009b lsls r3, r3, #2
|
|
8003b9a: 4413 add r3, r2
|
|
8003b9c: 00db lsls r3, r3, #3
|
|
8003b9e: 440b add r3, r1
|
|
8003ba0: 3358 adds r3, #88 ; 0x58
|
|
8003ba2: 2200 movs r2, #0
|
|
8003ba4: 601a str r2, [r3, #0]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003ba6: 68fb ldr r3, [r7, #12]
|
|
8003ba8: 015a lsls r2, r3, #5
|
|
8003baa: 693b ldr r3, [r7, #16]
|
|
8003bac: 4413 add r3, r2
|
|
8003bae: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003bb2: 68db ldr r3, [r3, #12]
|
|
8003bb4: 68fa ldr r2, [r7, #12]
|
|
8003bb6: 0151 lsls r1, r2, #5
|
|
8003bb8: 693a ldr r2, [r7, #16]
|
|
8003bba: 440a add r2, r1
|
|
8003bbc: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003bc0: f043 0302 orr.w r3, r3, #2
|
|
8003bc4: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8003bc6: 687b ldr r3, [r7, #4]
|
|
8003bc8: 681b ldr r3, [r3, #0]
|
|
8003bca: 68fa ldr r2, [r7, #12]
|
|
8003bcc: b2d2 uxtb r2, r2
|
|
8003bce: 4611 mov r1, r2
|
|
8003bd0: 4618 mov r0, r3
|
|
8003bd2: f003 ffe2 bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_XFRC);
|
|
8003bd6: 68fb ldr r3, [r7, #12]
|
|
8003bd8: 015a lsls r2, r3, #5
|
|
8003bda: 693b ldr r3, [r7, #16]
|
|
8003bdc: 4413 add r3, r2
|
|
8003bde: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003be2: 461a mov r2, r3
|
|
8003be4: 2301 movs r3, #1
|
|
8003be6: 6093 str r3, [r2, #8]
|
|
hhcd->hc[ch_num].state = HC_XFRC;
|
|
8003be8: 6879 ldr r1, [r7, #4]
|
|
8003bea: 68fa ldr r2, [r7, #12]
|
|
8003bec: 4613 mov r3, r2
|
|
8003bee: 009b lsls r3, r3, #2
|
|
8003bf0: 4413 add r3, r2
|
|
8003bf2: 00db lsls r3, r3, #3
|
|
8003bf4: 440b add r3, r1
|
|
8003bf6: 335d adds r3, #93 ; 0x5d
|
|
8003bf8: 2201 movs r2, #1
|
|
8003bfa: 701a strb r2, [r3, #0]
|
|
}
|
|
8003bfc: e236 b.n 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_STALL) == USB_OTG_HCINT_STALL)
|
|
8003bfe: 68fb ldr r3, [r7, #12]
|
|
8003c00: 015a lsls r2, r3, #5
|
|
8003c02: 693b ldr r3, [r7, #16]
|
|
8003c04: 4413 add r3, r2
|
|
8003c06: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003c0a: 689b ldr r3, [r3, #8]
|
|
8003c0c: f003 0308 and.w r3, r3, #8
|
|
8003c10: 2b08 cmp r3, #8
|
|
8003c12: d12b bne.n 8003c6c <HCD_HC_OUT_IRQHandler+0x2e2>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_STALL);
|
|
8003c14: 68fb ldr r3, [r7, #12]
|
|
8003c16: 015a lsls r2, r3, #5
|
|
8003c18: 693b ldr r3, [r7, #16]
|
|
8003c1a: 4413 add r3, r2
|
|
8003c1c: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003c20: 461a mov r2, r3
|
|
8003c22: 2308 movs r3, #8
|
|
8003c24: 6093 str r3, [r2, #8]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003c26: 68fb ldr r3, [r7, #12]
|
|
8003c28: 015a lsls r2, r3, #5
|
|
8003c2a: 693b ldr r3, [r7, #16]
|
|
8003c2c: 4413 add r3, r2
|
|
8003c2e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003c32: 68db ldr r3, [r3, #12]
|
|
8003c34: 68fa ldr r2, [r7, #12]
|
|
8003c36: 0151 lsls r1, r2, #5
|
|
8003c38: 693a ldr r2, [r7, #16]
|
|
8003c3a: 440a add r2, r1
|
|
8003c3c: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003c40: f043 0302 orr.w r3, r3, #2
|
|
8003c44: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8003c46: 687b ldr r3, [r7, #4]
|
|
8003c48: 681b ldr r3, [r3, #0]
|
|
8003c4a: 68fa ldr r2, [r7, #12]
|
|
8003c4c: b2d2 uxtb r2, r2
|
|
8003c4e: 4611 mov r1, r2
|
|
8003c50: 4618 mov r0, r3
|
|
8003c52: f003 ffa2 bl 8007b9a <USB_HC_Halt>
|
|
hhcd->hc[ch_num].state = HC_STALL;
|
|
8003c56: 6879 ldr r1, [r7, #4]
|
|
8003c58: 68fa ldr r2, [r7, #12]
|
|
8003c5a: 4613 mov r3, r2
|
|
8003c5c: 009b lsls r3, r3, #2
|
|
8003c5e: 4413 add r3, r2
|
|
8003c60: 00db lsls r3, r3, #3
|
|
8003c62: 440b add r3, r1
|
|
8003c64: 335d adds r3, #93 ; 0x5d
|
|
8003c66: 2205 movs r2, #5
|
|
8003c68: 701a strb r2, [r3, #0]
|
|
}
|
|
8003c6a: e1ff b.n 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_NAK) == USB_OTG_HCINT_NAK)
|
|
8003c6c: 68fb ldr r3, [r7, #12]
|
|
8003c6e: 015a lsls r2, r3, #5
|
|
8003c70: 693b ldr r3, [r7, #16]
|
|
8003c72: 4413 add r3, r2
|
|
8003c74: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003c78: 689b ldr r3, [r3, #8]
|
|
8003c7a: f003 0310 and.w r3, r3, #16
|
|
8003c7e: 2b10 cmp r3, #16
|
|
8003c80: d155 bne.n 8003d2e <HCD_HC_OUT_IRQHandler+0x3a4>
|
|
hhcd->hc[ch_num].ErrCnt = 0U;
|
|
8003c82: 6879 ldr r1, [r7, #4]
|
|
8003c84: 68fa ldr r2, [r7, #12]
|
|
8003c86: 4613 mov r3, r2
|
|
8003c88: 009b lsls r3, r3, #2
|
|
8003c8a: 4413 add r3, r2
|
|
8003c8c: 00db lsls r3, r3, #3
|
|
8003c8e: 440b add r3, r1
|
|
8003c90: 3358 adds r3, #88 ; 0x58
|
|
8003c92: 2200 movs r2, #0
|
|
8003c94: 601a str r2, [r3, #0]
|
|
hhcd->hc[ch_num].state = HC_NAK;
|
|
8003c96: 6879 ldr r1, [r7, #4]
|
|
8003c98: 68fa ldr r2, [r7, #12]
|
|
8003c9a: 4613 mov r3, r2
|
|
8003c9c: 009b lsls r3, r3, #2
|
|
8003c9e: 4413 add r3, r2
|
|
8003ca0: 00db lsls r3, r3, #3
|
|
8003ca2: 440b add r3, r1
|
|
8003ca4: 335d adds r3, #93 ; 0x5d
|
|
8003ca6: 2203 movs r2, #3
|
|
8003ca8: 701a strb r2, [r3, #0]
|
|
if (hhcd->hc[ch_num].do_ping == 0U)
|
|
8003caa: 6879 ldr r1, [r7, #4]
|
|
8003cac: 68fa ldr r2, [r7, #12]
|
|
8003cae: 4613 mov r3, r2
|
|
8003cb0: 009b lsls r3, r3, #2
|
|
8003cb2: 4413 add r3, r2
|
|
8003cb4: 00db lsls r3, r3, #3
|
|
8003cb6: 440b add r3, r1
|
|
8003cb8: 333d adds r3, #61 ; 0x3d
|
|
8003cba: 781b ldrb r3, [r3, #0]
|
|
8003cbc: 2b00 cmp r3, #0
|
|
8003cbe: d114 bne.n 8003cea <HCD_HC_OUT_IRQHandler+0x360>
|
|
if (hhcd->hc[ch_num].speed == HCD_SPEED_HIGH)
|
|
8003cc0: 6879 ldr r1, [r7, #4]
|
|
8003cc2: 68fa ldr r2, [r7, #12]
|
|
8003cc4: 4613 mov r3, r2
|
|
8003cc6: 009b lsls r3, r3, #2
|
|
8003cc8: 4413 add r3, r2
|
|
8003cca: 00db lsls r3, r3, #3
|
|
8003ccc: 440b add r3, r1
|
|
8003cce: 333c adds r3, #60 ; 0x3c
|
|
8003cd0: 781b ldrb r3, [r3, #0]
|
|
8003cd2: 2b00 cmp r3, #0
|
|
8003cd4: d109 bne.n 8003cea <HCD_HC_OUT_IRQHandler+0x360>
|
|
hhcd->hc[ch_num].do_ping = 1U;
|
|
8003cd6: 6879 ldr r1, [r7, #4]
|
|
8003cd8: 68fa ldr r2, [r7, #12]
|
|
8003cda: 4613 mov r3, r2
|
|
8003cdc: 009b lsls r3, r3, #2
|
|
8003cde: 4413 add r3, r2
|
|
8003ce0: 00db lsls r3, r3, #3
|
|
8003ce2: 440b add r3, r1
|
|
8003ce4: 333d adds r3, #61 ; 0x3d
|
|
8003ce6: 2201 movs r2, #1
|
|
8003ce8: 701a strb r2, [r3, #0]
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003cea: 68fb ldr r3, [r7, #12]
|
|
8003cec: 015a lsls r2, r3, #5
|
|
8003cee: 693b ldr r3, [r7, #16]
|
|
8003cf0: 4413 add r3, r2
|
|
8003cf2: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003cf6: 68db ldr r3, [r3, #12]
|
|
8003cf8: 68fa ldr r2, [r7, #12]
|
|
8003cfa: 0151 lsls r1, r2, #5
|
|
8003cfc: 693a ldr r2, [r7, #16]
|
|
8003cfe: 440a add r2, r1
|
|
8003d00: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003d04: f043 0302 orr.w r3, r3, #2
|
|
8003d08: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8003d0a: 687b ldr r3, [r7, #4]
|
|
8003d0c: 681b ldr r3, [r3, #0]
|
|
8003d0e: 68fa ldr r2, [r7, #12]
|
|
8003d10: b2d2 uxtb r2, r2
|
|
8003d12: 4611 mov r1, r2
|
|
8003d14: 4618 mov r0, r3
|
|
8003d16: f003 ff40 bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
|
|
8003d1a: 68fb ldr r3, [r7, #12]
|
|
8003d1c: 015a lsls r2, r3, #5
|
|
8003d1e: 693b ldr r3, [r7, #16]
|
|
8003d20: 4413 add r3, r2
|
|
8003d22: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003d26: 461a mov r2, r3
|
|
8003d28: 2310 movs r3, #16
|
|
8003d2a: 6093 str r3, [r2, #8]
|
|
}
|
|
8003d2c: e19e b.n 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_TXERR) == USB_OTG_HCINT_TXERR)
|
|
8003d2e: 68fb ldr r3, [r7, #12]
|
|
8003d30: 015a lsls r2, r3, #5
|
|
8003d32: 693b ldr r3, [r7, #16]
|
|
8003d34: 4413 add r3, r2
|
|
8003d36: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003d3a: 689b ldr r3, [r3, #8]
|
|
8003d3c: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
8003d40: 2b80 cmp r3, #128 ; 0x80
|
|
8003d42: d12b bne.n 8003d9c <HCD_HC_OUT_IRQHandler+0x412>
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003d44: 68fb ldr r3, [r7, #12]
|
|
8003d46: 015a lsls r2, r3, #5
|
|
8003d48: 693b ldr r3, [r7, #16]
|
|
8003d4a: 4413 add r3, r2
|
|
8003d4c: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003d50: 68db ldr r3, [r3, #12]
|
|
8003d52: 68fa ldr r2, [r7, #12]
|
|
8003d54: 0151 lsls r1, r2, #5
|
|
8003d56: 693a ldr r2, [r7, #16]
|
|
8003d58: 440a add r2, r1
|
|
8003d5a: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003d5e: f043 0302 orr.w r3, r3, #2
|
|
8003d62: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8003d64: 687b ldr r3, [r7, #4]
|
|
8003d66: 681b ldr r3, [r3, #0]
|
|
8003d68: 68fa ldr r2, [r7, #12]
|
|
8003d6a: b2d2 uxtb r2, r2
|
|
8003d6c: 4611 mov r1, r2
|
|
8003d6e: 4618 mov r0, r3
|
|
8003d70: f003 ff13 bl 8007b9a <USB_HC_Halt>
|
|
hhcd->hc[ch_num].state = HC_XACTERR;
|
|
8003d74: 6879 ldr r1, [r7, #4]
|
|
8003d76: 68fa ldr r2, [r7, #12]
|
|
8003d78: 4613 mov r3, r2
|
|
8003d7a: 009b lsls r3, r3, #2
|
|
8003d7c: 4413 add r3, r2
|
|
8003d7e: 00db lsls r3, r3, #3
|
|
8003d80: 440b add r3, r1
|
|
8003d82: 335d adds r3, #93 ; 0x5d
|
|
8003d84: 2206 movs r2, #6
|
|
8003d86: 701a strb r2, [r3, #0]
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_TXERR);
|
|
8003d88: 68fb ldr r3, [r7, #12]
|
|
8003d8a: 015a lsls r2, r3, #5
|
|
8003d8c: 693b ldr r3, [r7, #16]
|
|
8003d8e: 4413 add r3, r2
|
|
8003d90: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003d94: 461a mov r2, r3
|
|
8003d96: 2380 movs r3, #128 ; 0x80
|
|
8003d98: 6093 str r3, [r2, #8]
|
|
}
|
|
8003d9a: e167 b.n 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_DTERR) == USB_OTG_HCINT_DTERR)
|
|
8003d9c: 68fb ldr r3, [r7, #12]
|
|
8003d9e: 015a lsls r2, r3, #5
|
|
8003da0: 693b ldr r3, [r7, #16]
|
|
8003da2: 4413 add r3, r2
|
|
8003da4: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003da8: 689b ldr r3, [r3, #8]
|
|
8003daa: f403 6380 and.w r3, r3, #1024 ; 0x400
|
|
8003dae: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
|
8003db2: d135 bne.n 8003e20 <HCD_HC_OUT_IRQHandler+0x496>
|
|
__HAL_HCD_UNMASK_HALT_HC_INT(ch_num);
|
|
8003db4: 68fb ldr r3, [r7, #12]
|
|
8003db6: 015a lsls r2, r3, #5
|
|
8003db8: 693b ldr r3, [r7, #16]
|
|
8003dba: 4413 add r3, r2
|
|
8003dbc: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003dc0: 68db ldr r3, [r3, #12]
|
|
8003dc2: 68fa ldr r2, [r7, #12]
|
|
8003dc4: 0151 lsls r1, r2, #5
|
|
8003dc6: 693a ldr r2, [r7, #16]
|
|
8003dc8: 440a add r2, r1
|
|
8003dca: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003dce: f043 0302 orr.w r3, r3, #2
|
|
8003dd2: 60d3 str r3, [r2, #12]
|
|
(void)USB_HC_Halt(hhcd->Instance, (uint8_t)ch_num);
|
|
8003dd4: 687b ldr r3, [r7, #4]
|
|
8003dd6: 681b ldr r3, [r3, #0]
|
|
8003dd8: 68fa ldr r2, [r7, #12]
|
|
8003dda: b2d2 uxtb r2, r2
|
|
8003ddc: 4611 mov r1, r2
|
|
8003dde: 4618 mov r0, r3
|
|
8003de0: f003 fedb bl 8007b9a <USB_HC_Halt>
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_NAK);
|
|
8003de4: 68fb ldr r3, [r7, #12]
|
|
8003de6: 015a lsls r2, r3, #5
|
|
8003de8: 693b ldr r3, [r7, #16]
|
|
8003dea: 4413 add r3, r2
|
|
8003dec: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003df0: 461a mov r2, r3
|
|
8003df2: 2310 movs r3, #16
|
|
8003df4: 6093 str r3, [r2, #8]
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_DTERR);
|
|
8003df6: 68fb ldr r3, [r7, #12]
|
|
8003df8: 015a lsls r2, r3, #5
|
|
8003dfa: 693b ldr r3, [r7, #16]
|
|
8003dfc: 4413 add r3, r2
|
|
8003dfe: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003e02: 461a mov r2, r3
|
|
8003e04: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
8003e08: 6093 str r3, [r2, #8]
|
|
hhcd->hc[ch_num].state = HC_DATATGLERR;
|
|
8003e0a: 6879 ldr r1, [r7, #4]
|
|
8003e0c: 68fa ldr r2, [r7, #12]
|
|
8003e0e: 4613 mov r3, r2
|
|
8003e10: 009b lsls r3, r3, #2
|
|
8003e12: 4413 add r3, r2
|
|
8003e14: 00db lsls r3, r3, #3
|
|
8003e16: 440b add r3, r1
|
|
8003e18: 335d adds r3, #93 ; 0x5d
|
|
8003e1a: 2208 movs r2, #8
|
|
8003e1c: 701a strb r2, [r3, #0]
|
|
}
|
|
8003e1e: e125 b.n 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
else if ((USBx_HC(ch_num)->HCINT & USB_OTG_HCINT_CHH) == USB_OTG_HCINT_CHH)
|
|
8003e20: 68fb ldr r3, [r7, #12]
|
|
8003e22: 015a lsls r2, r3, #5
|
|
8003e24: 693b ldr r3, [r7, #16]
|
|
8003e26: 4413 add r3, r2
|
|
8003e28: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003e2c: 689b ldr r3, [r3, #8]
|
|
8003e2e: f003 0302 and.w r3, r3, #2
|
|
8003e32: 2b02 cmp r3, #2
|
|
8003e34: f040 811a bne.w 800406c <HCD_HC_OUT_IRQHandler+0x6e2>
|
|
__HAL_HCD_MASK_HALT_HC_INT(ch_num);
|
|
8003e38: 68fb ldr r3, [r7, #12]
|
|
8003e3a: 015a lsls r2, r3, #5
|
|
8003e3c: 693b ldr r3, [r7, #16]
|
|
8003e3e: 4413 add r3, r2
|
|
8003e40: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8003e44: 68db ldr r3, [r3, #12]
|
|
8003e46: 68fa ldr r2, [r7, #12]
|
|
8003e48: 0151 lsls r1, r2, #5
|
|
8003e4a: 693a ldr r2, [r7, #16]
|
|
8003e4c: 440a add r2, r1
|
|
8003e4e: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8003e52: f023 0302 bic.w r3, r3, #2
|
|
8003e56: 60d3 str r3, [r2, #12]
|
|
if (hhcd->hc[ch_num].state == HC_XFRC)
|
|
8003e58: 6879 ldr r1, [r7, #4]
|
|
8003e5a: 68fa ldr r2, [r7, #12]
|
|
8003e5c: 4613 mov r3, r2
|
|
8003e5e: 009b lsls r3, r3, #2
|
|
8003e60: 4413 add r3, r2
|
|
8003e62: 00db lsls r3, r3, #3
|
|
8003e64: 440b add r3, r1
|
|
8003e66: 335d adds r3, #93 ; 0x5d
|
|
8003e68: 781b ldrb r3, [r3, #0]
|
|
8003e6a: 2b01 cmp r3, #1
|
|
8003e6c: d137 bne.n 8003ede <HCD_HC_OUT_IRQHandler+0x554>
|
|
hhcd->hc[ch_num].urb_state = URB_DONE;
|
|
8003e6e: 6879 ldr r1, [r7, #4]
|
|
8003e70: 68fa ldr r2, [r7, #12]
|
|
8003e72: 4613 mov r3, r2
|
|
8003e74: 009b lsls r3, r3, #2
|
|
8003e76: 4413 add r3, r2
|
|
8003e78: 00db lsls r3, r3, #3
|
|
8003e7a: 440b add r3, r1
|
|
8003e7c: 335c adds r3, #92 ; 0x5c
|
|
8003e7e: 2201 movs r2, #1
|
|
8003e80: 701a strb r2, [r3, #0]
|
|
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_BULK) ||
|
|
8003e82: 6879 ldr r1, [r7, #4]
|
|
8003e84: 68fa ldr r2, [r7, #12]
|
|
8003e86: 4613 mov r3, r2
|
|
8003e88: 009b lsls r3, r3, #2
|
|
8003e8a: 4413 add r3, r2
|
|
8003e8c: 00db lsls r3, r3, #3
|
|
8003e8e: 440b add r3, r1
|
|
8003e90: 333f adds r3, #63 ; 0x3f
|
|
8003e92: 781b ldrb r3, [r3, #0]
|
|
8003e94: 2b02 cmp r3, #2
|
|
8003e96: d00b beq.n 8003eb0 <HCD_HC_OUT_IRQHandler+0x526>
|
|
(hhcd->hc[ch_num].ep_type == EP_TYPE_INTR))
|
|
8003e98: 6879 ldr r1, [r7, #4]
|
|
8003e9a: 68fa ldr r2, [r7, #12]
|
|
8003e9c: 4613 mov r3, r2
|
|
8003e9e: 009b lsls r3, r3, #2
|
|
8003ea0: 4413 add r3, r2
|
|
8003ea2: 00db lsls r3, r3, #3
|
|
8003ea4: 440b add r3, r1
|
|
8003ea6: 333f adds r3, #63 ; 0x3f
|
|
8003ea8: 781b ldrb r3, [r3, #0]
|
|
if ((hhcd->hc[ch_num].ep_type == EP_TYPE_BULK) ||
|
|
8003eaa: 2b03 cmp r3, #3
|
|
8003eac: f040 80c5 bne.w 800403a <HCD_HC_OUT_IRQHandler+0x6b0>
|
|
hhcd->hc[ch_num].toggle_out ^= 1U;
|
|
8003eb0: 6879 ldr r1, [r7, #4]
|
|
8003eb2: 68fa ldr r2, [r7, #12]
|
|
8003eb4: 4613 mov r3, r2
|
|
8003eb6: 009b lsls r3, r3, #2
|
|
8003eb8: 4413 add r3, r2
|
|
8003eba: 00db lsls r3, r3, #3
|
|
8003ebc: 440b add r3, r1
|
|
8003ebe: 3351 adds r3, #81 ; 0x51
|
|
8003ec0: 781b ldrb r3, [r3, #0]
|
|
8003ec2: f083 0301 eor.w r3, r3, #1
|
|
8003ec6: b2d8 uxtb r0, r3
|
|
8003ec8: 6879 ldr r1, [r7, #4]
|
|
8003eca: 68fa ldr r2, [r7, #12]
|
|
8003ecc: 4613 mov r3, r2
|
|
8003ece: 009b lsls r3, r3, #2
|
|
8003ed0: 4413 add r3, r2
|
|
8003ed2: 00db lsls r3, r3, #3
|
|
8003ed4: 440b add r3, r1
|
|
8003ed6: 3351 adds r3, #81 ; 0x51
|
|
8003ed8: 4602 mov r2, r0
|
|
8003eda: 701a strb r2, [r3, #0]
|
|
8003edc: e0ad b.n 800403a <HCD_HC_OUT_IRQHandler+0x6b0>
|
|
else if (hhcd->hc[ch_num].state == HC_NAK)
|
|
8003ede: 6879 ldr r1, [r7, #4]
|
|
8003ee0: 68fa ldr r2, [r7, #12]
|
|
8003ee2: 4613 mov r3, r2
|
|
8003ee4: 009b lsls r3, r3, #2
|
|
8003ee6: 4413 add r3, r2
|
|
8003ee8: 00db lsls r3, r3, #3
|
|
8003eea: 440b add r3, r1
|
|
8003eec: 335d adds r3, #93 ; 0x5d
|
|
8003eee: 781b ldrb r3, [r3, #0]
|
|
8003ef0: 2b03 cmp r3, #3
|
|
8003ef2: d10a bne.n 8003f0a <HCD_HC_OUT_IRQHandler+0x580>
|
|
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
|
|
8003ef4: 6879 ldr r1, [r7, #4]
|
|
8003ef6: 68fa ldr r2, [r7, #12]
|
|
8003ef8: 4613 mov r3, r2
|
|
8003efa: 009b lsls r3, r3, #2
|
|
8003efc: 4413 add r3, r2
|
|
8003efe: 00db lsls r3, r3, #3
|
|
8003f00: 440b add r3, r1
|
|
8003f02: 335c adds r3, #92 ; 0x5c
|
|
8003f04: 2202 movs r2, #2
|
|
8003f06: 701a strb r2, [r3, #0]
|
|
8003f08: e097 b.n 800403a <HCD_HC_OUT_IRQHandler+0x6b0>
|
|
else if (hhcd->hc[ch_num].state == HC_NYET)
|
|
8003f0a: 6879 ldr r1, [r7, #4]
|
|
8003f0c: 68fa ldr r2, [r7, #12]
|
|
8003f0e: 4613 mov r3, r2
|
|
8003f10: 009b lsls r3, r3, #2
|
|
8003f12: 4413 add r3, r2
|
|
8003f14: 00db lsls r3, r3, #3
|
|
8003f16: 440b add r3, r1
|
|
8003f18: 335d adds r3, #93 ; 0x5d
|
|
8003f1a: 781b ldrb r3, [r3, #0]
|
|
8003f1c: 2b04 cmp r3, #4
|
|
8003f1e: d10a bne.n 8003f36 <HCD_HC_OUT_IRQHandler+0x5ac>
|
|
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
|
|
8003f20: 6879 ldr r1, [r7, #4]
|
|
8003f22: 68fa ldr r2, [r7, #12]
|
|
8003f24: 4613 mov r3, r2
|
|
8003f26: 009b lsls r3, r3, #2
|
|
8003f28: 4413 add r3, r2
|
|
8003f2a: 00db lsls r3, r3, #3
|
|
8003f2c: 440b add r3, r1
|
|
8003f2e: 335c adds r3, #92 ; 0x5c
|
|
8003f30: 2202 movs r2, #2
|
|
8003f32: 701a strb r2, [r3, #0]
|
|
8003f34: e081 b.n 800403a <HCD_HC_OUT_IRQHandler+0x6b0>
|
|
else if (hhcd->hc[ch_num].state == HC_STALL)
|
|
8003f36: 6879 ldr r1, [r7, #4]
|
|
8003f38: 68fa ldr r2, [r7, #12]
|
|
8003f3a: 4613 mov r3, r2
|
|
8003f3c: 009b lsls r3, r3, #2
|
|
8003f3e: 4413 add r3, r2
|
|
8003f40: 00db lsls r3, r3, #3
|
|
8003f42: 440b add r3, r1
|
|
8003f44: 335d adds r3, #93 ; 0x5d
|
|
8003f46: 781b ldrb r3, [r3, #0]
|
|
8003f48: 2b05 cmp r3, #5
|
|
8003f4a: d10a bne.n 8003f62 <HCD_HC_OUT_IRQHandler+0x5d8>
|
|
hhcd->hc[ch_num].urb_state = URB_STALL;
|
|
8003f4c: 6879 ldr r1, [r7, #4]
|
|
8003f4e: 68fa ldr r2, [r7, #12]
|
|
8003f50: 4613 mov r3, r2
|
|
8003f52: 009b lsls r3, r3, #2
|
|
8003f54: 4413 add r3, r2
|
|
8003f56: 00db lsls r3, r3, #3
|
|
8003f58: 440b add r3, r1
|
|
8003f5a: 335c adds r3, #92 ; 0x5c
|
|
8003f5c: 2205 movs r2, #5
|
|
8003f5e: 701a strb r2, [r3, #0]
|
|
8003f60: e06b b.n 800403a <HCD_HC_OUT_IRQHandler+0x6b0>
|
|
else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
|
|
8003f62: 6879 ldr r1, [r7, #4]
|
|
8003f64: 68fa ldr r2, [r7, #12]
|
|
8003f66: 4613 mov r3, r2
|
|
8003f68: 009b lsls r3, r3, #2
|
|
8003f6a: 4413 add r3, r2
|
|
8003f6c: 00db lsls r3, r3, #3
|
|
8003f6e: 440b add r3, r1
|
|
8003f70: 335d adds r3, #93 ; 0x5d
|
|
8003f72: 781b ldrb r3, [r3, #0]
|
|
8003f74: 2b06 cmp r3, #6
|
|
8003f76: d00a beq.n 8003f8e <HCD_HC_OUT_IRQHandler+0x604>
|
|
(hhcd->hc[ch_num].state == HC_DATATGLERR))
|
|
8003f78: 6879 ldr r1, [r7, #4]
|
|
8003f7a: 68fa ldr r2, [r7, #12]
|
|
8003f7c: 4613 mov r3, r2
|
|
8003f7e: 009b lsls r3, r3, #2
|
|
8003f80: 4413 add r3, r2
|
|
8003f82: 00db lsls r3, r3, #3
|
|
8003f84: 440b add r3, r1
|
|
8003f86: 335d adds r3, #93 ; 0x5d
|
|
8003f88: 781b ldrb r3, [r3, #0]
|
|
else if ((hhcd->hc[ch_num].state == HC_XACTERR) ||
|
|
8003f8a: 2b08 cmp r3, #8
|
|
8003f8c: d155 bne.n 800403a <HCD_HC_OUT_IRQHandler+0x6b0>
|
|
hhcd->hc[ch_num].ErrCnt++;
|
|
8003f8e: 6879 ldr r1, [r7, #4]
|
|
8003f90: 68fa ldr r2, [r7, #12]
|
|
8003f92: 4613 mov r3, r2
|
|
8003f94: 009b lsls r3, r3, #2
|
|
8003f96: 4413 add r3, r2
|
|
8003f98: 00db lsls r3, r3, #3
|
|
8003f9a: 440b add r3, r1
|
|
8003f9c: 3358 adds r3, #88 ; 0x58
|
|
8003f9e: 681b ldr r3, [r3, #0]
|
|
8003fa0: 1c59 adds r1, r3, #1
|
|
8003fa2: 6878 ldr r0, [r7, #4]
|
|
8003fa4: 68fa ldr r2, [r7, #12]
|
|
8003fa6: 4613 mov r3, r2
|
|
8003fa8: 009b lsls r3, r3, #2
|
|
8003faa: 4413 add r3, r2
|
|
8003fac: 00db lsls r3, r3, #3
|
|
8003fae: 4403 add r3, r0
|
|
8003fb0: 3358 adds r3, #88 ; 0x58
|
|
8003fb2: 6019 str r1, [r3, #0]
|
|
if (hhcd->hc[ch_num].ErrCnt > 3U)
|
|
8003fb4: 6879 ldr r1, [r7, #4]
|
|
8003fb6: 68fa ldr r2, [r7, #12]
|
|
8003fb8: 4613 mov r3, r2
|
|
8003fba: 009b lsls r3, r3, #2
|
|
8003fbc: 4413 add r3, r2
|
|
8003fbe: 00db lsls r3, r3, #3
|
|
8003fc0: 440b add r3, r1
|
|
8003fc2: 3358 adds r3, #88 ; 0x58
|
|
8003fc4: 681b ldr r3, [r3, #0]
|
|
8003fc6: 2b03 cmp r3, #3
|
|
8003fc8: d914 bls.n 8003ff4 <HCD_HC_OUT_IRQHandler+0x66a>
|
|
hhcd->hc[ch_num].ErrCnt = 0U;
|
|
8003fca: 6879 ldr r1, [r7, #4]
|
|
8003fcc: 68fa ldr r2, [r7, #12]
|
|
8003fce: 4613 mov r3, r2
|
|
8003fd0: 009b lsls r3, r3, #2
|
|
8003fd2: 4413 add r3, r2
|
|
8003fd4: 00db lsls r3, r3, #3
|
|
8003fd6: 440b add r3, r1
|
|
8003fd8: 3358 adds r3, #88 ; 0x58
|
|
8003fda: 2200 movs r2, #0
|
|
8003fdc: 601a str r2, [r3, #0]
|
|
hhcd->hc[ch_num].urb_state = URB_ERROR;
|
|
8003fde: 6879 ldr r1, [r7, #4]
|
|
8003fe0: 68fa ldr r2, [r7, #12]
|
|
8003fe2: 4613 mov r3, r2
|
|
8003fe4: 009b lsls r3, r3, #2
|
|
8003fe6: 4413 add r3, r2
|
|
8003fe8: 00db lsls r3, r3, #3
|
|
8003fea: 440b add r3, r1
|
|
8003fec: 335c adds r3, #92 ; 0x5c
|
|
8003fee: 2204 movs r2, #4
|
|
8003ff0: 701a strb r2, [r3, #0]
|
|
8003ff2: e009 b.n 8004008 <HCD_HC_OUT_IRQHandler+0x67e>
|
|
hhcd->hc[ch_num].urb_state = URB_NOTREADY;
|
|
8003ff4: 6879 ldr r1, [r7, #4]
|
|
8003ff6: 68fa ldr r2, [r7, #12]
|
|
8003ff8: 4613 mov r3, r2
|
|
8003ffa: 009b lsls r3, r3, #2
|
|
8003ffc: 4413 add r3, r2
|
|
8003ffe: 00db lsls r3, r3, #3
|
|
8004000: 440b add r3, r1
|
|
8004002: 335c adds r3, #92 ; 0x5c
|
|
8004004: 2202 movs r2, #2
|
|
8004006: 701a strb r2, [r3, #0]
|
|
tmpreg = USBx_HC(ch_num)->HCCHAR;
|
|
8004008: 68fb ldr r3, [r7, #12]
|
|
800400a: 015a lsls r2, r3, #5
|
|
800400c: 693b ldr r3, [r7, #16]
|
|
800400e: 4413 add r3, r2
|
|
8004010: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8004014: 681b ldr r3, [r3, #0]
|
|
8004016: 60bb str r3, [r7, #8]
|
|
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
|
|
8004018: 68bb ldr r3, [r7, #8]
|
|
800401a: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
|
|
800401e: 60bb str r3, [r7, #8]
|
|
tmpreg |= USB_OTG_HCCHAR_CHENA;
|
|
8004020: 68bb ldr r3, [r7, #8]
|
|
8004022: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8004026: 60bb str r3, [r7, #8]
|
|
USBx_HC(ch_num)->HCCHAR = tmpreg;
|
|
8004028: 68fb ldr r3, [r7, #12]
|
|
800402a: 015a lsls r2, r3, #5
|
|
800402c: 693b ldr r3, [r7, #16]
|
|
800402e: 4413 add r3, r2
|
|
8004030: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8004034: 461a mov r2, r3
|
|
8004036: 68bb ldr r3, [r7, #8]
|
|
8004038: 6013 str r3, [r2, #0]
|
|
__HAL_HCD_CLEAR_HC_INT(ch_num, USB_OTG_HCINT_CHH);
|
|
800403a: 68fb ldr r3, [r7, #12]
|
|
800403c: 015a lsls r2, r3, #5
|
|
800403e: 693b ldr r3, [r7, #16]
|
|
8004040: 4413 add r3, r2
|
|
8004042: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8004046: 461a mov r2, r3
|
|
8004048: 2302 movs r3, #2
|
|
800404a: 6093 str r3, [r2, #8]
|
|
HAL_HCD_HC_NotifyURBChange_Callback(hhcd, (uint8_t)ch_num, hhcd->hc[ch_num].urb_state);
|
|
800404c: 68fb ldr r3, [r7, #12]
|
|
800404e: b2d8 uxtb r0, r3
|
|
8004050: 6879 ldr r1, [r7, #4]
|
|
8004052: 68fa ldr r2, [r7, #12]
|
|
8004054: 4613 mov r3, r2
|
|
8004056: 009b lsls r3, r3, #2
|
|
8004058: 4413 add r3, r2
|
|
800405a: 00db lsls r3, r3, #3
|
|
800405c: 440b add r3, r1
|
|
800405e: 335c adds r3, #92 ; 0x5c
|
|
8004060: 781b ldrb r3, [r3, #0]
|
|
8004062: 461a mov r2, r3
|
|
8004064: 4601 mov r1, r0
|
|
8004066: 6878 ldr r0, [r7, #4]
|
|
8004068: f005 ff3a bl 8009ee0 <HAL_HCD_HC_NotifyURBChange_Callback>
|
|
}
|
|
800406c: bf00 nop
|
|
800406e: 3718 adds r7, #24
|
|
8004070: 46bd mov sp, r7
|
|
8004072: bd80 pop {r7, pc}
|
|
|
|
08004074 <HCD_RXQLVL_IRQHandler>:
|
|
* @brief Handle Rx Queue Level interrupt requests.
|
|
* @param hhcd HCD handle
|
|
* @retval none
|
|
*/
|
|
static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8004074: b580 push {r7, lr}
|
|
8004076: b08a sub sp, #40 ; 0x28
|
|
8004078: af00 add r7, sp, #0
|
|
800407a: 6078 str r0, [r7, #4]
|
|
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
|
|
800407c: 687b ldr r3, [r7, #4]
|
|
800407e: 681b ldr r3, [r3, #0]
|
|
8004080: 627b str r3, [r7, #36] ; 0x24
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8004082: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8004084: 623b str r3, [r7, #32]
|
|
uint32_t pktcnt;
|
|
uint32_t temp;
|
|
uint32_t tmpreg;
|
|
uint32_t ch_num;
|
|
|
|
temp = hhcd->Instance->GRXSTSP;
|
|
8004086: 687b ldr r3, [r7, #4]
|
|
8004088: 681b ldr r3, [r3, #0]
|
|
800408a: 6a1b ldr r3, [r3, #32]
|
|
800408c: 61fb str r3, [r7, #28]
|
|
ch_num = temp & USB_OTG_GRXSTSP_EPNUM;
|
|
800408e: 69fb ldr r3, [r7, #28]
|
|
8004090: f003 030f and.w r3, r3, #15
|
|
8004094: 61bb str r3, [r7, #24]
|
|
pktsts = (temp & USB_OTG_GRXSTSP_PKTSTS) >> 17;
|
|
8004096: 69fb ldr r3, [r7, #28]
|
|
8004098: 0c5b lsrs r3, r3, #17
|
|
800409a: f003 030f and.w r3, r3, #15
|
|
800409e: 617b str r3, [r7, #20]
|
|
pktcnt = (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
|
|
80040a0: 69fb ldr r3, [r7, #28]
|
|
80040a2: 091b lsrs r3, r3, #4
|
|
80040a4: f3c3 030a ubfx r3, r3, #0, #11
|
|
80040a8: 613b str r3, [r7, #16]
|
|
|
|
switch (pktsts)
|
|
80040aa: 697b ldr r3, [r7, #20]
|
|
80040ac: 2b02 cmp r3, #2
|
|
80040ae: d003 beq.n 80040b8 <HCD_RXQLVL_IRQHandler+0x44>
|
|
80040b0: 2b05 cmp r3, #5
|
|
80040b2: f000 8082 beq.w 80041ba <HCD_RXQLVL_IRQHandler+0x146>
|
|
break;
|
|
|
|
case GRXSTS_PKTSTS_IN_XFER_COMP:
|
|
case GRXSTS_PKTSTS_CH_HALTED:
|
|
default:
|
|
break;
|
|
80040b6: e083 b.n 80041c0 <HCD_RXQLVL_IRQHandler+0x14c>
|
|
if ((pktcnt > 0U) && (hhcd->hc[ch_num].xfer_buff != (void *)0))
|
|
80040b8: 693b ldr r3, [r7, #16]
|
|
80040ba: 2b00 cmp r3, #0
|
|
80040bc: d07f beq.n 80041be <HCD_RXQLVL_IRQHandler+0x14a>
|
|
80040be: 6879 ldr r1, [r7, #4]
|
|
80040c0: 69ba ldr r2, [r7, #24]
|
|
80040c2: 4613 mov r3, r2
|
|
80040c4: 009b lsls r3, r3, #2
|
|
80040c6: 4413 add r3, r2
|
|
80040c8: 00db lsls r3, r3, #3
|
|
80040ca: 440b add r3, r1
|
|
80040cc: 3344 adds r3, #68 ; 0x44
|
|
80040ce: 681b ldr r3, [r3, #0]
|
|
80040d0: 2b00 cmp r3, #0
|
|
80040d2: d074 beq.n 80041be <HCD_RXQLVL_IRQHandler+0x14a>
|
|
(void)USB_ReadPacket(hhcd->Instance, hhcd->hc[ch_num].xfer_buff, (uint16_t)pktcnt);
|
|
80040d4: 687b ldr r3, [r7, #4]
|
|
80040d6: 6818 ldr r0, [r3, #0]
|
|
80040d8: 6879 ldr r1, [r7, #4]
|
|
80040da: 69ba ldr r2, [r7, #24]
|
|
80040dc: 4613 mov r3, r2
|
|
80040de: 009b lsls r3, r3, #2
|
|
80040e0: 4413 add r3, r2
|
|
80040e2: 00db lsls r3, r3, #3
|
|
80040e4: 440b add r3, r1
|
|
80040e6: 3344 adds r3, #68 ; 0x44
|
|
80040e8: 681b ldr r3, [r3, #0]
|
|
80040ea: 693a ldr r2, [r7, #16]
|
|
80040ec: b292 uxth r2, r2
|
|
80040ee: 4619 mov r1, r3
|
|
80040f0: f003 f8f1 bl 80072d6 <USB_ReadPacket>
|
|
hhcd->hc[ch_num].xfer_buff += pktcnt;
|
|
80040f4: 6879 ldr r1, [r7, #4]
|
|
80040f6: 69ba ldr r2, [r7, #24]
|
|
80040f8: 4613 mov r3, r2
|
|
80040fa: 009b lsls r3, r3, #2
|
|
80040fc: 4413 add r3, r2
|
|
80040fe: 00db lsls r3, r3, #3
|
|
8004100: 440b add r3, r1
|
|
8004102: 3344 adds r3, #68 ; 0x44
|
|
8004104: 681a ldr r2, [r3, #0]
|
|
8004106: 693b ldr r3, [r7, #16]
|
|
8004108: 18d1 adds r1, r2, r3
|
|
800410a: 6878 ldr r0, [r7, #4]
|
|
800410c: 69ba ldr r2, [r7, #24]
|
|
800410e: 4613 mov r3, r2
|
|
8004110: 009b lsls r3, r3, #2
|
|
8004112: 4413 add r3, r2
|
|
8004114: 00db lsls r3, r3, #3
|
|
8004116: 4403 add r3, r0
|
|
8004118: 3344 adds r3, #68 ; 0x44
|
|
800411a: 6019 str r1, [r3, #0]
|
|
hhcd->hc[ch_num].xfer_count += pktcnt;
|
|
800411c: 6879 ldr r1, [r7, #4]
|
|
800411e: 69ba ldr r2, [r7, #24]
|
|
8004120: 4613 mov r3, r2
|
|
8004122: 009b lsls r3, r3, #2
|
|
8004124: 4413 add r3, r2
|
|
8004126: 00db lsls r3, r3, #3
|
|
8004128: 440b add r3, r1
|
|
800412a: 334c adds r3, #76 ; 0x4c
|
|
800412c: 681a ldr r2, [r3, #0]
|
|
800412e: 693b ldr r3, [r7, #16]
|
|
8004130: 18d1 adds r1, r2, r3
|
|
8004132: 6878 ldr r0, [r7, #4]
|
|
8004134: 69ba ldr r2, [r7, #24]
|
|
8004136: 4613 mov r3, r2
|
|
8004138: 009b lsls r3, r3, #2
|
|
800413a: 4413 add r3, r2
|
|
800413c: 00db lsls r3, r3, #3
|
|
800413e: 4403 add r3, r0
|
|
8004140: 334c adds r3, #76 ; 0x4c
|
|
8004142: 6019 str r1, [r3, #0]
|
|
if ((USBx_HC(ch_num)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) > 0U)
|
|
8004144: 69bb ldr r3, [r7, #24]
|
|
8004146: 015a lsls r2, r3, #5
|
|
8004148: 6a3b ldr r3, [r7, #32]
|
|
800414a: 4413 add r3, r2
|
|
800414c: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8004150: 691a ldr r2, [r3, #16]
|
|
8004152: 4b1d ldr r3, [pc, #116] ; (80041c8 <HCD_RXQLVL_IRQHandler+0x154>)
|
|
8004154: 4013 ands r3, r2
|
|
8004156: 2b00 cmp r3, #0
|
|
8004158: d031 beq.n 80041be <HCD_RXQLVL_IRQHandler+0x14a>
|
|
tmpreg = USBx_HC(ch_num)->HCCHAR;
|
|
800415a: 69bb ldr r3, [r7, #24]
|
|
800415c: 015a lsls r2, r3, #5
|
|
800415e: 6a3b ldr r3, [r7, #32]
|
|
8004160: 4413 add r3, r2
|
|
8004162: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8004166: 681b ldr r3, [r3, #0]
|
|
8004168: 60fb str r3, [r7, #12]
|
|
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
|
|
800416a: 68fb ldr r3, [r7, #12]
|
|
800416c: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
|
|
8004170: 60fb str r3, [r7, #12]
|
|
tmpreg |= USB_OTG_HCCHAR_CHENA;
|
|
8004172: 68fb ldr r3, [r7, #12]
|
|
8004174: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8004178: 60fb str r3, [r7, #12]
|
|
USBx_HC(ch_num)->HCCHAR = tmpreg;
|
|
800417a: 69bb ldr r3, [r7, #24]
|
|
800417c: 015a lsls r2, r3, #5
|
|
800417e: 6a3b ldr r3, [r7, #32]
|
|
8004180: 4413 add r3, r2
|
|
8004182: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8004186: 461a mov r2, r3
|
|
8004188: 68fb ldr r3, [r7, #12]
|
|
800418a: 6013 str r3, [r2, #0]
|
|
hhcd->hc[ch_num].toggle_in ^= 1U;
|
|
800418c: 6879 ldr r1, [r7, #4]
|
|
800418e: 69ba ldr r2, [r7, #24]
|
|
8004190: 4613 mov r3, r2
|
|
8004192: 009b lsls r3, r3, #2
|
|
8004194: 4413 add r3, r2
|
|
8004196: 00db lsls r3, r3, #3
|
|
8004198: 440b add r3, r1
|
|
800419a: 3350 adds r3, #80 ; 0x50
|
|
800419c: 781b ldrb r3, [r3, #0]
|
|
800419e: f083 0301 eor.w r3, r3, #1
|
|
80041a2: b2d8 uxtb r0, r3
|
|
80041a4: 6879 ldr r1, [r7, #4]
|
|
80041a6: 69ba ldr r2, [r7, #24]
|
|
80041a8: 4613 mov r3, r2
|
|
80041aa: 009b lsls r3, r3, #2
|
|
80041ac: 4413 add r3, r2
|
|
80041ae: 00db lsls r3, r3, #3
|
|
80041b0: 440b add r3, r1
|
|
80041b2: 3350 adds r3, #80 ; 0x50
|
|
80041b4: 4602 mov r2, r0
|
|
80041b6: 701a strb r2, [r3, #0]
|
|
break;
|
|
80041b8: e001 b.n 80041be <HCD_RXQLVL_IRQHandler+0x14a>
|
|
break;
|
|
80041ba: bf00 nop
|
|
80041bc: e000 b.n 80041c0 <HCD_RXQLVL_IRQHandler+0x14c>
|
|
break;
|
|
80041be: bf00 nop
|
|
}
|
|
}
|
|
80041c0: bf00 nop
|
|
80041c2: 3728 adds r7, #40 ; 0x28
|
|
80041c4: 46bd mov sp, r7
|
|
80041c6: bd80 pop {r7, pc}
|
|
80041c8: 1ff80000 .word 0x1ff80000
|
|
|
|
080041cc <HCD_Port_IRQHandler>:
|
|
* @brief Handle Host Port interrupt requests.
|
|
* @param hhcd HCD handle
|
|
* @retval None
|
|
*/
|
|
static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
80041cc: b580 push {r7, lr}
|
|
80041ce: b086 sub sp, #24
|
|
80041d0: af00 add r7, sp, #0
|
|
80041d2: 6078 str r0, [r7, #4]
|
|
USB_OTG_GlobalTypeDef *USBx = hhcd->Instance;
|
|
80041d4: 687b ldr r3, [r7, #4]
|
|
80041d6: 681b ldr r3, [r3, #0]
|
|
80041d8: 617b str r3, [r7, #20]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
80041da: 697b ldr r3, [r7, #20]
|
|
80041dc: 613b str r3, [r7, #16]
|
|
__IO uint32_t hprt0, hprt0_dup;
|
|
|
|
/* Handle Host Port Interrupts */
|
|
hprt0 = USBx_HPRT0;
|
|
80041de: 693b ldr r3, [r7, #16]
|
|
80041e0: f503 6388 add.w r3, r3, #1088 ; 0x440
|
|
80041e4: 681b ldr r3, [r3, #0]
|
|
80041e6: 60fb str r3, [r7, #12]
|
|
hprt0_dup = USBx_HPRT0;
|
|
80041e8: 693b ldr r3, [r7, #16]
|
|
80041ea: f503 6388 add.w r3, r3, #1088 ; 0x440
|
|
80041ee: 681b ldr r3, [r3, #0]
|
|
80041f0: 60bb str r3, [r7, #8]
|
|
|
|
hprt0_dup &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET | \
|
|
80041f2: 68bb ldr r3, [r7, #8]
|
|
80041f4: f023 032e bic.w r3, r3, #46 ; 0x2e
|
|
80041f8: 60bb str r3, [r7, #8]
|
|
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
|
|
|
|
/* Check whether Port Connect detected */
|
|
if ((hprt0 & USB_OTG_HPRT_PCDET) == USB_OTG_HPRT_PCDET)
|
|
80041fa: 68fb ldr r3, [r7, #12]
|
|
80041fc: f003 0302 and.w r3, r3, #2
|
|
8004200: 2b02 cmp r3, #2
|
|
8004202: d10b bne.n 800421c <HCD_Port_IRQHandler+0x50>
|
|
{
|
|
if ((hprt0 & USB_OTG_HPRT_PCSTS) == USB_OTG_HPRT_PCSTS)
|
|
8004204: 68fb ldr r3, [r7, #12]
|
|
8004206: f003 0301 and.w r3, r3, #1
|
|
800420a: 2b01 cmp r3, #1
|
|
800420c: d102 bne.n 8004214 <HCD_Port_IRQHandler+0x48>
|
|
{
|
|
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
|
|
hhcd->ConnectCallback(hhcd);
|
|
#else
|
|
HAL_HCD_Connect_Callback(hhcd);
|
|
800420e: 6878 ldr r0, [r7, #4]
|
|
8004210: f005 fe4a bl 8009ea8 <HAL_HCD_Connect_Callback>
|
|
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
|
|
}
|
|
hprt0_dup |= USB_OTG_HPRT_PCDET;
|
|
8004214: 68bb ldr r3, [r7, #8]
|
|
8004216: f043 0302 orr.w r3, r3, #2
|
|
800421a: 60bb str r3, [r7, #8]
|
|
}
|
|
|
|
/* Check whether Port Enable Changed */
|
|
if ((hprt0 & USB_OTG_HPRT_PENCHNG) == USB_OTG_HPRT_PENCHNG)
|
|
800421c: 68fb ldr r3, [r7, #12]
|
|
800421e: f003 0308 and.w r3, r3, #8
|
|
8004222: 2b08 cmp r3, #8
|
|
8004224: d132 bne.n 800428c <HCD_Port_IRQHandler+0xc0>
|
|
{
|
|
hprt0_dup |= USB_OTG_HPRT_PENCHNG;
|
|
8004226: 68bb ldr r3, [r7, #8]
|
|
8004228: f043 0308 orr.w r3, r3, #8
|
|
800422c: 60bb str r3, [r7, #8]
|
|
|
|
if ((hprt0 & USB_OTG_HPRT_PENA) == USB_OTG_HPRT_PENA)
|
|
800422e: 68fb ldr r3, [r7, #12]
|
|
8004230: f003 0304 and.w r3, r3, #4
|
|
8004234: 2b04 cmp r3, #4
|
|
8004236: d126 bne.n 8004286 <HCD_Port_IRQHandler+0xba>
|
|
{
|
|
if (hhcd->Init.phy_itface == USB_OTG_EMBEDDED_PHY)
|
|
8004238: 687b ldr r3, [r7, #4]
|
|
800423a: 699b ldr r3, [r3, #24]
|
|
800423c: 2b02 cmp r3, #2
|
|
800423e: d113 bne.n 8004268 <HCD_Port_IRQHandler+0x9c>
|
|
{
|
|
if ((hprt0 & USB_OTG_HPRT_PSPD) == (HPRT0_PRTSPD_LOW_SPEED << 17))
|
|
8004240: 68fb ldr r3, [r7, #12]
|
|
8004242: f403 23c0 and.w r3, r3, #393216 ; 0x60000
|
|
8004246: f5b3 2f80 cmp.w r3, #262144 ; 0x40000
|
|
800424a: d106 bne.n 800425a <HCD_Port_IRQHandler+0x8e>
|
|
{
|
|
(void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_6_MHZ);
|
|
800424c: 687b ldr r3, [r7, #4]
|
|
800424e: 681b ldr r3, [r3, #0]
|
|
8004250: 2102 movs r1, #2
|
|
8004252: 4618 mov r0, r3
|
|
8004254: f003 f97a bl 800754c <USB_InitFSLSPClkSel>
|
|
8004258: e011 b.n 800427e <HCD_Port_IRQHandler+0xb2>
|
|
}
|
|
else
|
|
{
|
|
(void)USB_InitFSLSPClkSel(hhcd->Instance, HCFG_48_MHZ);
|
|
800425a: 687b ldr r3, [r7, #4]
|
|
800425c: 681b ldr r3, [r3, #0]
|
|
800425e: 2101 movs r1, #1
|
|
8004260: 4618 mov r0, r3
|
|
8004262: f003 f973 bl 800754c <USB_InitFSLSPClkSel>
|
|
8004266: e00a b.n 800427e <HCD_Port_IRQHandler+0xb2>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (hhcd->Init.speed == HCD_SPEED_FULL)
|
|
8004268: 687b ldr r3, [r7, #4]
|
|
800426a: 68db ldr r3, [r3, #12]
|
|
800426c: 2b01 cmp r3, #1
|
|
800426e: d106 bne.n 800427e <HCD_Port_IRQHandler+0xb2>
|
|
{
|
|
USBx_HOST->HFIR = 60000U;
|
|
8004270: 693b ldr r3, [r7, #16]
|
|
8004272: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8004276: 461a mov r2, r3
|
|
8004278: f64e 2360 movw r3, #60000 ; 0xea60
|
|
800427c: 6053 str r3, [r2, #4]
|
|
}
|
|
}
|
|
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
|
|
hhcd->PortEnabledCallback(hhcd);
|
|
#else
|
|
HAL_HCD_PortEnabled_Callback(hhcd);
|
|
800427e: 6878 ldr r0, [r7, #4]
|
|
8004280: f005 fe3c bl 8009efc <HAL_HCD_PortEnabled_Callback>
|
|
8004284: e002 b.n 800428c <HCD_Port_IRQHandler+0xc0>
|
|
else
|
|
{
|
|
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
|
|
hhcd->PortDisabledCallback(hhcd);
|
|
#else
|
|
HAL_HCD_PortDisabled_Callback(hhcd);
|
|
8004286: 6878 ldr r0, [r7, #4]
|
|
8004288: f005 fe46 bl 8009f18 <HAL_HCD_PortDisabled_Callback>
|
|
#endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
|
|
/* Check for an overcurrent */
|
|
if ((hprt0 & USB_OTG_HPRT_POCCHNG) == USB_OTG_HPRT_POCCHNG)
|
|
800428c: 68fb ldr r3, [r7, #12]
|
|
800428e: f003 0320 and.w r3, r3, #32
|
|
8004292: 2b20 cmp r3, #32
|
|
8004294: d103 bne.n 800429e <HCD_Port_IRQHandler+0xd2>
|
|
{
|
|
hprt0_dup |= USB_OTG_HPRT_POCCHNG;
|
|
8004296: 68bb ldr r3, [r7, #8]
|
|
8004298: f043 0320 orr.w r3, r3, #32
|
|
800429c: 60bb str r3, [r7, #8]
|
|
}
|
|
|
|
/* Clear Port Interrupts */
|
|
USBx_HPRT0 = hprt0_dup;
|
|
800429e: 693b ldr r3, [r7, #16]
|
|
80042a0: f503 6388 add.w r3, r3, #1088 ; 0x440
|
|
80042a4: 461a mov r2, r3
|
|
80042a6: 68bb ldr r3, [r7, #8]
|
|
80042a8: 6013 str r3, [r2, #0]
|
|
}
|
|
80042aa: bf00 nop
|
|
80042ac: 3718 adds r7, #24
|
|
80042ae: 46bd mov sp, r7
|
|
80042b0: bd80 pop {r7, pc}
|
|
...
|
|
|
|
080042b4 <HAL_I2C_Init>:
|
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
|
* the configuration information for the specified I2C.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
80042b4: b580 push {r7, lr}
|
|
80042b6: b084 sub sp, #16
|
|
80042b8: af00 add r7, sp, #0
|
|
80042ba: 6078 str r0, [r7, #4]
|
|
uint32_t freqrange;
|
|
uint32_t pclk1;
|
|
|
|
/* Check the I2C handle allocation */
|
|
if (hi2c == NULL)
|
|
80042bc: 687b ldr r3, [r7, #4]
|
|
80042be: 2b00 cmp r3, #0
|
|
80042c0: d101 bne.n 80042c6 <HAL_I2C_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
80042c2: 2301 movs r3, #1
|
|
80042c4: e11f b.n 8004506 <HAL_I2C_Init+0x252>
|
|
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
|
|
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
|
|
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
|
|
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_RESET)
|
|
80042c6: 687b ldr r3, [r7, #4]
|
|
80042c8: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
|
80042cc: b2db uxtb r3, r3
|
|
80042ce: 2b00 cmp r3, #0
|
|
80042d0: d106 bne.n 80042e0 <HAL_I2C_Init+0x2c>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hi2c->Lock = HAL_UNLOCKED;
|
|
80042d2: 687b ldr r3, [r7, #4]
|
|
80042d4: 2200 movs r2, #0
|
|
80042d6: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
|
hi2c->MspInitCallback(hi2c);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC */
|
|
HAL_I2C_MspInit(hi2c);
|
|
80042da: 6878 ldr r0, [r7, #4]
|
|
80042dc: f7fd fa08 bl 80016f0 <HAL_I2C_MspInit>
|
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
80042e0: 687b ldr r3, [r7, #4]
|
|
80042e2: 2224 movs r2, #36 ; 0x24
|
|
80042e4: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
|
|
/* Disable the selected I2C peripheral */
|
|
__HAL_I2C_DISABLE(hi2c);
|
|
80042e8: 687b ldr r3, [r7, #4]
|
|
80042ea: 681b ldr r3, [r3, #0]
|
|
80042ec: 681a ldr r2, [r3, #0]
|
|
80042ee: 687b ldr r3, [r7, #4]
|
|
80042f0: 681b ldr r3, [r3, #0]
|
|
80042f2: f022 0201 bic.w r2, r2, #1
|
|
80042f6: 601a str r2, [r3, #0]
|
|
|
|
/*Reset I2C*/
|
|
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
|
|
80042f8: 687b ldr r3, [r7, #4]
|
|
80042fa: 681b ldr r3, [r3, #0]
|
|
80042fc: 681a ldr r2, [r3, #0]
|
|
80042fe: 687b ldr r3, [r7, #4]
|
|
8004300: 681b ldr r3, [r3, #0]
|
|
8004302: f442 4200 orr.w r2, r2, #32768 ; 0x8000
|
|
8004306: 601a str r2, [r3, #0]
|
|
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
|
|
8004308: 687b ldr r3, [r7, #4]
|
|
800430a: 681b ldr r3, [r3, #0]
|
|
800430c: 681a ldr r2, [r3, #0]
|
|
800430e: 687b ldr r3, [r7, #4]
|
|
8004310: 681b ldr r3, [r3, #0]
|
|
8004312: f422 4200 bic.w r2, r2, #32768 ; 0x8000
|
|
8004316: 601a str r2, [r3, #0]
|
|
|
|
/* Get PCLK1 frequency */
|
|
pclk1 = HAL_RCC_GetPCLK1Freq();
|
|
8004318: f002 f830 bl 800637c <HAL_RCC_GetPCLK1Freq>
|
|
800431c: 60f8 str r0, [r7, #12]
|
|
|
|
/* Check the minimum allowed PCLK1 frequency */
|
|
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
|
|
800431e: 687b ldr r3, [r7, #4]
|
|
8004320: 685b ldr r3, [r3, #4]
|
|
8004322: 4a7b ldr r2, [pc, #492] ; (8004510 <HAL_I2C_Init+0x25c>)
|
|
8004324: 4293 cmp r3, r2
|
|
8004326: d807 bhi.n 8004338 <HAL_I2C_Init+0x84>
|
|
8004328: 68fb ldr r3, [r7, #12]
|
|
800432a: 4a7a ldr r2, [pc, #488] ; (8004514 <HAL_I2C_Init+0x260>)
|
|
800432c: 4293 cmp r3, r2
|
|
800432e: bf94 ite ls
|
|
8004330: 2301 movls r3, #1
|
|
8004332: 2300 movhi r3, #0
|
|
8004334: b2db uxtb r3, r3
|
|
8004336: e006 b.n 8004346 <HAL_I2C_Init+0x92>
|
|
8004338: 68fb ldr r3, [r7, #12]
|
|
800433a: 4a77 ldr r2, [pc, #476] ; (8004518 <HAL_I2C_Init+0x264>)
|
|
800433c: 4293 cmp r3, r2
|
|
800433e: bf94 ite ls
|
|
8004340: 2301 movls r3, #1
|
|
8004342: 2300 movhi r3, #0
|
|
8004344: b2db uxtb r3, r3
|
|
8004346: 2b00 cmp r3, #0
|
|
8004348: d001 beq.n 800434e <HAL_I2C_Init+0x9a>
|
|
{
|
|
return HAL_ERROR;
|
|
800434a: 2301 movs r3, #1
|
|
800434c: e0db b.n 8004506 <HAL_I2C_Init+0x252>
|
|
}
|
|
|
|
/* Calculate frequency range */
|
|
freqrange = I2C_FREQRANGE(pclk1);
|
|
800434e: 68fb ldr r3, [r7, #12]
|
|
8004350: 4a72 ldr r2, [pc, #456] ; (800451c <HAL_I2C_Init+0x268>)
|
|
8004352: fba2 2303 umull r2, r3, r2, r3
|
|
8004356: 0c9b lsrs r3, r3, #18
|
|
8004358: 60bb str r3, [r7, #8]
|
|
|
|
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
|
|
/* Configure I2Cx: Frequency range */
|
|
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
|
|
800435a: 687b ldr r3, [r7, #4]
|
|
800435c: 681b ldr r3, [r3, #0]
|
|
800435e: 685b ldr r3, [r3, #4]
|
|
8004360: f023 013f bic.w r1, r3, #63 ; 0x3f
|
|
8004364: 687b ldr r3, [r7, #4]
|
|
8004366: 681b ldr r3, [r3, #0]
|
|
8004368: 68ba ldr r2, [r7, #8]
|
|
800436a: 430a orrs r2, r1
|
|
800436c: 605a str r2, [r3, #4]
|
|
|
|
/*---------------------------- I2Cx TRISE Configuration --------------------*/
|
|
/* Configure I2Cx: Rise Time */
|
|
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
|
|
800436e: 687b ldr r3, [r7, #4]
|
|
8004370: 681b ldr r3, [r3, #0]
|
|
8004372: 6a1b ldr r3, [r3, #32]
|
|
8004374: f023 013f bic.w r1, r3, #63 ; 0x3f
|
|
8004378: 687b ldr r3, [r7, #4]
|
|
800437a: 685b ldr r3, [r3, #4]
|
|
800437c: 4a64 ldr r2, [pc, #400] ; (8004510 <HAL_I2C_Init+0x25c>)
|
|
800437e: 4293 cmp r3, r2
|
|
8004380: d802 bhi.n 8004388 <HAL_I2C_Init+0xd4>
|
|
8004382: 68bb ldr r3, [r7, #8]
|
|
8004384: 3301 adds r3, #1
|
|
8004386: e009 b.n 800439c <HAL_I2C_Init+0xe8>
|
|
8004388: 68bb ldr r3, [r7, #8]
|
|
800438a: f44f 7296 mov.w r2, #300 ; 0x12c
|
|
800438e: fb02 f303 mul.w r3, r2, r3
|
|
8004392: 4a63 ldr r2, [pc, #396] ; (8004520 <HAL_I2C_Init+0x26c>)
|
|
8004394: fba2 2303 umull r2, r3, r2, r3
|
|
8004398: 099b lsrs r3, r3, #6
|
|
800439a: 3301 adds r3, #1
|
|
800439c: 687a ldr r2, [r7, #4]
|
|
800439e: 6812 ldr r2, [r2, #0]
|
|
80043a0: 430b orrs r3, r1
|
|
80043a2: 6213 str r3, [r2, #32]
|
|
|
|
/*---------------------------- I2Cx CCR Configuration ----------------------*/
|
|
/* Configure I2Cx: Speed */
|
|
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
|
|
80043a4: 687b ldr r3, [r7, #4]
|
|
80043a6: 681b ldr r3, [r3, #0]
|
|
80043a8: 69db ldr r3, [r3, #28]
|
|
80043aa: f423 424f bic.w r2, r3, #52992 ; 0xcf00
|
|
80043ae: f022 02ff bic.w r2, r2, #255 ; 0xff
|
|
80043b2: 687b ldr r3, [r7, #4]
|
|
80043b4: 685b ldr r3, [r3, #4]
|
|
80043b6: 4956 ldr r1, [pc, #344] ; (8004510 <HAL_I2C_Init+0x25c>)
|
|
80043b8: 428b cmp r3, r1
|
|
80043ba: d80d bhi.n 80043d8 <HAL_I2C_Init+0x124>
|
|
80043bc: 68fb ldr r3, [r7, #12]
|
|
80043be: 1e59 subs r1, r3, #1
|
|
80043c0: 687b ldr r3, [r7, #4]
|
|
80043c2: 685b ldr r3, [r3, #4]
|
|
80043c4: 005b lsls r3, r3, #1
|
|
80043c6: fbb1 f3f3 udiv r3, r1, r3
|
|
80043ca: 3301 adds r3, #1
|
|
80043cc: f3c3 030b ubfx r3, r3, #0, #12
|
|
80043d0: 2b04 cmp r3, #4
|
|
80043d2: bf38 it cc
|
|
80043d4: 2304 movcc r3, #4
|
|
80043d6: e04f b.n 8004478 <HAL_I2C_Init+0x1c4>
|
|
80043d8: 687b ldr r3, [r7, #4]
|
|
80043da: 689b ldr r3, [r3, #8]
|
|
80043dc: 2b00 cmp r3, #0
|
|
80043de: d111 bne.n 8004404 <HAL_I2C_Init+0x150>
|
|
80043e0: 68fb ldr r3, [r7, #12]
|
|
80043e2: 1e58 subs r0, r3, #1
|
|
80043e4: 687b ldr r3, [r7, #4]
|
|
80043e6: 6859 ldr r1, [r3, #4]
|
|
80043e8: 460b mov r3, r1
|
|
80043ea: 005b lsls r3, r3, #1
|
|
80043ec: 440b add r3, r1
|
|
80043ee: fbb0 f3f3 udiv r3, r0, r3
|
|
80043f2: 3301 adds r3, #1
|
|
80043f4: f3c3 030b ubfx r3, r3, #0, #12
|
|
80043f8: 2b00 cmp r3, #0
|
|
80043fa: bf0c ite eq
|
|
80043fc: 2301 moveq r3, #1
|
|
80043fe: 2300 movne r3, #0
|
|
8004400: b2db uxtb r3, r3
|
|
8004402: e012 b.n 800442a <HAL_I2C_Init+0x176>
|
|
8004404: 68fb ldr r3, [r7, #12]
|
|
8004406: 1e58 subs r0, r3, #1
|
|
8004408: 687b ldr r3, [r7, #4]
|
|
800440a: 6859 ldr r1, [r3, #4]
|
|
800440c: 460b mov r3, r1
|
|
800440e: 009b lsls r3, r3, #2
|
|
8004410: 440b add r3, r1
|
|
8004412: 0099 lsls r1, r3, #2
|
|
8004414: 440b add r3, r1
|
|
8004416: fbb0 f3f3 udiv r3, r0, r3
|
|
800441a: 3301 adds r3, #1
|
|
800441c: f3c3 030b ubfx r3, r3, #0, #12
|
|
8004420: 2b00 cmp r3, #0
|
|
8004422: bf0c ite eq
|
|
8004424: 2301 moveq r3, #1
|
|
8004426: 2300 movne r3, #0
|
|
8004428: b2db uxtb r3, r3
|
|
800442a: 2b00 cmp r3, #0
|
|
800442c: d001 beq.n 8004432 <HAL_I2C_Init+0x17e>
|
|
800442e: 2301 movs r3, #1
|
|
8004430: e022 b.n 8004478 <HAL_I2C_Init+0x1c4>
|
|
8004432: 687b ldr r3, [r7, #4]
|
|
8004434: 689b ldr r3, [r3, #8]
|
|
8004436: 2b00 cmp r3, #0
|
|
8004438: d10e bne.n 8004458 <HAL_I2C_Init+0x1a4>
|
|
800443a: 68fb ldr r3, [r7, #12]
|
|
800443c: 1e58 subs r0, r3, #1
|
|
800443e: 687b ldr r3, [r7, #4]
|
|
8004440: 6859 ldr r1, [r3, #4]
|
|
8004442: 460b mov r3, r1
|
|
8004444: 005b lsls r3, r3, #1
|
|
8004446: 440b add r3, r1
|
|
8004448: fbb0 f3f3 udiv r3, r0, r3
|
|
800444c: 3301 adds r3, #1
|
|
800444e: f3c3 030b ubfx r3, r3, #0, #12
|
|
8004452: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8004456: e00f b.n 8004478 <HAL_I2C_Init+0x1c4>
|
|
8004458: 68fb ldr r3, [r7, #12]
|
|
800445a: 1e58 subs r0, r3, #1
|
|
800445c: 687b ldr r3, [r7, #4]
|
|
800445e: 6859 ldr r1, [r3, #4]
|
|
8004460: 460b mov r3, r1
|
|
8004462: 009b lsls r3, r3, #2
|
|
8004464: 440b add r3, r1
|
|
8004466: 0099 lsls r1, r3, #2
|
|
8004468: 440b add r3, r1
|
|
800446a: fbb0 f3f3 udiv r3, r0, r3
|
|
800446e: 3301 adds r3, #1
|
|
8004470: f3c3 030b ubfx r3, r3, #0, #12
|
|
8004474: f443 4340 orr.w r3, r3, #49152 ; 0xc000
|
|
8004478: 6879 ldr r1, [r7, #4]
|
|
800447a: 6809 ldr r1, [r1, #0]
|
|
800447c: 4313 orrs r3, r2
|
|
800447e: 61cb str r3, [r1, #28]
|
|
|
|
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
|
|
/* Configure I2Cx: Generalcall and NoStretch mode */
|
|
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
|
|
8004480: 687b ldr r3, [r7, #4]
|
|
8004482: 681b ldr r3, [r3, #0]
|
|
8004484: 681b ldr r3, [r3, #0]
|
|
8004486: f023 01c0 bic.w r1, r3, #192 ; 0xc0
|
|
800448a: 687b ldr r3, [r7, #4]
|
|
800448c: 69da ldr r2, [r3, #28]
|
|
800448e: 687b ldr r3, [r7, #4]
|
|
8004490: 6a1b ldr r3, [r3, #32]
|
|
8004492: 431a orrs r2, r3
|
|
8004494: 687b ldr r3, [r7, #4]
|
|
8004496: 681b ldr r3, [r3, #0]
|
|
8004498: 430a orrs r2, r1
|
|
800449a: 601a str r2, [r3, #0]
|
|
|
|
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
|
|
/* Configure I2Cx: Own Address1 and addressing mode */
|
|
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
|
|
800449c: 687b ldr r3, [r7, #4]
|
|
800449e: 681b ldr r3, [r3, #0]
|
|
80044a0: 689b ldr r3, [r3, #8]
|
|
80044a2: f423 4303 bic.w r3, r3, #33536 ; 0x8300
|
|
80044a6: f023 03ff bic.w r3, r3, #255 ; 0xff
|
|
80044aa: 687a ldr r2, [r7, #4]
|
|
80044ac: 6911 ldr r1, [r2, #16]
|
|
80044ae: 687a ldr r2, [r7, #4]
|
|
80044b0: 68d2 ldr r2, [r2, #12]
|
|
80044b2: 4311 orrs r1, r2
|
|
80044b4: 687a ldr r2, [r7, #4]
|
|
80044b6: 6812 ldr r2, [r2, #0]
|
|
80044b8: 430b orrs r3, r1
|
|
80044ba: 6093 str r3, [r2, #8]
|
|
|
|
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
|
|
/* Configure I2Cx: Dual mode and Own Address2 */
|
|
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
|
|
80044bc: 687b ldr r3, [r7, #4]
|
|
80044be: 681b ldr r3, [r3, #0]
|
|
80044c0: 68db ldr r3, [r3, #12]
|
|
80044c2: f023 01ff bic.w r1, r3, #255 ; 0xff
|
|
80044c6: 687b ldr r3, [r7, #4]
|
|
80044c8: 695a ldr r2, [r3, #20]
|
|
80044ca: 687b ldr r3, [r7, #4]
|
|
80044cc: 699b ldr r3, [r3, #24]
|
|
80044ce: 431a orrs r2, r3
|
|
80044d0: 687b ldr r3, [r7, #4]
|
|
80044d2: 681b ldr r3, [r3, #0]
|
|
80044d4: 430a orrs r2, r1
|
|
80044d6: 60da str r2, [r3, #12]
|
|
|
|
/* Enable the selected I2C peripheral */
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
80044d8: 687b ldr r3, [r7, #4]
|
|
80044da: 681b ldr r3, [r3, #0]
|
|
80044dc: 681a ldr r2, [r3, #0]
|
|
80044de: 687b ldr r3, [r7, #4]
|
|
80044e0: 681b ldr r3, [r3, #0]
|
|
80044e2: f042 0201 orr.w r2, r2, #1
|
|
80044e6: 601a str r2, [r3, #0]
|
|
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
80044e8: 687b ldr r3, [r7, #4]
|
|
80044ea: 2200 movs r2, #0
|
|
80044ec: 641a str r2, [r3, #64] ; 0x40
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80044ee: 687b ldr r3, [r7, #4]
|
|
80044f0: 2220 movs r2, #32
|
|
80044f2: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
80044f6: 687b ldr r3, [r7, #4]
|
|
80044f8: 2200 movs r2, #0
|
|
80044fa: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80044fc: 687b ldr r3, [r7, #4]
|
|
80044fe: 2200 movs r2, #0
|
|
8004500: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
|
|
return HAL_OK;
|
|
8004504: 2300 movs r3, #0
|
|
}
|
|
8004506: 4618 mov r0, r3
|
|
8004508: 3710 adds r7, #16
|
|
800450a: 46bd mov sp, r7
|
|
800450c: bd80 pop {r7, pc}
|
|
800450e: bf00 nop
|
|
8004510: 000186a0 .word 0x000186a0
|
|
8004514: 001e847f .word 0x001e847f
|
|
8004518: 003d08ff .word 0x003d08ff
|
|
800451c: 431bde83 .word 0x431bde83
|
|
8004520: 10624dd3 .word 0x10624dd3
|
|
|
|
08004524 <HAL_I2C_Master_Transmit>:
|
|
* @param Size Amount of data to be sent
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
|
{
|
|
8004524: b580 push {r7, lr}
|
|
8004526: b088 sub sp, #32
|
|
8004528: af02 add r7, sp, #8
|
|
800452a: 60f8 str r0, [r7, #12]
|
|
800452c: 607a str r2, [r7, #4]
|
|
800452e: 461a mov r2, r3
|
|
8004530: 460b mov r3, r1
|
|
8004532: 817b strh r3, [r7, #10]
|
|
8004534: 4613 mov r3, r2
|
|
8004536: 813b strh r3, [r7, #8]
|
|
/* Init tickstart for timeout management*/
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8004538: f7fd fef0 bl 800231c <HAL_GetTick>
|
|
800453c: 6178 str r0, [r7, #20]
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
800453e: 68fb ldr r3, [r7, #12]
|
|
8004540: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
|
8004544: b2db uxtb r3, r3
|
|
8004546: 2b20 cmp r3, #32
|
|
8004548: f040 80e0 bne.w 800470c <HAL_I2C_Master_Transmit+0x1e8>
|
|
{
|
|
/* Wait until BUSY flag is reset */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
|
800454c: 697b ldr r3, [r7, #20]
|
|
800454e: 9300 str r3, [sp, #0]
|
|
8004550: 2319 movs r3, #25
|
|
8004552: 2201 movs r2, #1
|
|
8004554: 4970 ldr r1, [pc, #448] ; (8004718 <HAL_I2C_Master_Transmit+0x1f4>)
|
|
8004556: 68f8 ldr r0, [r7, #12]
|
|
8004558: f000 fc58 bl 8004e0c <I2C_WaitOnFlagUntilTimeout>
|
|
800455c: 4603 mov r3, r0
|
|
800455e: 2b00 cmp r3, #0
|
|
8004560: d001 beq.n 8004566 <HAL_I2C_Master_Transmit+0x42>
|
|
{
|
|
return HAL_BUSY;
|
|
8004562: 2302 movs r3, #2
|
|
8004564: e0d3 b.n 800470e <HAL_I2C_Master_Transmit+0x1ea>
|
|
}
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hi2c);
|
|
8004566: 68fb ldr r3, [r7, #12]
|
|
8004568: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
|
800456c: 2b01 cmp r3, #1
|
|
800456e: d101 bne.n 8004574 <HAL_I2C_Master_Transmit+0x50>
|
|
8004570: 2302 movs r3, #2
|
|
8004572: e0cc b.n 800470e <HAL_I2C_Master_Transmit+0x1ea>
|
|
8004574: 68fb ldr r3, [r7, #12]
|
|
8004576: 2201 movs r2, #1
|
|
8004578: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
/* Check if the I2C is already enabled */
|
|
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
|
800457c: 68fb ldr r3, [r7, #12]
|
|
800457e: 681b ldr r3, [r3, #0]
|
|
8004580: 681b ldr r3, [r3, #0]
|
|
8004582: f003 0301 and.w r3, r3, #1
|
|
8004586: 2b01 cmp r3, #1
|
|
8004588: d007 beq.n 800459a <HAL_I2C_Master_Transmit+0x76>
|
|
{
|
|
/* Enable I2C peripheral */
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
800458a: 68fb ldr r3, [r7, #12]
|
|
800458c: 681b ldr r3, [r3, #0]
|
|
800458e: 681a ldr r2, [r3, #0]
|
|
8004590: 68fb ldr r3, [r7, #12]
|
|
8004592: 681b ldr r3, [r3, #0]
|
|
8004594: f042 0201 orr.w r2, r2, #1
|
|
8004598: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Disable Pos */
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
800459a: 68fb ldr r3, [r7, #12]
|
|
800459c: 681b ldr r3, [r3, #0]
|
|
800459e: 681a ldr r2, [r3, #0]
|
|
80045a0: 68fb ldr r3, [r7, #12]
|
|
80045a2: 681b ldr r3, [r3, #0]
|
|
80045a4: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
|
80045a8: 601a str r2, [r3, #0]
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY_TX;
|
|
80045aa: 68fb ldr r3, [r7, #12]
|
|
80045ac: 2221 movs r2, #33 ; 0x21
|
|
80045ae: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_MASTER;
|
|
80045b2: 68fb ldr r3, [r7, #12]
|
|
80045b4: 2210 movs r2, #16
|
|
80045b6: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
80045ba: 68fb ldr r3, [r7, #12]
|
|
80045bc: 2200 movs r2, #0
|
|
80045be: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Prepare transfer parameters */
|
|
hi2c->pBuffPtr = pData;
|
|
80045c0: 68fb ldr r3, [r7, #12]
|
|
80045c2: 687a ldr r2, [r7, #4]
|
|
80045c4: 625a str r2, [r3, #36] ; 0x24
|
|
hi2c->XferCount = Size;
|
|
80045c6: 68fb ldr r3, [r7, #12]
|
|
80045c8: 893a ldrh r2, [r7, #8]
|
|
80045ca: 855a strh r2, [r3, #42] ; 0x2a
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
80045cc: 68fb ldr r3, [r7, #12]
|
|
80045ce: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
80045d0: b29a uxth r2, r3
|
|
80045d2: 68fb ldr r3, [r7, #12]
|
|
80045d4: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
|
80045d6: 68fb ldr r3, [r7, #12]
|
|
80045d8: 4a50 ldr r2, [pc, #320] ; (800471c <HAL_I2C_Master_Transmit+0x1f8>)
|
|
80045da: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
/* Send Slave Address */
|
|
if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
|
|
80045dc: 8979 ldrh r1, [r7, #10]
|
|
80045de: 697b ldr r3, [r7, #20]
|
|
80045e0: 6a3a ldr r2, [r7, #32]
|
|
80045e2: 68f8 ldr r0, [r7, #12]
|
|
80045e4: f000 fac2 bl 8004b6c <I2C_MasterRequestWrite>
|
|
80045e8: 4603 mov r3, r0
|
|
80045ea: 2b00 cmp r3, #0
|
|
80045ec: d001 beq.n 80045f2 <HAL_I2C_Master_Transmit+0xce>
|
|
{
|
|
return HAL_ERROR;
|
|
80045ee: 2301 movs r3, #1
|
|
80045f0: e08d b.n 800470e <HAL_I2C_Master_Transmit+0x1ea>
|
|
}
|
|
|
|
/* Clear ADDR flag */
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
80045f2: 2300 movs r3, #0
|
|
80045f4: 613b str r3, [r7, #16]
|
|
80045f6: 68fb ldr r3, [r7, #12]
|
|
80045f8: 681b ldr r3, [r3, #0]
|
|
80045fa: 695b ldr r3, [r3, #20]
|
|
80045fc: 613b str r3, [r7, #16]
|
|
80045fe: 68fb ldr r3, [r7, #12]
|
|
8004600: 681b ldr r3, [r3, #0]
|
|
8004602: 699b ldr r3, [r3, #24]
|
|
8004604: 613b str r3, [r7, #16]
|
|
8004606: 693b ldr r3, [r7, #16]
|
|
|
|
while (hi2c->XferSize > 0U)
|
|
8004608: e066 b.n 80046d8 <HAL_I2C_Master_Transmit+0x1b4>
|
|
{
|
|
/* Wait until TXE flag is set */
|
|
if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
800460a: 697a ldr r2, [r7, #20]
|
|
800460c: 6a39 ldr r1, [r7, #32]
|
|
800460e: 68f8 ldr r0, [r7, #12]
|
|
8004610: f000 fcd2 bl 8004fb8 <I2C_WaitOnTXEFlagUntilTimeout>
|
|
8004614: 4603 mov r3, r0
|
|
8004616: 2b00 cmp r3, #0
|
|
8004618: d00d beq.n 8004636 <HAL_I2C_Master_Transmit+0x112>
|
|
{
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
800461a: 68fb ldr r3, [r7, #12]
|
|
800461c: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
800461e: 2b04 cmp r3, #4
|
|
8004620: d107 bne.n 8004632 <HAL_I2C_Master_Transmit+0x10e>
|
|
{
|
|
/* Generate Stop */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8004622: 68fb ldr r3, [r7, #12]
|
|
8004624: 681b ldr r3, [r3, #0]
|
|
8004626: 681a ldr r2, [r3, #0]
|
|
8004628: 68fb ldr r3, [r7, #12]
|
|
800462a: 681b ldr r3, [r3, #0]
|
|
800462c: f442 7200 orr.w r2, r2, #512 ; 0x200
|
|
8004630: 601a str r2, [r3, #0]
|
|
}
|
|
return HAL_ERROR;
|
|
8004632: 2301 movs r3, #1
|
|
8004634: e06b b.n 800470e <HAL_I2C_Master_Transmit+0x1ea>
|
|
}
|
|
|
|
/* Write data to DR */
|
|
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
|
8004636: 68fb ldr r3, [r7, #12]
|
|
8004638: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
800463a: 781a ldrb r2, [r3, #0]
|
|
800463c: 68fb ldr r3, [r7, #12]
|
|
800463e: 681b ldr r3, [r3, #0]
|
|
8004640: 611a str r2, [r3, #16]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
8004642: 68fb ldr r3, [r7, #12]
|
|
8004644: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004646: 1c5a adds r2, r3, #1
|
|
8004648: 68fb ldr r3, [r7, #12]
|
|
800464a: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferCount--;
|
|
800464c: 68fb ldr r3, [r7, #12]
|
|
800464e: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8004650: b29b uxth r3, r3
|
|
8004652: 3b01 subs r3, #1
|
|
8004654: b29a uxth r2, r3
|
|
8004656: 68fb ldr r3, [r7, #12]
|
|
8004658: 855a strh r2, [r3, #42] ; 0x2a
|
|
hi2c->XferSize--;
|
|
800465a: 68fb ldr r3, [r7, #12]
|
|
800465c: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
800465e: 3b01 subs r3, #1
|
|
8004660: b29a uxth r2, r3
|
|
8004662: 68fb ldr r3, [r7, #12]
|
|
8004664: 851a strh r2, [r3, #40] ; 0x28
|
|
|
|
if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
|
|
8004666: 68fb ldr r3, [r7, #12]
|
|
8004668: 681b ldr r3, [r3, #0]
|
|
800466a: 695b ldr r3, [r3, #20]
|
|
800466c: f003 0304 and.w r3, r3, #4
|
|
8004670: 2b04 cmp r3, #4
|
|
8004672: d11b bne.n 80046ac <HAL_I2C_Master_Transmit+0x188>
|
|
8004674: 68fb ldr r3, [r7, #12]
|
|
8004676: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004678: 2b00 cmp r3, #0
|
|
800467a: d017 beq.n 80046ac <HAL_I2C_Master_Transmit+0x188>
|
|
{
|
|
/* Write data to DR */
|
|
hi2c->Instance->DR = *hi2c->pBuffPtr;
|
|
800467c: 68fb ldr r3, [r7, #12]
|
|
800467e: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004680: 781a ldrb r2, [r3, #0]
|
|
8004682: 68fb ldr r3, [r7, #12]
|
|
8004684: 681b ldr r3, [r3, #0]
|
|
8004686: 611a str r2, [r3, #16]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
8004688: 68fb ldr r3, [r7, #12]
|
|
800468a: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
800468c: 1c5a adds r2, r3, #1
|
|
800468e: 68fb ldr r3, [r7, #12]
|
|
8004690: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferCount--;
|
|
8004692: 68fb ldr r3, [r7, #12]
|
|
8004694: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8004696: b29b uxth r3, r3
|
|
8004698: 3b01 subs r3, #1
|
|
800469a: b29a uxth r2, r3
|
|
800469c: 68fb ldr r3, [r7, #12]
|
|
800469e: 855a strh r2, [r3, #42] ; 0x2a
|
|
hi2c->XferSize--;
|
|
80046a0: 68fb ldr r3, [r7, #12]
|
|
80046a2: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
80046a4: 3b01 subs r3, #1
|
|
80046a6: b29a uxth r2, r3
|
|
80046a8: 68fb ldr r3, [r7, #12]
|
|
80046aa: 851a strh r2, [r3, #40] ; 0x28
|
|
}
|
|
|
|
/* Wait until BTF flag is set */
|
|
if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
80046ac: 697a ldr r2, [r7, #20]
|
|
80046ae: 6a39 ldr r1, [r7, #32]
|
|
80046b0: 68f8 ldr r0, [r7, #12]
|
|
80046b2: f000 fcc2 bl 800503a <I2C_WaitOnBTFFlagUntilTimeout>
|
|
80046b6: 4603 mov r3, r0
|
|
80046b8: 2b00 cmp r3, #0
|
|
80046ba: d00d beq.n 80046d8 <HAL_I2C_Master_Transmit+0x1b4>
|
|
{
|
|
if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
|
|
80046bc: 68fb ldr r3, [r7, #12]
|
|
80046be: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80046c0: 2b04 cmp r3, #4
|
|
80046c2: d107 bne.n 80046d4 <HAL_I2C_Master_Transmit+0x1b0>
|
|
{
|
|
/* Generate Stop */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
80046c4: 68fb ldr r3, [r7, #12]
|
|
80046c6: 681b ldr r3, [r3, #0]
|
|
80046c8: 681a ldr r2, [r3, #0]
|
|
80046ca: 68fb ldr r3, [r7, #12]
|
|
80046cc: 681b ldr r3, [r3, #0]
|
|
80046ce: f442 7200 orr.w r2, r2, #512 ; 0x200
|
|
80046d2: 601a str r2, [r3, #0]
|
|
}
|
|
return HAL_ERROR;
|
|
80046d4: 2301 movs r3, #1
|
|
80046d6: e01a b.n 800470e <HAL_I2C_Master_Transmit+0x1ea>
|
|
while (hi2c->XferSize > 0U)
|
|
80046d8: 68fb ldr r3, [r7, #12]
|
|
80046da: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
80046dc: 2b00 cmp r3, #0
|
|
80046de: d194 bne.n 800460a <HAL_I2C_Master_Transmit+0xe6>
|
|
}
|
|
}
|
|
|
|
/* Generate Stop */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
80046e0: 68fb ldr r3, [r7, #12]
|
|
80046e2: 681b ldr r3, [r3, #0]
|
|
80046e4: 681a ldr r2, [r3, #0]
|
|
80046e6: 68fb ldr r3, [r7, #12]
|
|
80046e8: 681b ldr r3, [r3, #0]
|
|
80046ea: f442 7200 orr.w r2, r2, #512 ; 0x200
|
|
80046ee: 601a str r2, [r3, #0]
|
|
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80046f0: 68fb ldr r3, [r7, #12]
|
|
80046f2: 2220 movs r2, #32
|
|
80046f4: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80046f8: 68fb ldr r3, [r7, #12]
|
|
80046fa: 2200 movs r2, #0
|
|
80046fc: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004700: 68fb ldr r3, [r7, #12]
|
|
8004702: 2200 movs r2, #0
|
|
8004704: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_OK;
|
|
8004708: 2300 movs r3, #0
|
|
800470a: e000 b.n 800470e <HAL_I2C_Master_Transmit+0x1ea>
|
|
}
|
|
else
|
|
{
|
|
return HAL_BUSY;
|
|
800470c: 2302 movs r3, #2
|
|
}
|
|
}
|
|
800470e: 4618 mov r0, r3
|
|
8004710: 3718 adds r7, #24
|
|
8004712: 46bd mov sp, r7
|
|
8004714: bd80 pop {r7, pc}
|
|
8004716: bf00 nop
|
|
8004718: 00100002 .word 0x00100002
|
|
800471c: ffff0000 .word 0xffff0000
|
|
|
|
08004720 <HAL_I2C_Master_Receive>:
|
|
* @param Size Amount of data to be sent
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
|
{
|
|
8004720: b580 push {r7, lr}
|
|
8004722: b08c sub sp, #48 ; 0x30
|
|
8004724: af02 add r7, sp, #8
|
|
8004726: 60f8 str r0, [r7, #12]
|
|
8004728: 607a str r2, [r7, #4]
|
|
800472a: 461a mov r2, r3
|
|
800472c: 460b mov r3, r1
|
|
800472e: 817b strh r3, [r7, #10]
|
|
8004730: 4613 mov r3, r2
|
|
8004732: 813b strh r3, [r7, #8]
|
|
/* Init tickstart for timeout management*/
|
|
uint32_t tickstart = HAL_GetTick();
|
|
8004734: f7fd fdf2 bl 800231c <HAL_GetTick>
|
|
8004738: 6278 str r0, [r7, #36] ; 0x24
|
|
|
|
if (hi2c->State == HAL_I2C_STATE_READY)
|
|
800473a: 68fb ldr r3, [r7, #12]
|
|
800473c: f893 303d ldrb.w r3, [r3, #61] ; 0x3d
|
|
8004740: b2db uxtb r3, r3
|
|
8004742: 2b20 cmp r3, #32
|
|
8004744: f040 820b bne.w 8004b5e <HAL_I2C_Master_Receive+0x43e>
|
|
{
|
|
/* Wait until BUSY flag is reset */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
|
|
8004748: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800474a: 9300 str r3, [sp, #0]
|
|
800474c: 2319 movs r3, #25
|
|
800474e: 2201 movs r2, #1
|
|
8004750: 497c ldr r1, [pc, #496] ; (8004944 <HAL_I2C_Master_Receive+0x224>)
|
|
8004752: 68f8 ldr r0, [r7, #12]
|
|
8004754: f000 fb5a bl 8004e0c <I2C_WaitOnFlagUntilTimeout>
|
|
8004758: 4603 mov r3, r0
|
|
800475a: 2b00 cmp r3, #0
|
|
800475c: d001 beq.n 8004762 <HAL_I2C_Master_Receive+0x42>
|
|
{
|
|
return HAL_BUSY;
|
|
800475e: 2302 movs r3, #2
|
|
8004760: e1fe b.n 8004b60 <HAL_I2C_Master_Receive+0x440>
|
|
}
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(hi2c);
|
|
8004762: 68fb ldr r3, [r7, #12]
|
|
8004764: f893 303c ldrb.w r3, [r3, #60] ; 0x3c
|
|
8004768: 2b01 cmp r3, #1
|
|
800476a: d101 bne.n 8004770 <HAL_I2C_Master_Receive+0x50>
|
|
800476c: 2302 movs r3, #2
|
|
800476e: e1f7 b.n 8004b60 <HAL_I2C_Master_Receive+0x440>
|
|
8004770: 68fb ldr r3, [r7, #12]
|
|
8004772: 2201 movs r2, #1
|
|
8004774: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
/* Check if the I2C is already enabled */
|
|
if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
|
|
8004778: 68fb ldr r3, [r7, #12]
|
|
800477a: 681b ldr r3, [r3, #0]
|
|
800477c: 681b ldr r3, [r3, #0]
|
|
800477e: f003 0301 and.w r3, r3, #1
|
|
8004782: 2b01 cmp r3, #1
|
|
8004784: d007 beq.n 8004796 <HAL_I2C_Master_Receive+0x76>
|
|
{
|
|
/* Enable I2C peripheral */
|
|
__HAL_I2C_ENABLE(hi2c);
|
|
8004786: 68fb ldr r3, [r7, #12]
|
|
8004788: 681b ldr r3, [r3, #0]
|
|
800478a: 681a ldr r2, [r3, #0]
|
|
800478c: 68fb ldr r3, [r7, #12]
|
|
800478e: 681b ldr r3, [r3, #0]
|
|
8004790: f042 0201 orr.w r2, r2, #1
|
|
8004794: 601a str r2, [r3, #0]
|
|
}
|
|
|
|
/* Disable Pos */
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
8004796: 68fb ldr r3, [r7, #12]
|
|
8004798: 681b ldr r3, [r3, #0]
|
|
800479a: 681a ldr r2, [r3, #0]
|
|
800479c: 68fb ldr r3, [r7, #12]
|
|
800479e: 681b ldr r3, [r3, #0]
|
|
80047a0: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
|
80047a4: 601a str r2, [r3, #0]
|
|
|
|
hi2c->State = HAL_I2C_STATE_BUSY_RX;
|
|
80047a6: 68fb ldr r3, [r7, #12]
|
|
80047a8: 2222 movs r2, #34 ; 0x22
|
|
80047aa: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_MASTER;
|
|
80047ae: 68fb ldr r3, [r7, #12]
|
|
80047b0: 2210 movs r2, #16
|
|
80047b2: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
|
|
80047b6: 68fb ldr r3, [r7, #12]
|
|
80047b8: 2200 movs r2, #0
|
|
80047ba: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Prepare transfer parameters */
|
|
hi2c->pBuffPtr = pData;
|
|
80047bc: 68fb ldr r3, [r7, #12]
|
|
80047be: 687a ldr r2, [r7, #4]
|
|
80047c0: 625a str r2, [r3, #36] ; 0x24
|
|
hi2c->XferCount = Size;
|
|
80047c2: 68fb ldr r3, [r7, #12]
|
|
80047c4: 893a ldrh r2, [r7, #8]
|
|
80047c6: 855a strh r2, [r3, #42] ; 0x2a
|
|
hi2c->XferSize = hi2c->XferCount;
|
|
80047c8: 68fb ldr r3, [r7, #12]
|
|
80047ca: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
80047cc: b29a uxth r2, r3
|
|
80047ce: 68fb ldr r3, [r7, #12]
|
|
80047d0: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferOptions = I2C_NO_OPTION_FRAME;
|
|
80047d2: 68fb ldr r3, [r7, #12]
|
|
80047d4: 4a5c ldr r2, [pc, #368] ; (8004948 <HAL_I2C_Master_Receive+0x228>)
|
|
80047d6: 62da str r2, [r3, #44] ; 0x2c
|
|
|
|
/* Send Slave Address */
|
|
if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
|
|
80047d8: 8979 ldrh r1, [r7, #10]
|
|
80047da: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80047dc: 6b3a ldr r2, [r7, #48] ; 0x30
|
|
80047de: 68f8 ldr r0, [r7, #12]
|
|
80047e0: f000 fa46 bl 8004c70 <I2C_MasterRequestRead>
|
|
80047e4: 4603 mov r3, r0
|
|
80047e6: 2b00 cmp r3, #0
|
|
80047e8: d001 beq.n 80047ee <HAL_I2C_Master_Receive+0xce>
|
|
{
|
|
return HAL_ERROR;
|
|
80047ea: 2301 movs r3, #1
|
|
80047ec: e1b8 b.n 8004b60 <HAL_I2C_Master_Receive+0x440>
|
|
}
|
|
|
|
if (hi2c->XferSize == 0U)
|
|
80047ee: 68fb ldr r3, [r7, #12]
|
|
80047f0: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
80047f2: 2b00 cmp r3, #0
|
|
80047f4: d113 bne.n 800481e <HAL_I2C_Master_Receive+0xfe>
|
|
{
|
|
/* Clear ADDR flag */
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
80047f6: 2300 movs r3, #0
|
|
80047f8: 623b str r3, [r7, #32]
|
|
80047fa: 68fb ldr r3, [r7, #12]
|
|
80047fc: 681b ldr r3, [r3, #0]
|
|
80047fe: 695b ldr r3, [r3, #20]
|
|
8004800: 623b str r3, [r7, #32]
|
|
8004802: 68fb ldr r3, [r7, #12]
|
|
8004804: 681b ldr r3, [r3, #0]
|
|
8004806: 699b ldr r3, [r3, #24]
|
|
8004808: 623b str r3, [r7, #32]
|
|
800480a: 6a3b ldr r3, [r7, #32]
|
|
|
|
/* Generate Stop */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
800480c: 68fb ldr r3, [r7, #12]
|
|
800480e: 681b ldr r3, [r3, #0]
|
|
8004810: 681a ldr r2, [r3, #0]
|
|
8004812: 68fb ldr r3, [r7, #12]
|
|
8004814: 681b ldr r3, [r3, #0]
|
|
8004816: f442 7200 orr.w r2, r2, #512 ; 0x200
|
|
800481a: 601a str r2, [r3, #0]
|
|
800481c: e18c b.n 8004b38 <HAL_I2C_Master_Receive+0x418>
|
|
}
|
|
else if (hi2c->XferSize == 1U)
|
|
800481e: 68fb ldr r3, [r7, #12]
|
|
8004820: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004822: 2b01 cmp r3, #1
|
|
8004824: d11b bne.n 800485e <HAL_I2C_Master_Receive+0x13e>
|
|
{
|
|
/* Disable Acknowledge */
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
8004826: 68fb ldr r3, [r7, #12]
|
|
8004828: 681b ldr r3, [r3, #0]
|
|
800482a: 681a ldr r2, [r3, #0]
|
|
800482c: 68fb ldr r3, [r7, #12]
|
|
800482e: 681b ldr r3, [r3, #0]
|
|
8004830: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
|
8004834: 601a str r2, [r3, #0]
|
|
|
|
/* Clear ADDR flag */
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8004836: 2300 movs r3, #0
|
|
8004838: 61fb str r3, [r7, #28]
|
|
800483a: 68fb ldr r3, [r7, #12]
|
|
800483c: 681b ldr r3, [r3, #0]
|
|
800483e: 695b ldr r3, [r3, #20]
|
|
8004840: 61fb str r3, [r7, #28]
|
|
8004842: 68fb ldr r3, [r7, #12]
|
|
8004844: 681b ldr r3, [r3, #0]
|
|
8004846: 699b ldr r3, [r3, #24]
|
|
8004848: 61fb str r3, [r7, #28]
|
|
800484a: 69fb ldr r3, [r7, #28]
|
|
|
|
/* Generate Stop */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
800484c: 68fb ldr r3, [r7, #12]
|
|
800484e: 681b ldr r3, [r3, #0]
|
|
8004850: 681a ldr r2, [r3, #0]
|
|
8004852: 68fb ldr r3, [r7, #12]
|
|
8004854: 681b ldr r3, [r3, #0]
|
|
8004856: f442 7200 orr.w r2, r2, #512 ; 0x200
|
|
800485a: 601a str r2, [r3, #0]
|
|
800485c: e16c b.n 8004b38 <HAL_I2C_Master_Receive+0x418>
|
|
}
|
|
else if (hi2c->XferSize == 2U)
|
|
800485e: 68fb ldr r3, [r7, #12]
|
|
8004860: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004862: 2b02 cmp r3, #2
|
|
8004864: d11b bne.n 800489e <HAL_I2C_Master_Receive+0x17e>
|
|
{
|
|
/* Disable Acknowledge */
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
8004866: 68fb ldr r3, [r7, #12]
|
|
8004868: 681b ldr r3, [r3, #0]
|
|
800486a: 681a ldr r2, [r3, #0]
|
|
800486c: 68fb ldr r3, [r7, #12]
|
|
800486e: 681b ldr r3, [r3, #0]
|
|
8004870: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
|
8004874: 601a str r2, [r3, #0]
|
|
|
|
/* Enable Pos */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
|
|
8004876: 68fb ldr r3, [r7, #12]
|
|
8004878: 681b ldr r3, [r3, #0]
|
|
800487a: 681a ldr r2, [r3, #0]
|
|
800487c: 68fb ldr r3, [r7, #12]
|
|
800487e: 681b ldr r3, [r3, #0]
|
|
8004880: f442 6200 orr.w r2, r2, #2048 ; 0x800
|
|
8004884: 601a str r2, [r3, #0]
|
|
|
|
/* Clear ADDR flag */
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8004886: 2300 movs r3, #0
|
|
8004888: 61bb str r3, [r7, #24]
|
|
800488a: 68fb ldr r3, [r7, #12]
|
|
800488c: 681b ldr r3, [r3, #0]
|
|
800488e: 695b ldr r3, [r3, #20]
|
|
8004890: 61bb str r3, [r7, #24]
|
|
8004892: 68fb ldr r3, [r7, #12]
|
|
8004894: 681b ldr r3, [r3, #0]
|
|
8004896: 699b ldr r3, [r3, #24]
|
|
8004898: 61bb str r3, [r7, #24]
|
|
800489a: 69bb ldr r3, [r7, #24]
|
|
800489c: e14c b.n 8004b38 <HAL_I2C_Master_Receive+0x418>
|
|
}
|
|
else
|
|
{
|
|
/* Enable Acknowledge */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
800489e: 68fb ldr r3, [r7, #12]
|
|
80048a0: 681b ldr r3, [r3, #0]
|
|
80048a2: 681a ldr r2, [r3, #0]
|
|
80048a4: 68fb ldr r3, [r7, #12]
|
|
80048a6: 681b ldr r3, [r3, #0]
|
|
80048a8: f442 6280 orr.w r2, r2, #1024 ; 0x400
|
|
80048ac: 601a str r2, [r3, #0]
|
|
|
|
/* Clear ADDR flag */
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
80048ae: 2300 movs r3, #0
|
|
80048b0: 617b str r3, [r7, #20]
|
|
80048b2: 68fb ldr r3, [r7, #12]
|
|
80048b4: 681b ldr r3, [r3, #0]
|
|
80048b6: 695b ldr r3, [r3, #20]
|
|
80048b8: 617b str r3, [r7, #20]
|
|
80048ba: 68fb ldr r3, [r7, #12]
|
|
80048bc: 681b ldr r3, [r3, #0]
|
|
80048be: 699b ldr r3, [r3, #24]
|
|
80048c0: 617b str r3, [r7, #20]
|
|
80048c2: 697b ldr r3, [r7, #20]
|
|
}
|
|
|
|
while (hi2c->XferSize > 0U)
|
|
80048c4: e138 b.n 8004b38 <HAL_I2C_Master_Receive+0x418>
|
|
{
|
|
if (hi2c->XferSize <= 3U)
|
|
80048c6: 68fb ldr r3, [r7, #12]
|
|
80048c8: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
80048ca: 2b03 cmp r3, #3
|
|
80048cc: f200 80f1 bhi.w 8004ab2 <HAL_I2C_Master_Receive+0x392>
|
|
{
|
|
/* One byte */
|
|
if (hi2c->XferSize == 1U)
|
|
80048d0: 68fb ldr r3, [r7, #12]
|
|
80048d2: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
80048d4: 2b01 cmp r3, #1
|
|
80048d6: d123 bne.n 8004920 <HAL_I2C_Master_Receive+0x200>
|
|
{
|
|
/* Wait until RXNE flag is set */
|
|
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
80048d8: 6a7a ldr r2, [r7, #36] ; 0x24
|
|
80048da: 6b39 ldr r1, [r7, #48] ; 0x30
|
|
80048dc: 68f8 ldr r0, [r7, #12]
|
|
80048de: f000 fbed bl 80050bc <I2C_WaitOnRXNEFlagUntilTimeout>
|
|
80048e2: 4603 mov r3, r0
|
|
80048e4: 2b00 cmp r3, #0
|
|
80048e6: d001 beq.n 80048ec <HAL_I2C_Master_Receive+0x1cc>
|
|
{
|
|
return HAL_ERROR;
|
|
80048e8: 2301 movs r3, #1
|
|
80048ea: e139 b.n 8004b60 <HAL_I2C_Master_Receive+0x440>
|
|
}
|
|
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
80048ec: 68fb ldr r3, [r7, #12]
|
|
80048ee: 681b ldr r3, [r3, #0]
|
|
80048f0: 691a ldr r2, [r3, #16]
|
|
80048f2: 68fb ldr r3, [r7, #12]
|
|
80048f4: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80048f6: b2d2 uxtb r2, r2
|
|
80048f8: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
80048fa: 68fb ldr r3, [r7, #12]
|
|
80048fc: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80048fe: 1c5a adds r2, r3, #1
|
|
8004900: 68fb ldr r3, [r7, #12]
|
|
8004902: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
8004904: 68fb ldr r3, [r7, #12]
|
|
8004906: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004908: 3b01 subs r3, #1
|
|
800490a: b29a uxth r2, r3
|
|
800490c: 68fb ldr r3, [r7, #12]
|
|
800490e: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
8004910: 68fb ldr r3, [r7, #12]
|
|
8004912: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8004914: b29b uxth r3, r3
|
|
8004916: 3b01 subs r3, #1
|
|
8004918: b29a uxth r2, r3
|
|
800491a: 68fb ldr r3, [r7, #12]
|
|
800491c: 855a strh r2, [r3, #42] ; 0x2a
|
|
800491e: e10b b.n 8004b38 <HAL_I2C_Master_Receive+0x418>
|
|
}
|
|
/* Two bytes */
|
|
else if (hi2c->XferSize == 2U)
|
|
8004920: 68fb ldr r3, [r7, #12]
|
|
8004922: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004924: 2b02 cmp r3, #2
|
|
8004926: d14e bne.n 80049c6 <HAL_I2C_Master_Receive+0x2a6>
|
|
{
|
|
/* Wait until BTF flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
|
8004928: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800492a: 9300 str r3, [sp, #0]
|
|
800492c: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
800492e: 2200 movs r2, #0
|
|
8004930: 4906 ldr r1, [pc, #24] ; (800494c <HAL_I2C_Master_Receive+0x22c>)
|
|
8004932: 68f8 ldr r0, [r7, #12]
|
|
8004934: f000 fa6a bl 8004e0c <I2C_WaitOnFlagUntilTimeout>
|
|
8004938: 4603 mov r3, r0
|
|
800493a: 2b00 cmp r3, #0
|
|
800493c: d008 beq.n 8004950 <HAL_I2C_Master_Receive+0x230>
|
|
{
|
|
return HAL_ERROR;
|
|
800493e: 2301 movs r3, #1
|
|
8004940: e10e b.n 8004b60 <HAL_I2C_Master_Receive+0x440>
|
|
8004942: bf00 nop
|
|
8004944: 00100002 .word 0x00100002
|
|
8004948: ffff0000 .word 0xffff0000
|
|
800494c: 00010004 .word 0x00010004
|
|
}
|
|
|
|
/* Generate Stop */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8004950: 68fb ldr r3, [r7, #12]
|
|
8004952: 681b ldr r3, [r3, #0]
|
|
8004954: 681a ldr r2, [r3, #0]
|
|
8004956: 68fb ldr r3, [r7, #12]
|
|
8004958: 681b ldr r3, [r3, #0]
|
|
800495a: f442 7200 orr.w r2, r2, #512 ; 0x200
|
|
800495e: 601a str r2, [r3, #0]
|
|
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8004960: 68fb ldr r3, [r7, #12]
|
|
8004962: 681b ldr r3, [r3, #0]
|
|
8004964: 691a ldr r2, [r3, #16]
|
|
8004966: 68fb ldr r3, [r7, #12]
|
|
8004968: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
800496a: b2d2 uxtb r2, r2
|
|
800496c: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
800496e: 68fb ldr r3, [r7, #12]
|
|
8004970: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004972: 1c5a adds r2, r3, #1
|
|
8004974: 68fb ldr r3, [r7, #12]
|
|
8004976: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
8004978: 68fb ldr r3, [r7, #12]
|
|
800497a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
800497c: 3b01 subs r3, #1
|
|
800497e: b29a uxth r2, r3
|
|
8004980: 68fb ldr r3, [r7, #12]
|
|
8004982: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
8004984: 68fb ldr r3, [r7, #12]
|
|
8004986: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8004988: b29b uxth r3, r3
|
|
800498a: 3b01 subs r3, #1
|
|
800498c: b29a uxth r2, r3
|
|
800498e: 68fb ldr r3, [r7, #12]
|
|
8004990: 855a strh r2, [r3, #42] ; 0x2a
|
|
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8004992: 68fb ldr r3, [r7, #12]
|
|
8004994: 681b ldr r3, [r3, #0]
|
|
8004996: 691a ldr r2, [r3, #16]
|
|
8004998: 68fb ldr r3, [r7, #12]
|
|
800499a: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
800499c: b2d2 uxtb r2, r2
|
|
800499e: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
80049a0: 68fb ldr r3, [r7, #12]
|
|
80049a2: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80049a4: 1c5a adds r2, r3, #1
|
|
80049a6: 68fb ldr r3, [r7, #12]
|
|
80049a8: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
80049aa: 68fb ldr r3, [r7, #12]
|
|
80049ac: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
80049ae: 3b01 subs r3, #1
|
|
80049b0: b29a uxth r2, r3
|
|
80049b2: 68fb ldr r3, [r7, #12]
|
|
80049b4: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
80049b6: 68fb ldr r3, [r7, #12]
|
|
80049b8: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
80049ba: b29b uxth r3, r3
|
|
80049bc: 3b01 subs r3, #1
|
|
80049be: b29a uxth r2, r3
|
|
80049c0: 68fb ldr r3, [r7, #12]
|
|
80049c2: 855a strh r2, [r3, #42] ; 0x2a
|
|
80049c4: e0b8 b.n 8004b38 <HAL_I2C_Master_Receive+0x418>
|
|
}
|
|
/* 3 Last bytes */
|
|
else
|
|
{
|
|
/* Wait until BTF flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
|
80049c6: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
80049c8: 9300 str r3, [sp, #0]
|
|
80049ca: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
80049cc: 2200 movs r2, #0
|
|
80049ce: 4966 ldr r1, [pc, #408] ; (8004b68 <HAL_I2C_Master_Receive+0x448>)
|
|
80049d0: 68f8 ldr r0, [r7, #12]
|
|
80049d2: f000 fa1b bl 8004e0c <I2C_WaitOnFlagUntilTimeout>
|
|
80049d6: 4603 mov r3, r0
|
|
80049d8: 2b00 cmp r3, #0
|
|
80049da: d001 beq.n 80049e0 <HAL_I2C_Master_Receive+0x2c0>
|
|
{
|
|
return HAL_ERROR;
|
|
80049dc: 2301 movs r3, #1
|
|
80049de: e0bf b.n 8004b60 <HAL_I2C_Master_Receive+0x440>
|
|
}
|
|
|
|
/* Disable Acknowledge */
|
|
CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
80049e0: 68fb ldr r3, [r7, #12]
|
|
80049e2: 681b ldr r3, [r3, #0]
|
|
80049e4: 681a ldr r2, [r3, #0]
|
|
80049e6: 68fb ldr r3, [r7, #12]
|
|
80049e8: 681b ldr r3, [r3, #0]
|
|
80049ea: f422 6280 bic.w r2, r2, #1024 ; 0x400
|
|
80049ee: 601a str r2, [r3, #0]
|
|
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
80049f0: 68fb ldr r3, [r7, #12]
|
|
80049f2: 681b ldr r3, [r3, #0]
|
|
80049f4: 691a ldr r2, [r3, #16]
|
|
80049f6: 68fb ldr r3, [r7, #12]
|
|
80049f8: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80049fa: b2d2 uxtb r2, r2
|
|
80049fc: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
80049fe: 68fb ldr r3, [r7, #12]
|
|
8004a00: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004a02: 1c5a adds r2, r3, #1
|
|
8004a04: 68fb ldr r3, [r7, #12]
|
|
8004a06: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
8004a08: 68fb ldr r3, [r7, #12]
|
|
8004a0a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004a0c: 3b01 subs r3, #1
|
|
8004a0e: b29a uxth r2, r3
|
|
8004a10: 68fb ldr r3, [r7, #12]
|
|
8004a12: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
8004a14: 68fb ldr r3, [r7, #12]
|
|
8004a16: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8004a18: b29b uxth r3, r3
|
|
8004a1a: 3b01 subs r3, #1
|
|
8004a1c: b29a uxth r2, r3
|
|
8004a1e: 68fb ldr r3, [r7, #12]
|
|
8004a20: 855a strh r2, [r3, #42] ; 0x2a
|
|
|
|
/* Wait until BTF flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
|
|
8004a22: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8004a24: 9300 str r3, [sp, #0]
|
|
8004a26: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8004a28: 2200 movs r2, #0
|
|
8004a2a: 494f ldr r1, [pc, #316] ; (8004b68 <HAL_I2C_Master_Receive+0x448>)
|
|
8004a2c: 68f8 ldr r0, [r7, #12]
|
|
8004a2e: f000 f9ed bl 8004e0c <I2C_WaitOnFlagUntilTimeout>
|
|
8004a32: 4603 mov r3, r0
|
|
8004a34: 2b00 cmp r3, #0
|
|
8004a36: d001 beq.n 8004a3c <HAL_I2C_Master_Receive+0x31c>
|
|
{
|
|
return HAL_ERROR;
|
|
8004a38: 2301 movs r3, #1
|
|
8004a3a: e091 b.n 8004b60 <HAL_I2C_Master_Receive+0x440>
|
|
}
|
|
|
|
/* Generate Stop */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8004a3c: 68fb ldr r3, [r7, #12]
|
|
8004a3e: 681b ldr r3, [r3, #0]
|
|
8004a40: 681a ldr r2, [r3, #0]
|
|
8004a42: 68fb ldr r3, [r7, #12]
|
|
8004a44: 681b ldr r3, [r3, #0]
|
|
8004a46: f442 7200 orr.w r2, r2, #512 ; 0x200
|
|
8004a4a: 601a str r2, [r3, #0]
|
|
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8004a4c: 68fb ldr r3, [r7, #12]
|
|
8004a4e: 681b ldr r3, [r3, #0]
|
|
8004a50: 691a ldr r2, [r3, #16]
|
|
8004a52: 68fb ldr r3, [r7, #12]
|
|
8004a54: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004a56: b2d2 uxtb r2, r2
|
|
8004a58: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
8004a5a: 68fb ldr r3, [r7, #12]
|
|
8004a5c: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004a5e: 1c5a adds r2, r3, #1
|
|
8004a60: 68fb ldr r3, [r7, #12]
|
|
8004a62: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
8004a64: 68fb ldr r3, [r7, #12]
|
|
8004a66: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004a68: 3b01 subs r3, #1
|
|
8004a6a: b29a uxth r2, r3
|
|
8004a6c: 68fb ldr r3, [r7, #12]
|
|
8004a6e: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
8004a70: 68fb ldr r3, [r7, #12]
|
|
8004a72: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8004a74: b29b uxth r3, r3
|
|
8004a76: 3b01 subs r3, #1
|
|
8004a78: b29a uxth r2, r3
|
|
8004a7a: 68fb ldr r3, [r7, #12]
|
|
8004a7c: 855a strh r2, [r3, #42] ; 0x2a
|
|
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8004a7e: 68fb ldr r3, [r7, #12]
|
|
8004a80: 681b ldr r3, [r3, #0]
|
|
8004a82: 691a ldr r2, [r3, #16]
|
|
8004a84: 68fb ldr r3, [r7, #12]
|
|
8004a86: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004a88: b2d2 uxtb r2, r2
|
|
8004a8a: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
8004a8c: 68fb ldr r3, [r7, #12]
|
|
8004a8e: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004a90: 1c5a adds r2, r3, #1
|
|
8004a92: 68fb ldr r3, [r7, #12]
|
|
8004a94: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
8004a96: 68fb ldr r3, [r7, #12]
|
|
8004a98: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004a9a: 3b01 subs r3, #1
|
|
8004a9c: b29a uxth r2, r3
|
|
8004a9e: 68fb ldr r3, [r7, #12]
|
|
8004aa0: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
8004aa2: 68fb ldr r3, [r7, #12]
|
|
8004aa4: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8004aa6: b29b uxth r3, r3
|
|
8004aa8: 3b01 subs r3, #1
|
|
8004aaa: b29a uxth r2, r3
|
|
8004aac: 68fb ldr r3, [r7, #12]
|
|
8004aae: 855a strh r2, [r3, #42] ; 0x2a
|
|
8004ab0: e042 b.n 8004b38 <HAL_I2C_Master_Receive+0x418>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Wait until RXNE flag is set */
|
|
if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
|
|
8004ab2: 6a7a ldr r2, [r7, #36] ; 0x24
|
|
8004ab4: 6b39 ldr r1, [r7, #48] ; 0x30
|
|
8004ab6: 68f8 ldr r0, [r7, #12]
|
|
8004ab8: f000 fb00 bl 80050bc <I2C_WaitOnRXNEFlagUntilTimeout>
|
|
8004abc: 4603 mov r3, r0
|
|
8004abe: 2b00 cmp r3, #0
|
|
8004ac0: d001 beq.n 8004ac6 <HAL_I2C_Master_Receive+0x3a6>
|
|
{
|
|
return HAL_ERROR;
|
|
8004ac2: 2301 movs r3, #1
|
|
8004ac4: e04c b.n 8004b60 <HAL_I2C_Master_Receive+0x440>
|
|
}
|
|
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8004ac6: 68fb ldr r3, [r7, #12]
|
|
8004ac8: 681b ldr r3, [r3, #0]
|
|
8004aca: 691a ldr r2, [r3, #16]
|
|
8004acc: 68fb ldr r3, [r7, #12]
|
|
8004ace: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004ad0: b2d2 uxtb r2, r2
|
|
8004ad2: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
8004ad4: 68fb ldr r3, [r7, #12]
|
|
8004ad6: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004ad8: 1c5a adds r2, r3, #1
|
|
8004ada: 68fb ldr r3, [r7, #12]
|
|
8004adc: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
8004ade: 68fb ldr r3, [r7, #12]
|
|
8004ae0: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004ae2: 3b01 subs r3, #1
|
|
8004ae4: b29a uxth r2, r3
|
|
8004ae6: 68fb ldr r3, [r7, #12]
|
|
8004ae8: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
8004aea: 68fb ldr r3, [r7, #12]
|
|
8004aec: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8004aee: b29b uxth r3, r3
|
|
8004af0: 3b01 subs r3, #1
|
|
8004af2: b29a uxth r2, r3
|
|
8004af4: 68fb ldr r3, [r7, #12]
|
|
8004af6: 855a strh r2, [r3, #42] ; 0x2a
|
|
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
|
|
8004af8: 68fb ldr r3, [r7, #12]
|
|
8004afa: 681b ldr r3, [r3, #0]
|
|
8004afc: 695b ldr r3, [r3, #20]
|
|
8004afe: f003 0304 and.w r3, r3, #4
|
|
8004b02: 2b04 cmp r3, #4
|
|
8004b04: d118 bne.n 8004b38 <HAL_I2C_Master_Receive+0x418>
|
|
{
|
|
/* Read data from DR */
|
|
*hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
|
|
8004b06: 68fb ldr r3, [r7, #12]
|
|
8004b08: 681b ldr r3, [r3, #0]
|
|
8004b0a: 691a ldr r2, [r3, #16]
|
|
8004b0c: 68fb ldr r3, [r7, #12]
|
|
8004b0e: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004b10: b2d2 uxtb r2, r2
|
|
8004b12: 701a strb r2, [r3, #0]
|
|
|
|
/* Increment Buffer pointer */
|
|
hi2c->pBuffPtr++;
|
|
8004b14: 68fb ldr r3, [r7, #12]
|
|
8004b16: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8004b18: 1c5a adds r2, r3, #1
|
|
8004b1a: 68fb ldr r3, [r7, #12]
|
|
8004b1c: 625a str r2, [r3, #36] ; 0x24
|
|
|
|
/* Update counter */
|
|
hi2c->XferSize--;
|
|
8004b1e: 68fb ldr r3, [r7, #12]
|
|
8004b20: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004b22: 3b01 subs r3, #1
|
|
8004b24: b29a uxth r2, r3
|
|
8004b26: 68fb ldr r3, [r7, #12]
|
|
8004b28: 851a strh r2, [r3, #40] ; 0x28
|
|
hi2c->XferCount--;
|
|
8004b2a: 68fb ldr r3, [r7, #12]
|
|
8004b2c: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8004b2e: b29b uxth r3, r3
|
|
8004b30: 3b01 subs r3, #1
|
|
8004b32: b29a uxth r2, r3
|
|
8004b34: 68fb ldr r3, [r7, #12]
|
|
8004b36: 855a strh r2, [r3, #42] ; 0x2a
|
|
while (hi2c->XferSize > 0U)
|
|
8004b38: 68fb ldr r3, [r7, #12]
|
|
8004b3a: 8d1b ldrh r3, [r3, #40] ; 0x28
|
|
8004b3c: 2b00 cmp r3, #0
|
|
8004b3e: f47f aec2 bne.w 80048c6 <HAL_I2C_Master_Receive+0x1a6>
|
|
}
|
|
}
|
|
}
|
|
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8004b42: 68fb ldr r3, [r7, #12]
|
|
8004b44: 2220 movs r2, #32
|
|
8004b46: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8004b4a: 68fb ldr r3, [r7, #12]
|
|
8004b4c: 2200 movs r2, #0
|
|
8004b4e: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004b52: 68fb ldr r3, [r7, #12]
|
|
8004b54: 2200 movs r2, #0
|
|
8004b56: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_OK;
|
|
8004b5a: 2300 movs r3, #0
|
|
8004b5c: e000 b.n 8004b60 <HAL_I2C_Master_Receive+0x440>
|
|
}
|
|
else
|
|
{
|
|
return HAL_BUSY;
|
|
8004b5e: 2302 movs r3, #2
|
|
}
|
|
}
|
|
8004b60: 4618 mov r0, r3
|
|
8004b62: 3728 adds r7, #40 ; 0x28
|
|
8004b64: 46bd mov sp, r7
|
|
8004b66: bd80 pop {r7, pc}
|
|
8004b68: 00010004 .word 0x00010004
|
|
|
|
08004b6c <I2C_MasterRequestWrite>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
8004b6c: b580 push {r7, lr}
|
|
8004b6e: b088 sub sp, #32
|
|
8004b70: af02 add r7, sp, #8
|
|
8004b72: 60f8 str r0, [r7, #12]
|
|
8004b74: 607a str r2, [r7, #4]
|
|
8004b76: 603b str r3, [r7, #0]
|
|
8004b78: 460b mov r3, r1
|
|
8004b7a: 817b strh r3, [r7, #10]
|
|
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
|
|
uint32_t CurrentXferOptions = hi2c->XferOptions;
|
|
8004b7c: 68fb ldr r3, [r7, #12]
|
|
8004b7e: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8004b80: 617b str r3, [r7, #20]
|
|
|
|
/* Generate Start condition if first transfer */
|
|
if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
|
|
8004b82: 697b ldr r3, [r7, #20]
|
|
8004b84: 2b08 cmp r3, #8
|
|
8004b86: d006 beq.n 8004b96 <I2C_MasterRequestWrite+0x2a>
|
|
8004b88: 697b ldr r3, [r7, #20]
|
|
8004b8a: 2b01 cmp r3, #1
|
|
8004b8c: d003 beq.n 8004b96 <I2C_MasterRequestWrite+0x2a>
|
|
8004b8e: 697b ldr r3, [r7, #20]
|
|
8004b90: f513 3f80 cmn.w r3, #65536 ; 0x10000
|
|
8004b94: d108 bne.n 8004ba8 <I2C_MasterRequestWrite+0x3c>
|
|
{
|
|
/* Generate Start */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8004b96: 68fb ldr r3, [r7, #12]
|
|
8004b98: 681b ldr r3, [r3, #0]
|
|
8004b9a: 681a ldr r2, [r3, #0]
|
|
8004b9c: 68fb ldr r3, [r7, #12]
|
|
8004b9e: 681b ldr r3, [r3, #0]
|
|
8004ba0: f442 7280 orr.w r2, r2, #256 ; 0x100
|
|
8004ba4: 601a str r2, [r3, #0]
|
|
8004ba6: e00b b.n 8004bc0 <I2C_MasterRequestWrite+0x54>
|
|
}
|
|
else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
|
|
8004ba8: 68fb ldr r3, [r7, #12]
|
|
8004baa: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8004bac: 2b12 cmp r3, #18
|
|
8004bae: d107 bne.n 8004bc0 <I2C_MasterRequestWrite+0x54>
|
|
{
|
|
/* Generate ReStart */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8004bb0: 68fb ldr r3, [r7, #12]
|
|
8004bb2: 681b ldr r3, [r3, #0]
|
|
8004bb4: 681a ldr r2, [r3, #0]
|
|
8004bb6: 68fb ldr r3, [r7, #12]
|
|
8004bb8: 681b ldr r3, [r3, #0]
|
|
8004bba: f442 7280 orr.w r2, r2, #256 ; 0x100
|
|
8004bbe: 601a str r2, [r3, #0]
|
|
{
|
|
/* Do nothing */
|
|
}
|
|
|
|
/* Wait until SB flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8004bc0: 683b ldr r3, [r7, #0]
|
|
8004bc2: 9300 str r3, [sp, #0]
|
|
8004bc4: 687b ldr r3, [r7, #4]
|
|
8004bc6: 2200 movs r2, #0
|
|
8004bc8: f04f 1101 mov.w r1, #65537 ; 0x10001
|
|
8004bcc: 68f8 ldr r0, [r7, #12]
|
|
8004bce: f000 f91d bl 8004e0c <I2C_WaitOnFlagUntilTimeout>
|
|
8004bd2: 4603 mov r3, r0
|
|
8004bd4: 2b00 cmp r3, #0
|
|
8004bd6: d00d beq.n 8004bf4 <I2C_MasterRequestWrite+0x88>
|
|
{
|
|
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
|
8004bd8: 68fb ldr r3, [r7, #12]
|
|
8004bda: 681b ldr r3, [r3, #0]
|
|
8004bdc: 681b ldr r3, [r3, #0]
|
|
8004bde: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8004be2: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
|
8004be6: d103 bne.n 8004bf0 <I2C_MasterRequestWrite+0x84>
|
|
{
|
|
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
|
8004be8: 68fb ldr r3, [r7, #12]
|
|
8004bea: f44f 7200 mov.w r2, #512 ; 0x200
|
|
8004bee: 641a str r2, [r3, #64] ; 0x40
|
|
}
|
|
return HAL_TIMEOUT;
|
|
8004bf0: 2303 movs r3, #3
|
|
8004bf2: e035 b.n 8004c60 <I2C_MasterRequestWrite+0xf4>
|
|
}
|
|
|
|
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
|
|
8004bf4: 68fb ldr r3, [r7, #12]
|
|
8004bf6: 691b ldr r3, [r3, #16]
|
|
8004bf8: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
|
8004bfc: d108 bne.n 8004c10 <I2C_MasterRequestWrite+0xa4>
|
|
{
|
|
/* Send slave address */
|
|
hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
|
|
8004bfe: 897b ldrh r3, [r7, #10]
|
|
8004c00: b2db uxtb r3, r3
|
|
8004c02: 461a mov r2, r3
|
|
8004c04: 68fb ldr r3, [r7, #12]
|
|
8004c06: 681b ldr r3, [r3, #0]
|
|
8004c08: f002 02fe and.w r2, r2, #254 ; 0xfe
|
|
8004c0c: 611a str r2, [r3, #16]
|
|
8004c0e: e01b b.n 8004c48 <I2C_MasterRequestWrite+0xdc>
|
|
}
|
|
else
|
|
{
|
|
/* Send header of slave address */
|
|
hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
|
|
8004c10: 897b ldrh r3, [r7, #10]
|
|
8004c12: 11db asrs r3, r3, #7
|
|
8004c14: b2db uxtb r3, r3
|
|
8004c16: f003 0306 and.w r3, r3, #6
|
|
8004c1a: b2db uxtb r3, r3
|
|
8004c1c: f063 030f orn r3, r3, #15
|
|
8004c20: b2da uxtb r2, r3
|
|
8004c22: 68fb ldr r3, [r7, #12]
|
|
8004c24: 681b ldr r3, [r3, #0]
|
|
8004c26: 611a str r2, [r3, #16]
|
|
|
|
/* Wait until ADD10 flag is set */
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
|
|
8004c28: 683b ldr r3, [r7, #0]
|
|
8004c2a: 687a ldr r2, [r7, #4]
|
|
8004c2c: 490e ldr r1, [pc, #56] ; (8004c68 <I2C_MasterRequestWrite+0xfc>)
|
|
8004c2e: 68f8 ldr r0, [r7, #12]
|
|
8004c30: f000 f943 bl 8004eba <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8004c34: 4603 mov r3, r0
|
|
8004c36: 2b00 cmp r3, #0
|
|
8004c38: d001 beq.n 8004c3e <I2C_MasterRequestWrite+0xd2>
|
|
{
|
|
return HAL_ERROR;
|
|
8004c3a: 2301 movs r3, #1
|
|
8004c3c: e010 b.n 8004c60 <I2C_MasterRequestWrite+0xf4>
|
|
}
|
|
|
|
/* Send slave address */
|
|
hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
|
|
8004c3e: 897b ldrh r3, [r7, #10]
|
|
8004c40: b2da uxtb r2, r3
|
|
8004c42: 68fb ldr r3, [r7, #12]
|
|
8004c44: 681b ldr r3, [r3, #0]
|
|
8004c46: 611a str r2, [r3, #16]
|
|
}
|
|
|
|
/* Wait until ADDR flag is set */
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
|
8004c48: 683b ldr r3, [r7, #0]
|
|
8004c4a: 687a ldr r2, [r7, #4]
|
|
8004c4c: 4907 ldr r1, [pc, #28] ; (8004c6c <I2C_MasterRequestWrite+0x100>)
|
|
8004c4e: 68f8 ldr r0, [r7, #12]
|
|
8004c50: f000 f933 bl 8004eba <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8004c54: 4603 mov r3, r0
|
|
8004c56: 2b00 cmp r3, #0
|
|
8004c58: d001 beq.n 8004c5e <I2C_MasterRequestWrite+0xf2>
|
|
{
|
|
return HAL_ERROR;
|
|
8004c5a: 2301 movs r3, #1
|
|
8004c5c: e000 b.n 8004c60 <I2C_MasterRequestWrite+0xf4>
|
|
}
|
|
|
|
return HAL_OK;
|
|
8004c5e: 2300 movs r3, #0
|
|
}
|
|
8004c60: 4618 mov r0, r3
|
|
8004c62: 3718 adds r7, #24
|
|
8004c64: 46bd mov sp, r7
|
|
8004c66: bd80 pop {r7, pc}
|
|
8004c68: 00010008 .word 0x00010008
|
|
8004c6c: 00010002 .word 0x00010002
|
|
|
|
08004c70 <I2C_MasterRequestRead>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
8004c70: b580 push {r7, lr}
|
|
8004c72: b088 sub sp, #32
|
|
8004c74: af02 add r7, sp, #8
|
|
8004c76: 60f8 str r0, [r7, #12]
|
|
8004c78: 607a str r2, [r7, #4]
|
|
8004c7a: 603b str r3, [r7, #0]
|
|
8004c7c: 460b mov r3, r1
|
|
8004c7e: 817b strh r3, [r7, #10]
|
|
/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
|
|
uint32_t CurrentXferOptions = hi2c->XferOptions;
|
|
8004c80: 68fb ldr r3, [r7, #12]
|
|
8004c82: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8004c84: 617b str r3, [r7, #20]
|
|
|
|
/* Enable Acknowledge */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
|
|
8004c86: 68fb ldr r3, [r7, #12]
|
|
8004c88: 681b ldr r3, [r3, #0]
|
|
8004c8a: 681a ldr r2, [r3, #0]
|
|
8004c8c: 68fb ldr r3, [r7, #12]
|
|
8004c8e: 681b ldr r3, [r3, #0]
|
|
8004c90: f442 6280 orr.w r2, r2, #1024 ; 0x400
|
|
8004c94: 601a str r2, [r3, #0]
|
|
|
|
/* Generate Start condition if first transfer */
|
|
if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
|
|
8004c96: 697b ldr r3, [r7, #20]
|
|
8004c98: 2b08 cmp r3, #8
|
|
8004c9a: d006 beq.n 8004caa <I2C_MasterRequestRead+0x3a>
|
|
8004c9c: 697b ldr r3, [r7, #20]
|
|
8004c9e: 2b01 cmp r3, #1
|
|
8004ca0: d003 beq.n 8004caa <I2C_MasterRequestRead+0x3a>
|
|
8004ca2: 697b ldr r3, [r7, #20]
|
|
8004ca4: f513 3f80 cmn.w r3, #65536 ; 0x10000
|
|
8004ca8: d108 bne.n 8004cbc <I2C_MasterRequestRead+0x4c>
|
|
{
|
|
/* Generate Start */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8004caa: 68fb ldr r3, [r7, #12]
|
|
8004cac: 681b ldr r3, [r3, #0]
|
|
8004cae: 681a ldr r2, [r3, #0]
|
|
8004cb0: 68fb ldr r3, [r7, #12]
|
|
8004cb2: 681b ldr r3, [r3, #0]
|
|
8004cb4: f442 7280 orr.w r2, r2, #256 ; 0x100
|
|
8004cb8: 601a str r2, [r3, #0]
|
|
8004cba: e00b b.n 8004cd4 <I2C_MasterRequestRead+0x64>
|
|
}
|
|
else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
|
|
8004cbc: 68fb ldr r3, [r7, #12]
|
|
8004cbe: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8004cc0: 2b11 cmp r3, #17
|
|
8004cc2: d107 bne.n 8004cd4 <I2C_MasterRequestRead+0x64>
|
|
{
|
|
/* Generate ReStart */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8004cc4: 68fb ldr r3, [r7, #12]
|
|
8004cc6: 681b ldr r3, [r3, #0]
|
|
8004cc8: 681a ldr r2, [r3, #0]
|
|
8004cca: 68fb ldr r3, [r7, #12]
|
|
8004ccc: 681b ldr r3, [r3, #0]
|
|
8004cce: f442 7280 orr.w r2, r2, #256 ; 0x100
|
|
8004cd2: 601a str r2, [r3, #0]
|
|
{
|
|
/* Do nothing */
|
|
}
|
|
|
|
/* Wait until SB flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8004cd4: 683b ldr r3, [r7, #0]
|
|
8004cd6: 9300 str r3, [sp, #0]
|
|
8004cd8: 687b ldr r3, [r7, #4]
|
|
8004cda: 2200 movs r2, #0
|
|
8004cdc: f04f 1101 mov.w r1, #65537 ; 0x10001
|
|
8004ce0: 68f8 ldr r0, [r7, #12]
|
|
8004ce2: f000 f893 bl 8004e0c <I2C_WaitOnFlagUntilTimeout>
|
|
8004ce6: 4603 mov r3, r0
|
|
8004ce8: 2b00 cmp r3, #0
|
|
8004cea: d00d beq.n 8004d08 <I2C_MasterRequestRead+0x98>
|
|
{
|
|
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
|
8004cec: 68fb ldr r3, [r7, #12]
|
|
8004cee: 681b ldr r3, [r3, #0]
|
|
8004cf0: 681b ldr r3, [r3, #0]
|
|
8004cf2: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8004cf6: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
|
8004cfa: d103 bne.n 8004d04 <I2C_MasterRequestRead+0x94>
|
|
{
|
|
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
|
8004cfc: 68fb ldr r3, [r7, #12]
|
|
8004cfe: f44f 7200 mov.w r2, #512 ; 0x200
|
|
8004d02: 641a str r2, [r3, #64] ; 0x40
|
|
}
|
|
return HAL_TIMEOUT;
|
|
8004d04: 2303 movs r3, #3
|
|
8004d06: e079 b.n 8004dfc <I2C_MasterRequestRead+0x18c>
|
|
}
|
|
|
|
if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
|
|
8004d08: 68fb ldr r3, [r7, #12]
|
|
8004d0a: 691b ldr r3, [r3, #16]
|
|
8004d0c: f5b3 4f80 cmp.w r3, #16384 ; 0x4000
|
|
8004d10: d108 bne.n 8004d24 <I2C_MasterRequestRead+0xb4>
|
|
{
|
|
/* Send slave address */
|
|
hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
|
|
8004d12: 897b ldrh r3, [r7, #10]
|
|
8004d14: b2db uxtb r3, r3
|
|
8004d16: f043 0301 orr.w r3, r3, #1
|
|
8004d1a: b2da uxtb r2, r3
|
|
8004d1c: 68fb ldr r3, [r7, #12]
|
|
8004d1e: 681b ldr r3, [r3, #0]
|
|
8004d20: 611a str r2, [r3, #16]
|
|
8004d22: e05f b.n 8004de4 <I2C_MasterRequestRead+0x174>
|
|
}
|
|
else
|
|
{
|
|
/* Send header of slave address */
|
|
hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
|
|
8004d24: 897b ldrh r3, [r7, #10]
|
|
8004d26: 11db asrs r3, r3, #7
|
|
8004d28: b2db uxtb r3, r3
|
|
8004d2a: f003 0306 and.w r3, r3, #6
|
|
8004d2e: b2db uxtb r3, r3
|
|
8004d30: f063 030f orn r3, r3, #15
|
|
8004d34: b2da uxtb r2, r3
|
|
8004d36: 68fb ldr r3, [r7, #12]
|
|
8004d38: 681b ldr r3, [r3, #0]
|
|
8004d3a: 611a str r2, [r3, #16]
|
|
|
|
/* Wait until ADD10 flag is set */
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
|
|
8004d3c: 683b ldr r3, [r7, #0]
|
|
8004d3e: 687a ldr r2, [r7, #4]
|
|
8004d40: 4930 ldr r1, [pc, #192] ; (8004e04 <I2C_MasterRequestRead+0x194>)
|
|
8004d42: 68f8 ldr r0, [r7, #12]
|
|
8004d44: f000 f8b9 bl 8004eba <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8004d48: 4603 mov r3, r0
|
|
8004d4a: 2b00 cmp r3, #0
|
|
8004d4c: d001 beq.n 8004d52 <I2C_MasterRequestRead+0xe2>
|
|
{
|
|
return HAL_ERROR;
|
|
8004d4e: 2301 movs r3, #1
|
|
8004d50: e054 b.n 8004dfc <I2C_MasterRequestRead+0x18c>
|
|
}
|
|
|
|
/* Send slave address */
|
|
hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
|
|
8004d52: 897b ldrh r3, [r7, #10]
|
|
8004d54: b2da uxtb r2, r3
|
|
8004d56: 68fb ldr r3, [r7, #12]
|
|
8004d58: 681b ldr r3, [r3, #0]
|
|
8004d5a: 611a str r2, [r3, #16]
|
|
|
|
/* Wait until ADDR flag is set */
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
|
8004d5c: 683b ldr r3, [r7, #0]
|
|
8004d5e: 687a ldr r2, [r7, #4]
|
|
8004d60: 4929 ldr r1, [pc, #164] ; (8004e08 <I2C_MasterRequestRead+0x198>)
|
|
8004d62: 68f8 ldr r0, [r7, #12]
|
|
8004d64: f000 f8a9 bl 8004eba <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8004d68: 4603 mov r3, r0
|
|
8004d6a: 2b00 cmp r3, #0
|
|
8004d6c: d001 beq.n 8004d72 <I2C_MasterRequestRead+0x102>
|
|
{
|
|
return HAL_ERROR;
|
|
8004d6e: 2301 movs r3, #1
|
|
8004d70: e044 b.n 8004dfc <I2C_MasterRequestRead+0x18c>
|
|
}
|
|
|
|
/* Clear ADDR flag */
|
|
__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
|
|
8004d72: 2300 movs r3, #0
|
|
8004d74: 613b str r3, [r7, #16]
|
|
8004d76: 68fb ldr r3, [r7, #12]
|
|
8004d78: 681b ldr r3, [r3, #0]
|
|
8004d7a: 695b ldr r3, [r3, #20]
|
|
8004d7c: 613b str r3, [r7, #16]
|
|
8004d7e: 68fb ldr r3, [r7, #12]
|
|
8004d80: 681b ldr r3, [r3, #0]
|
|
8004d82: 699b ldr r3, [r3, #24]
|
|
8004d84: 613b str r3, [r7, #16]
|
|
8004d86: 693b ldr r3, [r7, #16]
|
|
|
|
/* Generate Restart */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
|
|
8004d88: 68fb ldr r3, [r7, #12]
|
|
8004d8a: 681b ldr r3, [r3, #0]
|
|
8004d8c: 681a ldr r2, [r3, #0]
|
|
8004d8e: 68fb ldr r3, [r7, #12]
|
|
8004d90: 681b ldr r3, [r3, #0]
|
|
8004d92: f442 7280 orr.w r2, r2, #256 ; 0x100
|
|
8004d96: 601a str r2, [r3, #0]
|
|
|
|
/* Wait until SB flag is set */
|
|
if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
|
|
8004d98: 683b ldr r3, [r7, #0]
|
|
8004d9a: 9300 str r3, [sp, #0]
|
|
8004d9c: 687b ldr r3, [r7, #4]
|
|
8004d9e: 2200 movs r2, #0
|
|
8004da0: f04f 1101 mov.w r1, #65537 ; 0x10001
|
|
8004da4: 68f8 ldr r0, [r7, #12]
|
|
8004da6: f000 f831 bl 8004e0c <I2C_WaitOnFlagUntilTimeout>
|
|
8004daa: 4603 mov r3, r0
|
|
8004dac: 2b00 cmp r3, #0
|
|
8004dae: d00d beq.n 8004dcc <I2C_MasterRequestRead+0x15c>
|
|
{
|
|
if (READ_BIT(hi2c->Instance->CR1, I2C_CR1_START) == I2C_CR1_START)
|
|
8004db0: 68fb ldr r3, [r7, #12]
|
|
8004db2: 681b ldr r3, [r3, #0]
|
|
8004db4: 681b ldr r3, [r3, #0]
|
|
8004db6: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8004dba: f5b3 7f80 cmp.w r3, #256 ; 0x100
|
|
8004dbe: d103 bne.n 8004dc8 <I2C_MasterRequestRead+0x158>
|
|
{
|
|
hi2c->ErrorCode = HAL_I2C_WRONG_START;
|
|
8004dc0: 68fb ldr r3, [r7, #12]
|
|
8004dc2: f44f 7200 mov.w r2, #512 ; 0x200
|
|
8004dc6: 641a str r2, [r3, #64] ; 0x40
|
|
}
|
|
return HAL_TIMEOUT;
|
|
8004dc8: 2303 movs r3, #3
|
|
8004dca: e017 b.n 8004dfc <I2C_MasterRequestRead+0x18c>
|
|
}
|
|
|
|
/* Send header of slave address */
|
|
hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
|
|
8004dcc: 897b ldrh r3, [r7, #10]
|
|
8004dce: 11db asrs r3, r3, #7
|
|
8004dd0: b2db uxtb r3, r3
|
|
8004dd2: f003 0306 and.w r3, r3, #6
|
|
8004dd6: b2db uxtb r3, r3
|
|
8004dd8: f063 030e orn r3, r3, #14
|
|
8004ddc: b2da uxtb r2, r3
|
|
8004dde: 68fb ldr r3, [r7, #12]
|
|
8004de0: 681b ldr r3, [r3, #0]
|
|
8004de2: 611a str r2, [r3, #16]
|
|
}
|
|
|
|
/* Wait until ADDR flag is set */
|
|
if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
|
|
8004de4: 683b ldr r3, [r7, #0]
|
|
8004de6: 687a ldr r2, [r7, #4]
|
|
8004de8: 4907 ldr r1, [pc, #28] ; (8004e08 <I2C_MasterRequestRead+0x198>)
|
|
8004dea: 68f8 ldr r0, [r7, #12]
|
|
8004dec: f000 f865 bl 8004eba <I2C_WaitOnMasterAddressFlagUntilTimeout>
|
|
8004df0: 4603 mov r3, r0
|
|
8004df2: 2b00 cmp r3, #0
|
|
8004df4: d001 beq.n 8004dfa <I2C_MasterRequestRead+0x18a>
|
|
{
|
|
return HAL_ERROR;
|
|
8004df6: 2301 movs r3, #1
|
|
8004df8: e000 b.n 8004dfc <I2C_MasterRequestRead+0x18c>
|
|
}
|
|
|
|
return HAL_OK;
|
|
8004dfa: 2300 movs r3, #0
|
|
}
|
|
8004dfc: 4618 mov r0, r3
|
|
8004dfe: 3718 adds r7, #24
|
|
8004e00: 46bd mov sp, r7
|
|
8004e02: bd80 pop {r7, pc}
|
|
8004e04: 00010008 .word 0x00010008
|
|
8004e08: 00010002 .word 0x00010002
|
|
|
|
08004e0c <I2C_WaitOnFlagUntilTimeout>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
8004e0c: b580 push {r7, lr}
|
|
8004e0e: b084 sub sp, #16
|
|
8004e10: af00 add r7, sp, #0
|
|
8004e12: 60f8 str r0, [r7, #12]
|
|
8004e14: 60b9 str r1, [r7, #8]
|
|
8004e16: 603b str r3, [r7, #0]
|
|
8004e18: 4613 mov r3, r2
|
|
8004e1a: 71fb strb r3, [r7, #7]
|
|
/* Wait until flag is set */
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
8004e1c: e025 b.n 8004e6a <I2C_WaitOnFlagUntilTimeout+0x5e>
|
|
{
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8004e1e: 683b ldr r3, [r7, #0]
|
|
8004e20: f1b3 3fff cmp.w r3, #4294967295
|
|
8004e24: d021 beq.n 8004e6a <I2C_WaitOnFlagUntilTimeout+0x5e>
|
|
{
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8004e26: f7fd fa79 bl 800231c <HAL_GetTick>
|
|
8004e2a: 4602 mov r2, r0
|
|
8004e2c: 69bb ldr r3, [r7, #24]
|
|
8004e2e: 1ad3 subs r3, r2, r3
|
|
8004e30: 683a ldr r2, [r7, #0]
|
|
8004e32: 429a cmp r2, r3
|
|
8004e34: d302 bcc.n 8004e3c <I2C_WaitOnFlagUntilTimeout+0x30>
|
|
8004e36: 683b ldr r3, [r7, #0]
|
|
8004e38: 2b00 cmp r3, #0
|
|
8004e3a: d116 bne.n 8004e6a <I2C_WaitOnFlagUntilTimeout+0x5e>
|
|
{
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8004e3c: 68fb ldr r3, [r7, #12]
|
|
8004e3e: 2200 movs r2, #0
|
|
8004e40: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8004e42: 68fb ldr r3, [r7, #12]
|
|
8004e44: 2220 movs r2, #32
|
|
8004e46: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8004e4a: 68fb ldr r3, [r7, #12]
|
|
8004e4c: 2200 movs r2, #0
|
|
8004e4e: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8004e52: 68fb ldr r3, [r7, #12]
|
|
8004e54: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8004e56: f043 0220 orr.w r2, r3, #32
|
|
8004e5a: 68fb ldr r3, [r7, #12]
|
|
8004e5c: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004e5e: 68fb ldr r3, [r7, #12]
|
|
8004e60: 2200 movs r2, #0
|
|
8004e62: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
8004e66: 2301 movs r3, #1
|
|
8004e68: e023 b.n 8004eb2 <I2C_WaitOnFlagUntilTimeout+0xa6>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
|
|
8004e6a: 68bb ldr r3, [r7, #8]
|
|
8004e6c: 0c1b lsrs r3, r3, #16
|
|
8004e6e: b2db uxtb r3, r3
|
|
8004e70: 2b01 cmp r3, #1
|
|
8004e72: d10d bne.n 8004e90 <I2C_WaitOnFlagUntilTimeout+0x84>
|
|
8004e74: 68fb ldr r3, [r7, #12]
|
|
8004e76: 681b ldr r3, [r3, #0]
|
|
8004e78: 695b ldr r3, [r3, #20]
|
|
8004e7a: 43da mvns r2, r3
|
|
8004e7c: 68bb ldr r3, [r7, #8]
|
|
8004e7e: 4013 ands r3, r2
|
|
8004e80: b29b uxth r3, r3
|
|
8004e82: 2b00 cmp r3, #0
|
|
8004e84: bf0c ite eq
|
|
8004e86: 2301 moveq r3, #1
|
|
8004e88: 2300 movne r3, #0
|
|
8004e8a: b2db uxtb r3, r3
|
|
8004e8c: 461a mov r2, r3
|
|
8004e8e: e00c b.n 8004eaa <I2C_WaitOnFlagUntilTimeout+0x9e>
|
|
8004e90: 68fb ldr r3, [r7, #12]
|
|
8004e92: 681b ldr r3, [r3, #0]
|
|
8004e94: 699b ldr r3, [r3, #24]
|
|
8004e96: 43da mvns r2, r3
|
|
8004e98: 68bb ldr r3, [r7, #8]
|
|
8004e9a: 4013 ands r3, r2
|
|
8004e9c: b29b uxth r3, r3
|
|
8004e9e: 2b00 cmp r3, #0
|
|
8004ea0: bf0c ite eq
|
|
8004ea2: 2301 moveq r3, #1
|
|
8004ea4: 2300 movne r3, #0
|
|
8004ea6: b2db uxtb r3, r3
|
|
8004ea8: 461a mov r2, r3
|
|
8004eaa: 79fb ldrb r3, [r7, #7]
|
|
8004eac: 429a cmp r2, r3
|
|
8004eae: d0b6 beq.n 8004e1e <I2C_WaitOnFlagUntilTimeout+0x12>
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
8004eb0: 2300 movs r3, #0
|
|
}
|
|
8004eb2: 4618 mov r0, r3
|
|
8004eb4: 3710 adds r7, #16
|
|
8004eb6: 46bd mov sp, r7
|
|
8004eb8: bd80 pop {r7, pc}
|
|
|
|
08004eba <I2C_WaitOnMasterAddressFlagUntilTimeout>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
8004eba: b580 push {r7, lr}
|
|
8004ebc: b084 sub sp, #16
|
|
8004ebe: af00 add r7, sp, #0
|
|
8004ec0: 60f8 str r0, [r7, #12]
|
|
8004ec2: 60b9 str r1, [r7, #8]
|
|
8004ec4: 607a str r2, [r7, #4]
|
|
8004ec6: 603b str r3, [r7, #0]
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
|
8004ec8: e051 b.n 8004f6e <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
|
{
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
|
8004eca: 68fb ldr r3, [r7, #12]
|
|
8004ecc: 681b ldr r3, [r3, #0]
|
|
8004ece: 695b ldr r3, [r3, #20]
|
|
8004ed0: f403 6380 and.w r3, r3, #1024 ; 0x400
|
|
8004ed4: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
|
8004ed8: d123 bne.n 8004f22 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x68>
|
|
{
|
|
/* Generate Stop */
|
|
SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
|
|
8004eda: 68fb ldr r3, [r7, #12]
|
|
8004edc: 681b ldr r3, [r3, #0]
|
|
8004ede: 681a ldr r2, [r3, #0]
|
|
8004ee0: 68fb ldr r3, [r7, #12]
|
|
8004ee2: 681b ldr r3, [r3, #0]
|
|
8004ee4: f442 7200 orr.w r2, r2, #512 ; 0x200
|
|
8004ee8: 601a str r2, [r3, #0]
|
|
|
|
/* Clear AF Flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
|
8004eea: 68fb ldr r3, [r7, #12]
|
|
8004eec: 681b ldr r3, [r3, #0]
|
|
8004eee: f46f 6280 mvn.w r2, #1024 ; 0x400
|
|
8004ef2: 615a str r2, [r3, #20]
|
|
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8004ef4: 68fb ldr r3, [r7, #12]
|
|
8004ef6: 2200 movs r2, #0
|
|
8004ef8: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8004efa: 68fb ldr r3, [r7, #12]
|
|
8004efc: 2220 movs r2, #32
|
|
8004efe: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8004f02: 68fb ldr r3, [r7, #12]
|
|
8004f04: 2200 movs r2, #0
|
|
8004f06: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
|
8004f0a: 68fb ldr r3, [r7, #12]
|
|
8004f0c: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8004f0e: f043 0204 orr.w r2, r3, #4
|
|
8004f12: 68fb ldr r3, [r7, #12]
|
|
8004f14: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004f16: 68fb ldr r3, [r7, #12]
|
|
8004f18: 2200 movs r2, #0
|
|
8004f1a: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
8004f1e: 2301 movs r3, #1
|
|
8004f20: e046 b.n 8004fb0 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
|
|
}
|
|
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8004f22: 687b ldr r3, [r7, #4]
|
|
8004f24: f1b3 3fff cmp.w r3, #4294967295
|
|
8004f28: d021 beq.n 8004f6e <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
|
{
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8004f2a: f7fd f9f7 bl 800231c <HAL_GetTick>
|
|
8004f2e: 4602 mov r2, r0
|
|
8004f30: 683b ldr r3, [r7, #0]
|
|
8004f32: 1ad3 subs r3, r2, r3
|
|
8004f34: 687a ldr r2, [r7, #4]
|
|
8004f36: 429a cmp r2, r3
|
|
8004f38: d302 bcc.n 8004f40 <I2C_WaitOnMasterAddressFlagUntilTimeout+0x86>
|
|
8004f3a: 687b ldr r3, [r7, #4]
|
|
8004f3c: 2b00 cmp r3, #0
|
|
8004f3e: d116 bne.n 8004f6e <I2C_WaitOnMasterAddressFlagUntilTimeout+0xb4>
|
|
{
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8004f40: 68fb ldr r3, [r7, #12]
|
|
8004f42: 2200 movs r2, #0
|
|
8004f44: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8004f46: 68fb ldr r3, [r7, #12]
|
|
8004f48: 2220 movs r2, #32
|
|
8004f4a: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8004f4e: 68fb ldr r3, [r7, #12]
|
|
8004f50: 2200 movs r2, #0
|
|
8004f52: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8004f56: 68fb ldr r3, [r7, #12]
|
|
8004f58: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8004f5a: f043 0220 orr.w r2, r3, #32
|
|
8004f5e: 68fb ldr r3, [r7, #12]
|
|
8004f60: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8004f62: 68fb ldr r3, [r7, #12]
|
|
8004f64: 2200 movs r2, #0
|
|
8004f66: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
8004f6a: 2301 movs r3, #1
|
|
8004f6c: e020 b.n 8004fb0 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf6>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
|
|
8004f6e: 68bb ldr r3, [r7, #8]
|
|
8004f70: 0c1b lsrs r3, r3, #16
|
|
8004f72: b2db uxtb r3, r3
|
|
8004f74: 2b01 cmp r3, #1
|
|
8004f76: d10c bne.n 8004f92 <I2C_WaitOnMasterAddressFlagUntilTimeout+0xd8>
|
|
8004f78: 68fb ldr r3, [r7, #12]
|
|
8004f7a: 681b ldr r3, [r3, #0]
|
|
8004f7c: 695b ldr r3, [r3, #20]
|
|
8004f7e: 43da mvns r2, r3
|
|
8004f80: 68bb ldr r3, [r7, #8]
|
|
8004f82: 4013 ands r3, r2
|
|
8004f84: b29b uxth r3, r3
|
|
8004f86: 2b00 cmp r3, #0
|
|
8004f88: bf14 ite ne
|
|
8004f8a: 2301 movne r3, #1
|
|
8004f8c: 2300 moveq r3, #0
|
|
8004f8e: b2db uxtb r3, r3
|
|
8004f90: e00b b.n 8004faa <I2C_WaitOnMasterAddressFlagUntilTimeout+0xf0>
|
|
8004f92: 68fb ldr r3, [r7, #12]
|
|
8004f94: 681b ldr r3, [r3, #0]
|
|
8004f96: 699b ldr r3, [r3, #24]
|
|
8004f98: 43da mvns r2, r3
|
|
8004f9a: 68bb ldr r3, [r7, #8]
|
|
8004f9c: 4013 ands r3, r2
|
|
8004f9e: b29b uxth r3, r3
|
|
8004fa0: 2b00 cmp r3, #0
|
|
8004fa2: bf14 ite ne
|
|
8004fa4: 2301 movne r3, #1
|
|
8004fa6: 2300 moveq r3, #0
|
|
8004fa8: b2db uxtb r3, r3
|
|
8004faa: 2b00 cmp r3, #0
|
|
8004fac: d18d bne.n 8004eca <I2C_WaitOnMasterAddressFlagUntilTimeout+0x10>
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
8004fae: 2300 movs r3, #0
|
|
}
|
|
8004fb0: 4618 mov r0, r3
|
|
8004fb2: 3710 adds r7, #16
|
|
8004fb4: 46bd mov sp, r7
|
|
8004fb6: bd80 pop {r7, pc}
|
|
|
|
08004fb8 <I2C_WaitOnTXEFlagUntilTimeout>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
8004fb8: b580 push {r7, lr}
|
|
8004fba: b084 sub sp, #16
|
|
8004fbc: af00 add r7, sp, #0
|
|
8004fbe: 60f8 str r0, [r7, #12]
|
|
8004fc0: 60b9 str r1, [r7, #8]
|
|
8004fc2: 607a str r2, [r7, #4]
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
|
8004fc4: e02d b.n 8005022 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
|
{
|
|
/* Check if a NACK is detected */
|
|
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
|
8004fc6: 68f8 ldr r0, [r7, #12]
|
|
8004fc8: f000 f8ce bl 8005168 <I2C_IsAcknowledgeFailed>
|
|
8004fcc: 4603 mov r3, r0
|
|
8004fce: 2b00 cmp r3, #0
|
|
8004fd0: d001 beq.n 8004fd6 <I2C_WaitOnTXEFlagUntilTimeout+0x1e>
|
|
{
|
|
return HAL_ERROR;
|
|
8004fd2: 2301 movs r3, #1
|
|
8004fd4: e02d b.n 8005032 <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
|
|
}
|
|
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8004fd6: 68bb ldr r3, [r7, #8]
|
|
8004fd8: f1b3 3fff cmp.w r3, #4294967295
|
|
8004fdc: d021 beq.n 8005022 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
|
{
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8004fde: f7fd f99d bl 800231c <HAL_GetTick>
|
|
8004fe2: 4602 mov r2, r0
|
|
8004fe4: 687b ldr r3, [r7, #4]
|
|
8004fe6: 1ad3 subs r3, r2, r3
|
|
8004fe8: 68ba ldr r2, [r7, #8]
|
|
8004fea: 429a cmp r2, r3
|
|
8004fec: d302 bcc.n 8004ff4 <I2C_WaitOnTXEFlagUntilTimeout+0x3c>
|
|
8004fee: 68bb ldr r3, [r7, #8]
|
|
8004ff0: 2b00 cmp r3, #0
|
|
8004ff2: d116 bne.n 8005022 <I2C_WaitOnTXEFlagUntilTimeout+0x6a>
|
|
{
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8004ff4: 68fb ldr r3, [r7, #12]
|
|
8004ff6: 2200 movs r2, #0
|
|
8004ff8: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8004ffa: 68fb ldr r3, [r7, #12]
|
|
8004ffc: 2220 movs r2, #32
|
|
8004ffe: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8005002: 68fb ldr r3, [r7, #12]
|
|
8005004: 2200 movs r2, #0
|
|
8005006: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
800500a: 68fb ldr r3, [r7, #12]
|
|
800500c: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
800500e: f043 0220 orr.w r2, r3, #32
|
|
8005012: 68fb ldr r3, [r7, #12]
|
|
8005014: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8005016: 68fb ldr r3, [r7, #12]
|
|
8005018: 2200 movs r2, #0
|
|
800501a: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
800501e: 2301 movs r3, #1
|
|
8005020: e007 b.n 8005032 <I2C_WaitOnTXEFlagUntilTimeout+0x7a>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
|
|
8005022: 68fb ldr r3, [r7, #12]
|
|
8005024: 681b ldr r3, [r3, #0]
|
|
8005026: 695b ldr r3, [r3, #20]
|
|
8005028: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
800502c: 2b80 cmp r3, #128 ; 0x80
|
|
800502e: d1ca bne.n 8004fc6 <I2C_WaitOnTXEFlagUntilTimeout+0xe>
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
8005030: 2300 movs r3, #0
|
|
}
|
|
8005032: 4618 mov r0, r3
|
|
8005034: 3710 adds r7, #16
|
|
8005036: 46bd mov sp, r7
|
|
8005038: bd80 pop {r7, pc}
|
|
|
|
0800503a <I2C_WaitOnBTFFlagUntilTimeout>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
800503a: b580 push {r7, lr}
|
|
800503c: b084 sub sp, #16
|
|
800503e: af00 add r7, sp, #0
|
|
8005040: 60f8 str r0, [r7, #12]
|
|
8005042: 60b9 str r1, [r7, #8]
|
|
8005044: 607a str r2, [r7, #4]
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
|
8005046: e02d b.n 80050a4 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
|
{
|
|
/* Check if a NACK is detected */
|
|
if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
|
|
8005048: 68f8 ldr r0, [r7, #12]
|
|
800504a: f000 f88d bl 8005168 <I2C_IsAcknowledgeFailed>
|
|
800504e: 4603 mov r3, r0
|
|
8005050: 2b00 cmp r3, #0
|
|
8005052: d001 beq.n 8005058 <I2C_WaitOnBTFFlagUntilTimeout+0x1e>
|
|
{
|
|
return HAL_ERROR;
|
|
8005054: 2301 movs r3, #1
|
|
8005056: e02d b.n 80050b4 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
|
|
}
|
|
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8005058: 68bb ldr r3, [r7, #8]
|
|
800505a: f1b3 3fff cmp.w r3, #4294967295
|
|
800505e: d021 beq.n 80050a4 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
|
{
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
8005060: f7fd f95c bl 800231c <HAL_GetTick>
|
|
8005064: 4602 mov r2, r0
|
|
8005066: 687b ldr r3, [r7, #4]
|
|
8005068: 1ad3 subs r3, r2, r3
|
|
800506a: 68ba ldr r2, [r7, #8]
|
|
800506c: 429a cmp r2, r3
|
|
800506e: d302 bcc.n 8005076 <I2C_WaitOnBTFFlagUntilTimeout+0x3c>
|
|
8005070: 68bb ldr r3, [r7, #8]
|
|
8005072: 2b00 cmp r3, #0
|
|
8005074: d116 bne.n 80050a4 <I2C_WaitOnBTFFlagUntilTimeout+0x6a>
|
|
{
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8005076: 68fb ldr r3, [r7, #12]
|
|
8005078: 2200 movs r2, #0
|
|
800507a: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
800507c: 68fb ldr r3, [r7, #12]
|
|
800507e: 2220 movs r2, #32
|
|
8005080: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8005084: 68fb ldr r3, [r7, #12]
|
|
8005086: 2200 movs r2, #0
|
|
8005088: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
800508c: 68fb ldr r3, [r7, #12]
|
|
800508e: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8005090: f043 0220 orr.w r2, r3, #32
|
|
8005094: 68fb ldr r3, [r7, #12]
|
|
8005096: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8005098: 68fb ldr r3, [r7, #12]
|
|
800509a: 2200 movs r2, #0
|
|
800509c: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
80050a0: 2301 movs r3, #1
|
|
80050a2: e007 b.n 80050b4 <I2C_WaitOnBTFFlagUntilTimeout+0x7a>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
|
|
80050a4: 68fb ldr r3, [r7, #12]
|
|
80050a6: 681b ldr r3, [r3, #0]
|
|
80050a8: 695b ldr r3, [r3, #20]
|
|
80050aa: f003 0304 and.w r3, r3, #4
|
|
80050ae: 2b04 cmp r3, #4
|
|
80050b0: d1ca bne.n 8005048 <I2C_WaitOnBTFFlagUntilTimeout+0xe>
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
80050b2: 2300 movs r3, #0
|
|
}
|
|
80050b4: 4618 mov r0, r3
|
|
80050b6: 3710 adds r7, #16
|
|
80050b8: 46bd mov sp, r7
|
|
80050ba: bd80 pop {r7, pc}
|
|
|
|
080050bc <I2C_WaitOnRXNEFlagUntilTimeout>:
|
|
* @param Timeout Timeout duration
|
|
* @param Tickstart Tick start value
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
|
|
{
|
|
80050bc: b580 push {r7, lr}
|
|
80050be: b084 sub sp, #16
|
|
80050c0: af00 add r7, sp, #0
|
|
80050c2: 60f8 str r0, [r7, #12]
|
|
80050c4: 60b9 str r1, [r7, #8]
|
|
80050c6: 607a str r2, [r7, #4]
|
|
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
|
80050c8: e042 b.n 8005150 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
|
{
|
|
/* Check if a STOPF is detected */
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
|
|
80050ca: 68fb ldr r3, [r7, #12]
|
|
80050cc: 681b ldr r3, [r3, #0]
|
|
80050ce: 695b ldr r3, [r3, #20]
|
|
80050d0: f003 0310 and.w r3, r3, #16
|
|
80050d4: 2b10 cmp r3, #16
|
|
80050d6: d119 bne.n 800510c <I2C_WaitOnRXNEFlagUntilTimeout+0x50>
|
|
{
|
|
/* Clear STOP Flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
|
|
80050d8: 68fb ldr r3, [r7, #12]
|
|
80050da: 681b ldr r3, [r3, #0]
|
|
80050dc: f06f 0210 mvn.w r2, #16
|
|
80050e0: 615a str r2, [r3, #20]
|
|
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
80050e2: 68fb ldr r3, [r7, #12]
|
|
80050e4: 2200 movs r2, #0
|
|
80050e6: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
80050e8: 68fb ldr r3, [r7, #12]
|
|
80050ea: 2220 movs r2, #32
|
|
80050ec: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
80050f0: 68fb ldr r3, [r7, #12]
|
|
80050f2: 2200 movs r2, #0
|
|
80050f4: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
|
|
80050f8: 68fb ldr r3, [r7, #12]
|
|
80050fa: 6c1a ldr r2, [r3, #64] ; 0x40
|
|
80050fc: 68fb ldr r3, [r7, #12]
|
|
80050fe: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8005100: 68fb ldr r3, [r7, #12]
|
|
8005102: 2200 movs r2, #0
|
|
8005104: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
8005108: 2301 movs r3, #1
|
|
800510a: e029 b.n 8005160 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
|
}
|
|
|
|
/* Check for the Timeout */
|
|
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
|
|
800510c: f7fd f906 bl 800231c <HAL_GetTick>
|
|
8005110: 4602 mov r2, r0
|
|
8005112: 687b ldr r3, [r7, #4]
|
|
8005114: 1ad3 subs r3, r2, r3
|
|
8005116: 68ba ldr r2, [r7, #8]
|
|
8005118: 429a cmp r2, r3
|
|
800511a: d302 bcc.n 8005122 <I2C_WaitOnRXNEFlagUntilTimeout+0x66>
|
|
800511c: 68bb ldr r3, [r7, #8]
|
|
800511e: 2b00 cmp r3, #0
|
|
8005120: d116 bne.n 8005150 <I2C_WaitOnRXNEFlagUntilTimeout+0x94>
|
|
{
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
8005122: 68fb ldr r3, [r7, #12]
|
|
8005124: 2200 movs r2, #0
|
|
8005126: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8005128: 68fb ldr r3, [r7, #12]
|
|
800512a: 2220 movs r2, #32
|
|
800512c: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8005130: 68fb ldr r3, [r7, #12]
|
|
8005132: 2200 movs r2, #0
|
|
8005134: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
|
|
8005138: 68fb ldr r3, [r7, #12]
|
|
800513a: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
800513c: f043 0220 orr.w r2, r3, #32
|
|
8005140: 68fb ldr r3, [r7, #12]
|
|
8005142: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
8005144: 68fb ldr r3, [r7, #12]
|
|
8005146: 2200 movs r2, #0
|
|
8005148: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
800514c: 2301 movs r3, #1
|
|
800514e: e007 b.n 8005160 <I2C_WaitOnRXNEFlagUntilTimeout+0xa4>
|
|
while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
|
|
8005150: 68fb ldr r3, [r7, #12]
|
|
8005152: 681b ldr r3, [r3, #0]
|
|
8005154: 695b ldr r3, [r3, #20]
|
|
8005156: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
800515a: 2b40 cmp r3, #64 ; 0x40
|
|
800515c: d1b5 bne.n 80050ca <I2C_WaitOnRXNEFlagUntilTimeout+0xe>
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
800515e: 2300 movs r3, #0
|
|
}
|
|
8005160: 4618 mov r0, r3
|
|
8005162: 3710 adds r7, #16
|
|
8005164: 46bd mov sp, r7
|
|
8005166: bd80 pop {r7, pc}
|
|
|
|
08005168 <I2C_IsAcknowledgeFailed>:
|
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
|
* the configuration information for the specified I2C.
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
|
|
{
|
|
8005168: b480 push {r7}
|
|
800516a: b083 sub sp, #12
|
|
800516c: af00 add r7, sp, #0
|
|
800516e: 6078 str r0, [r7, #4]
|
|
if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
|
|
8005170: 687b ldr r3, [r7, #4]
|
|
8005172: 681b ldr r3, [r3, #0]
|
|
8005174: 695b ldr r3, [r3, #20]
|
|
8005176: f403 6380 and.w r3, r3, #1024 ; 0x400
|
|
800517a: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
|
800517e: d11b bne.n 80051b8 <I2C_IsAcknowledgeFailed+0x50>
|
|
{
|
|
/* Clear NACKF Flag */
|
|
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
|
|
8005180: 687b ldr r3, [r7, #4]
|
|
8005182: 681b ldr r3, [r3, #0]
|
|
8005184: f46f 6280 mvn.w r2, #1024 ; 0x400
|
|
8005188: 615a str r2, [r3, #20]
|
|
|
|
hi2c->PreviousState = I2C_STATE_NONE;
|
|
800518a: 687b ldr r3, [r7, #4]
|
|
800518c: 2200 movs r2, #0
|
|
800518e: 631a str r2, [r3, #48] ; 0x30
|
|
hi2c->State = HAL_I2C_STATE_READY;
|
|
8005190: 687b ldr r3, [r7, #4]
|
|
8005192: 2220 movs r2, #32
|
|
8005194: f883 203d strb.w r2, [r3, #61] ; 0x3d
|
|
hi2c->Mode = HAL_I2C_MODE_NONE;
|
|
8005198: 687b ldr r3, [r7, #4]
|
|
800519a: 2200 movs r2, #0
|
|
800519c: f883 203e strb.w r2, [r3, #62] ; 0x3e
|
|
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
|
|
80051a0: 687b ldr r3, [r7, #4]
|
|
80051a2: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
80051a4: f043 0204 orr.w r2, r3, #4
|
|
80051a8: 687b ldr r3, [r7, #4]
|
|
80051aa: 641a str r2, [r3, #64] ; 0x40
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hi2c);
|
|
80051ac: 687b ldr r3, [r7, #4]
|
|
80051ae: 2200 movs r2, #0
|
|
80051b0: f883 203c strb.w r2, [r3, #60] ; 0x3c
|
|
|
|
return HAL_ERROR;
|
|
80051b4: 2301 movs r3, #1
|
|
80051b6: e000 b.n 80051ba <I2C_IsAcknowledgeFailed+0x52>
|
|
}
|
|
return HAL_OK;
|
|
80051b8: 2300 movs r3, #0
|
|
}
|
|
80051ba: 4618 mov r0, r3
|
|
80051bc: 370c adds r7, #12
|
|
80051be: 46bd mov sp, r7
|
|
80051c0: f85d 7b04 ldr.w r7, [sp], #4
|
|
80051c4: 4770 bx lr
|
|
...
|
|
|
|
080051c8 <HAL_I2S_Init>:
|
|
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|
* the configuration information for I2S module
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
80051c8: b580 push {r7, lr}
|
|
80051ca: b088 sub sp, #32
|
|
80051cc: af00 add r7, sp, #0
|
|
80051ce: 6078 str r0, [r7, #4]
|
|
#if defined (SPI_I2S_FULLDUPLEX_SUPPORT)
|
|
uint16_t tmpreg;
|
|
#endif
|
|
|
|
/* Check the I2S handle allocation */
|
|
if (hi2s == NULL)
|
|
80051d0: 687b ldr r3, [r7, #4]
|
|
80051d2: 2b00 cmp r3, #0
|
|
80051d4: d101 bne.n 80051da <HAL_I2S_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
80051d6: 2301 movs r3, #1
|
|
80051d8: e128 b.n 800542c <HAL_I2S_Init+0x264>
|
|
assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
|
|
assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
|
|
assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
|
|
assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource));
|
|
|
|
if (hi2s->State == HAL_I2S_STATE_RESET)
|
|
80051da: 687b ldr r3, [r7, #4]
|
|
80051dc: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
|
|
80051e0: b2db uxtb r3, r3
|
|
80051e2: 2b00 cmp r3, #0
|
|
80051e4: d109 bne.n 80051fa <HAL_I2S_Init+0x32>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hi2s->Lock = HAL_UNLOCKED;
|
|
80051e6: 687b ldr r3, [r7, #4]
|
|
80051e8: 2200 movs r2, #0
|
|
80051ea: f883 2040 strb.w r2, [r3, #64] ; 0x40
|
|
|
|
/* Initialize Default I2S IrqHandler ISR */
|
|
hi2s->IrqHandlerISR = I2S_IRQHandler;
|
|
80051ee: 687b ldr r3, [r7, #4]
|
|
80051f0: 4a90 ldr r2, [pc, #576] ; (8005434 <HAL_I2S_Init+0x26c>)
|
|
80051f2: 635a str r2, [r3, #52] ; 0x34
|
|
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|
hi2s->MspInitCallback(hi2s);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
|
|
HAL_I2S_MspInit(hi2s);
|
|
80051f4: 6878 ldr r0, [r7, #4]
|
|
80051f6: f7fc fac3 bl 8001780 <HAL_I2S_MspInit>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
hi2s->State = HAL_I2S_STATE_BUSY;
|
|
80051fa: 687b ldr r3, [r7, #4]
|
|
80051fc: 2202 movs r2, #2
|
|
80051fe: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
|
|
/*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
|
|
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
|
|
CLEAR_BIT(hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
|
|
8005202: 687b ldr r3, [r7, #4]
|
|
8005204: 681b ldr r3, [r3, #0]
|
|
8005206: 69db ldr r3, [r3, #28]
|
|
8005208: 687a ldr r2, [r7, #4]
|
|
800520a: 6812 ldr r2, [r2, #0]
|
|
800520c: f423 637b bic.w r3, r3, #4016 ; 0xfb0
|
|
8005210: f023 030f bic.w r3, r3, #15
|
|
8005214: 61d3 str r3, [r2, #28]
|
|
SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
|
|
SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD));
|
|
hi2s->Instance->I2SPR = 0x0002U;
|
|
8005216: 687b ldr r3, [r7, #4]
|
|
8005218: 681b ldr r3, [r3, #0]
|
|
800521a: 2202 movs r2, #2
|
|
800521c: 621a str r2, [r3, #32]
|
|
|
|
/*----------------------- I2SPR: I2SDIV and ODD Calculation -----------------*/
|
|
/* If the requested audio frequency is not the default, compute the prescaler */
|
|
if (hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT)
|
|
800521e: 687b ldr r3, [r7, #4]
|
|
8005220: 695b ldr r3, [r3, #20]
|
|
8005222: 2b02 cmp r3, #2
|
|
8005224: d060 beq.n 80052e8 <HAL_I2S_Init+0x120>
|
|
{
|
|
/* Check the frame length (For the Prescaler computing) ********************/
|
|
if (hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
|
|
8005226: 687b ldr r3, [r7, #4]
|
|
8005228: 68db ldr r3, [r3, #12]
|
|
800522a: 2b00 cmp r3, #0
|
|
800522c: d102 bne.n 8005234 <HAL_I2S_Init+0x6c>
|
|
{
|
|
/* Packet length is 16 bits */
|
|
packetlength = 16U;
|
|
800522e: 2310 movs r3, #16
|
|
8005230: 617b str r3, [r7, #20]
|
|
8005232: e001 b.n 8005238 <HAL_I2S_Init+0x70>
|
|
}
|
|
else
|
|
{
|
|
/* Packet length is 32 bits */
|
|
packetlength = 32U;
|
|
8005234: 2320 movs r3, #32
|
|
8005236: 617b str r3, [r7, #20]
|
|
}
|
|
|
|
/* I2S standard */
|
|
if (hi2s->Init.Standard <= I2S_STANDARD_LSB)
|
|
8005238: 687b ldr r3, [r7, #4]
|
|
800523a: 689b ldr r3, [r3, #8]
|
|
800523c: 2b20 cmp r3, #32
|
|
800523e: d802 bhi.n 8005246 <HAL_I2S_Init+0x7e>
|
|
{
|
|
/* In I2S standard packet lenght is multiplied by 2 */
|
|
packetlength = packetlength * 2U;
|
|
8005240: 697b ldr r3, [r7, #20]
|
|
8005242: 005b lsls r3, r3, #1
|
|
8005244: 617b str r3, [r7, #20]
|
|
else
|
|
{
|
|
i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S_APB2);
|
|
}
|
|
#else
|
|
i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S);
|
|
8005246: 2001 movs r0, #1
|
|
8005248: f001 f9ae bl 80065a8 <HAL_RCCEx_GetPeriphCLKFreq>
|
|
800524c: 60f8 str r0, [r7, #12]
|
|
#endif
|
|
|
|
/* Compute the Real divider depending on the MCLK output state, with a floating point */
|
|
if (hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
|
|
800524e: 687b ldr r3, [r7, #4]
|
|
8005250: 691b ldr r3, [r3, #16]
|
|
8005252: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8005256: d125 bne.n 80052a4 <HAL_I2S_Init+0xdc>
|
|
{
|
|
/* MCLK output is enabled */
|
|
if (hi2s->Init.DataFormat != I2S_DATAFORMAT_16B)
|
|
8005258: 687b ldr r3, [r7, #4]
|
|
800525a: 68db ldr r3, [r3, #12]
|
|
800525c: 2b00 cmp r3, #0
|
|
800525e: d010 beq.n 8005282 <HAL_I2S_Init+0xba>
|
|
{
|
|
tmp = (uint32_t)(((((i2sclk / (packetlength * 4U)) * 10U) / hi2s->Init.AudioFreq)) + 5U);
|
|
8005260: 697b ldr r3, [r7, #20]
|
|
8005262: 009b lsls r3, r3, #2
|
|
8005264: 68fa ldr r2, [r7, #12]
|
|
8005266: fbb2 f2f3 udiv r2, r2, r3
|
|
800526a: 4613 mov r3, r2
|
|
800526c: 009b lsls r3, r3, #2
|
|
800526e: 4413 add r3, r2
|
|
8005270: 005b lsls r3, r3, #1
|
|
8005272: 461a mov r2, r3
|
|
8005274: 687b ldr r3, [r7, #4]
|
|
8005276: 695b ldr r3, [r3, #20]
|
|
8005278: fbb2 f3f3 udiv r3, r2, r3
|
|
800527c: 3305 adds r3, #5
|
|
800527e: 613b str r3, [r7, #16]
|
|
8005280: e01f b.n 80052c2 <HAL_I2S_Init+0xfa>
|
|
}
|
|
else
|
|
{
|
|
tmp = (uint32_t)(((((i2sclk / (packetlength * 8U)) * 10U) / hi2s->Init.AudioFreq)) + 5U);
|
|
8005282: 697b ldr r3, [r7, #20]
|
|
8005284: 00db lsls r3, r3, #3
|
|
8005286: 68fa ldr r2, [r7, #12]
|
|
8005288: fbb2 f2f3 udiv r2, r2, r3
|
|
800528c: 4613 mov r3, r2
|
|
800528e: 009b lsls r3, r3, #2
|
|
8005290: 4413 add r3, r2
|
|
8005292: 005b lsls r3, r3, #1
|
|
8005294: 461a mov r2, r3
|
|
8005296: 687b ldr r3, [r7, #4]
|
|
8005298: 695b ldr r3, [r3, #20]
|
|
800529a: fbb2 f3f3 udiv r3, r2, r3
|
|
800529e: 3305 adds r3, #5
|
|
80052a0: 613b str r3, [r7, #16]
|
|
80052a2: e00e b.n 80052c2 <HAL_I2S_Init+0xfa>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* MCLK output is disabled */
|
|
tmp = (uint32_t)(((((i2sclk / packetlength) * 10U) / hi2s->Init.AudioFreq)) + 5U);
|
|
80052a4: 68fa ldr r2, [r7, #12]
|
|
80052a6: 697b ldr r3, [r7, #20]
|
|
80052a8: fbb2 f2f3 udiv r2, r2, r3
|
|
80052ac: 4613 mov r3, r2
|
|
80052ae: 009b lsls r3, r3, #2
|
|
80052b0: 4413 add r3, r2
|
|
80052b2: 005b lsls r3, r3, #1
|
|
80052b4: 461a mov r2, r3
|
|
80052b6: 687b ldr r3, [r7, #4]
|
|
80052b8: 695b ldr r3, [r3, #20]
|
|
80052ba: fbb2 f3f3 udiv r3, r2, r3
|
|
80052be: 3305 adds r3, #5
|
|
80052c0: 613b str r3, [r7, #16]
|
|
}
|
|
|
|
/* Remove the flatting point */
|
|
tmp = tmp / 10U;
|
|
80052c2: 693b ldr r3, [r7, #16]
|
|
80052c4: 4a5c ldr r2, [pc, #368] ; (8005438 <HAL_I2S_Init+0x270>)
|
|
80052c6: fba2 2303 umull r2, r3, r2, r3
|
|
80052ca: 08db lsrs r3, r3, #3
|
|
80052cc: 613b str r3, [r7, #16]
|
|
|
|
/* Check the parity of the divider */
|
|
i2sodd = (uint32_t)(tmp & (uint32_t)1U);
|
|
80052ce: 693b ldr r3, [r7, #16]
|
|
80052d0: f003 0301 and.w r3, r3, #1
|
|
80052d4: 61bb str r3, [r7, #24]
|
|
|
|
/* Compute the i2sdiv prescaler */
|
|
i2sdiv = (uint32_t)((tmp - i2sodd) / 2U);
|
|
80052d6: 693a ldr r2, [r7, #16]
|
|
80052d8: 69bb ldr r3, [r7, #24]
|
|
80052da: 1ad3 subs r3, r2, r3
|
|
80052dc: 085b lsrs r3, r3, #1
|
|
80052de: 61fb str r3, [r7, #28]
|
|
|
|
/* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
|
|
i2sodd = (uint32_t)(i2sodd << 8U);
|
|
80052e0: 69bb ldr r3, [r7, #24]
|
|
80052e2: 021b lsls r3, r3, #8
|
|
80052e4: 61bb str r3, [r7, #24]
|
|
80052e6: e003 b.n 80052f0 <HAL_I2S_Init+0x128>
|
|
}
|
|
else
|
|
{
|
|
/* Set the default values */
|
|
i2sdiv = 2U;
|
|
80052e8: 2302 movs r3, #2
|
|
80052ea: 61fb str r3, [r7, #28]
|
|
i2sodd = 0U;
|
|
80052ec: 2300 movs r3, #0
|
|
80052ee: 61bb str r3, [r7, #24]
|
|
}
|
|
|
|
/* Test if the divider is 1 or 0 or greater than 0xFF */
|
|
if ((i2sdiv < 2U) || (i2sdiv > 0xFFU))
|
|
80052f0: 69fb ldr r3, [r7, #28]
|
|
80052f2: 2b01 cmp r3, #1
|
|
80052f4: d902 bls.n 80052fc <HAL_I2S_Init+0x134>
|
|
80052f6: 69fb ldr r3, [r7, #28]
|
|
80052f8: 2bff cmp r3, #255 ; 0xff
|
|
80052fa: d907 bls.n 800530c <HAL_I2S_Init+0x144>
|
|
{
|
|
/* Set the error code and execute error callback*/
|
|
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_PRESCALER);
|
|
80052fc: 687b ldr r3, [r7, #4]
|
|
80052fe: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8005300: f043 0210 orr.w r2, r3, #16
|
|
8005304: 687b ldr r3, [r7, #4]
|
|
8005306: 645a str r2, [r3, #68] ; 0x44
|
|
return HAL_ERROR;
|
|
8005308: 2301 movs r3, #1
|
|
800530a: e08f b.n 800542c <HAL_I2S_Init+0x264>
|
|
}
|
|
|
|
/*----------------------- SPIx I2SCFGR & I2SPR Configuration ----------------*/
|
|
|
|
/* Write to SPIx I2SPR register the computed value */
|
|
hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput));
|
|
800530c: 687b ldr r3, [r7, #4]
|
|
800530e: 691a ldr r2, [r3, #16]
|
|
8005310: 69bb ldr r3, [r7, #24]
|
|
8005312: ea42 0103 orr.w r1, r2, r3
|
|
8005316: 687b ldr r3, [r7, #4]
|
|
8005318: 681b ldr r3, [r3, #0]
|
|
800531a: 69fa ldr r2, [r7, #28]
|
|
800531c: 430a orrs r2, r1
|
|
800531e: 621a str r2, [r3, #32]
|
|
|
|
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
|
|
/* And configure the I2S with the I2S_InitStruct values */
|
|
MODIFY_REG(hi2s->Instance->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | \
|
|
8005320: 687b ldr r3, [r7, #4]
|
|
8005322: 681b ldr r3, [r3, #0]
|
|
8005324: 69db ldr r3, [r3, #28]
|
|
8005326: f423 637b bic.w r3, r3, #4016 ; 0xfb0
|
|
800532a: f023 030f bic.w r3, r3, #15
|
|
800532e: 687a ldr r2, [r7, #4]
|
|
8005330: 6851 ldr r1, [r2, #4]
|
|
8005332: 687a ldr r2, [r7, #4]
|
|
8005334: 6892 ldr r2, [r2, #8]
|
|
8005336: 4311 orrs r1, r2
|
|
8005338: 687a ldr r2, [r7, #4]
|
|
800533a: 68d2 ldr r2, [r2, #12]
|
|
800533c: 4311 orrs r1, r2
|
|
800533e: 687a ldr r2, [r7, #4]
|
|
8005340: 6992 ldr r2, [r2, #24]
|
|
8005342: 430a orrs r2, r1
|
|
8005344: 431a orrs r2, r3
|
|
8005346: 687b ldr r3, [r7, #4]
|
|
8005348: 681b ldr r3, [r3, #0]
|
|
800534a: f442 6200 orr.w r2, r2, #2048 ; 0x800
|
|
800534e: 61da str r2, [r3, #28]
|
|
#if defined (SPI_I2S_FULLDUPLEX_SUPPORT)
|
|
|
|
/* Configure the I2S extended if the full duplex mode is enabled */
|
|
assert_param(IS_I2S_FULLDUPLEX_MODE(hi2s->Init.FullDuplexMode));
|
|
|
|
if (hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE)
|
|
8005350: 687b ldr r3, [r7, #4]
|
|
8005352: 6a1b ldr r3, [r3, #32]
|
|
8005354: 2b01 cmp r3, #1
|
|
8005356: d161 bne.n 800541c <HAL_I2S_Init+0x254>
|
|
{
|
|
/* Set FullDuplex I2S IrqHandler ISR if FULLDUPLEXMODE is enabled */
|
|
hi2s->IrqHandlerISR = HAL_I2SEx_FullDuplex_IRQHandler;
|
|
8005358: 687b ldr r3, [r7, #4]
|
|
800535a: 4a38 ldr r2, [pc, #224] ; (800543c <HAL_I2S_Init+0x274>)
|
|
800535c: 635a str r2, [r3, #52] ; 0x34
|
|
|
|
/* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
|
|
CLEAR_BIT(I2SxEXT(hi2s->Instance)->I2SCFGR, (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
|
|
800535e: 687b ldr r3, [r7, #4]
|
|
8005360: 681b ldr r3, [r3, #0]
|
|
8005362: 4a37 ldr r2, [pc, #220] ; (8005440 <HAL_I2S_Init+0x278>)
|
|
8005364: 4293 cmp r3, r2
|
|
8005366: d101 bne.n 800536c <HAL_I2S_Init+0x1a4>
|
|
8005368: 4b36 ldr r3, [pc, #216] ; (8005444 <HAL_I2S_Init+0x27c>)
|
|
800536a: e001 b.n 8005370 <HAL_I2S_Init+0x1a8>
|
|
800536c: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
8005370: 69db ldr r3, [r3, #28]
|
|
8005372: 687a ldr r2, [r7, #4]
|
|
8005374: 6812 ldr r2, [r2, #0]
|
|
8005376: 4932 ldr r1, [pc, #200] ; (8005440 <HAL_I2S_Init+0x278>)
|
|
8005378: 428a cmp r2, r1
|
|
800537a: d101 bne.n 8005380 <HAL_I2S_Init+0x1b8>
|
|
800537c: 4a31 ldr r2, [pc, #196] ; (8005444 <HAL_I2S_Init+0x27c>)
|
|
800537e: e001 b.n 8005384 <HAL_I2S_Init+0x1bc>
|
|
8005380: f04f 2240 mov.w r2, #1073758208 ; 0x40004000
|
|
8005384: f423 637b bic.w r3, r3, #4016 ; 0xfb0
|
|
8005388: f023 030f bic.w r3, r3, #15
|
|
800538c: 61d3 str r3, [r2, #28]
|
|
SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
|
|
SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD));
|
|
I2SxEXT(hi2s->Instance)->I2SPR = 2U;
|
|
800538e: 687b ldr r3, [r7, #4]
|
|
8005390: 681b ldr r3, [r3, #0]
|
|
8005392: 4a2b ldr r2, [pc, #172] ; (8005440 <HAL_I2S_Init+0x278>)
|
|
8005394: 4293 cmp r3, r2
|
|
8005396: d101 bne.n 800539c <HAL_I2S_Init+0x1d4>
|
|
8005398: 4b2a ldr r3, [pc, #168] ; (8005444 <HAL_I2S_Init+0x27c>)
|
|
800539a: e001 b.n 80053a0 <HAL_I2S_Init+0x1d8>
|
|
800539c: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
80053a0: 2202 movs r2, #2
|
|
80053a2: 621a str r2, [r3, #32]
|
|
|
|
/* Get the I2SCFGR register value */
|
|
tmpreg = I2SxEXT(hi2s->Instance)->I2SCFGR;
|
|
80053a4: 687b ldr r3, [r7, #4]
|
|
80053a6: 681b ldr r3, [r3, #0]
|
|
80053a8: 4a25 ldr r2, [pc, #148] ; (8005440 <HAL_I2S_Init+0x278>)
|
|
80053aa: 4293 cmp r3, r2
|
|
80053ac: d101 bne.n 80053b2 <HAL_I2S_Init+0x1ea>
|
|
80053ae: 4b25 ldr r3, [pc, #148] ; (8005444 <HAL_I2S_Init+0x27c>)
|
|
80053b0: e001 b.n 80053b6 <HAL_I2S_Init+0x1ee>
|
|
80053b2: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
80053b6: 69db ldr r3, [r3, #28]
|
|
80053b8: 817b strh r3, [r7, #10]
|
|
|
|
/* Get the mode to be configured for the extended I2S */
|
|
if ((hi2s->Init.Mode == I2S_MODE_MASTER_TX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_TX))
|
|
80053ba: 687b ldr r3, [r7, #4]
|
|
80053bc: 685b ldr r3, [r3, #4]
|
|
80053be: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
80053c2: d003 beq.n 80053cc <HAL_I2S_Init+0x204>
|
|
80053c4: 687b ldr r3, [r7, #4]
|
|
80053c6: 685b ldr r3, [r3, #4]
|
|
80053c8: 2b00 cmp r3, #0
|
|
80053ca: d103 bne.n 80053d4 <HAL_I2S_Init+0x20c>
|
|
{
|
|
tmp = I2S_MODE_SLAVE_RX;
|
|
80053cc: f44f 7380 mov.w r3, #256 ; 0x100
|
|
80053d0: 613b str r3, [r7, #16]
|
|
80053d2: e001 b.n 80053d8 <HAL_I2S_Init+0x210>
|
|
}
|
|
else /* I2S_MODE_MASTER_RX || I2S_MODE_SLAVE_RX */
|
|
{
|
|
tmp = I2S_MODE_SLAVE_TX;
|
|
80053d4: 2300 movs r3, #0
|
|
80053d6: 613b str r3, [r7, #16]
|
|
}
|
|
|
|
/* Configure the I2S Slave with the I2S Master parameter values */
|
|
tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \
|
|
80053d8: 693b ldr r3, [r7, #16]
|
|
80053da: b29a uxth r2, r3
|
|
(uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \
|
|
80053dc: 687b ldr r3, [r7, #4]
|
|
80053de: 689b ldr r3, [r3, #8]
|
|
80053e0: b299 uxth r1, r3
|
|
80053e2: 687b ldr r3, [r7, #4]
|
|
80053e4: 68db ldr r3, [r3, #12]
|
|
80053e6: b298 uxth r0, r3
|
|
(uint16_t)hi2s->Init.CPOL))));
|
|
80053e8: 687b ldr r3, [r7, #4]
|
|
80053ea: 699b ldr r3, [r3, #24]
|
|
80053ec: b29b uxth r3, r3
|
|
(uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \
|
|
80053ee: 4303 orrs r3, r0
|
|
80053f0: b29b uxth r3, r3
|
|
80053f2: 430b orrs r3, r1
|
|
80053f4: b29b uxth r3, r3
|
|
tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \
|
|
80053f6: 4313 orrs r3, r2
|
|
80053f8: b29a uxth r2, r3
|
|
80053fa: 897b ldrh r3, [r7, #10]
|
|
80053fc: 4313 orrs r3, r2
|
|
80053fe: b29b uxth r3, r3
|
|
8005400: f443 6300 orr.w r3, r3, #2048 ; 0x800
|
|
8005404: 817b strh r3, [r7, #10]
|
|
|
|
/* Write to SPIx I2SCFGR */
|
|
WRITE_REG(I2SxEXT(hi2s->Instance)->I2SCFGR, tmpreg);
|
|
8005406: 687b ldr r3, [r7, #4]
|
|
8005408: 681b ldr r3, [r3, #0]
|
|
800540a: 4a0d ldr r2, [pc, #52] ; (8005440 <HAL_I2S_Init+0x278>)
|
|
800540c: 4293 cmp r3, r2
|
|
800540e: d101 bne.n 8005414 <HAL_I2S_Init+0x24c>
|
|
8005410: 4b0c ldr r3, [pc, #48] ; (8005444 <HAL_I2S_Init+0x27c>)
|
|
8005412: e001 b.n 8005418 <HAL_I2S_Init+0x250>
|
|
8005414: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
8005418: 897a ldrh r2, [r7, #10]
|
|
800541a: 61da str r2, [r3, #28]
|
|
}
|
|
#endif /* SPI_I2S_FULLDUPLEX_SUPPORT */
|
|
|
|
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|
800541c: 687b ldr r3, [r7, #4]
|
|
800541e: 2200 movs r2, #0
|
|
8005420: 645a str r2, [r3, #68] ; 0x44
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
8005422: 687b ldr r3, [r7, #4]
|
|
8005424: 2201 movs r2, #1
|
|
8005426: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
|
|
return HAL_OK;
|
|
800542a: 2300 movs r3, #0
|
|
}
|
|
800542c: 4618 mov r0, r3
|
|
800542e: 3720 adds r7, #32
|
|
8005430: 46bd mov sp, r7
|
|
8005432: bd80 pop {r7, pc}
|
|
8005434: 0800553f .word 0x0800553f
|
|
8005438: cccccccd .word 0xcccccccd
|
|
800543c: 08005655 .word 0x08005655
|
|
8005440: 40003800 .word 0x40003800
|
|
8005444: 40003400 .word 0x40003400
|
|
|
|
08005448 <HAL_I2S_TxCpltCallback>:
|
|
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|
* the configuration information for I2S module
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
8005448: b480 push {r7}
|
|
800544a: b083 sub sp, #12
|
|
800544c: af00 add r7, sp, #0
|
|
800544e: 6078 str r0, [r7, #4]
|
|
UNUSED(hi2s);
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_I2S_TxCpltCallback could be implemented in the user file
|
|
*/
|
|
}
|
|
8005450: bf00 nop
|
|
8005452: 370c adds r7, #12
|
|
8005454: 46bd mov sp, r7
|
|
8005456: f85d 7b04 ldr.w r7, [sp], #4
|
|
800545a: 4770 bx lr
|
|
|
|
0800545c <HAL_I2S_RxCpltCallback>:
|
|
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|
* the configuration information for I2S module
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
800545c: b480 push {r7}
|
|
800545e: b083 sub sp, #12
|
|
8005460: af00 add r7, sp, #0
|
|
8005462: 6078 str r0, [r7, #4]
|
|
UNUSED(hi2s);
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_I2S_RxCpltCallback could be implemented in the user file
|
|
*/
|
|
}
|
|
8005464: bf00 nop
|
|
8005466: 370c adds r7, #12
|
|
8005468: 46bd mov sp, r7
|
|
800546a: f85d 7b04 ldr.w r7, [sp], #4
|
|
800546e: 4770 bx lr
|
|
|
|
08005470 <HAL_I2S_ErrorCallback>:
|
|
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|
* the configuration information for I2S module
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
8005470: b480 push {r7}
|
|
8005472: b083 sub sp, #12
|
|
8005474: af00 add r7, sp, #0
|
|
8005476: 6078 str r0, [r7, #4]
|
|
UNUSED(hi2s);
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_I2S_ErrorCallback could be implemented in the user file
|
|
*/
|
|
}
|
|
8005478: bf00 nop
|
|
800547a: 370c adds r7, #12
|
|
800547c: 46bd mov sp, r7
|
|
800547e: f85d 7b04 ldr.w r7, [sp], #4
|
|
8005482: 4770 bx lr
|
|
|
|
08005484 <I2S_Transmit_IT>:
|
|
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|
* the configuration information for I2S module
|
|
* @retval None
|
|
*/
|
|
static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
8005484: b580 push {r7, lr}
|
|
8005486: b082 sub sp, #8
|
|
8005488: af00 add r7, sp, #0
|
|
800548a: 6078 str r0, [r7, #4]
|
|
/* Transmit data */
|
|
hi2s->Instance->DR = (*hi2s->pTxBuffPtr);
|
|
800548c: 687b ldr r3, [r7, #4]
|
|
800548e: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8005490: 881a ldrh r2, [r3, #0]
|
|
8005492: 687b ldr r3, [r7, #4]
|
|
8005494: 681b ldr r3, [r3, #0]
|
|
8005496: 60da str r2, [r3, #12]
|
|
hi2s->pTxBuffPtr++;
|
|
8005498: 687b ldr r3, [r7, #4]
|
|
800549a: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
800549c: 1c9a adds r2, r3, #2
|
|
800549e: 687b ldr r3, [r7, #4]
|
|
80054a0: 625a str r2, [r3, #36] ; 0x24
|
|
hi2s->TxXferCount--;
|
|
80054a2: 687b ldr r3, [r7, #4]
|
|
80054a4: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
80054a6: b29b uxth r3, r3
|
|
80054a8: 3b01 subs r3, #1
|
|
80054aa: b29a uxth r2, r3
|
|
80054ac: 687b ldr r3, [r7, #4]
|
|
80054ae: 855a strh r2, [r3, #42] ; 0x2a
|
|
|
|
if (hi2s->TxXferCount == 0U)
|
|
80054b0: 687b ldr r3, [r7, #4]
|
|
80054b2: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
80054b4: b29b uxth r3, r3
|
|
80054b6: 2b00 cmp r3, #0
|
|
80054b8: d10e bne.n 80054d8 <I2S_Transmit_IT+0x54>
|
|
{
|
|
/* Disable TXE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
80054ba: 687b ldr r3, [r7, #4]
|
|
80054bc: 681b ldr r3, [r3, #0]
|
|
80054be: 685a ldr r2, [r3, #4]
|
|
80054c0: 687b ldr r3, [r7, #4]
|
|
80054c2: 681b ldr r3, [r3, #0]
|
|
80054c4: f022 02a0 bic.w r2, r2, #160 ; 0xa0
|
|
80054c8: 605a str r2, [r3, #4]
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
80054ca: 687b ldr r3, [r7, #4]
|
|
80054cc: 2201 movs r2, #1
|
|
80054ce: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
/* Call user Tx complete callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->TxCpltCallback(hi2s);
|
|
#else
|
|
HAL_I2S_TxCpltCallback(hi2s);
|
|
80054d2: 6878 ldr r0, [r7, #4]
|
|
80054d4: f7ff ffb8 bl 8005448 <HAL_I2S_TxCpltCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
80054d8: bf00 nop
|
|
80054da: 3708 adds r7, #8
|
|
80054dc: 46bd mov sp, r7
|
|
80054de: bd80 pop {r7, pc}
|
|
|
|
080054e0 <I2S_Receive_IT>:
|
|
* @param hi2s pointer to a I2S_HandleTypeDef structure that contains
|
|
* the configuration information for I2S module
|
|
* @retval None
|
|
*/
|
|
static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
80054e0: b580 push {r7, lr}
|
|
80054e2: b082 sub sp, #8
|
|
80054e4: af00 add r7, sp, #0
|
|
80054e6: 6078 str r0, [r7, #4]
|
|
/* Receive data */
|
|
(*hi2s->pRxBuffPtr) = (uint16_t)hi2s->Instance->DR;
|
|
80054e8: 687b ldr r3, [r7, #4]
|
|
80054ea: 681b ldr r3, [r3, #0]
|
|
80054ec: 68da ldr r2, [r3, #12]
|
|
80054ee: 687b ldr r3, [r7, #4]
|
|
80054f0: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
80054f2: b292 uxth r2, r2
|
|
80054f4: 801a strh r2, [r3, #0]
|
|
hi2s->pRxBuffPtr++;
|
|
80054f6: 687b ldr r3, [r7, #4]
|
|
80054f8: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
80054fa: 1c9a adds r2, r3, #2
|
|
80054fc: 687b ldr r3, [r7, #4]
|
|
80054fe: 62da str r2, [r3, #44] ; 0x2c
|
|
hi2s->RxXferCount--;
|
|
8005500: 687b ldr r3, [r7, #4]
|
|
8005502: 8e5b ldrh r3, [r3, #50] ; 0x32
|
|
8005504: b29b uxth r3, r3
|
|
8005506: 3b01 subs r3, #1
|
|
8005508: b29a uxth r2, r3
|
|
800550a: 687b ldr r3, [r7, #4]
|
|
800550c: 865a strh r2, [r3, #50] ; 0x32
|
|
|
|
if (hi2s->RxXferCount == 0U)
|
|
800550e: 687b ldr r3, [r7, #4]
|
|
8005510: 8e5b ldrh r3, [r3, #50] ; 0x32
|
|
8005512: b29b uxth r3, r3
|
|
8005514: 2b00 cmp r3, #0
|
|
8005516: d10e bne.n 8005536 <I2S_Receive_IT+0x56>
|
|
{
|
|
/* Disable RXNE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
8005518: 687b ldr r3, [r7, #4]
|
|
800551a: 681b ldr r3, [r3, #0]
|
|
800551c: 685a ldr r2, [r3, #4]
|
|
800551e: 687b ldr r3, [r7, #4]
|
|
8005520: 681b ldr r3, [r3, #0]
|
|
8005522: f022 0260 bic.w r2, r2, #96 ; 0x60
|
|
8005526: 605a str r2, [r3, #4]
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
8005528: 687b ldr r3, [r7, #4]
|
|
800552a: 2201 movs r2, #1
|
|
800552c: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
/* Call user Rx complete callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->RxCpltCallback(hi2s);
|
|
#else
|
|
HAL_I2S_RxCpltCallback(hi2s);
|
|
8005530: 6878 ldr r0, [r7, #4]
|
|
8005532: f7ff ff93 bl 800545c <HAL_I2S_RxCpltCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
8005536: bf00 nop
|
|
8005538: 3708 adds r7, #8
|
|
800553a: 46bd mov sp, r7
|
|
800553c: bd80 pop {r7, pc}
|
|
|
|
0800553e <I2S_IRQHandler>:
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
* the configuration information for I2S module
|
|
* @retval None
|
|
*/
|
|
static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
800553e: b580 push {r7, lr}
|
|
8005540: b086 sub sp, #24
|
|
8005542: af00 add r7, sp, #0
|
|
8005544: 6078 str r0, [r7, #4]
|
|
__IO uint32_t i2ssr = hi2s->Instance->SR;
|
|
8005546: 687b ldr r3, [r7, #4]
|
|
8005548: 681b ldr r3, [r3, #0]
|
|
800554a: 689b ldr r3, [r3, #8]
|
|
800554c: 617b str r3, [r7, #20]
|
|
|
|
if (hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
|
800554e: 687b ldr r3, [r7, #4]
|
|
8005550: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
|
|
8005554: b2db uxtb r3, r3
|
|
8005556: 2b04 cmp r3, #4
|
|
8005558: d13a bne.n 80055d0 <I2S_IRQHandler+0x92>
|
|
{
|
|
/* I2S in mode Receiver ------------------------------------------------*/
|
|
if (((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
|
|
800555a: 697b ldr r3, [r7, #20]
|
|
800555c: f003 0301 and.w r3, r3, #1
|
|
8005560: 2b01 cmp r3, #1
|
|
8005562: d109 bne.n 8005578 <I2S_IRQHandler+0x3a>
|
|
8005564: 687b ldr r3, [r7, #4]
|
|
8005566: 681b ldr r3, [r3, #0]
|
|
8005568: 685b ldr r3, [r3, #4]
|
|
800556a: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
800556e: 2b40 cmp r3, #64 ; 0x40
|
|
8005570: d102 bne.n 8005578 <I2S_IRQHandler+0x3a>
|
|
{
|
|
I2S_Receive_IT(hi2s);
|
|
8005572: 6878 ldr r0, [r7, #4]
|
|
8005574: f7ff ffb4 bl 80054e0 <I2S_Receive_IT>
|
|
}
|
|
|
|
/* I2S Overrun error interrupt occurred -------------------------------------*/
|
|
if (((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
|
|
8005578: 697b ldr r3, [r7, #20]
|
|
800557a: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
800557e: 2b40 cmp r3, #64 ; 0x40
|
|
8005580: d126 bne.n 80055d0 <I2S_IRQHandler+0x92>
|
|
8005582: 687b ldr r3, [r7, #4]
|
|
8005584: 681b ldr r3, [r3, #0]
|
|
8005586: 685b ldr r3, [r3, #4]
|
|
8005588: f003 0320 and.w r3, r3, #32
|
|
800558c: 2b20 cmp r3, #32
|
|
800558e: d11f bne.n 80055d0 <I2S_IRQHandler+0x92>
|
|
{
|
|
/* Disable RXNE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
8005590: 687b ldr r3, [r7, #4]
|
|
8005592: 681b ldr r3, [r3, #0]
|
|
8005594: 685a ldr r2, [r3, #4]
|
|
8005596: 687b ldr r3, [r7, #4]
|
|
8005598: 681b ldr r3, [r3, #0]
|
|
800559a: f022 0260 bic.w r2, r2, #96 ; 0x60
|
|
800559e: 605a str r2, [r3, #4]
|
|
|
|
/* Clear Overrun flag */
|
|
__HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
|
80055a0: 2300 movs r3, #0
|
|
80055a2: 613b str r3, [r7, #16]
|
|
80055a4: 687b ldr r3, [r7, #4]
|
|
80055a6: 681b ldr r3, [r3, #0]
|
|
80055a8: 68db ldr r3, [r3, #12]
|
|
80055aa: 613b str r3, [r7, #16]
|
|
80055ac: 687b ldr r3, [r7, #4]
|
|
80055ae: 681b ldr r3, [r3, #0]
|
|
80055b0: 689b ldr r3, [r3, #8]
|
|
80055b2: 613b str r3, [r7, #16]
|
|
80055b4: 693b ldr r3, [r7, #16]
|
|
|
|
/* Set the I2S State ready */
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
80055b6: 687b ldr r3, [r7, #4]
|
|
80055b8: 2201 movs r2, #1
|
|
80055ba: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
|
|
|
|
/* Set the error code and execute error callback*/
|
|
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
|
|
80055be: 687b ldr r3, [r7, #4]
|
|
80055c0: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
80055c2: f043 0202 orr.w r2, r3, #2
|
|
80055c6: 687b ldr r3, [r7, #4]
|
|
80055c8: 645a str r2, [r3, #68] ; 0x44
|
|
/* Call user error callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->ErrorCallback(hi2s);
|
|
#else
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
80055ca: 6878 ldr r0, [r7, #4]
|
|
80055cc: f7ff ff50 bl 8005470 <HAL_I2S_ErrorCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
|
|
if (hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
|
80055d0: 687b ldr r3, [r7, #4]
|
|
80055d2: f893 3041 ldrb.w r3, [r3, #65] ; 0x41
|
|
80055d6: b2db uxtb r3, r3
|
|
80055d8: 2b03 cmp r3, #3
|
|
80055da: d136 bne.n 800564a <I2S_IRQHandler+0x10c>
|
|
{
|
|
/* I2S in mode Transmitter -----------------------------------------------*/
|
|
if (((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
|
|
80055dc: 697b ldr r3, [r7, #20]
|
|
80055de: f003 0302 and.w r3, r3, #2
|
|
80055e2: 2b02 cmp r3, #2
|
|
80055e4: d109 bne.n 80055fa <I2S_IRQHandler+0xbc>
|
|
80055e6: 687b ldr r3, [r7, #4]
|
|
80055e8: 681b ldr r3, [r3, #0]
|
|
80055ea: 685b ldr r3, [r3, #4]
|
|
80055ec: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
80055f0: 2b80 cmp r3, #128 ; 0x80
|
|
80055f2: d102 bne.n 80055fa <I2S_IRQHandler+0xbc>
|
|
{
|
|
I2S_Transmit_IT(hi2s);
|
|
80055f4: 6878 ldr r0, [r7, #4]
|
|
80055f6: f7ff ff45 bl 8005484 <I2S_Transmit_IT>
|
|
}
|
|
|
|
/* I2S Underrun error interrupt occurred --------------------------------*/
|
|
if (((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
|
|
80055fa: 697b ldr r3, [r7, #20]
|
|
80055fc: f003 0308 and.w r3, r3, #8
|
|
8005600: 2b08 cmp r3, #8
|
|
8005602: d122 bne.n 800564a <I2S_IRQHandler+0x10c>
|
|
8005604: 687b ldr r3, [r7, #4]
|
|
8005606: 681b ldr r3, [r3, #0]
|
|
8005608: 685b ldr r3, [r3, #4]
|
|
800560a: f003 0320 and.w r3, r3, #32
|
|
800560e: 2b20 cmp r3, #32
|
|
8005610: d11b bne.n 800564a <I2S_IRQHandler+0x10c>
|
|
{
|
|
/* Disable TXE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
8005612: 687b ldr r3, [r7, #4]
|
|
8005614: 681b ldr r3, [r3, #0]
|
|
8005616: 685a ldr r2, [r3, #4]
|
|
8005618: 687b ldr r3, [r7, #4]
|
|
800561a: 681b ldr r3, [r3, #0]
|
|
800561c: f022 02a0 bic.w r2, r2, #160 ; 0xa0
|
|
8005620: 605a str r2, [r3, #4]
|
|
|
|
/* Clear Underrun flag */
|
|
__HAL_I2S_CLEAR_UDRFLAG(hi2s);
|
|
8005622: 2300 movs r3, #0
|
|
8005624: 60fb str r3, [r7, #12]
|
|
8005626: 687b ldr r3, [r7, #4]
|
|
8005628: 681b ldr r3, [r3, #0]
|
|
800562a: 689b ldr r3, [r3, #8]
|
|
800562c: 60fb str r3, [r7, #12]
|
|
800562e: 68fb ldr r3, [r7, #12]
|
|
|
|
/* Set the I2S State ready */
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
8005630: 687b ldr r3, [r7, #4]
|
|
8005632: 2201 movs r2, #1
|
|
8005634: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
|
|
/* Set the error code and execute error callback*/
|
|
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
|
|
8005638: 687b ldr r3, [r7, #4]
|
|
800563a: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
800563c: f043 0204 orr.w r2, r3, #4
|
|
8005640: 687b ldr r3, [r7, #4]
|
|
8005642: 645a str r2, [r3, #68] ; 0x44
|
|
/* Call user error callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->ErrorCallback(hi2s);
|
|
#else
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
8005644: 6878 ldr r0, [r7, #4]
|
|
8005646: f7ff ff13 bl 8005470 <HAL_I2S_ErrorCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
}
|
|
800564a: bf00 nop
|
|
800564c: 3718 adds r7, #24
|
|
800564e: 46bd mov sp, r7
|
|
8005650: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08005654 <HAL_I2SEx_FullDuplex_IRQHandler>:
|
|
* @brief This function handles I2S/I2Sext interrupt requests in full-duplex mode.
|
|
* @param hi2s I2S handle
|
|
* @retval HAL status
|
|
*/
|
|
void HAL_I2SEx_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
8005654: b580 push {r7, lr}
|
|
8005656: b088 sub sp, #32
|
|
8005658: af00 add r7, sp, #0
|
|
800565a: 6078 str r0, [r7, #4]
|
|
__IO uint32_t i2ssr = hi2s->Instance->SR;
|
|
800565c: 687b ldr r3, [r7, #4]
|
|
800565e: 681b ldr r3, [r3, #0]
|
|
8005660: 689b ldr r3, [r3, #8]
|
|
8005662: 61fb str r3, [r7, #28]
|
|
__IO uint32_t i2sextsr = I2SxEXT(hi2s->Instance)->SR;
|
|
8005664: 687b ldr r3, [r7, #4]
|
|
8005666: 681b ldr r3, [r3, #0]
|
|
8005668: 4aa2 ldr r2, [pc, #648] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
800566a: 4293 cmp r3, r2
|
|
800566c: d101 bne.n 8005672 <HAL_I2SEx_FullDuplex_IRQHandler+0x1e>
|
|
800566e: 4ba2 ldr r3, [pc, #648] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
8005670: e001 b.n 8005676 <HAL_I2SEx_FullDuplex_IRQHandler+0x22>
|
|
8005672: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
8005676: 689b ldr r3, [r3, #8]
|
|
8005678: 61bb str r3, [r7, #24]
|
|
__IO uint32_t i2scr2 = hi2s->Instance->CR2;
|
|
800567a: 687b ldr r3, [r7, #4]
|
|
800567c: 681b ldr r3, [r3, #0]
|
|
800567e: 685b ldr r3, [r3, #4]
|
|
8005680: 617b str r3, [r7, #20]
|
|
__IO uint32_t i2sextcr2 = I2SxEXT(hi2s->Instance)->CR2;
|
|
8005682: 687b ldr r3, [r7, #4]
|
|
8005684: 681b ldr r3, [r3, #0]
|
|
8005686: 4a9b ldr r2, [pc, #620] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
8005688: 4293 cmp r3, r2
|
|
800568a: d101 bne.n 8005690 <HAL_I2SEx_FullDuplex_IRQHandler+0x3c>
|
|
800568c: 4b9a ldr r3, [pc, #616] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
800568e: e001 b.n 8005694 <HAL_I2SEx_FullDuplex_IRQHandler+0x40>
|
|
8005690: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
8005694: 685b ldr r3, [r3, #4]
|
|
8005696: 613b str r3, [r7, #16]
|
|
|
|
/* Check if the I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX Mode is selected */
|
|
if ((hi2s->Init.Mode == I2S_MODE_MASTER_TX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_TX))
|
|
8005698: 687b ldr r3, [r7, #4]
|
|
800569a: 685b ldr r3, [r3, #4]
|
|
800569c: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
80056a0: d004 beq.n 80056ac <HAL_I2SEx_FullDuplex_IRQHandler+0x58>
|
|
80056a2: 687b ldr r3, [r7, #4]
|
|
80056a4: 685b ldr r3, [r3, #4]
|
|
80056a6: 2b00 cmp r3, #0
|
|
80056a8: f040 8099 bne.w 80057de <HAL_I2SEx_FullDuplex_IRQHandler+0x18a>
|
|
{
|
|
/* I2S in mode Transmitter -------------------------------------------------*/
|
|
if (((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && ((i2scr2 & I2S_IT_TXE) != RESET))
|
|
80056ac: 69fb ldr r3, [r7, #28]
|
|
80056ae: f003 0302 and.w r3, r3, #2
|
|
80056b2: 2b02 cmp r3, #2
|
|
80056b4: d107 bne.n 80056c6 <HAL_I2SEx_FullDuplex_IRQHandler+0x72>
|
|
80056b6: 697b ldr r3, [r7, #20]
|
|
80056b8: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
80056bc: 2b00 cmp r3, #0
|
|
80056be: d002 beq.n 80056c6 <HAL_I2SEx_FullDuplex_IRQHandler+0x72>
|
|
{
|
|
/* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX,
|
|
the I2S TXE interrupt will be generated to manage the full-duplex transmit phase. */
|
|
I2SEx_TxISR_I2S(hi2s);
|
|
80056c0: 6878 ldr r0, [r7, #4]
|
|
80056c2: f000 f925 bl 8005910 <I2SEx_TxISR_I2S>
|
|
}
|
|
|
|
/* I2Sext in mode Receiver -----------------------------------------------*/
|
|
if (((i2sextsr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && ((i2sextcr2 & I2S_IT_RXNE) != RESET))
|
|
80056c6: 69bb ldr r3, [r7, #24]
|
|
80056c8: f003 0301 and.w r3, r3, #1
|
|
80056cc: 2b01 cmp r3, #1
|
|
80056ce: d107 bne.n 80056e0 <HAL_I2SEx_FullDuplex_IRQHandler+0x8c>
|
|
80056d0: 693b ldr r3, [r7, #16]
|
|
80056d2: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80056d6: 2b00 cmp r3, #0
|
|
80056d8: d002 beq.n 80056e0 <HAL_I2SEx_FullDuplex_IRQHandler+0x8c>
|
|
{
|
|
/* When the I2S mode is configured as I2S_MODE_MASTER_TX or I2S_MODE_SLAVE_TX,
|
|
the I2Sext RXNE interrupt will be generated to manage the full-duplex receive phase. */
|
|
I2SEx_RxISR_I2SExt(hi2s);
|
|
80056da: 6878 ldr r0, [r7, #4]
|
|
80056dc: f000 f9c8 bl 8005a70 <I2SEx_RxISR_I2SExt>
|
|
}
|
|
|
|
/* I2Sext Overrun error interrupt occurred --------------------------------*/
|
|
if (((i2sextsr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && ((i2sextcr2 & I2S_IT_ERR) != RESET))
|
|
80056e0: 69bb ldr r3, [r7, #24]
|
|
80056e2: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
80056e6: 2b40 cmp r3, #64 ; 0x40
|
|
80056e8: d13a bne.n 8005760 <HAL_I2SEx_FullDuplex_IRQHandler+0x10c>
|
|
80056ea: 693b ldr r3, [r7, #16]
|
|
80056ec: f003 0320 and.w r3, r3, #32
|
|
80056f0: 2b00 cmp r3, #0
|
|
80056f2: d035 beq.n 8005760 <HAL_I2SEx_FullDuplex_IRQHandler+0x10c>
|
|
{
|
|
/* Disable RXNE and ERR interrupt */
|
|
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
80056f4: 687b ldr r3, [r7, #4]
|
|
80056f6: 681b ldr r3, [r3, #0]
|
|
80056f8: 4a7e ldr r2, [pc, #504] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
80056fa: 4293 cmp r3, r2
|
|
80056fc: d101 bne.n 8005702 <HAL_I2SEx_FullDuplex_IRQHandler+0xae>
|
|
80056fe: 4b7e ldr r3, [pc, #504] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
8005700: e001 b.n 8005706 <HAL_I2SEx_FullDuplex_IRQHandler+0xb2>
|
|
8005702: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
8005706: 685a ldr r2, [r3, #4]
|
|
8005708: 687b ldr r3, [r7, #4]
|
|
800570a: 681b ldr r3, [r3, #0]
|
|
800570c: 4979 ldr r1, [pc, #484] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
800570e: 428b cmp r3, r1
|
|
8005710: d101 bne.n 8005716 <HAL_I2SEx_FullDuplex_IRQHandler+0xc2>
|
|
8005712: 4b79 ldr r3, [pc, #484] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
8005714: e001 b.n 800571a <HAL_I2SEx_FullDuplex_IRQHandler+0xc6>
|
|
8005716: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
800571a: f022 0260 bic.w r2, r2, #96 ; 0x60
|
|
800571e: 605a str r2, [r3, #4]
|
|
|
|
/* Disable TXE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
8005720: 687b ldr r3, [r7, #4]
|
|
8005722: 681b ldr r3, [r3, #0]
|
|
8005724: 685a ldr r2, [r3, #4]
|
|
8005726: 687b ldr r3, [r7, #4]
|
|
8005728: 681b ldr r3, [r3, #0]
|
|
800572a: f022 02a0 bic.w r2, r2, #160 ; 0xa0
|
|
800572e: 605a str r2, [r3, #4]
|
|
|
|
/* Clear Overrun flag */
|
|
__HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
|
8005730: 2300 movs r3, #0
|
|
8005732: 60fb str r3, [r7, #12]
|
|
8005734: 687b ldr r3, [r7, #4]
|
|
8005736: 681b ldr r3, [r3, #0]
|
|
8005738: 68db ldr r3, [r3, #12]
|
|
800573a: 60fb str r3, [r7, #12]
|
|
800573c: 687b ldr r3, [r7, #4]
|
|
800573e: 681b ldr r3, [r3, #0]
|
|
8005740: 689b ldr r3, [r3, #8]
|
|
8005742: 60fb str r3, [r7, #12]
|
|
8005744: 68fb ldr r3, [r7, #12]
|
|
|
|
/* Set the I2S State ready */
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
8005746: 687b ldr r3, [r7, #4]
|
|
8005748: 2201 movs r2, #1
|
|
800574a: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
|
|
/* Set the error code and execute error callback*/
|
|
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
|
|
800574e: 687b ldr r3, [r7, #4]
|
|
8005750: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8005752: f043 0202 orr.w r2, r3, #2
|
|
8005756: 687b ldr r3, [r7, #4]
|
|
8005758: 645a str r2, [r3, #68] ; 0x44
|
|
/* Call user error callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->ErrorCallback(hi2s);
|
|
#else
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
800575a: 6878 ldr r0, [r7, #4]
|
|
800575c: f7ff fe88 bl 8005470 <HAL_I2S_ErrorCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
/* I2S Underrun error interrupt occurred ----------------------------------*/
|
|
if (((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && ((i2scr2 & I2S_IT_ERR) != RESET))
|
|
8005760: 69fb ldr r3, [r7, #28]
|
|
8005762: f003 0308 and.w r3, r3, #8
|
|
8005766: 2b08 cmp r3, #8
|
|
8005768: f040 80be bne.w 80058e8 <HAL_I2SEx_FullDuplex_IRQHandler+0x294>
|
|
800576c: 697b ldr r3, [r7, #20]
|
|
800576e: f003 0320 and.w r3, r3, #32
|
|
8005772: 2b00 cmp r3, #0
|
|
8005774: f000 80b8 beq.w 80058e8 <HAL_I2SEx_FullDuplex_IRQHandler+0x294>
|
|
{
|
|
/* Disable TXE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
8005778: 687b ldr r3, [r7, #4]
|
|
800577a: 681b ldr r3, [r3, #0]
|
|
800577c: 685a ldr r2, [r3, #4]
|
|
800577e: 687b ldr r3, [r7, #4]
|
|
8005780: 681b ldr r3, [r3, #0]
|
|
8005782: f022 02a0 bic.w r2, r2, #160 ; 0xa0
|
|
8005786: 605a str r2, [r3, #4]
|
|
|
|
/* Disable RXNE and ERR interrupt */
|
|
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
8005788: 687b ldr r3, [r7, #4]
|
|
800578a: 681b ldr r3, [r3, #0]
|
|
800578c: 4a59 ldr r2, [pc, #356] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
800578e: 4293 cmp r3, r2
|
|
8005790: d101 bne.n 8005796 <HAL_I2SEx_FullDuplex_IRQHandler+0x142>
|
|
8005792: 4b59 ldr r3, [pc, #356] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
8005794: e001 b.n 800579a <HAL_I2SEx_FullDuplex_IRQHandler+0x146>
|
|
8005796: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
800579a: 685a ldr r2, [r3, #4]
|
|
800579c: 687b ldr r3, [r7, #4]
|
|
800579e: 681b ldr r3, [r3, #0]
|
|
80057a0: 4954 ldr r1, [pc, #336] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
80057a2: 428b cmp r3, r1
|
|
80057a4: d101 bne.n 80057aa <HAL_I2SEx_FullDuplex_IRQHandler+0x156>
|
|
80057a6: 4b54 ldr r3, [pc, #336] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
80057a8: e001 b.n 80057ae <HAL_I2SEx_FullDuplex_IRQHandler+0x15a>
|
|
80057aa: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
80057ae: f022 0260 bic.w r2, r2, #96 ; 0x60
|
|
80057b2: 605a str r2, [r3, #4]
|
|
|
|
/* Clear underrun flag */
|
|
__HAL_I2S_CLEAR_UDRFLAG(hi2s);
|
|
80057b4: 2300 movs r3, #0
|
|
80057b6: 60bb str r3, [r7, #8]
|
|
80057b8: 687b ldr r3, [r7, #4]
|
|
80057ba: 681b ldr r3, [r3, #0]
|
|
80057bc: 689b ldr r3, [r3, #8]
|
|
80057be: 60bb str r3, [r7, #8]
|
|
80057c0: 68bb ldr r3, [r7, #8]
|
|
|
|
/* Set the I2S State ready */
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
80057c2: 687b ldr r3, [r7, #4]
|
|
80057c4: 2201 movs r2, #1
|
|
80057c6: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
|
|
/* Set the error code and execute error callback*/
|
|
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
|
|
80057ca: 687b ldr r3, [r7, #4]
|
|
80057cc: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
80057ce: f043 0204 orr.w r2, r3, #4
|
|
80057d2: 687b ldr r3, [r7, #4]
|
|
80057d4: 645a str r2, [r3, #68] ; 0x44
|
|
/* Call user error callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->ErrorCallback(hi2s);
|
|
#else
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
80057d6: 6878 ldr r0, [r7, #4]
|
|
80057d8: f7ff fe4a bl 8005470 <HAL_I2S_ErrorCallback>
|
|
if (((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && ((i2scr2 & I2S_IT_ERR) != RESET))
|
|
80057dc: e084 b.n 80058e8 <HAL_I2SEx_FullDuplex_IRQHandler+0x294>
|
|
}
|
|
/* The I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX Mode is selected */
|
|
else
|
|
{
|
|
/* I2Sext in mode Transmitter ----------------------------------------------*/
|
|
if (((i2sextsr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && ((i2sextcr2 & I2S_IT_TXE) != RESET))
|
|
80057de: 69bb ldr r3, [r7, #24]
|
|
80057e0: f003 0302 and.w r3, r3, #2
|
|
80057e4: 2b02 cmp r3, #2
|
|
80057e6: d107 bne.n 80057f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x1a4>
|
|
80057e8: 693b ldr r3, [r7, #16]
|
|
80057ea: f003 0380 and.w r3, r3, #128 ; 0x80
|
|
80057ee: 2b00 cmp r3, #0
|
|
80057f0: d002 beq.n 80057f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x1a4>
|
|
{
|
|
/* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX,
|
|
the I2Sext TXE interrupt will be generated to manage the full-duplex transmit phase. */
|
|
I2SEx_TxISR_I2SExt(hi2s);
|
|
80057f2: 6878 ldr r0, [r7, #4]
|
|
80057f4: f000 f8be bl 8005974 <I2SEx_TxISR_I2SExt>
|
|
}
|
|
|
|
/* I2S in mode Receiver --------------------------------------------------*/
|
|
if (((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && ((i2scr2 & I2S_IT_RXNE) != RESET))
|
|
80057f8: 69fb ldr r3, [r7, #28]
|
|
80057fa: f003 0301 and.w r3, r3, #1
|
|
80057fe: 2b01 cmp r3, #1
|
|
8005800: d107 bne.n 8005812 <HAL_I2SEx_FullDuplex_IRQHandler+0x1be>
|
|
8005802: 697b ldr r3, [r7, #20]
|
|
8005804: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8005808: 2b00 cmp r3, #0
|
|
800580a: d002 beq.n 8005812 <HAL_I2SEx_FullDuplex_IRQHandler+0x1be>
|
|
{
|
|
/* When the I2S mode is configured as I2S_MODE_MASTER_RX or I2S_MODE_SLAVE_RX,
|
|
the I2S RXNE interrupt will be generated to manage the full-duplex receive phase. */
|
|
I2SEx_RxISR_I2S(hi2s);
|
|
800580c: 6878 ldr r0, [r7, #4]
|
|
800580e: f000 f8fd bl 8005a0c <I2SEx_RxISR_I2S>
|
|
}
|
|
|
|
/* I2S Overrun error interrupt occurred -------------------------------------*/
|
|
if (((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && ((i2scr2 & I2S_IT_ERR) != RESET))
|
|
8005812: 69fb ldr r3, [r7, #28]
|
|
8005814: f003 0340 and.w r3, r3, #64 ; 0x40
|
|
8005818: 2b40 cmp r3, #64 ; 0x40
|
|
800581a: d12f bne.n 800587c <HAL_I2SEx_FullDuplex_IRQHandler+0x228>
|
|
800581c: 697b ldr r3, [r7, #20]
|
|
800581e: f003 0320 and.w r3, r3, #32
|
|
8005822: 2b00 cmp r3, #0
|
|
8005824: d02a beq.n 800587c <HAL_I2SEx_FullDuplex_IRQHandler+0x228>
|
|
{
|
|
/* Disable RXNE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
8005826: 687b ldr r3, [r7, #4]
|
|
8005828: 681b ldr r3, [r3, #0]
|
|
800582a: 685a ldr r2, [r3, #4]
|
|
800582c: 687b ldr r3, [r7, #4]
|
|
800582e: 681b ldr r3, [r3, #0]
|
|
8005830: f022 0260 bic.w r2, r2, #96 ; 0x60
|
|
8005834: 605a str r2, [r3, #4]
|
|
|
|
/* Disable TXE and ERR interrupt */
|
|
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
8005836: 687b ldr r3, [r7, #4]
|
|
8005838: 681b ldr r3, [r3, #0]
|
|
800583a: 4a2e ldr r2, [pc, #184] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
800583c: 4293 cmp r3, r2
|
|
800583e: d101 bne.n 8005844 <HAL_I2SEx_FullDuplex_IRQHandler+0x1f0>
|
|
8005840: 4b2d ldr r3, [pc, #180] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
8005842: e001 b.n 8005848 <HAL_I2SEx_FullDuplex_IRQHandler+0x1f4>
|
|
8005844: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
8005848: 685a ldr r2, [r3, #4]
|
|
800584a: 687b ldr r3, [r7, #4]
|
|
800584c: 681b ldr r3, [r3, #0]
|
|
800584e: 4929 ldr r1, [pc, #164] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
8005850: 428b cmp r3, r1
|
|
8005852: d101 bne.n 8005858 <HAL_I2SEx_FullDuplex_IRQHandler+0x204>
|
|
8005854: 4b28 ldr r3, [pc, #160] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
8005856: e001 b.n 800585c <HAL_I2SEx_FullDuplex_IRQHandler+0x208>
|
|
8005858: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
800585c: f022 02a0 bic.w r2, r2, #160 ; 0xa0
|
|
8005860: 605a str r2, [r3, #4]
|
|
|
|
/* Set the I2S State ready */
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
8005862: 687b ldr r3, [r7, #4]
|
|
8005864: 2201 movs r2, #1
|
|
8005866: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
|
|
/* Set the error code and execute error callback*/
|
|
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR);
|
|
800586a: 687b ldr r3, [r7, #4]
|
|
800586c: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
800586e: f043 0202 orr.w r2, r3, #2
|
|
8005872: 687b ldr r3, [r7, #4]
|
|
8005874: 645a str r2, [r3, #68] ; 0x44
|
|
/* Call user error callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->ErrorCallback(hi2s);
|
|
#else
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
8005876: 6878 ldr r0, [r7, #4]
|
|
8005878: f7ff fdfa bl 8005470 <HAL_I2S_ErrorCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
/* I2Sext Underrun error interrupt occurred -------------------------------*/
|
|
if (((i2sextsr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && ((i2sextcr2 & I2S_IT_ERR) != RESET))
|
|
800587c: 69bb ldr r3, [r7, #24]
|
|
800587e: f003 0308 and.w r3, r3, #8
|
|
8005882: 2b08 cmp r3, #8
|
|
8005884: d131 bne.n 80058ea <HAL_I2SEx_FullDuplex_IRQHandler+0x296>
|
|
8005886: 693b ldr r3, [r7, #16]
|
|
8005888: f003 0320 and.w r3, r3, #32
|
|
800588c: 2b00 cmp r3, #0
|
|
800588e: d02c beq.n 80058ea <HAL_I2SEx_FullDuplex_IRQHandler+0x296>
|
|
{
|
|
/* Disable TXE and ERR interrupt */
|
|
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
8005890: 687b ldr r3, [r7, #4]
|
|
8005892: 681b ldr r3, [r3, #0]
|
|
8005894: 4a17 ldr r2, [pc, #92] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
8005896: 4293 cmp r3, r2
|
|
8005898: d101 bne.n 800589e <HAL_I2SEx_FullDuplex_IRQHandler+0x24a>
|
|
800589a: 4b17 ldr r3, [pc, #92] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
800589c: e001 b.n 80058a2 <HAL_I2SEx_FullDuplex_IRQHandler+0x24e>
|
|
800589e: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
80058a2: 685a ldr r2, [r3, #4]
|
|
80058a4: 687b ldr r3, [r7, #4]
|
|
80058a6: 681b ldr r3, [r3, #0]
|
|
80058a8: 4912 ldr r1, [pc, #72] ; (80058f4 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a0>)
|
|
80058aa: 428b cmp r3, r1
|
|
80058ac: d101 bne.n 80058b2 <HAL_I2SEx_FullDuplex_IRQHandler+0x25e>
|
|
80058ae: 4b12 ldr r3, [pc, #72] ; (80058f8 <HAL_I2SEx_FullDuplex_IRQHandler+0x2a4>)
|
|
80058b0: e001 b.n 80058b6 <HAL_I2SEx_FullDuplex_IRQHandler+0x262>
|
|
80058b2: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
80058b6: f022 02a0 bic.w r2, r2, #160 ; 0xa0
|
|
80058ba: 605a str r2, [r3, #4]
|
|
|
|
/* Disable RXNE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
80058bc: 687b ldr r3, [r7, #4]
|
|
80058be: 681b ldr r3, [r3, #0]
|
|
80058c0: 685a ldr r2, [r3, #4]
|
|
80058c2: 687b ldr r3, [r7, #4]
|
|
80058c4: 681b ldr r3, [r3, #0]
|
|
80058c6: f022 0260 bic.w r2, r2, #96 ; 0x60
|
|
80058ca: 605a str r2, [r3, #4]
|
|
|
|
/* Set the I2S State ready */
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
80058cc: 687b ldr r3, [r7, #4]
|
|
80058ce: 2201 movs r2, #1
|
|
80058d0: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
|
|
/* Set the error code and execute error callback*/
|
|
SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR);
|
|
80058d4: 687b ldr r3, [r7, #4]
|
|
80058d6: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
80058d8: f043 0204 orr.w r2, r3, #4
|
|
80058dc: 687b ldr r3, [r7, #4]
|
|
80058de: 645a str r2, [r3, #68] ; 0x44
|
|
/* Call user error callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->ErrorCallback(hi2s);
|
|
#else
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
80058e0: 6878 ldr r0, [r7, #4]
|
|
80058e2: f7ff fdc5 bl 8005470 <HAL_I2S_ErrorCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
}
|
|
80058e6: e000 b.n 80058ea <HAL_I2SEx_FullDuplex_IRQHandler+0x296>
|
|
if (((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && ((i2scr2 & I2S_IT_ERR) != RESET))
|
|
80058e8: bf00 nop
|
|
}
|
|
80058ea: bf00 nop
|
|
80058ec: 3720 adds r7, #32
|
|
80058ee: 46bd mov sp, r7
|
|
80058f0: bd80 pop {r7, pc}
|
|
80058f2: bf00 nop
|
|
80058f4: 40003800 .word 0x40003800
|
|
80058f8: 40003400 .word 0x40003400
|
|
|
|
080058fc <HAL_I2SEx_TxRxCpltCallback>:
|
|
* @brief Tx and Rx Transfer completed callback
|
|
* @param hi2s I2S handle
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_I2SEx_TxRxCpltCallback(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
80058fc: b480 push {r7}
|
|
80058fe: b083 sub sp, #12
|
|
8005900: af00 add r7, sp, #0
|
|
8005902: 6078 str r0, [r7, #4]
|
|
UNUSED(hi2s);
|
|
|
|
/* NOTE : This function should not be modified, when the callback is needed,
|
|
the HAL_I2SEx_TxRxCpltCallback could be implemented in the user file
|
|
*/
|
|
}
|
|
8005904: bf00 nop
|
|
8005906: 370c adds r7, #12
|
|
8005908: 46bd mov sp, r7
|
|
800590a: f85d 7b04 ldr.w r7, [sp], #4
|
|
800590e: 4770 bx lr
|
|
|
|
08005910 <I2SEx_TxISR_I2S>:
|
|
* @brief I2S Full-Duplex IT handler transmit function
|
|
* @param hi2s I2S handle
|
|
* @retval None
|
|
*/
|
|
static void I2SEx_TxISR_I2S(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
8005910: b580 push {r7, lr}
|
|
8005912: b082 sub sp, #8
|
|
8005914: af00 add r7, sp, #0
|
|
8005916: 6078 str r0, [r7, #4]
|
|
/* Write Data on DR register */
|
|
hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
|
|
8005918: 687b ldr r3, [r7, #4]
|
|
800591a: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
800591c: 1c99 adds r1, r3, #2
|
|
800591e: 687a ldr r2, [r7, #4]
|
|
8005920: 6251 str r1, [r2, #36] ; 0x24
|
|
8005922: 881a ldrh r2, [r3, #0]
|
|
8005924: 687b ldr r3, [r7, #4]
|
|
8005926: 681b ldr r3, [r3, #0]
|
|
8005928: 60da str r2, [r3, #12]
|
|
hi2s->TxXferCount--;
|
|
800592a: 687b ldr r3, [r7, #4]
|
|
800592c: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
800592e: b29b uxth r3, r3
|
|
8005930: 3b01 subs r3, #1
|
|
8005932: b29a uxth r2, r3
|
|
8005934: 687b ldr r3, [r7, #4]
|
|
8005936: 855a strh r2, [r3, #42] ; 0x2a
|
|
|
|
if (hi2s->TxXferCount == 0U)
|
|
8005938: 687b ldr r3, [r7, #4]
|
|
800593a: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
800593c: b29b uxth r3, r3
|
|
800593e: 2b00 cmp r3, #0
|
|
8005940: d113 bne.n 800596a <I2SEx_TxISR_I2S+0x5a>
|
|
{
|
|
/* Disable TXE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
8005942: 687b ldr r3, [r7, #4]
|
|
8005944: 681b ldr r3, [r3, #0]
|
|
8005946: 685a ldr r2, [r3, #4]
|
|
8005948: 687b ldr r3, [r7, #4]
|
|
800594a: 681b ldr r3, [r3, #0]
|
|
800594c: f022 02a0 bic.w r2, r2, #160 ; 0xa0
|
|
8005950: 605a str r2, [r3, #4]
|
|
|
|
if (hi2s->RxXferCount == 0U)
|
|
8005952: 687b ldr r3, [r7, #4]
|
|
8005954: 8e5b ldrh r3, [r3, #50] ; 0x32
|
|
8005956: b29b uxth r3, r3
|
|
8005958: 2b00 cmp r3, #0
|
|
800595a: d106 bne.n 800596a <I2SEx_TxISR_I2S+0x5a>
|
|
{
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
800595c: 687b ldr r3, [r7, #4]
|
|
800595e: 2201 movs r2, #1
|
|
8005960: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
/* Call user TxRx complete callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->TxRxCpltCallback(hi2s);
|
|
#else
|
|
HAL_I2SEx_TxRxCpltCallback(hi2s);
|
|
8005964: 6878 ldr r0, [r7, #4]
|
|
8005966: f7ff ffc9 bl 80058fc <HAL_I2SEx_TxRxCpltCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
}
|
|
800596a: bf00 nop
|
|
800596c: 3708 adds r7, #8
|
|
800596e: 46bd mov sp, r7
|
|
8005970: bd80 pop {r7, pc}
|
|
...
|
|
|
|
08005974 <I2SEx_TxISR_I2SExt>:
|
|
* @brief I2SExt Full-Duplex IT handler transmit function
|
|
* @param hi2s I2S handle
|
|
* @retval None
|
|
*/
|
|
static void I2SEx_TxISR_I2SExt(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
8005974: b580 push {r7, lr}
|
|
8005976: b082 sub sp, #8
|
|
8005978: af00 add r7, sp, #0
|
|
800597a: 6078 str r0, [r7, #4]
|
|
/* Write Data on DR register */
|
|
I2SxEXT(hi2s->Instance)->DR = (*hi2s->pTxBuffPtr++);
|
|
800597c: 687b ldr r3, [r7, #4]
|
|
800597e: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8005980: 1c99 adds r1, r3, #2
|
|
8005982: 687a ldr r2, [r7, #4]
|
|
8005984: 6251 str r1, [r2, #36] ; 0x24
|
|
8005986: 8819 ldrh r1, [r3, #0]
|
|
8005988: 687b ldr r3, [r7, #4]
|
|
800598a: 681b ldr r3, [r3, #0]
|
|
800598c: 4a1d ldr r2, [pc, #116] ; (8005a04 <I2SEx_TxISR_I2SExt+0x90>)
|
|
800598e: 4293 cmp r3, r2
|
|
8005990: d101 bne.n 8005996 <I2SEx_TxISR_I2SExt+0x22>
|
|
8005992: 4b1d ldr r3, [pc, #116] ; (8005a08 <I2SEx_TxISR_I2SExt+0x94>)
|
|
8005994: e001 b.n 800599a <I2SEx_TxISR_I2SExt+0x26>
|
|
8005996: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
800599a: 460a mov r2, r1
|
|
800599c: 60da str r2, [r3, #12]
|
|
hi2s->TxXferCount--;
|
|
800599e: 687b ldr r3, [r7, #4]
|
|
80059a0: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
80059a2: b29b uxth r3, r3
|
|
80059a4: 3b01 subs r3, #1
|
|
80059a6: b29a uxth r2, r3
|
|
80059a8: 687b ldr r3, [r7, #4]
|
|
80059aa: 855a strh r2, [r3, #42] ; 0x2a
|
|
|
|
if (hi2s->TxXferCount == 0U)
|
|
80059ac: 687b ldr r3, [r7, #4]
|
|
80059ae: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
80059b0: b29b uxth r3, r3
|
|
80059b2: 2b00 cmp r3, #0
|
|
80059b4: d121 bne.n 80059fa <I2SEx_TxISR_I2SExt+0x86>
|
|
{
|
|
/* Disable I2Sext TXE and ERR interrupt */
|
|
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
80059b6: 687b ldr r3, [r7, #4]
|
|
80059b8: 681b ldr r3, [r3, #0]
|
|
80059ba: 4a12 ldr r2, [pc, #72] ; (8005a04 <I2SEx_TxISR_I2SExt+0x90>)
|
|
80059bc: 4293 cmp r3, r2
|
|
80059be: d101 bne.n 80059c4 <I2SEx_TxISR_I2SExt+0x50>
|
|
80059c0: 4b11 ldr r3, [pc, #68] ; (8005a08 <I2SEx_TxISR_I2SExt+0x94>)
|
|
80059c2: e001 b.n 80059c8 <I2SEx_TxISR_I2SExt+0x54>
|
|
80059c4: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
80059c8: 685a ldr r2, [r3, #4]
|
|
80059ca: 687b ldr r3, [r7, #4]
|
|
80059cc: 681b ldr r3, [r3, #0]
|
|
80059ce: 490d ldr r1, [pc, #52] ; (8005a04 <I2SEx_TxISR_I2SExt+0x90>)
|
|
80059d0: 428b cmp r3, r1
|
|
80059d2: d101 bne.n 80059d8 <I2SEx_TxISR_I2SExt+0x64>
|
|
80059d4: 4b0c ldr r3, [pc, #48] ; (8005a08 <I2SEx_TxISR_I2SExt+0x94>)
|
|
80059d6: e001 b.n 80059dc <I2SEx_TxISR_I2SExt+0x68>
|
|
80059d8: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
80059dc: f022 02a0 bic.w r2, r2, #160 ; 0xa0
|
|
80059e0: 605a str r2, [r3, #4]
|
|
|
|
if (hi2s->RxXferCount == 0U)
|
|
80059e2: 687b ldr r3, [r7, #4]
|
|
80059e4: 8e5b ldrh r3, [r3, #50] ; 0x32
|
|
80059e6: b29b uxth r3, r3
|
|
80059e8: 2b00 cmp r3, #0
|
|
80059ea: d106 bne.n 80059fa <I2SEx_TxISR_I2SExt+0x86>
|
|
{
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
80059ec: 687b ldr r3, [r7, #4]
|
|
80059ee: 2201 movs r2, #1
|
|
80059f0: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
/* Call user TxRx complete callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->TxRxCpltCallback(hi2s);
|
|
#else
|
|
HAL_I2SEx_TxRxCpltCallback(hi2s);
|
|
80059f4: 6878 ldr r0, [r7, #4]
|
|
80059f6: f7ff ff81 bl 80058fc <HAL_I2SEx_TxRxCpltCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
}
|
|
80059fa: bf00 nop
|
|
80059fc: 3708 adds r7, #8
|
|
80059fe: 46bd mov sp, r7
|
|
8005a00: bd80 pop {r7, pc}
|
|
8005a02: bf00 nop
|
|
8005a04: 40003800 .word 0x40003800
|
|
8005a08: 40003400 .word 0x40003400
|
|
|
|
08005a0c <I2SEx_RxISR_I2S>:
|
|
* @brief I2S Full-Duplex IT handler receive function
|
|
* @param hi2s I2S handle
|
|
* @retval None
|
|
*/
|
|
static void I2SEx_RxISR_I2S(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
8005a0c: b580 push {r7, lr}
|
|
8005a0e: b082 sub sp, #8
|
|
8005a10: af00 add r7, sp, #0
|
|
8005a12: 6078 str r0, [r7, #4]
|
|
/* Read Data from DR register */
|
|
(*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
|
|
8005a14: 687b ldr r3, [r7, #4]
|
|
8005a16: 681b ldr r3, [r3, #0]
|
|
8005a18: 68d8 ldr r0, [r3, #12]
|
|
8005a1a: 687b ldr r3, [r7, #4]
|
|
8005a1c: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8005a1e: 1c99 adds r1, r3, #2
|
|
8005a20: 687a ldr r2, [r7, #4]
|
|
8005a22: 62d1 str r1, [r2, #44] ; 0x2c
|
|
8005a24: b282 uxth r2, r0
|
|
8005a26: 801a strh r2, [r3, #0]
|
|
hi2s->RxXferCount--;
|
|
8005a28: 687b ldr r3, [r7, #4]
|
|
8005a2a: 8e5b ldrh r3, [r3, #50] ; 0x32
|
|
8005a2c: b29b uxth r3, r3
|
|
8005a2e: 3b01 subs r3, #1
|
|
8005a30: b29a uxth r2, r3
|
|
8005a32: 687b ldr r3, [r7, #4]
|
|
8005a34: 865a strh r2, [r3, #50] ; 0x32
|
|
|
|
if (hi2s->RxXferCount == 0U)
|
|
8005a36: 687b ldr r3, [r7, #4]
|
|
8005a38: 8e5b ldrh r3, [r3, #50] ; 0x32
|
|
8005a3a: b29b uxth r3, r3
|
|
8005a3c: 2b00 cmp r3, #0
|
|
8005a3e: d113 bne.n 8005a68 <I2SEx_RxISR_I2S+0x5c>
|
|
{
|
|
/* Disable RXNE and ERR interrupt */
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
8005a40: 687b ldr r3, [r7, #4]
|
|
8005a42: 681b ldr r3, [r3, #0]
|
|
8005a44: 685a ldr r2, [r3, #4]
|
|
8005a46: 687b ldr r3, [r7, #4]
|
|
8005a48: 681b ldr r3, [r3, #0]
|
|
8005a4a: f022 0260 bic.w r2, r2, #96 ; 0x60
|
|
8005a4e: 605a str r2, [r3, #4]
|
|
|
|
if (hi2s->TxXferCount == 0U)
|
|
8005a50: 687b ldr r3, [r7, #4]
|
|
8005a52: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8005a54: b29b uxth r3, r3
|
|
8005a56: 2b00 cmp r3, #0
|
|
8005a58: d106 bne.n 8005a68 <I2SEx_RxISR_I2S+0x5c>
|
|
{
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
8005a5a: 687b ldr r3, [r7, #4]
|
|
8005a5c: 2201 movs r2, #1
|
|
8005a5e: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
/* Call user TxRx complete callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->TxRxCpltCallback(hi2s);
|
|
#else
|
|
HAL_I2SEx_TxRxCpltCallback(hi2s);
|
|
8005a62: 6878 ldr r0, [r7, #4]
|
|
8005a64: f7ff ff4a bl 80058fc <HAL_I2SEx_TxRxCpltCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
}
|
|
8005a68: bf00 nop
|
|
8005a6a: 3708 adds r7, #8
|
|
8005a6c: 46bd mov sp, r7
|
|
8005a6e: bd80 pop {r7, pc}
|
|
|
|
08005a70 <I2SEx_RxISR_I2SExt>:
|
|
* @brief I2SExt Full-Duplex IT handler receive function
|
|
* @param hi2s I2S handle
|
|
* @retval None
|
|
*/
|
|
static void I2SEx_RxISR_I2SExt(I2S_HandleTypeDef *hi2s)
|
|
{
|
|
8005a70: b580 push {r7, lr}
|
|
8005a72: b082 sub sp, #8
|
|
8005a74: af00 add r7, sp, #0
|
|
8005a76: 6078 str r0, [r7, #4]
|
|
/* Read Data from DR register */
|
|
(*hi2s->pRxBuffPtr++) = I2SxEXT(hi2s->Instance)->DR;
|
|
8005a78: 687b ldr r3, [r7, #4]
|
|
8005a7a: 681b ldr r3, [r3, #0]
|
|
8005a7c: 4a20 ldr r2, [pc, #128] ; (8005b00 <I2SEx_RxISR_I2SExt+0x90>)
|
|
8005a7e: 4293 cmp r3, r2
|
|
8005a80: d101 bne.n 8005a86 <I2SEx_RxISR_I2SExt+0x16>
|
|
8005a82: 4b20 ldr r3, [pc, #128] ; (8005b04 <I2SEx_RxISR_I2SExt+0x94>)
|
|
8005a84: e001 b.n 8005a8a <I2SEx_RxISR_I2SExt+0x1a>
|
|
8005a86: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
8005a8a: 68d8 ldr r0, [r3, #12]
|
|
8005a8c: 687b ldr r3, [r7, #4]
|
|
8005a8e: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8005a90: 1c99 adds r1, r3, #2
|
|
8005a92: 687a ldr r2, [r7, #4]
|
|
8005a94: 62d1 str r1, [r2, #44] ; 0x2c
|
|
8005a96: b282 uxth r2, r0
|
|
8005a98: 801a strh r2, [r3, #0]
|
|
hi2s->RxXferCount--;
|
|
8005a9a: 687b ldr r3, [r7, #4]
|
|
8005a9c: 8e5b ldrh r3, [r3, #50] ; 0x32
|
|
8005a9e: b29b uxth r3, r3
|
|
8005aa0: 3b01 subs r3, #1
|
|
8005aa2: b29a uxth r2, r3
|
|
8005aa4: 687b ldr r3, [r7, #4]
|
|
8005aa6: 865a strh r2, [r3, #50] ; 0x32
|
|
|
|
if (hi2s->RxXferCount == 0U)
|
|
8005aa8: 687b ldr r3, [r7, #4]
|
|
8005aaa: 8e5b ldrh r3, [r3, #50] ; 0x32
|
|
8005aac: b29b uxth r3, r3
|
|
8005aae: 2b00 cmp r3, #0
|
|
8005ab0: d121 bne.n 8005af6 <I2SEx_RxISR_I2SExt+0x86>
|
|
{
|
|
/* Disable I2Sext RXNE and ERR interrupt */
|
|
__HAL_I2SEXT_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
8005ab2: 687b ldr r3, [r7, #4]
|
|
8005ab4: 681b ldr r3, [r3, #0]
|
|
8005ab6: 4a12 ldr r2, [pc, #72] ; (8005b00 <I2SEx_RxISR_I2SExt+0x90>)
|
|
8005ab8: 4293 cmp r3, r2
|
|
8005aba: d101 bne.n 8005ac0 <I2SEx_RxISR_I2SExt+0x50>
|
|
8005abc: 4b11 ldr r3, [pc, #68] ; (8005b04 <I2SEx_RxISR_I2SExt+0x94>)
|
|
8005abe: e001 b.n 8005ac4 <I2SEx_RxISR_I2SExt+0x54>
|
|
8005ac0: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
8005ac4: 685a ldr r2, [r3, #4]
|
|
8005ac6: 687b ldr r3, [r7, #4]
|
|
8005ac8: 681b ldr r3, [r3, #0]
|
|
8005aca: 490d ldr r1, [pc, #52] ; (8005b00 <I2SEx_RxISR_I2SExt+0x90>)
|
|
8005acc: 428b cmp r3, r1
|
|
8005ace: d101 bne.n 8005ad4 <I2SEx_RxISR_I2SExt+0x64>
|
|
8005ad0: 4b0c ldr r3, [pc, #48] ; (8005b04 <I2SEx_RxISR_I2SExt+0x94>)
|
|
8005ad2: e001 b.n 8005ad8 <I2SEx_RxISR_I2SExt+0x68>
|
|
8005ad4: f04f 2340 mov.w r3, #1073758208 ; 0x40004000
|
|
8005ad8: f022 0260 bic.w r2, r2, #96 ; 0x60
|
|
8005adc: 605a str r2, [r3, #4]
|
|
|
|
if (hi2s->TxXferCount == 0U)
|
|
8005ade: 687b ldr r3, [r7, #4]
|
|
8005ae0: 8d5b ldrh r3, [r3, #42] ; 0x2a
|
|
8005ae2: b29b uxth r3, r3
|
|
8005ae4: 2b00 cmp r3, #0
|
|
8005ae6: d106 bne.n 8005af6 <I2SEx_RxISR_I2SExt+0x86>
|
|
{
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
8005ae8: 687b ldr r3, [r7, #4]
|
|
8005aea: 2201 movs r2, #1
|
|
8005aec: f883 2041 strb.w r2, [r3, #65] ; 0x41
|
|
/* Call user TxRx complete callback */
|
|
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
|
|
hi2s->TxRxCpltCallback(hi2s);
|
|
#else
|
|
HAL_I2SEx_TxRxCpltCallback(hi2s);
|
|
8005af0: 6878 ldr r0, [r7, #4]
|
|
8005af2: f7ff ff03 bl 80058fc <HAL_I2SEx_TxRxCpltCallback>
|
|
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
|
|
}
|
|
}
|
|
}
|
|
8005af6: bf00 nop
|
|
8005af8: 3708 adds r7, #8
|
|
8005afa: 46bd mov sp, r7
|
|
8005afc: bd80 pop {r7, pc}
|
|
8005afe: bf00 nop
|
|
8005b00: 40003800 .word 0x40003800
|
|
8005b04: 40003400 .word 0x40003400
|
|
|
|
08005b08 <HAL_RCC_OscConfig>:
|
|
* supported by this API. User should request a transition to HSE Off
|
|
* first and then HSE On or HSE Bypass.
|
|
* @retval HAL status
|
|
*/
|
|
__weak HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
|
|
{
|
|
8005b08: b580 push {r7, lr}
|
|
8005b0a: b086 sub sp, #24
|
|
8005b0c: af00 add r7, sp, #0
|
|
8005b0e: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart, pll_config;
|
|
|
|
/* Check Null pointer */
|
|
if(RCC_OscInitStruct == NULL)
|
|
8005b10: 687b ldr r3, [r7, #4]
|
|
8005b12: 2b00 cmp r3, #0
|
|
8005b14: d101 bne.n 8005b1a <HAL_RCC_OscConfig+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8005b16: 2301 movs r3, #1
|
|
8005b18: e25b b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
}
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
|
|
/*------------------------------- HSE Configuration ------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
|
|
8005b1a: 687b ldr r3, [r7, #4]
|
|
8005b1c: 681b ldr r3, [r3, #0]
|
|
8005b1e: f003 0301 and.w r3, r3, #1
|
|
8005b22: 2b00 cmp r3, #0
|
|
8005b24: d075 beq.n 8005c12 <HAL_RCC_OscConfig+0x10a>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
|
|
/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
|
|
8005b26: 4ba3 ldr r3, [pc, #652] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b28: 689b ldr r3, [r3, #8]
|
|
8005b2a: f003 030c and.w r3, r3, #12
|
|
8005b2e: 2b04 cmp r3, #4
|
|
8005b30: d00c beq.n 8005b4c <HAL_RCC_OscConfig+0x44>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
|
|
8005b32: 4ba0 ldr r3, [pc, #640] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b34: 689b ldr r3, [r3, #8]
|
|
8005b36: f003 030c and.w r3, r3, #12
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) ||\
|
|
8005b3a: 2b08 cmp r3, #8
|
|
8005b3c: d112 bne.n 8005b64 <HAL_RCC_OscConfig+0x5c>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
|
|
8005b3e: 4b9d ldr r3, [pc, #628] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b40: 685b ldr r3, [r3, #4]
|
|
8005b42: f403 0380 and.w r3, r3, #4194304 ; 0x400000
|
|
8005b46: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
|
|
8005b4a: d10b bne.n 8005b64 <HAL_RCC_OscConfig+0x5c>
|
|
{
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
8005b4c: 4b99 ldr r3, [pc, #612] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b4e: 681b ldr r3, [r3, #0]
|
|
8005b50: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8005b54: 2b00 cmp r3, #0
|
|
8005b56: d05b beq.n 8005c10 <HAL_RCC_OscConfig+0x108>
|
|
8005b58: 687b ldr r3, [r7, #4]
|
|
8005b5a: 685b ldr r3, [r3, #4]
|
|
8005b5c: 2b00 cmp r3, #0
|
|
8005b5e: d157 bne.n 8005c10 <HAL_RCC_OscConfig+0x108>
|
|
{
|
|
return HAL_ERROR;
|
|
8005b60: 2301 movs r3, #1
|
|
8005b62: e236 b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set the new HSE configuration ---------------------------------------*/
|
|
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
|
|
8005b64: 687b ldr r3, [r7, #4]
|
|
8005b66: 685b ldr r3, [r3, #4]
|
|
8005b68: f5b3 3f80 cmp.w r3, #65536 ; 0x10000
|
|
8005b6c: d106 bne.n 8005b7c <HAL_RCC_OscConfig+0x74>
|
|
8005b6e: 4b91 ldr r3, [pc, #580] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b70: 681b ldr r3, [r3, #0]
|
|
8005b72: 4a90 ldr r2, [pc, #576] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b74: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
|
8005b78: 6013 str r3, [r2, #0]
|
|
8005b7a: e01d b.n 8005bb8 <HAL_RCC_OscConfig+0xb0>
|
|
8005b7c: 687b ldr r3, [r7, #4]
|
|
8005b7e: 685b ldr r3, [r3, #4]
|
|
8005b80: f5b3 2fa0 cmp.w r3, #327680 ; 0x50000
|
|
8005b84: d10c bne.n 8005ba0 <HAL_RCC_OscConfig+0x98>
|
|
8005b86: 4b8b ldr r3, [pc, #556] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b88: 681b ldr r3, [r3, #0]
|
|
8005b8a: 4a8a ldr r2, [pc, #552] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b8c: f443 2380 orr.w r3, r3, #262144 ; 0x40000
|
|
8005b90: 6013 str r3, [r2, #0]
|
|
8005b92: 4b88 ldr r3, [pc, #544] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b94: 681b ldr r3, [r3, #0]
|
|
8005b96: 4a87 ldr r2, [pc, #540] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005b98: f443 3380 orr.w r3, r3, #65536 ; 0x10000
|
|
8005b9c: 6013 str r3, [r2, #0]
|
|
8005b9e: e00b b.n 8005bb8 <HAL_RCC_OscConfig+0xb0>
|
|
8005ba0: 4b84 ldr r3, [pc, #528] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005ba2: 681b ldr r3, [r3, #0]
|
|
8005ba4: 4a83 ldr r2, [pc, #524] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005ba6: f423 3380 bic.w r3, r3, #65536 ; 0x10000
|
|
8005baa: 6013 str r3, [r2, #0]
|
|
8005bac: 4b81 ldr r3, [pc, #516] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005bae: 681b ldr r3, [r3, #0]
|
|
8005bb0: 4a80 ldr r2, [pc, #512] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005bb2: f423 2380 bic.w r3, r3, #262144 ; 0x40000
|
|
8005bb6: 6013 str r3, [r2, #0]
|
|
|
|
/* Check the HSE State */
|
|
if((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
|
|
8005bb8: 687b ldr r3, [r7, #4]
|
|
8005bba: 685b ldr r3, [r3, #4]
|
|
8005bbc: 2b00 cmp r3, #0
|
|
8005bbe: d013 beq.n 8005be8 <HAL_RCC_OscConfig+0xe0>
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005bc0: f7fc fbac bl 800231c <HAL_GetTick>
|
|
8005bc4: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8005bc6: e008 b.n 8005bda <HAL_RCC_OscConfig+0xd2>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
8005bc8: f7fc fba8 bl 800231c <HAL_GetTick>
|
|
8005bcc: 4602 mov r2, r0
|
|
8005bce: 693b ldr r3, [r7, #16]
|
|
8005bd0: 1ad3 subs r3, r2, r3
|
|
8005bd2: 2b64 cmp r3, #100 ; 0x64
|
|
8005bd4: d901 bls.n 8005bda <HAL_RCC_OscConfig+0xd2>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005bd6: 2303 movs r3, #3
|
|
8005bd8: e1fb b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8005bda: 4b76 ldr r3, [pc, #472] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005bdc: 681b ldr r3, [r3, #0]
|
|
8005bde: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8005be2: 2b00 cmp r3, #0
|
|
8005be4: d0f0 beq.n 8005bc8 <HAL_RCC_OscConfig+0xc0>
|
|
8005be6: e014 b.n 8005c12 <HAL_RCC_OscConfig+0x10a>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005be8: f7fc fb98 bl 800231c <HAL_GetTick>
|
|
8005bec: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSE is bypassed or disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8005bee: e008 b.n 8005c02 <HAL_RCC_OscConfig+0xfa>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
|
|
8005bf0: f7fc fb94 bl 800231c <HAL_GetTick>
|
|
8005bf4: 4602 mov r2, r0
|
|
8005bf6: 693b ldr r3, [r7, #16]
|
|
8005bf8: 1ad3 subs r3, r2, r3
|
|
8005bfa: 2b64 cmp r3, #100 ; 0x64
|
|
8005bfc: d901 bls.n 8005c02 <HAL_RCC_OscConfig+0xfa>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005bfe: 2303 movs r3, #3
|
|
8005c00: e1e7 b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
|
|
8005c02: 4b6c ldr r3, [pc, #432] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005c04: 681b ldr r3, [r3, #0]
|
|
8005c06: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
8005c0a: 2b00 cmp r3, #0
|
|
8005c0c: d1f0 bne.n 8005bf0 <HAL_RCC_OscConfig+0xe8>
|
|
8005c0e: e000 b.n 8005c12 <HAL_RCC_OscConfig+0x10a>
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
|
|
8005c10: bf00 nop
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*----------------------------- HSI Configuration --------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
|
|
8005c12: 687b ldr r3, [r7, #4]
|
|
8005c14: 681b ldr r3, [r3, #0]
|
|
8005c16: f003 0302 and.w r3, r3, #2
|
|
8005c1a: 2b00 cmp r3, #0
|
|
8005c1c: d063 beq.n 8005ce6 <HAL_RCC_OscConfig+0x1de>
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
|
|
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
|
|
|
|
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
|
|
8005c1e: 4b65 ldr r3, [pc, #404] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005c20: 689b ldr r3, [r3, #8]
|
|
8005c22: f003 030c and.w r3, r3, #12
|
|
8005c26: 2b00 cmp r3, #0
|
|
8005c28: d00b beq.n 8005c42 <HAL_RCC_OscConfig+0x13a>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
|
|
8005c2a: 4b62 ldr r3, [pc, #392] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005c2c: 689b ldr r3, [r3, #8]
|
|
8005c2e: f003 030c and.w r3, r3, #12
|
|
if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) ||\
|
|
8005c32: 2b08 cmp r3, #8
|
|
8005c34: d11c bne.n 8005c70 <HAL_RCC_OscConfig+0x168>
|
|
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
|
|
8005c36: 4b5f ldr r3, [pc, #380] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005c38: 685b ldr r3, [r3, #4]
|
|
8005c3a: f403 0380 and.w r3, r3, #4194304 ; 0x400000
|
|
8005c3e: 2b00 cmp r3, #0
|
|
8005c40: d116 bne.n 8005c70 <HAL_RCC_OscConfig+0x168>
|
|
{
|
|
/* When HSI is used as system clock it will not disabled */
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
8005c42: 4b5c ldr r3, [pc, #368] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005c44: 681b ldr r3, [r3, #0]
|
|
8005c46: f003 0302 and.w r3, r3, #2
|
|
8005c4a: 2b00 cmp r3, #0
|
|
8005c4c: d005 beq.n 8005c5a <HAL_RCC_OscConfig+0x152>
|
|
8005c4e: 687b ldr r3, [r7, #4]
|
|
8005c50: 68db ldr r3, [r3, #12]
|
|
8005c52: 2b01 cmp r3, #1
|
|
8005c54: d001 beq.n 8005c5a <HAL_RCC_OscConfig+0x152>
|
|
{
|
|
return HAL_ERROR;
|
|
8005c56: 2301 movs r3, #1
|
|
8005c58: e1bb b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
}
|
|
/* Otherwise, just the calibration is allowed */
|
|
else
|
|
{
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
8005c5a: 4b56 ldr r3, [pc, #344] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005c5c: 681b ldr r3, [r3, #0]
|
|
8005c5e: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
|
8005c62: 687b ldr r3, [r7, #4]
|
|
8005c64: 691b ldr r3, [r3, #16]
|
|
8005c66: 00db lsls r3, r3, #3
|
|
8005c68: 4952 ldr r1, [pc, #328] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005c6a: 4313 orrs r3, r2
|
|
8005c6c: 600b str r3, [r1, #0]
|
|
if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
|
|
8005c6e: e03a b.n 8005ce6 <HAL_RCC_OscConfig+0x1de>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check the HSI State */
|
|
if((RCC_OscInitStruct->HSIState)!= RCC_HSI_OFF)
|
|
8005c70: 687b ldr r3, [r7, #4]
|
|
8005c72: 68db ldr r3, [r3, #12]
|
|
8005c74: 2b00 cmp r3, #0
|
|
8005c76: d020 beq.n 8005cba <HAL_RCC_OscConfig+0x1b2>
|
|
{
|
|
/* Enable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_ENABLE();
|
|
8005c78: 4b4f ldr r3, [pc, #316] ; (8005db8 <HAL_RCC_OscConfig+0x2b0>)
|
|
8005c7a: 2201 movs r2, #1
|
|
8005c7c: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
8005c7e: f7fc fb4d bl 800231c <HAL_GetTick>
|
|
8005c82: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8005c84: e008 b.n 8005c98 <HAL_RCC_OscConfig+0x190>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
8005c86: f7fc fb49 bl 800231c <HAL_GetTick>
|
|
8005c8a: 4602 mov r2, r0
|
|
8005c8c: 693b ldr r3, [r7, #16]
|
|
8005c8e: 1ad3 subs r3, r2, r3
|
|
8005c90: 2b02 cmp r3, #2
|
|
8005c92: d901 bls.n 8005c98 <HAL_RCC_OscConfig+0x190>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005c94: 2303 movs r3, #3
|
|
8005c96: e19c b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
8005c98: 4b46 ldr r3, [pc, #280] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005c9a: 681b ldr r3, [r3, #0]
|
|
8005c9c: f003 0302 and.w r3, r3, #2
|
|
8005ca0: 2b00 cmp r3, #0
|
|
8005ca2: d0f0 beq.n 8005c86 <HAL_RCC_OscConfig+0x17e>
|
|
}
|
|
}
|
|
|
|
/* Adjusts the Internal High Speed oscillator (HSI) calibration value. */
|
|
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
|
|
8005ca4: 4b43 ldr r3, [pc, #268] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005ca6: 681b ldr r3, [r3, #0]
|
|
8005ca8: f023 02f8 bic.w r2, r3, #248 ; 0xf8
|
|
8005cac: 687b ldr r3, [r7, #4]
|
|
8005cae: 691b ldr r3, [r3, #16]
|
|
8005cb0: 00db lsls r3, r3, #3
|
|
8005cb2: 4940 ldr r1, [pc, #256] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005cb4: 4313 orrs r3, r2
|
|
8005cb6: 600b str r3, [r1, #0]
|
|
8005cb8: e015 b.n 8005ce6 <HAL_RCC_OscConfig+0x1de>
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal High Speed oscillator (HSI). */
|
|
__HAL_RCC_HSI_DISABLE();
|
|
8005cba: 4b3f ldr r3, [pc, #252] ; (8005db8 <HAL_RCC_OscConfig+0x2b0>)
|
|
8005cbc: 2200 movs r2, #0
|
|
8005cbe: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
8005cc0: f7fc fb2c bl 800231c <HAL_GetTick>
|
|
8005cc4: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till HSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
8005cc6: e008 b.n 8005cda <HAL_RCC_OscConfig+0x1d2>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
|
|
8005cc8: f7fc fb28 bl 800231c <HAL_GetTick>
|
|
8005ccc: 4602 mov r2, r0
|
|
8005cce: 693b ldr r3, [r7, #16]
|
|
8005cd0: 1ad3 subs r3, r2, r3
|
|
8005cd2: 2b02 cmp r3, #2
|
|
8005cd4: d901 bls.n 8005cda <HAL_RCC_OscConfig+0x1d2>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005cd6: 2303 movs r3, #3
|
|
8005cd8: e17b b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
|
|
8005cda: 4b36 ldr r3, [pc, #216] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005cdc: 681b ldr r3, [r3, #0]
|
|
8005cde: f003 0302 and.w r3, r3, #2
|
|
8005ce2: 2b00 cmp r3, #0
|
|
8005ce4: d1f0 bne.n 8005cc8 <HAL_RCC_OscConfig+0x1c0>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSI Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
|
|
8005ce6: 687b ldr r3, [r7, #4]
|
|
8005ce8: 681b ldr r3, [r3, #0]
|
|
8005cea: f003 0308 and.w r3, r3, #8
|
|
8005cee: 2b00 cmp r3, #0
|
|
8005cf0: d030 beq.n 8005d54 <HAL_RCC_OscConfig+0x24c>
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
|
|
|
|
/* Check the LSI State */
|
|
if((RCC_OscInitStruct->LSIState)!= RCC_LSI_OFF)
|
|
8005cf2: 687b ldr r3, [r7, #4]
|
|
8005cf4: 695b ldr r3, [r3, #20]
|
|
8005cf6: 2b00 cmp r3, #0
|
|
8005cf8: d016 beq.n 8005d28 <HAL_RCC_OscConfig+0x220>
|
|
{
|
|
/* Enable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_ENABLE();
|
|
8005cfa: 4b30 ldr r3, [pc, #192] ; (8005dbc <HAL_RCC_OscConfig+0x2b4>)
|
|
8005cfc: 2201 movs r2, #1
|
|
8005cfe: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
8005d00: f7fc fb0c bl 800231c <HAL_GetTick>
|
|
8005d04: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
8005d06: e008 b.n 8005d1a <HAL_RCC_OscConfig+0x212>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
8005d08: f7fc fb08 bl 800231c <HAL_GetTick>
|
|
8005d0c: 4602 mov r2, r0
|
|
8005d0e: 693b ldr r3, [r7, #16]
|
|
8005d10: 1ad3 subs r3, r2, r3
|
|
8005d12: 2b02 cmp r3, #2
|
|
8005d14: d901 bls.n 8005d1a <HAL_RCC_OscConfig+0x212>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005d16: 2303 movs r3, #3
|
|
8005d18: e15b b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
|
|
8005d1a: 4b26 ldr r3, [pc, #152] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005d1c: 6f5b ldr r3, [r3, #116] ; 0x74
|
|
8005d1e: f003 0302 and.w r3, r3, #2
|
|
8005d22: 2b00 cmp r3, #0
|
|
8005d24: d0f0 beq.n 8005d08 <HAL_RCC_OscConfig+0x200>
|
|
8005d26: e015 b.n 8005d54 <HAL_RCC_OscConfig+0x24c>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the Internal Low Speed oscillator (LSI). */
|
|
__HAL_RCC_LSI_DISABLE();
|
|
8005d28: 4b24 ldr r3, [pc, #144] ; (8005dbc <HAL_RCC_OscConfig+0x2b4>)
|
|
8005d2a: 2200 movs r2, #0
|
|
8005d2c: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005d2e: f7fc faf5 bl 800231c <HAL_GetTick>
|
|
8005d32: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSI is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
8005d34: e008 b.n 8005d48 <HAL_RCC_OscConfig+0x240>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
|
|
8005d36: f7fc faf1 bl 800231c <HAL_GetTick>
|
|
8005d3a: 4602 mov r2, r0
|
|
8005d3c: 693b ldr r3, [r7, #16]
|
|
8005d3e: 1ad3 subs r3, r2, r3
|
|
8005d40: 2b02 cmp r3, #2
|
|
8005d42: d901 bls.n 8005d48 <HAL_RCC_OscConfig+0x240>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005d44: 2303 movs r3, #3
|
|
8005d46: e144 b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
|
|
8005d48: 4b1a ldr r3, [pc, #104] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005d4a: 6f5b ldr r3, [r3, #116] ; 0x74
|
|
8005d4c: f003 0302 and.w r3, r3, #2
|
|
8005d50: 2b00 cmp r3, #0
|
|
8005d52: d1f0 bne.n 8005d36 <HAL_RCC_OscConfig+0x22e>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*------------------------------ LSE Configuration -------------------------*/
|
|
if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
|
|
8005d54: 687b ldr r3, [r7, #4]
|
|
8005d56: 681b ldr r3, [r3, #0]
|
|
8005d58: f003 0304 and.w r3, r3, #4
|
|
8005d5c: 2b00 cmp r3, #0
|
|
8005d5e: f000 80a0 beq.w 8005ea2 <HAL_RCC_OscConfig+0x39a>
|
|
{
|
|
FlagStatus pwrclkchanged = RESET;
|
|
8005d62: 2300 movs r3, #0
|
|
8005d64: 75fb strb r3, [r7, #23]
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
|
|
|
|
/* Update LSE configuration in Backup Domain control register */
|
|
/* Requires to enable write access to Backup Domain of necessary */
|
|
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
|
|
8005d66: 4b13 ldr r3, [pc, #76] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005d68: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8005d6a: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8005d6e: 2b00 cmp r3, #0
|
|
8005d70: d10f bne.n 8005d92 <HAL_RCC_OscConfig+0x28a>
|
|
{
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
8005d72: 2300 movs r3, #0
|
|
8005d74: 60bb str r3, [r7, #8]
|
|
8005d76: 4b0f ldr r3, [pc, #60] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005d78: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8005d7a: 4a0e ldr r2, [pc, #56] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005d7c: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
8005d80: 6413 str r3, [r2, #64] ; 0x40
|
|
8005d82: 4b0c ldr r3, [pc, #48] ; (8005db4 <HAL_RCC_OscConfig+0x2ac>)
|
|
8005d84: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8005d86: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8005d8a: 60bb str r3, [r7, #8]
|
|
8005d8c: 68bb ldr r3, [r7, #8]
|
|
pwrclkchanged = SET;
|
|
8005d8e: 2301 movs r3, #1
|
|
8005d90: 75fb strb r3, [r7, #23]
|
|
}
|
|
|
|
if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8005d92: 4b0b ldr r3, [pc, #44] ; (8005dc0 <HAL_RCC_OscConfig+0x2b8>)
|
|
8005d94: 681b ldr r3, [r3, #0]
|
|
8005d96: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8005d9a: 2b00 cmp r3, #0
|
|
8005d9c: d121 bne.n 8005de2 <HAL_RCC_OscConfig+0x2da>
|
|
{
|
|
/* Enable write access to Backup domain */
|
|
SET_BIT(PWR->CR, PWR_CR_DBP);
|
|
8005d9e: 4b08 ldr r3, [pc, #32] ; (8005dc0 <HAL_RCC_OscConfig+0x2b8>)
|
|
8005da0: 681b ldr r3, [r3, #0]
|
|
8005da2: 4a07 ldr r2, [pc, #28] ; (8005dc0 <HAL_RCC_OscConfig+0x2b8>)
|
|
8005da4: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
8005da8: 6013 str r3, [r2, #0]
|
|
|
|
/* Wait for Backup domain Write protection disable */
|
|
tickstart = HAL_GetTick();
|
|
8005daa: f7fc fab7 bl 800231c <HAL_GetTick>
|
|
8005dae: 6138 str r0, [r7, #16]
|
|
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8005db0: e011 b.n 8005dd6 <HAL_RCC_OscConfig+0x2ce>
|
|
8005db2: bf00 nop
|
|
8005db4: 40023800 .word 0x40023800
|
|
8005db8: 42470000 .word 0x42470000
|
|
8005dbc: 42470e80 .word 0x42470e80
|
|
8005dc0: 40007000 .word 0x40007000
|
|
{
|
|
if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
|
|
8005dc4: f7fc faaa bl 800231c <HAL_GetTick>
|
|
8005dc8: 4602 mov r2, r0
|
|
8005dca: 693b ldr r3, [r7, #16]
|
|
8005dcc: 1ad3 subs r3, r2, r3
|
|
8005dce: 2b02 cmp r3, #2
|
|
8005dd0: d901 bls.n 8005dd6 <HAL_RCC_OscConfig+0x2ce>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005dd2: 2303 movs r3, #3
|
|
8005dd4: e0fd b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
|
|
8005dd6: 4b81 ldr r3, [pc, #516] ; (8005fdc <HAL_RCC_OscConfig+0x4d4>)
|
|
8005dd8: 681b ldr r3, [r3, #0]
|
|
8005dda: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8005dde: 2b00 cmp r3, #0
|
|
8005de0: d0f0 beq.n 8005dc4 <HAL_RCC_OscConfig+0x2bc>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Set the new LSE configuration -----------------------------------------*/
|
|
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
|
|
8005de2: 687b ldr r3, [r7, #4]
|
|
8005de4: 689b ldr r3, [r3, #8]
|
|
8005de6: 2b01 cmp r3, #1
|
|
8005de8: d106 bne.n 8005df8 <HAL_RCC_OscConfig+0x2f0>
|
|
8005dea: 4b7d ldr r3, [pc, #500] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005dec: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8005dee: 4a7c ldr r2, [pc, #496] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005df0: f043 0301 orr.w r3, r3, #1
|
|
8005df4: 6713 str r3, [r2, #112] ; 0x70
|
|
8005df6: e01c b.n 8005e32 <HAL_RCC_OscConfig+0x32a>
|
|
8005df8: 687b ldr r3, [r7, #4]
|
|
8005dfa: 689b ldr r3, [r3, #8]
|
|
8005dfc: 2b05 cmp r3, #5
|
|
8005dfe: d10c bne.n 8005e1a <HAL_RCC_OscConfig+0x312>
|
|
8005e00: 4b77 ldr r3, [pc, #476] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e02: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8005e04: 4a76 ldr r2, [pc, #472] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e06: f043 0304 orr.w r3, r3, #4
|
|
8005e0a: 6713 str r3, [r2, #112] ; 0x70
|
|
8005e0c: 4b74 ldr r3, [pc, #464] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e0e: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8005e10: 4a73 ldr r2, [pc, #460] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e12: f043 0301 orr.w r3, r3, #1
|
|
8005e16: 6713 str r3, [r2, #112] ; 0x70
|
|
8005e18: e00b b.n 8005e32 <HAL_RCC_OscConfig+0x32a>
|
|
8005e1a: 4b71 ldr r3, [pc, #452] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e1c: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8005e1e: 4a70 ldr r2, [pc, #448] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e20: f023 0301 bic.w r3, r3, #1
|
|
8005e24: 6713 str r3, [r2, #112] ; 0x70
|
|
8005e26: 4b6e ldr r3, [pc, #440] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e28: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8005e2a: 4a6d ldr r2, [pc, #436] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e2c: f023 0304 bic.w r3, r3, #4
|
|
8005e30: 6713 str r3, [r2, #112] ; 0x70
|
|
/* Check the LSE State */
|
|
if((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
|
|
8005e32: 687b ldr r3, [r7, #4]
|
|
8005e34: 689b ldr r3, [r3, #8]
|
|
8005e36: 2b00 cmp r3, #0
|
|
8005e38: d015 beq.n 8005e66 <HAL_RCC_OscConfig+0x35e>
|
|
{
|
|
/* Get Start Tick*/
|
|
tickstart = HAL_GetTick();
|
|
8005e3a: f7fc fa6f bl 800231c <HAL_GetTick>
|
|
8005e3e: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8005e40: e00a b.n 8005e58 <HAL_RCC_OscConfig+0x350>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
8005e42: f7fc fa6b bl 800231c <HAL_GetTick>
|
|
8005e46: 4602 mov r2, r0
|
|
8005e48: 693b ldr r3, [r7, #16]
|
|
8005e4a: 1ad3 subs r3, r2, r3
|
|
8005e4c: f241 3288 movw r2, #5000 ; 0x1388
|
|
8005e50: 4293 cmp r3, r2
|
|
8005e52: d901 bls.n 8005e58 <HAL_RCC_OscConfig+0x350>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005e54: 2303 movs r3, #3
|
|
8005e56: e0bc b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8005e58: 4b61 ldr r3, [pc, #388] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e5a: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8005e5c: f003 0302 and.w r3, r3, #2
|
|
8005e60: 2b00 cmp r3, #0
|
|
8005e62: d0ee beq.n 8005e42 <HAL_RCC_OscConfig+0x33a>
|
|
8005e64: e014 b.n 8005e90 <HAL_RCC_OscConfig+0x388>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005e66: f7fc fa59 bl 800231c <HAL_GetTick>
|
|
8005e6a: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8005e6c: e00a b.n 8005e84 <HAL_RCC_OscConfig+0x37c>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
8005e6e: f7fc fa55 bl 800231c <HAL_GetTick>
|
|
8005e72: 4602 mov r2, r0
|
|
8005e74: 693b ldr r3, [r7, #16]
|
|
8005e76: 1ad3 subs r3, r2, r3
|
|
8005e78: f241 3288 movw r2, #5000 ; 0x1388
|
|
8005e7c: 4293 cmp r3, r2
|
|
8005e7e: d901 bls.n 8005e84 <HAL_RCC_OscConfig+0x37c>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005e80: 2303 movs r3, #3
|
|
8005e82: e0a6 b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
|
|
8005e84: 4b56 ldr r3, [pc, #344] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e86: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8005e88: f003 0302 and.w r3, r3, #2
|
|
8005e8c: 2b00 cmp r3, #0
|
|
8005e8e: d1ee bne.n 8005e6e <HAL_RCC_OscConfig+0x366>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Restore clock configuration if changed */
|
|
if(pwrclkchanged == SET)
|
|
8005e90: 7dfb ldrb r3, [r7, #23]
|
|
8005e92: 2b01 cmp r3, #1
|
|
8005e94: d105 bne.n 8005ea2 <HAL_RCC_OscConfig+0x39a>
|
|
{
|
|
__HAL_RCC_PWR_CLK_DISABLE();
|
|
8005e96: 4b52 ldr r3, [pc, #328] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e98: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8005e9a: 4a51 ldr r2, [pc, #324] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005e9c: f023 5380 bic.w r3, r3, #268435456 ; 0x10000000
|
|
8005ea0: 6413 str r3, [r2, #64] ; 0x40
|
|
}
|
|
}
|
|
/*-------------------------------- PLL Configuration -----------------------*/
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
|
|
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
|
|
8005ea2: 687b ldr r3, [r7, #4]
|
|
8005ea4: 699b ldr r3, [r3, #24]
|
|
8005ea6: 2b00 cmp r3, #0
|
|
8005ea8: f000 8092 beq.w 8005fd0 <HAL_RCC_OscConfig+0x4c8>
|
|
{
|
|
/* Check if the PLL is used as system clock or not */
|
|
if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
|
|
8005eac: 4b4c ldr r3, [pc, #304] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005eae: 689b ldr r3, [r3, #8]
|
|
8005eb0: f003 030c and.w r3, r3, #12
|
|
8005eb4: 2b08 cmp r3, #8
|
|
8005eb6: d05c beq.n 8005f72 <HAL_RCC_OscConfig+0x46a>
|
|
{
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
|
|
8005eb8: 687b ldr r3, [r7, #4]
|
|
8005eba: 699b ldr r3, [r3, #24]
|
|
8005ebc: 2b02 cmp r3, #2
|
|
8005ebe: d141 bne.n 8005f44 <HAL_RCC_OscConfig+0x43c>
|
|
assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN));
|
|
assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
|
|
assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
|
|
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
8005ec0: 4b48 ldr r3, [pc, #288] ; (8005fe4 <HAL_RCC_OscConfig+0x4dc>)
|
|
8005ec2: 2200 movs r2, #0
|
|
8005ec4: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005ec6: f7fc fa29 bl 800231c <HAL_GetTick>
|
|
8005eca: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till PLL is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8005ecc: e008 b.n 8005ee0 <HAL_RCC_OscConfig+0x3d8>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
8005ece: f7fc fa25 bl 800231c <HAL_GetTick>
|
|
8005ed2: 4602 mov r2, r0
|
|
8005ed4: 693b ldr r3, [r7, #16]
|
|
8005ed6: 1ad3 subs r3, r2, r3
|
|
8005ed8: 2b02 cmp r3, #2
|
|
8005eda: d901 bls.n 8005ee0 <HAL_RCC_OscConfig+0x3d8>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005edc: 2303 movs r3, #3
|
|
8005ede: e078 b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8005ee0: 4b3f ldr r3, [pc, #252] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005ee2: 681b ldr r3, [r3, #0]
|
|
8005ee4: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
8005ee8: 2b00 cmp r3, #0
|
|
8005eea: d1f0 bne.n 8005ece <HAL_RCC_OscConfig+0x3c6>
|
|
}
|
|
}
|
|
|
|
/* Configure the main PLL clock source, multiplication and division factors. */
|
|
WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
|
|
8005eec: 687b ldr r3, [r7, #4]
|
|
8005eee: 69da ldr r2, [r3, #28]
|
|
8005ef0: 687b ldr r3, [r7, #4]
|
|
8005ef2: 6a1b ldr r3, [r3, #32]
|
|
8005ef4: 431a orrs r2, r3
|
|
8005ef6: 687b ldr r3, [r7, #4]
|
|
8005ef8: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8005efa: 019b lsls r3, r3, #6
|
|
8005efc: 431a orrs r2, r3
|
|
8005efe: 687b ldr r3, [r7, #4]
|
|
8005f00: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
8005f02: 085b lsrs r3, r3, #1
|
|
8005f04: 3b01 subs r3, #1
|
|
8005f06: 041b lsls r3, r3, #16
|
|
8005f08: 431a orrs r2, r3
|
|
8005f0a: 687b ldr r3, [r7, #4]
|
|
8005f0c: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8005f0e: 061b lsls r3, r3, #24
|
|
8005f10: 4933 ldr r1, [pc, #204] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005f12: 4313 orrs r3, r2
|
|
8005f14: 604b str r3, [r1, #4]
|
|
RCC_OscInitStruct->PLL.PLLM | \
|
|
(RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \
|
|
(((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
|
|
(RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)));
|
|
/* Enable the main PLL. */
|
|
__HAL_RCC_PLL_ENABLE();
|
|
8005f16: 4b33 ldr r3, [pc, #204] ; (8005fe4 <HAL_RCC_OscConfig+0x4dc>)
|
|
8005f18: 2201 movs r2, #1
|
|
8005f1a: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005f1c: f7fc f9fe bl 800231c <HAL_GetTick>
|
|
8005f20: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till PLL is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8005f22: e008 b.n 8005f36 <HAL_RCC_OscConfig+0x42e>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
8005f24: f7fc f9fa bl 800231c <HAL_GetTick>
|
|
8005f28: 4602 mov r2, r0
|
|
8005f2a: 693b ldr r3, [r7, #16]
|
|
8005f2c: 1ad3 subs r3, r2, r3
|
|
8005f2e: 2b02 cmp r3, #2
|
|
8005f30: d901 bls.n 8005f36 <HAL_RCC_OscConfig+0x42e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005f32: 2303 movs r3, #3
|
|
8005f34: e04d b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
8005f36: 4b2a ldr r3, [pc, #168] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005f38: 681b ldr r3, [r3, #0]
|
|
8005f3a: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
8005f3e: 2b00 cmp r3, #0
|
|
8005f40: d0f0 beq.n 8005f24 <HAL_RCC_OscConfig+0x41c>
|
|
8005f42: e045 b.n 8005fd0 <HAL_RCC_OscConfig+0x4c8>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Disable the main PLL. */
|
|
__HAL_RCC_PLL_DISABLE();
|
|
8005f44: 4b27 ldr r3, [pc, #156] ; (8005fe4 <HAL_RCC_OscConfig+0x4dc>)
|
|
8005f46: 2200 movs r2, #0
|
|
8005f48: 601a str r2, [r3, #0]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
8005f4a: f7fc f9e7 bl 800231c <HAL_GetTick>
|
|
8005f4e: 6138 str r0, [r7, #16]
|
|
|
|
/* Wait till PLL is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8005f50: e008 b.n 8005f64 <HAL_RCC_OscConfig+0x45c>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
|
|
8005f52: f7fc f9e3 bl 800231c <HAL_GetTick>
|
|
8005f56: 4602 mov r2, r0
|
|
8005f58: 693b ldr r3, [r7, #16]
|
|
8005f5a: 1ad3 subs r3, r2, r3
|
|
8005f5c: 2b02 cmp r3, #2
|
|
8005f5e: d901 bls.n 8005f64 <HAL_RCC_OscConfig+0x45c>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8005f60: 2303 movs r3, #3
|
|
8005f62: e036 b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
|
|
8005f64: 4b1e ldr r3, [pc, #120] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005f66: 681b ldr r3, [r3, #0]
|
|
8005f68: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
8005f6c: 2b00 cmp r3, #0
|
|
8005f6e: d1f0 bne.n 8005f52 <HAL_RCC_OscConfig+0x44a>
|
|
8005f70: e02e b.n 8005fd0 <HAL_RCC_OscConfig+0x4c8>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Check if there is a request to disable the PLL used as System clock source */
|
|
if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
|
|
8005f72: 687b ldr r3, [r7, #4]
|
|
8005f74: 699b ldr r3, [r3, #24]
|
|
8005f76: 2b01 cmp r3, #1
|
|
8005f78: d101 bne.n 8005f7e <HAL_RCC_OscConfig+0x476>
|
|
{
|
|
return HAL_ERROR;
|
|
8005f7a: 2301 movs r3, #1
|
|
8005f7c: e029 b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
}
|
|
else
|
|
{
|
|
/* Do not return HAL_ERROR if request repeats the current configuration */
|
|
pll_config = RCC->PLLCFGR;
|
|
8005f7e: 4b18 ldr r3, [pc, #96] ; (8005fe0 <HAL_RCC_OscConfig+0x4d8>)
|
|
8005f80: 685b ldr r3, [r3, #4]
|
|
8005f82: 60fb str r3, [r7, #12]
|
|
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8005f84: 68fb ldr r3, [r7, #12]
|
|
8005f86: f403 0280 and.w r2, r3, #4194304 ; 0x400000
|
|
8005f8a: 687b ldr r3, [r7, #4]
|
|
8005f8c: 69db ldr r3, [r3, #28]
|
|
8005f8e: 429a cmp r2, r3
|
|
8005f90: d11c bne.n 8005fcc <HAL_RCC_OscConfig+0x4c4>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
|
|
8005f92: 68fb ldr r3, [r7, #12]
|
|
8005f94: f003 023f and.w r2, r3, #63 ; 0x3f
|
|
8005f98: 687b ldr r3, [r7, #4]
|
|
8005f9a: 6a1b ldr r3, [r3, #32]
|
|
if((READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
|
|
8005f9c: 429a cmp r2, r3
|
|
8005f9e: d115 bne.n 8005fcc <HAL_RCC_OscConfig+0x4c4>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
|
|
8005fa0: 68fa ldr r2, [r7, #12]
|
|
8005fa2: f647 73c0 movw r3, #32704 ; 0x7fc0
|
|
8005fa6: 4013 ands r3, r2
|
|
8005fa8: 687a ldr r2, [r7, #4]
|
|
8005faa: 6a52 ldr r2, [r2, #36] ; 0x24
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) ||
|
|
8005fac: 4293 cmp r3, r2
|
|
8005fae: d10d bne.n 8005fcc <HAL_RCC_OscConfig+0x4c4>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
|
|
8005fb0: 68fb ldr r3, [r7, #12]
|
|
8005fb2: f403 3240 and.w r2, r3, #196608 ; 0x30000
|
|
8005fb6: 687b ldr r3, [r7, #4]
|
|
8005fb8: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != RCC_OscInitStruct->PLL.PLLN) ||
|
|
8005fba: 429a cmp r2, r3
|
|
8005fbc: d106 bne.n 8005fcc <HAL_RCC_OscConfig+0x4c4>
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != RCC_OscInitStruct->PLL.PLLQ))
|
|
8005fbe: 68fb ldr r3, [r7, #12]
|
|
8005fc0: f003 6270 and.w r2, r3, #251658240 ; 0xf000000
|
|
8005fc4: 687b ldr r3, [r7, #4]
|
|
8005fc6: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != RCC_OscInitStruct->PLL.PLLP) ||
|
|
8005fc8: 429a cmp r2, r3
|
|
8005fca: d001 beq.n 8005fd0 <HAL_RCC_OscConfig+0x4c8>
|
|
{
|
|
return HAL_ERROR;
|
|
8005fcc: 2301 movs r3, #1
|
|
8005fce: e000 b.n 8005fd2 <HAL_RCC_OscConfig+0x4ca>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
8005fd0: 2300 movs r3, #0
|
|
}
|
|
8005fd2: 4618 mov r0, r3
|
|
8005fd4: 3718 adds r7, #24
|
|
8005fd6: 46bd mov sp, r7
|
|
8005fd8: bd80 pop {r7, pc}
|
|
8005fda: bf00 nop
|
|
8005fdc: 40007000 .word 0x40007000
|
|
8005fe0: 40023800 .word 0x40023800
|
|
8005fe4: 42470060 .word 0x42470060
|
|
|
|
08005fe8 <HAL_RCC_ClockConfig>:
|
|
* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
|
|
* (for more details refer to section above "Initialization/de-initialization functions")
|
|
* @retval None
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
|
|
{
|
|
8005fe8: b580 push {r7, lr}
|
|
8005fea: b084 sub sp, #16
|
|
8005fec: af00 add r7, sp, #0
|
|
8005fee: 6078 str r0, [r7, #4]
|
|
8005ff0: 6039 str r1, [r7, #0]
|
|
uint32_t tickstart;
|
|
|
|
/* Check Null pointer */
|
|
if(RCC_ClkInitStruct == NULL)
|
|
8005ff2: 687b ldr r3, [r7, #4]
|
|
8005ff4: 2b00 cmp r3, #0
|
|
8005ff6: d101 bne.n 8005ffc <HAL_RCC_ClockConfig+0x14>
|
|
{
|
|
return HAL_ERROR;
|
|
8005ff8: 2301 movs r3, #1
|
|
8005ffa: e0cc b.n 8006196 <HAL_RCC_ClockConfig+0x1ae>
|
|
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
|
|
must be correctly programmed according to the frequency of the CPU clock
|
|
(HCLK) and the supply voltage of the device. */
|
|
|
|
/* Increasing the number of wait states because of higher CPU frequency */
|
|
if(FLatency > __HAL_FLASH_GET_LATENCY())
|
|
8005ffc: 4b68 ldr r3, [pc, #416] ; (80061a0 <HAL_RCC_ClockConfig+0x1b8>)
|
|
8005ffe: 681b ldr r3, [r3, #0]
|
|
8006000: f003 030f and.w r3, r3, #15
|
|
8006004: 683a ldr r2, [r7, #0]
|
|
8006006: 429a cmp r2, r3
|
|
8006008: d90c bls.n 8006024 <HAL_RCC_ClockConfig+0x3c>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
800600a: 4b65 ldr r3, [pc, #404] ; (80061a0 <HAL_RCC_ClockConfig+0x1b8>)
|
|
800600c: 683a ldr r2, [r7, #0]
|
|
800600e: b2d2 uxtb r2, r2
|
|
8006010: 701a strb r2, [r3, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
8006012: 4b63 ldr r3, [pc, #396] ; (80061a0 <HAL_RCC_ClockConfig+0x1b8>)
|
|
8006014: 681b ldr r3, [r3, #0]
|
|
8006016: f003 030f and.w r3, r3, #15
|
|
800601a: 683a ldr r2, [r7, #0]
|
|
800601c: 429a cmp r2, r3
|
|
800601e: d001 beq.n 8006024 <HAL_RCC_ClockConfig+0x3c>
|
|
{
|
|
return HAL_ERROR;
|
|
8006020: 2301 movs r3, #1
|
|
8006022: e0b8 b.n 8006196 <HAL_RCC_ClockConfig+0x1ae>
|
|
}
|
|
}
|
|
|
|
/*-------------------------- HCLK Configuration --------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
|
|
8006024: 687b ldr r3, [r7, #4]
|
|
8006026: 681b ldr r3, [r3, #0]
|
|
8006028: f003 0302 and.w r3, r3, #2
|
|
800602c: 2b00 cmp r3, #0
|
|
800602e: d020 beq.n 8006072 <HAL_RCC_ClockConfig+0x8a>
|
|
{
|
|
/* Set the highest APBx dividers in order to ensure that we do not go through
|
|
a non-spec phase whatever we decrease or increase HCLK. */
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
8006030: 687b ldr r3, [r7, #4]
|
|
8006032: 681b ldr r3, [r3, #0]
|
|
8006034: f003 0304 and.w r3, r3, #4
|
|
8006038: 2b00 cmp r3, #0
|
|
800603a: d005 beq.n 8006048 <HAL_RCC_ClockConfig+0x60>
|
|
{
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
|
|
800603c: 4b59 ldr r3, [pc, #356] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
800603e: 689b ldr r3, [r3, #8]
|
|
8006040: 4a58 ldr r2, [pc, #352] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
8006042: f443 53e0 orr.w r3, r3, #7168 ; 0x1c00
|
|
8006046: 6093 str r3, [r2, #8]
|
|
}
|
|
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
8006048: 687b ldr r3, [r7, #4]
|
|
800604a: 681b ldr r3, [r3, #0]
|
|
800604c: f003 0308 and.w r3, r3, #8
|
|
8006050: 2b00 cmp r3, #0
|
|
8006052: d005 beq.n 8006060 <HAL_RCC_ClockConfig+0x78>
|
|
{
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
|
|
8006054: 4b53 ldr r3, [pc, #332] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
8006056: 689b ldr r3, [r3, #8]
|
|
8006058: 4a52 ldr r2, [pc, #328] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
800605a: f443 4360 orr.w r3, r3, #57344 ; 0xe000
|
|
800605e: 6093 str r3, [r2, #8]
|
|
}
|
|
|
|
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
|
|
8006060: 4b50 ldr r3, [pc, #320] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
8006062: 689b ldr r3, [r3, #8]
|
|
8006064: f023 02f0 bic.w r2, r3, #240 ; 0xf0
|
|
8006068: 687b ldr r3, [r7, #4]
|
|
800606a: 689b ldr r3, [r3, #8]
|
|
800606c: 494d ldr r1, [pc, #308] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
800606e: 4313 orrs r3, r2
|
|
8006070: 608b str r3, [r1, #8]
|
|
}
|
|
|
|
/*------------------------- SYSCLK Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
|
|
8006072: 687b ldr r3, [r7, #4]
|
|
8006074: 681b ldr r3, [r3, #0]
|
|
8006076: f003 0301 and.w r3, r3, #1
|
|
800607a: 2b00 cmp r3, #0
|
|
800607c: d044 beq.n 8006108 <HAL_RCC_ClockConfig+0x120>
|
|
{
|
|
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
|
|
|
|
/* HSE is selected as System Clock Source */
|
|
if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
|
|
800607e: 687b ldr r3, [r7, #4]
|
|
8006080: 685b ldr r3, [r3, #4]
|
|
8006082: 2b01 cmp r3, #1
|
|
8006084: d107 bne.n 8006096 <HAL_RCC_ClockConfig+0xae>
|
|
{
|
|
/* Check the HSE ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
|
|
8006086: 4b47 ldr r3, [pc, #284] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
8006088: 681b ldr r3, [r3, #0]
|
|
800608a: f403 3300 and.w r3, r3, #131072 ; 0x20000
|
|
800608e: 2b00 cmp r3, #0
|
|
8006090: d119 bne.n 80060c6 <HAL_RCC_ClockConfig+0xde>
|
|
{
|
|
return HAL_ERROR;
|
|
8006092: 2301 movs r3, #1
|
|
8006094: e07f b.n 8006196 <HAL_RCC_ClockConfig+0x1ae>
|
|
}
|
|
}
|
|
/* PLL is selected as System Clock Source */
|
|
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
|
|
8006096: 687b ldr r3, [r7, #4]
|
|
8006098: 685b ldr r3, [r3, #4]
|
|
800609a: 2b02 cmp r3, #2
|
|
800609c: d003 beq.n 80060a6 <HAL_RCC_ClockConfig+0xbe>
|
|
(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
|
|
800609e: 687b ldr r3, [r7, #4]
|
|
80060a0: 685b ldr r3, [r3, #4]
|
|
else if((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
|
|
80060a2: 2b03 cmp r3, #3
|
|
80060a4: d107 bne.n 80060b6 <HAL_RCC_ClockConfig+0xce>
|
|
{
|
|
/* Check the PLL ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
|
|
80060a6: 4b3f ldr r3, [pc, #252] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
80060a8: 681b ldr r3, [r3, #0]
|
|
80060aa: f003 7300 and.w r3, r3, #33554432 ; 0x2000000
|
|
80060ae: 2b00 cmp r3, #0
|
|
80060b0: d109 bne.n 80060c6 <HAL_RCC_ClockConfig+0xde>
|
|
{
|
|
return HAL_ERROR;
|
|
80060b2: 2301 movs r3, #1
|
|
80060b4: e06f b.n 8006196 <HAL_RCC_ClockConfig+0x1ae>
|
|
}
|
|
/* HSI is selected as System Clock Source */
|
|
else
|
|
{
|
|
/* Check the HSI ready flag */
|
|
if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
|
|
80060b6: 4b3b ldr r3, [pc, #236] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
80060b8: 681b ldr r3, [r3, #0]
|
|
80060ba: f003 0302 and.w r3, r3, #2
|
|
80060be: 2b00 cmp r3, #0
|
|
80060c0: d101 bne.n 80060c6 <HAL_RCC_ClockConfig+0xde>
|
|
{
|
|
return HAL_ERROR;
|
|
80060c2: 2301 movs r3, #1
|
|
80060c4: e067 b.n 8006196 <HAL_RCC_ClockConfig+0x1ae>
|
|
}
|
|
}
|
|
|
|
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
|
|
80060c6: 4b37 ldr r3, [pc, #220] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
80060c8: 689b ldr r3, [r3, #8]
|
|
80060ca: f023 0203 bic.w r2, r3, #3
|
|
80060ce: 687b ldr r3, [r7, #4]
|
|
80060d0: 685b ldr r3, [r3, #4]
|
|
80060d2: 4934 ldr r1, [pc, #208] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
80060d4: 4313 orrs r3, r2
|
|
80060d6: 608b str r3, [r1, #8]
|
|
|
|
/* Get Start Tick */
|
|
tickstart = HAL_GetTick();
|
|
80060d8: f7fc f920 bl 800231c <HAL_GetTick>
|
|
80060dc: 60f8 str r0, [r7, #12]
|
|
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
80060de: e00a b.n 80060f6 <HAL_RCC_ClockConfig+0x10e>
|
|
{
|
|
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
|
|
80060e0: f7fc f91c bl 800231c <HAL_GetTick>
|
|
80060e4: 4602 mov r2, r0
|
|
80060e6: 68fb ldr r3, [r7, #12]
|
|
80060e8: 1ad3 subs r3, r2, r3
|
|
80060ea: f241 3288 movw r2, #5000 ; 0x1388
|
|
80060ee: 4293 cmp r3, r2
|
|
80060f0: d901 bls.n 80060f6 <HAL_RCC_ClockConfig+0x10e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80060f2: 2303 movs r3, #3
|
|
80060f4: e04f b.n 8006196 <HAL_RCC_ClockConfig+0x1ae>
|
|
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
|
|
80060f6: 4b2b ldr r3, [pc, #172] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
80060f8: 689b ldr r3, [r3, #8]
|
|
80060fa: f003 020c and.w r2, r3, #12
|
|
80060fe: 687b ldr r3, [r7, #4]
|
|
8006100: 685b ldr r3, [r3, #4]
|
|
8006102: 009b lsls r3, r3, #2
|
|
8006104: 429a cmp r2, r3
|
|
8006106: d1eb bne.n 80060e0 <HAL_RCC_ClockConfig+0xf8>
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Decreasing the number of wait states because of lower CPU frequency */
|
|
if(FLatency < __HAL_FLASH_GET_LATENCY())
|
|
8006108: 4b25 ldr r3, [pc, #148] ; (80061a0 <HAL_RCC_ClockConfig+0x1b8>)
|
|
800610a: 681b ldr r3, [r3, #0]
|
|
800610c: f003 030f and.w r3, r3, #15
|
|
8006110: 683a ldr r2, [r7, #0]
|
|
8006112: 429a cmp r2, r3
|
|
8006114: d20c bcs.n 8006130 <HAL_RCC_ClockConfig+0x148>
|
|
{
|
|
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
|
|
__HAL_FLASH_SET_LATENCY(FLatency);
|
|
8006116: 4b22 ldr r3, [pc, #136] ; (80061a0 <HAL_RCC_ClockConfig+0x1b8>)
|
|
8006118: 683a ldr r2, [r7, #0]
|
|
800611a: b2d2 uxtb r2, r2
|
|
800611c: 701a strb r2, [r3, #0]
|
|
|
|
/* Check that the new number of wait states is taken into account to access the Flash
|
|
memory by reading the FLASH_ACR register */
|
|
if(__HAL_FLASH_GET_LATENCY() != FLatency)
|
|
800611e: 4b20 ldr r3, [pc, #128] ; (80061a0 <HAL_RCC_ClockConfig+0x1b8>)
|
|
8006120: 681b ldr r3, [r3, #0]
|
|
8006122: f003 030f and.w r3, r3, #15
|
|
8006126: 683a ldr r2, [r7, #0]
|
|
8006128: 429a cmp r2, r3
|
|
800612a: d001 beq.n 8006130 <HAL_RCC_ClockConfig+0x148>
|
|
{
|
|
return HAL_ERROR;
|
|
800612c: 2301 movs r3, #1
|
|
800612e: e032 b.n 8006196 <HAL_RCC_ClockConfig+0x1ae>
|
|
}
|
|
}
|
|
|
|
/*-------------------------- PCLK1 Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
|
|
8006130: 687b ldr r3, [r7, #4]
|
|
8006132: 681b ldr r3, [r3, #0]
|
|
8006134: f003 0304 and.w r3, r3, #4
|
|
8006138: 2b00 cmp r3, #0
|
|
800613a: d008 beq.n 800614e <HAL_RCC_ClockConfig+0x166>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
|
|
800613c: 4b19 ldr r3, [pc, #100] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
800613e: 689b ldr r3, [r3, #8]
|
|
8006140: f423 52e0 bic.w r2, r3, #7168 ; 0x1c00
|
|
8006144: 687b ldr r3, [r7, #4]
|
|
8006146: 68db ldr r3, [r3, #12]
|
|
8006148: 4916 ldr r1, [pc, #88] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
800614a: 4313 orrs r3, r2
|
|
800614c: 608b str r3, [r1, #8]
|
|
}
|
|
|
|
/*-------------------------- PCLK2 Configuration ---------------------------*/
|
|
if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
|
|
800614e: 687b ldr r3, [r7, #4]
|
|
8006150: 681b ldr r3, [r3, #0]
|
|
8006152: f003 0308 and.w r3, r3, #8
|
|
8006156: 2b00 cmp r3, #0
|
|
8006158: d009 beq.n 800616e <HAL_RCC_ClockConfig+0x186>
|
|
{
|
|
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
|
|
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
|
|
800615a: 4b12 ldr r3, [pc, #72] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
800615c: 689b ldr r3, [r3, #8]
|
|
800615e: f423 4260 bic.w r2, r3, #57344 ; 0xe000
|
|
8006162: 687b ldr r3, [r7, #4]
|
|
8006164: 691b ldr r3, [r3, #16]
|
|
8006166: 00db lsls r3, r3, #3
|
|
8006168: 490e ldr r1, [pc, #56] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
800616a: 4313 orrs r3, r2
|
|
800616c: 608b str r3, [r1, #8]
|
|
}
|
|
|
|
/* Update the SystemCoreClock global variable */
|
|
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
|
|
800616e: f000 f821 bl 80061b4 <HAL_RCC_GetSysClockFreq>
|
|
8006172: 4601 mov r1, r0
|
|
8006174: 4b0b ldr r3, [pc, #44] ; (80061a4 <HAL_RCC_ClockConfig+0x1bc>)
|
|
8006176: 689b ldr r3, [r3, #8]
|
|
8006178: 091b lsrs r3, r3, #4
|
|
800617a: f003 030f and.w r3, r3, #15
|
|
800617e: 4a0a ldr r2, [pc, #40] ; (80061a8 <HAL_RCC_ClockConfig+0x1c0>)
|
|
8006180: 5cd3 ldrb r3, [r2, r3]
|
|
8006182: fa21 f303 lsr.w r3, r1, r3
|
|
8006186: 4a09 ldr r2, [pc, #36] ; (80061ac <HAL_RCC_ClockConfig+0x1c4>)
|
|
8006188: 6013 str r3, [r2, #0]
|
|
|
|
/* Configure the source of time base considering new system clocks settings */
|
|
HAL_InitTick (uwTickPrio);
|
|
800618a: 4b09 ldr r3, [pc, #36] ; (80061b0 <HAL_RCC_ClockConfig+0x1c8>)
|
|
800618c: 681b ldr r3, [r3, #0]
|
|
800618e: 4618 mov r0, r3
|
|
8006190: f7fc f880 bl 8002294 <HAL_InitTick>
|
|
|
|
return HAL_OK;
|
|
8006194: 2300 movs r3, #0
|
|
}
|
|
8006196: 4618 mov r0, r3
|
|
8006198: 3710 adds r7, #16
|
|
800619a: 46bd mov sp, r7
|
|
800619c: bd80 pop {r7, pc}
|
|
800619e: bf00 nop
|
|
80061a0: 40023c00 .word 0x40023c00
|
|
80061a4: 40023800 .word 0x40023800
|
|
80061a8: 0800e918 .word 0x0800e918
|
|
80061ac: 20000000 .word 0x20000000
|
|
80061b0: 20000004 .word 0x20000004
|
|
|
|
080061b4 <HAL_RCC_GetSysClockFreq>:
|
|
*
|
|
*
|
|
* @retval SYSCLK frequency
|
|
*/
|
|
__weak uint32_t HAL_RCC_GetSysClockFreq(void)
|
|
{
|
|
80061b4: b5f0 push {r4, r5, r6, r7, lr}
|
|
80061b6: b085 sub sp, #20
|
|
80061b8: af00 add r7, sp, #0
|
|
uint32_t pllm = 0U, pllvco = 0U, pllp = 0U;
|
|
80061ba: 2300 movs r3, #0
|
|
80061bc: 607b str r3, [r7, #4]
|
|
80061be: 2300 movs r3, #0
|
|
80061c0: 60fb str r3, [r7, #12]
|
|
80061c2: 2300 movs r3, #0
|
|
80061c4: 603b str r3, [r7, #0]
|
|
uint32_t sysclockfreq = 0U;
|
|
80061c6: 2300 movs r3, #0
|
|
80061c8: 60bb str r3, [r7, #8]
|
|
|
|
/* Get SYSCLK source -------------------------------------------------------*/
|
|
switch (RCC->CFGR & RCC_CFGR_SWS)
|
|
80061ca: 4b63 ldr r3, [pc, #396] ; (8006358 <HAL_RCC_GetSysClockFreq+0x1a4>)
|
|
80061cc: 689b ldr r3, [r3, #8]
|
|
80061ce: f003 030c and.w r3, r3, #12
|
|
80061d2: 2b04 cmp r3, #4
|
|
80061d4: d007 beq.n 80061e6 <HAL_RCC_GetSysClockFreq+0x32>
|
|
80061d6: 2b08 cmp r3, #8
|
|
80061d8: d008 beq.n 80061ec <HAL_RCC_GetSysClockFreq+0x38>
|
|
80061da: 2b00 cmp r3, #0
|
|
80061dc: f040 80b4 bne.w 8006348 <HAL_RCC_GetSysClockFreq+0x194>
|
|
{
|
|
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
|
|
{
|
|
sysclockfreq = HSI_VALUE;
|
|
80061e0: 4b5e ldr r3, [pc, #376] ; (800635c <HAL_RCC_GetSysClockFreq+0x1a8>)
|
|
80061e2: 60bb str r3, [r7, #8]
|
|
break;
|
|
80061e4: e0b3 b.n 800634e <HAL_RCC_GetSysClockFreq+0x19a>
|
|
}
|
|
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
|
|
{
|
|
sysclockfreq = HSE_VALUE;
|
|
80061e6: 4b5e ldr r3, [pc, #376] ; (8006360 <HAL_RCC_GetSysClockFreq+0x1ac>)
|
|
80061e8: 60bb str r3, [r7, #8]
|
|
break;
|
|
80061ea: e0b0 b.n 800634e <HAL_RCC_GetSysClockFreq+0x19a>
|
|
}
|
|
case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */
|
|
{
|
|
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
|
|
SYSCLK = PLL_VCO / PLLP */
|
|
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
|
80061ec: 4b5a ldr r3, [pc, #360] ; (8006358 <HAL_RCC_GetSysClockFreq+0x1a4>)
|
|
80061ee: 685b ldr r3, [r3, #4]
|
|
80061f0: f003 033f and.w r3, r3, #63 ; 0x3f
|
|
80061f4: 607b str r3, [r7, #4]
|
|
if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
|
|
80061f6: 4b58 ldr r3, [pc, #352] ; (8006358 <HAL_RCC_GetSysClockFreq+0x1a4>)
|
|
80061f8: 685b ldr r3, [r3, #4]
|
|
80061fa: f403 0380 and.w r3, r3, #4194304 ; 0x400000
|
|
80061fe: 2b00 cmp r3, #0
|
|
8006200: d04a beq.n 8006298 <HAL_RCC_GetSysClockFreq+0xe4>
|
|
{
|
|
/* HSE used as PLL clock source */
|
|
pllvco = (uint32_t) ((((uint64_t) HSE_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
|
|
8006202: 4b55 ldr r3, [pc, #340] ; (8006358 <HAL_RCC_GetSysClockFreq+0x1a4>)
|
|
8006204: 685b ldr r3, [r3, #4]
|
|
8006206: 099b lsrs r3, r3, #6
|
|
8006208: f04f 0400 mov.w r4, #0
|
|
800620c: f240 11ff movw r1, #511 ; 0x1ff
|
|
8006210: f04f 0200 mov.w r2, #0
|
|
8006214: ea03 0501 and.w r5, r3, r1
|
|
8006218: ea04 0602 and.w r6, r4, r2
|
|
800621c: 4629 mov r1, r5
|
|
800621e: 4632 mov r2, r6
|
|
8006220: f04f 0300 mov.w r3, #0
|
|
8006224: f04f 0400 mov.w r4, #0
|
|
8006228: 0154 lsls r4, r2, #5
|
|
800622a: ea44 64d1 orr.w r4, r4, r1, lsr #27
|
|
800622e: 014b lsls r3, r1, #5
|
|
8006230: 4619 mov r1, r3
|
|
8006232: 4622 mov r2, r4
|
|
8006234: 1b49 subs r1, r1, r5
|
|
8006236: eb62 0206 sbc.w r2, r2, r6
|
|
800623a: f04f 0300 mov.w r3, #0
|
|
800623e: f04f 0400 mov.w r4, #0
|
|
8006242: 0194 lsls r4, r2, #6
|
|
8006244: ea44 6491 orr.w r4, r4, r1, lsr #26
|
|
8006248: 018b lsls r3, r1, #6
|
|
800624a: 1a5b subs r3, r3, r1
|
|
800624c: eb64 0402 sbc.w r4, r4, r2
|
|
8006250: f04f 0100 mov.w r1, #0
|
|
8006254: f04f 0200 mov.w r2, #0
|
|
8006258: 00e2 lsls r2, r4, #3
|
|
800625a: ea42 7253 orr.w r2, r2, r3, lsr #29
|
|
800625e: 00d9 lsls r1, r3, #3
|
|
8006260: 460b mov r3, r1
|
|
8006262: 4614 mov r4, r2
|
|
8006264: 195b adds r3, r3, r5
|
|
8006266: eb44 0406 adc.w r4, r4, r6
|
|
800626a: f04f 0100 mov.w r1, #0
|
|
800626e: f04f 0200 mov.w r2, #0
|
|
8006272: 0262 lsls r2, r4, #9
|
|
8006274: ea42 52d3 orr.w r2, r2, r3, lsr #23
|
|
8006278: 0259 lsls r1, r3, #9
|
|
800627a: 460b mov r3, r1
|
|
800627c: 4614 mov r4, r2
|
|
800627e: 4618 mov r0, r3
|
|
8006280: 4621 mov r1, r4
|
|
8006282: 687b ldr r3, [r7, #4]
|
|
8006284: f04f 0400 mov.w r4, #0
|
|
8006288: 461a mov r2, r3
|
|
800628a: 4623 mov r3, r4
|
|
800628c: f7fa fd04 bl 8000c98 <__aeabi_uldivmod>
|
|
8006290: 4603 mov r3, r0
|
|
8006292: 460c mov r4, r1
|
|
8006294: 60fb str r3, [r7, #12]
|
|
8006296: e049 b.n 800632c <HAL_RCC_GetSysClockFreq+0x178>
|
|
}
|
|
else
|
|
{
|
|
/* HSI used as PLL clock source */
|
|
pllvco = (uint32_t) ((((uint64_t) HSI_VALUE * ((uint64_t) ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
|
|
8006298: 4b2f ldr r3, [pc, #188] ; (8006358 <HAL_RCC_GetSysClockFreq+0x1a4>)
|
|
800629a: 685b ldr r3, [r3, #4]
|
|
800629c: 099b lsrs r3, r3, #6
|
|
800629e: f04f 0400 mov.w r4, #0
|
|
80062a2: f240 11ff movw r1, #511 ; 0x1ff
|
|
80062a6: f04f 0200 mov.w r2, #0
|
|
80062aa: ea03 0501 and.w r5, r3, r1
|
|
80062ae: ea04 0602 and.w r6, r4, r2
|
|
80062b2: 4629 mov r1, r5
|
|
80062b4: 4632 mov r2, r6
|
|
80062b6: f04f 0300 mov.w r3, #0
|
|
80062ba: f04f 0400 mov.w r4, #0
|
|
80062be: 0154 lsls r4, r2, #5
|
|
80062c0: ea44 64d1 orr.w r4, r4, r1, lsr #27
|
|
80062c4: 014b lsls r3, r1, #5
|
|
80062c6: 4619 mov r1, r3
|
|
80062c8: 4622 mov r2, r4
|
|
80062ca: 1b49 subs r1, r1, r5
|
|
80062cc: eb62 0206 sbc.w r2, r2, r6
|
|
80062d0: f04f 0300 mov.w r3, #0
|
|
80062d4: f04f 0400 mov.w r4, #0
|
|
80062d8: 0194 lsls r4, r2, #6
|
|
80062da: ea44 6491 orr.w r4, r4, r1, lsr #26
|
|
80062de: 018b lsls r3, r1, #6
|
|
80062e0: 1a5b subs r3, r3, r1
|
|
80062e2: eb64 0402 sbc.w r4, r4, r2
|
|
80062e6: f04f 0100 mov.w r1, #0
|
|
80062ea: f04f 0200 mov.w r2, #0
|
|
80062ee: 00e2 lsls r2, r4, #3
|
|
80062f0: ea42 7253 orr.w r2, r2, r3, lsr #29
|
|
80062f4: 00d9 lsls r1, r3, #3
|
|
80062f6: 460b mov r3, r1
|
|
80062f8: 4614 mov r4, r2
|
|
80062fa: 195b adds r3, r3, r5
|
|
80062fc: eb44 0406 adc.w r4, r4, r6
|
|
8006300: f04f 0100 mov.w r1, #0
|
|
8006304: f04f 0200 mov.w r2, #0
|
|
8006308: 02a2 lsls r2, r4, #10
|
|
800630a: ea42 5293 orr.w r2, r2, r3, lsr #22
|
|
800630e: 0299 lsls r1, r3, #10
|
|
8006310: 460b mov r3, r1
|
|
8006312: 4614 mov r4, r2
|
|
8006314: 4618 mov r0, r3
|
|
8006316: 4621 mov r1, r4
|
|
8006318: 687b ldr r3, [r7, #4]
|
|
800631a: f04f 0400 mov.w r4, #0
|
|
800631e: 461a mov r2, r3
|
|
8006320: 4623 mov r3, r4
|
|
8006322: f7fa fcb9 bl 8000c98 <__aeabi_uldivmod>
|
|
8006326: 4603 mov r3, r0
|
|
8006328: 460c mov r4, r1
|
|
800632a: 60fb str r3, [r7, #12]
|
|
}
|
|
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) *2U);
|
|
800632c: 4b0a ldr r3, [pc, #40] ; (8006358 <HAL_RCC_GetSysClockFreq+0x1a4>)
|
|
800632e: 685b ldr r3, [r3, #4]
|
|
8006330: 0c1b lsrs r3, r3, #16
|
|
8006332: f003 0303 and.w r3, r3, #3
|
|
8006336: 3301 adds r3, #1
|
|
8006338: 005b lsls r3, r3, #1
|
|
800633a: 603b str r3, [r7, #0]
|
|
|
|
sysclockfreq = pllvco/pllp;
|
|
800633c: 68fa ldr r2, [r7, #12]
|
|
800633e: 683b ldr r3, [r7, #0]
|
|
8006340: fbb2 f3f3 udiv r3, r2, r3
|
|
8006344: 60bb str r3, [r7, #8]
|
|
break;
|
|
8006346: e002 b.n 800634e <HAL_RCC_GetSysClockFreq+0x19a>
|
|
}
|
|
default:
|
|
{
|
|
sysclockfreq = HSI_VALUE;
|
|
8006348: 4b04 ldr r3, [pc, #16] ; (800635c <HAL_RCC_GetSysClockFreq+0x1a8>)
|
|
800634a: 60bb str r3, [r7, #8]
|
|
break;
|
|
800634c: bf00 nop
|
|
}
|
|
}
|
|
return sysclockfreq;
|
|
800634e: 68bb ldr r3, [r7, #8]
|
|
}
|
|
8006350: 4618 mov r0, r3
|
|
8006352: 3714 adds r7, #20
|
|
8006354: 46bd mov sp, r7
|
|
8006356: bdf0 pop {r4, r5, r6, r7, pc}
|
|
8006358: 40023800 .word 0x40023800
|
|
800635c: 00f42400 .word 0x00f42400
|
|
8006360: 007a1200 .word 0x007a1200
|
|
|
|
08006364 <HAL_RCC_GetHCLKFreq>:
|
|
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
|
|
* and updated within this function
|
|
* @retval HCLK frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetHCLKFreq(void)
|
|
{
|
|
8006364: b480 push {r7}
|
|
8006366: af00 add r7, sp, #0
|
|
return SystemCoreClock;
|
|
8006368: 4b03 ldr r3, [pc, #12] ; (8006378 <HAL_RCC_GetHCLKFreq+0x14>)
|
|
800636a: 681b ldr r3, [r3, #0]
|
|
}
|
|
800636c: 4618 mov r0, r3
|
|
800636e: 46bd mov sp, r7
|
|
8006370: f85d 7b04 ldr.w r7, [sp], #4
|
|
8006374: 4770 bx lr
|
|
8006376: bf00 nop
|
|
8006378: 20000000 .word 0x20000000
|
|
|
|
0800637c <HAL_RCC_GetPCLK1Freq>:
|
|
* @note Each time PCLK1 changes, this function must be called to update the
|
|
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK1 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK1Freq(void)
|
|
{
|
|
800637c: b580 push {r7, lr}
|
|
800637e: af00 add r7, sp, #0
|
|
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos]);
|
|
8006380: f7ff fff0 bl 8006364 <HAL_RCC_GetHCLKFreq>
|
|
8006384: 4601 mov r1, r0
|
|
8006386: 4b05 ldr r3, [pc, #20] ; (800639c <HAL_RCC_GetPCLK1Freq+0x20>)
|
|
8006388: 689b ldr r3, [r3, #8]
|
|
800638a: 0a9b lsrs r3, r3, #10
|
|
800638c: f003 0307 and.w r3, r3, #7
|
|
8006390: 4a03 ldr r2, [pc, #12] ; (80063a0 <HAL_RCC_GetPCLK1Freq+0x24>)
|
|
8006392: 5cd3 ldrb r3, [r2, r3]
|
|
8006394: fa21 f303 lsr.w r3, r1, r3
|
|
}
|
|
8006398: 4618 mov r0, r3
|
|
800639a: bd80 pop {r7, pc}
|
|
800639c: 40023800 .word 0x40023800
|
|
80063a0: 0800e928 .word 0x0800e928
|
|
|
|
080063a4 <HAL_RCC_GetPCLK2Freq>:
|
|
* @note Each time PCLK2 changes, this function must be called to update the
|
|
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
|
|
* @retval PCLK2 frequency
|
|
*/
|
|
uint32_t HAL_RCC_GetPCLK2Freq(void)
|
|
{
|
|
80063a4: b580 push {r7, lr}
|
|
80063a6: af00 add r7, sp, #0
|
|
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
|
|
return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2)>> RCC_CFGR_PPRE2_Pos]);
|
|
80063a8: f7ff ffdc bl 8006364 <HAL_RCC_GetHCLKFreq>
|
|
80063ac: 4601 mov r1, r0
|
|
80063ae: 4b05 ldr r3, [pc, #20] ; (80063c4 <HAL_RCC_GetPCLK2Freq+0x20>)
|
|
80063b0: 689b ldr r3, [r3, #8]
|
|
80063b2: 0b5b lsrs r3, r3, #13
|
|
80063b4: f003 0307 and.w r3, r3, #7
|
|
80063b8: 4a03 ldr r2, [pc, #12] ; (80063c8 <HAL_RCC_GetPCLK2Freq+0x24>)
|
|
80063ba: 5cd3 ldrb r3, [r2, r3]
|
|
80063bc: fa21 f303 lsr.w r3, r1, r3
|
|
}
|
|
80063c0: 4618 mov r0, r3
|
|
80063c2: bd80 pop {r7, pc}
|
|
80063c4: 40023800 .word 0x40023800
|
|
80063c8: 0800e928 .word 0x0800e928
|
|
|
|
080063cc <HAL_RCCEx_PeriphCLKConfig>:
|
|
* domain (RTC and RCC_BDCR register expect BKPSRAM) will be reset
|
|
*
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
|
|
{
|
|
80063cc: b580 push {r7, lr}
|
|
80063ce: b086 sub sp, #24
|
|
80063d0: af00 add r7, sp, #0
|
|
80063d2: 6078 str r0, [r7, #4]
|
|
uint32_t tickstart = 0U;
|
|
80063d4: 2300 movs r3, #0
|
|
80063d6: 617b str r3, [r7, #20]
|
|
uint32_t tmpreg1 = 0U;
|
|
80063d8: 2300 movs r3, #0
|
|
80063da: 613b str r3, [r7, #16]
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
|
|
|
|
/*---------------------------- I2S configuration ---------------------------*/
|
|
if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) ||
|
|
80063dc: 687b ldr r3, [r7, #4]
|
|
80063de: 681b ldr r3, [r3, #0]
|
|
80063e0: f003 0301 and.w r3, r3, #1
|
|
80063e4: 2b00 cmp r3, #0
|
|
80063e6: d105 bne.n 80063f4 <HAL_RCCEx_PeriphCLKConfig+0x28>
|
|
(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S))
|
|
80063e8: 687b ldr r3, [r7, #4]
|
|
80063ea: 681b ldr r3, [r3, #0]
|
|
80063ec: f003 0304 and.w r3, r3, #4
|
|
if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) ||
|
|
80063f0: 2b00 cmp r3, #0
|
|
80063f2: d035 beq.n 8006460 <HAL_RCCEx_PeriphCLKConfig+0x94>
|
|
assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
|
|
#if defined(STM32F411xE)
|
|
assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM));
|
|
#endif /* STM32F411xE */
|
|
/* Disable the PLLI2S */
|
|
__HAL_RCC_PLLI2S_DISABLE();
|
|
80063f4: 4b67 ldr r3, [pc, #412] ; (8006594 <HAL_RCCEx_PeriphCLKConfig+0x1c8>)
|
|
80063f6: 2200 movs r2, #0
|
|
80063f8: 601a str r2, [r3, #0]
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
80063fa: f7fb ff8f bl 800231c <HAL_GetTick>
|
|
80063fe: 6178 str r0, [r7, #20]
|
|
/* Wait till PLLI2S is disabled */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
|
|
8006400: e008 b.n 8006414 <HAL_RCCEx_PeriphCLKConfig+0x48>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
|
|
8006402: f7fb ff8b bl 800231c <HAL_GetTick>
|
|
8006406: 4602 mov r2, r0
|
|
8006408: 697b ldr r3, [r7, #20]
|
|
800640a: 1ad3 subs r3, r2, r3
|
|
800640c: 2b02 cmp r3, #2
|
|
800640e: d901 bls.n 8006414 <HAL_RCCEx_PeriphCLKConfig+0x48>
|
|
{
|
|
/* return in case of Timeout detected */
|
|
return HAL_TIMEOUT;
|
|
8006410: 2303 movs r3, #3
|
|
8006412: e0ba b.n 800658a <HAL_RCCEx_PeriphCLKConfig+0x1be>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
|
|
8006414: 4b60 ldr r3, [pc, #384] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006416: 681b ldr r3, [r3, #0]
|
|
8006418: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
|
|
800641c: 2b00 cmp r3, #0
|
|
800641e: d1f0 bne.n 8006402 <HAL_RCCEx_PeriphCLKConfig+0x36>
|
|
__HAL_RCC_PLLI2S_I2SCLK_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SR);
|
|
#else
|
|
/* Configure the PLLI2S division factors */
|
|
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLM) */
|
|
/* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
|
|
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SR);
|
|
8006420: 687b ldr r3, [r7, #4]
|
|
8006422: 685b ldr r3, [r3, #4]
|
|
8006424: 019a lsls r2, r3, #6
|
|
8006426: 687b ldr r3, [r7, #4]
|
|
8006428: 689b ldr r3, [r3, #8]
|
|
800642a: 071b lsls r3, r3, #28
|
|
800642c: 495a ldr r1, [pc, #360] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
800642e: 4313 orrs r3, r2
|
|
8006430: f8c1 3084 str.w r3, [r1, #132] ; 0x84
|
|
#endif /* STM32F411xE */
|
|
|
|
/* Enable the PLLI2S */
|
|
__HAL_RCC_PLLI2S_ENABLE();
|
|
8006434: 4b57 ldr r3, [pc, #348] ; (8006594 <HAL_RCCEx_PeriphCLKConfig+0x1c8>)
|
|
8006436: 2201 movs r2, #1
|
|
8006438: 601a str r2, [r3, #0]
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
800643a: f7fb ff6f bl 800231c <HAL_GetTick>
|
|
800643e: 6178 str r0, [r7, #20]
|
|
/* Wait till PLLI2S is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
|
|
8006440: e008 b.n 8006454 <HAL_RCCEx_PeriphCLKConfig+0x88>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
|
|
8006442: f7fb ff6b bl 800231c <HAL_GetTick>
|
|
8006446: 4602 mov r2, r0
|
|
8006448: 697b ldr r3, [r7, #20]
|
|
800644a: 1ad3 subs r3, r2, r3
|
|
800644c: 2b02 cmp r3, #2
|
|
800644e: d901 bls.n 8006454 <HAL_RCCEx_PeriphCLKConfig+0x88>
|
|
{
|
|
/* return in case of Timeout detected */
|
|
return HAL_TIMEOUT;
|
|
8006450: 2303 movs r3, #3
|
|
8006452: e09a b.n 800658a <HAL_RCCEx_PeriphCLKConfig+0x1be>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
|
|
8006454: 4b50 ldr r3, [pc, #320] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006456: 681b ldr r3, [r3, #0]
|
|
8006458: f003 6300 and.w r3, r3, #134217728 ; 0x8000000
|
|
800645c: 2b00 cmp r3, #0
|
|
800645e: d0f0 beq.n 8006442 <HAL_RCCEx_PeriphCLKConfig+0x76>
|
|
}
|
|
}
|
|
}
|
|
|
|
/*---------------------------- RTC configuration ---------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
|
|
8006460: 687b ldr r3, [r7, #4]
|
|
8006462: 681b ldr r3, [r3, #0]
|
|
8006464: f003 0302 and.w r3, r3, #2
|
|
8006468: 2b00 cmp r3, #0
|
|
800646a: f000 8083 beq.w 8006574 <HAL_RCCEx_PeriphCLKConfig+0x1a8>
|
|
{
|
|
/* Check for RTC Parameters used to output RTCCLK */
|
|
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
|
|
|
|
/* Enable Power Clock*/
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
|
800646e: 2300 movs r3, #0
|
|
8006470: 60fb str r3, [r7, #12]
|
|
8006472: 4b49 ldr r3, [pc, #292] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006474: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8006476: 4a48 ldr r2, [pc, #288] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006478: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000
|
|
800647c: 6413 str r3, [r2, #64] ; 0x40
|
|
800647e: 4b46 ldr r3, [pc, #280] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006480: 6c1b ldr r3, [r3, #64] ; 0x40
|
|
8006482: f003 5380 and.w r3, r3, #268435456 ; 0x10000000
|
|
8006486: 60fb str r3, [r7, #12]
|
|
8006488: 68fb ldr r3, [r7, #12]
|
|
|
|
/* Enable write access to Backup domain */
|
|
PWR->CR |= PWR_CR_DBP;
|
|
800648a: 4b44 ldr r3, [pc, #272] ; (800659c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
|
|
800648c: 681b ldr r3, [r3, #0]
|
|
800648e: 4a43 ldr r2, [pc, #268] ; (800659c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
|
|
8006490: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
8006494: 6013 str r3, [r2, #0]
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
8006496: f7fb ff41 bl 800231c <HAL_GetTick>
|
|
800649a: 6178 str r0, [r7, #20]
|
|
|
|
while((PWR->CR & PWR_CR_DBP) == RESET)
|
|
800649c: e008 b.n 80064b0 <HAL_RCCEx_PeriphCLKConfig+0xe4>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
|
|
800649e: f7fb ff3d bl 800231c <HAL_GetTick>
|
|
80064a2: 4602 mov r2, r0
|
|
80064a4: 697b ldr r3, [r7, #20]
|
|
80064a6: 1ad3 subs r3, r2, r3
|
|
80064a8: 2b02 cmp r3, #2
|
|
80064aa: d901 bls.n 80064b0 <HAL_RCCEx_PeriphCLKConfig+0xe4>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80064ac: 2303 movs r3, #3
|
|
80064ae: e06c b.n 800658a <HAL_RCCEx_PeriphCLKConfig+0x1be>
|
|
while((PWR->CR & PWR_CR_DBP) == RESET)
|
|
80064b0: 4b3a ldr r3, [pc, #232] ; (800659c <HAL_RCCEx_PeriphCLKConfig+0x1d0>)
|
|
80064b2: 681b ldr r3, [r3, #0]
|
|
80064b4: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
80064b8: 2b00 cmp r3, #0
|
|
80064ba: d0f0 beq.n 800649e <HAL_RCCEx_PeriphCLKConfig+0xd2>
|
|
}
|
|
}
|
|
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
|
|
tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
|
|
80064bc: 4b36 ldr r3, [pc, #216] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
80064be: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
80064c0: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
80064c4: 613b str r3, [r7, #16]
|
|
if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
|
|
80064c6: 693b ldr r3, [r7, #16]
|
|
80064c8: 2b00 cmp r3, #0
|
|
80064ca: d02f beq.n 800652c <HAL_RCCEx_PeriphCLKConfig+0x160>
|
|
80064cc: 687b ldr r3, [r7, #4]
|
|
80064ce: 68db ldr r3, [r3, #12]
|
|
80064d0: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
80064d4: 693a ldr r2, [r7, #16]
|
|
80064d6: 429a cmp r2, r3
|
|
80064d8: d028 beq.n 800652c <HAL_RCCEx_PeriphCLKConfig+0x160>
|
|
{
|
|
/* Store the content of BDCR register before the reset of Backup Domain */
|
|
tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
|
|
80064da: 4b2f ldr r3, [pc, #188] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
80064dc: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
80064de: f423 7340 bic.w r3, r3, #768 ; 0x300
|
|
80064e2: 613b str r3, [r7, #16]
|
|
/* RTC Clock selection can be changed only if the Backup Domain is reset */
|
|
__HAL_RCC_BACKUPRESET_FORCE();
|
|
80064e4: 4b2e ldr r3, [pc, #184] ; (80065a0 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
|
|
80064e6: 2201 movs r2, #1
|
|
80064e8: 601a str r2, [r3, #0]
|
|
__HAL_RCC_BACKUPRESET_RELEASE();
|
|
80064ea: 4b2d ldr r3, [pc, #180] ; (80065a0 <HAL_RCCEx_PeriphCLKConfig+0x1d4>)
|
|
80064ec: 2200 movs r2, #0
|
|
80064ee: 601a str r2, [r3, #0]
|
|
/* Restore the Content of BDCR register */
|
|
RCC->BDCR = tmpreg1;
|
|
80064f0: 4a29 ldr r2, [pc, #164] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
80064f2: 693b ldr r3, [r7, #16]
|
|
80064f4: 6713 str r3, [r2, #112] ; 0x70
|
|
|
|
/* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
|
|
if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
|
|
80064f6: 4b28 ldr r3, [pc, #160] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
80064f8: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
80064fa: f003 0301 and.w r3, r3, #1
|
|
80064fe: 2b01 cmp r3, #1
|
|
8006500: d114 bne.n 800652c <HAL_RCCEx_PeriphCLKConfig+0x160>
|
|
{
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
8006502: f7fb ff0b bl 800231c <HAL_GetTick>
|
|
8006506: 6178 str r0, [r7, #20]
|
|
|
|
/* Wait till LSE is ready */
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8006508: e00a b.n 8006520 <HAL_RCCEx_PeriphCLKConfig+0x154>
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
|
|
800650a: f7fb ff07 bl 800231c <HAL_GetTick>
|
|
800650e: 4602 mov r2, r0
|
|
8006510: 697b ldr r3, [r7, #20]
|
|
8006512: 1ad3 subs r3, r2, r3
|
|
8006514: f241 3288 movw r2, #5000 ; 0x1388
|
|
8006518: 4293 cmp r3, r2
|
|
800651a: d901 bls.n 8006520 <HAL_RCCEx_PeriphCLKConfig+0x154>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
800651c: 2303 movs r3, #3
|
|
800651e: e034 b.n 800658a <HAL_RCCEx_PeriphCLKConfig+0x1be>
|
|
while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
|
|
8006520: 4b1d ldr r3, [pc, #116] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006522: 6f1b ldr r3, [r3, #112] ; 0x70
|
|
8006524: f003 0302 and.w r3, r3, #2
|
|
8006528: 2b00 cmp r3, #0
|
|
800652a: d0ee beq.n 800650a <HAL_RCCEx_PeriphCLKConfig+0x13e>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
|
|
800652c: 687b ldr r3, [r7, #4]
|
|
800652e: 68db ldr r3, [r3, #12]
|
|
8006530: f403 7340 and.w r3, r3, #768 ; 0x300
|
|
8006534: f5b3 7f40 cmp.w r3, #768 ; 0x300
|
|
8006538: d10d bne.n 8006556 <HAL_RCCEx_PeriphCLKConfig+0x18a>
|
|
800653a: 4b17 ldr r3, [pc, #92] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
800653c: 689b ldr r3, [r3, #8]
|
|
800653e: f423 12f8 bic.w r2, r3, #2031616 ; 0x1f0000
|
|
8006542: 687b ldr r3, [r7, #4]
|
|
8006544: 68db ldr r3, [r3, #12]
|
|
8006546: f023 4370 bic.w r3, r3, #4026531840 ; 0xf0000000
|
|
800654a: f423 7340 bic.w r3, r3, #768 ; 0x300
|
|
800654e: 4912 ldr r1, [pc, #72] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006550: 4313 orrs r3, r2
|
|
8006552: 608b str r3, [r1, #8]
|
|
8006554: e005 b.n 8006562 <HAL_RCCEx_PeriphCLKConfig+0x196>
|
|
8006556: 4b10 ldr r3, [pc, #64] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006558: 689b ldr r3, [r3, #8]
|
|
800655a: 4a0f ldr r2, [pc, #60] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
800655c: f423 13f8 bic.w r3, r3, #2031616 ; 0x1f0000
|
|
8006560: 6093 str r3, [r2, #8]
|
|
8006562: 4b0d ldr r3, [pc, #52] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006564: 6f1a ldr r2, [r3, #112] ; 0x70
|
|
8006566: 687b ldr r3, [r7, #4]
|
|
8006568: 68db ldr r3, [r3, #12]
|
|
800656a: f3c3 030b ubfx r3, r3, #0, #12
|
|
800656e: 490a ldr r1, [pc, #40] ; (8006598 <HAL_RCCEx_PeriphCLKConfig+0x1cc>)
|
|
8006570: 4313 orrs r3, r2
|
|
8006572: 670b str r3, [r1, #112] ; 0x70
|
|
}
|
|
#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
|
|
/*---------------------------- TIM configuration ---------------------------*/
|
|
if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
|
|
8006574: 687b ldr r3, [r7, #4]
|
|
8006576: 681b ldr r3, [r3, #0]
|
|
8006578: f003 0308 and.w r3, r3, #8
|
|
800657c: 2b00 cmp r3, #0
|
|
800657e: d003 beq.n 8006588 <HAL_RCCEx_PeriphCLKConfig+0x1bc>
|
|
{
|
|
__HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
|
|
8006580: 687b ldr r3, [r7, #4]
|
|
8006582: 7c1a ldrb r2, [r3, #16]
|
|
8006584: 4b07 ldr r3, [pc, #28] ; (80065a4 <HAL_RCCEx_PeriphCLKConfig+0x1d8>)
|
|
8006586: 601a str r2, [r3, #0]
|
|
}
|
|
#endif /* STM32F401xC || STM32F401xE || STM32F411xE */
|
|
return HAL_OK;
|
|
8006588: 2300 movs r3, #0
|
|
}
|
|
800658a: 4618 mov r0, r3
|
|
800658c: 3718 adds r7, #24
|
|
800658e: 46bd mov sp, r7
|
|
8006590: bd80 pop {r7, pc}
|
|
8006592: bf00 nop
|
|
8006594: 42470068 .word 0x42470068
|
|
8006598: 40023800 .word 0x40023800
|
|
800659c: 40007000 .word 0x40007000
|
|
80065a0: 42470e40 .word 0x42470e40
|
|
80065a4: 424711e0 .word 0x424711e0
|
|
|
|
080065a8 <HAL_RCCEx_GetPeriphCLKFreq>:
|
|
* This parameter can be one of the following values:
|
|
* @arg RCC_PERIPHCLK_I2S: I2S peripheral clock
|
|
* @retval Frequency in KHz
|
|
*/
|
|
uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
|
|
{
|
|
80065a8: b480 push {r7}
|
|
80065aa: b087 sub sp, #28
|
|
80065ac: af00 add r7, sp, #0
|
|
80065ae: 6078 str r0, [r7, #4]
|
|
/* This variable used to store the I2S clock frequency (value in Hz) */
|
|
uint32_t frequency = 0U;
|
|
80065b0: 2300 movs r3, #0
|
|
80065b2: 617b str r3, [r7, #20]
|
|
/* This variable used to store the VCO Input (value in Hz) */
|
|
uint32_t vcoinput = 0U;
|
|
80065b4: 2300 movs r3, #0
|
|
80065b6: 613b str r3, [r7, #16]
|
|
uint32_t srcclk = 0U;
|
|
80065b8: 2300 movs r3, #0
|
|
80065ba: 60fb str r3, [r7, #12]
|
|
/* This variable used to store the VCO Output (value in Hz) */
|
|
uint32_t vcooutput = 0U;
|
|
80065bc: 2300 movs r3, #0
|
|
80065be: 60bb str r3, [r7, #8]
|
|
switch (PeriphClk)
|
|
80065c0: 687b ldr r3, [r7, #4]
|
|
80065c2: 2b01 cmp r3, #1
|
|
80065c4: d13d bne.n 8006642 <HAL_RCCEx_GetPeriphCLKFreq+0x9a>
|
|
{
|
|
case RCC_PERIPHCLK_I2S:
|
|
{
|
|
/* Get the current I2S source */
|
|
srcclk = __HAL_RCC_GET_I2S_SOURCE();
|
|
80065c6: 4b22 ldr r3, [pc, #136] ; (8006650 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
|
|
80065c8: 689b ldr r3, [r3, #8]
|
|
80065ca: f403 0300 and.w r3, r3, #8388608 ; 0x800000
|
|
80065ce: 60fb str r3, [r7, #12]
|
|
switch (srcclk)
|
|
80065d0: 68fb ldr r3, [r7, #12]
|
|
80065d2: 2b00 cmp r3, #0
|
|
80065d4: d004 beq.n 80065e0 <HAL_RCCEx_GetPeriphCLKFreq+0x38>
|
|
80065d6: 2b01 cmp r3, #1
|
|
80065d8: d12f bne.n 800663a <HAL_RCCEx_GetPeriphCLKFreq+0x92>
|
|
{
|
|
/* Check if I2S clock selection is External clock mapped on the I2S_CKIN pin used as I2S clock */
|
|
case RCC_I2SCLKSOURCE_EXT:
|
|
{
|
|
/* Set the I2S clock to the external clock value */
|
|
frequency = EXTERNAL_CLOCK_VALUE;
|
|
80065da: 4b1e ldr r3, [pc, #120] ; (8006654 <HAL_RCCEx_GetPeriphCLKFreq+0xac>)
|
|
80065dc: 617b str r3, [r7, #20]
|
|
break;
|
|
80065de: e02f b.n 8006640 <HAL_RCCEx_GetPeriphCLKFreq+0x98>
|
|
vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SM));
|
|
}
|
|
#else
|
|
/* Configure the PLLI2S division factor */
|
|
/* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
|
|
if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
|
|
80065e0: 4b1b ldr r3, [pc, #108] ; (8006650 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
|
|
80065e2: 685b ldr r3, [r3, #4]
|
|
80065e4: f403 0380 and.w r3, r3, #4194304 ; 0x400000
|
|
80065e8: f5b3 0f80 cmp.w r3, #4194304 ; 0x400000
|
|
80065ec: d108 bne.n 8006600 <HAL_RCCEx_GetPeriphCLKFreq+0x58>
|
|
{
|
|
/* Get the I2S source clock value */
|
|
vcoinput = (uint32_t)(HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
|
|
80065ee: 4b18 ldr r3, [pc, #96] ; (8006650 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
|
|
80065f0: 685b ldr r3, [r3, #4]
|
|
80065f2: f003 033f and.w r3, r3, #63 ; 0x3f
|
|
80065f6: 4a18 ldr r2, [pc, #96] ; (8006658 <HAL_RCCEx_GetPeriphCLKFreq+0xb0>)
|
|
80065f8: fbb2 f3f3 udiv r3, r2, r3
|
|
80065fc: 613b str r3, [r7, #16]
|
|
80065fe: e007 b.n 8006610 <HAL_RCCEx_GetPeriphCLKFreq+0x68>
|
|
}
|
|
else
|
|
{
|
|
/* Get the I2S source clock value */
|
|
vcoinput = (uint32_t)(HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
|
|
8006600: 4b13 ldr r3, [pc, #76] ; (8006650 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
|
|
8006602: 685b ldr r3, [r3, #4]
|
|
8006604: f003 033f and.w r3, r3, #63 ; 0x3f
|
|
8006608: 4a14 ldr r2, [pc, #80] ; (800665c <HAL_RCCEx_GetPeriphCLKFreq+0xb4>)
|
|
800660a: fbb2 f3f3 udiv r3, r2, r3
|
|
800660e: 613b str r3, [r7, #16]
|
|
}
|
|
#endif /* STM32F411xE */
|
|
/* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
|
|
vcooutput = (uint32_t)(vcoinput * (((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U) & (RCC_PLLI2SCFGR_PLLI2SN >> 6U)));
|
|
8006610: 4b0f ldr r3, [pc, #60] ; (8006650 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
|
|
8006612: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
|
|
8006616: 099b lsrs r3, r3, #6
|
|
8006618: f3c3 0208 ubfx r2, r3, #0, #9
|
|
800661c: 693b ldr r3, [r7, #16]
|
|
800661e: fb02 f303 mul.w r3, r2, r3
|
|
8006622: 60bb str r3, [r7, #8]
|
|
/* I2S_CLK = PLLI2S_VCO Output/PLLI2SR */
|
|
frequency = (uint32_t)(vcooutput /(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U) & (RCC_PLLI2SCFGR_PLLI2SR >> 28U)));
|
|
8006624: 4b0a ldr r3, [pc, #40] ; (8006650 <HAL_RCCEx_GetPeriphCLKFreq+0xa8>)
|
|
8006626: f8d3 3084 ldr.w r3, [r3, #132] ; 0x84
|
|
800662a: 0f1b lsrs r3, r3, #28
|
|
800662c: f003 0307 and.w r3, r3, #7
|
|
8006630: 68ba ldr r2, [r7, #8]
|
|
8006632: fbb2 f3f3 udiv r3, r2, r3
|
|
8006636: 617b str r3, [r7, #20]
|
|
break;
|
|
8006638: e002 b.n 8006640 <HAL_RCCEx_GetPeriphCLKFreq+0x98>
|
|
}
|
|
/* Clock not enabled for I2S*/
|
|
default:
|
|
{
|
|
frequency = 0U;
|
|
800663a: 2300 movs r3, #0
|
|
800663c: 617b str r3, [r7, #20]
|
|
break;
|
|
800663e: bf00 nop
|
|
}
|
|
}
|
|
break;
|
|
8006640: bf00 nop
|
|
}
|
|
}
|
|
return frequency;
|
|
8006642: 697b ldr r3, [r7, #20]
|
|
}
|
|
8006644: 4618 mov r0, r3
|
|
8006646: 371c adds r7, #28
|
|
8006648: 46bd mov sp, r7
|
|
800664a: f85d 7b04 ldr.w r7, [sp], #4
|
|
800664e: 4770 bx lr
|
|
8006650: 40023800 .word 0x40023800
|
|
8006654: 00bb8000 .word 0x00bb8000
|
|
8006658: 007a1200 .word 0x007a1200
|
|
800665c: 00f42400 .word 0x00f42400
|
|
|
|
08006660 <HAL_SPI_Init>:
|
|
* @param hspi pointer to a SPI_HandleTypeDef structure that contains
|
|
* the configuration information for SPI module.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
|
|
{
|
|
8006660: b580 push {r7, lr}
|
|
8006662: b082 sub sp, #8
|
|
8006664: af00 add r7, sp, #0
|
|
8006666: 6078 str r0, [r7, #4]
|
|
/* Check the SPI handle allocation */
|
|
if (hspi == NULL)
|
|
8006668: 687b ldr r3, [r7, #4]
|
|
800666a: 2b00 cmp r3, #0
|
|
800666c: d101 bne.n 8006672 <HAL_SPI_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
800666e: 2301 movs r3, #1
|
|
8006670: e056 b.n 8006720 <HAL_SPI_Init+0xc0>
|
|
if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
|
|
{
|
|
assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
|
|
}
|
|
#else
|
|
hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
|
|
8006672: 687b ldr r3, [r7, #4]
|
|
8006674: 2200 movs r2, #0
|
|
8006676: 629a str r2, [r3, #40] ; 0x28
|
|
#endif /* USE_SPI_CRC */
|
|
|
|
if (hspi->State == HAL_SPI_STATE_RESET)
|
|
8006678: 687b ldr r3, [r7, #4]
|
|
800667a: f893 3051 ldrb.w r3, [r3, #81] ; 0x51
|
|
800667e: b2db uxtb r3, r3
|
|
8006680: 2b00 cmp r3, #0
|
|
8006682: d106 bne.n 8006692 <HAL_SPI_Init+0x32>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
hspi->Lock = HAL_UNLOCKED;
|
|
8006684: 687b ldr r3, [r7, #4]
|
|
8006686: 2200 movs r2, #0
|
|
8006688: f883 2050 strb.w r2, [r3, #80] ; 0x50
|
|
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|
hspi->MspInitCallback(hspi);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
|
|
HAL_SPI_MspInit(hspi);
|
|
800668c: 6878 ldr r0, [r7, #4]
|
|
800668e: f7fb f935 bl 80018fc <HAL_SPI_MspInit>
|
|
#endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
|
|
}
|
|
|
|
hspi->State = HAL_SPI_STATE_BUSY;
|
|
8006692: 687b ldr r3, [r7, #4]
|
|
8006694: 2202 movs r2, #2
|
|
8006696: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
|
|
|
/* Disable the selected SPI peripheral */
|
|
__HAL_SPI_DISABLE(hspi);
|
|
800669a: 687b ldr r3, [r7, #4]
|
|
800669c: 681b ldr r3, [r3, #0]
|
|
800669e: 681a ldr r2, [r3, #0]
|
|
80066a0: 687b ldr r3, [r7, #4]
|
|
80066a2: 681b ldr r3, [r3, #0]
|
|
80066a4: f022 0240 bic.w r2, r2, #64 ; 0x40
|
|
80066a8: 601a str r2, [r3, #0]
|
|
|
|
/*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
|
|
/* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
|
|
Communication speed, First bit and CRC calculation state */
|
|
WRITE_REG(hspi->Instance->CR1, (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize |
|
|
80066aa: 687b ldr r3, [r7, #4]
|
|
80066ac: 685a ldr r2, [r3, #4]
|
|
80066ae: 687b ldr r3, [r7, #4]
|
|
80066b0: 689b ldr r3, [r3, #8]
|
|
80066b2: 431a orrs r2, r3
|
|
80066b4: 687b ldr r3, [r7, #4]
|
|
80066b6: 68db ldr r3, [r3, #12]
|
|
80066b8: 431a orrs r2, r3
|
|
80066ba: 687b ldr r3, [r7, #4]
|
|
80066bc: 691b ldr r3, [r3, #16]
|
|
80066be: 431a orrs r2, r3
|
|
80066c0: 687b ldr r3, [r7, #4]
|
|
80066c2: 695b ldr r3, [r3, #20]
|
|
80066c4: 431a orrs r2, r3
|
|
80066c6: 687b ldr r3, [r7, #4]
|
|
80066c8: 699b ldr r3, [r3, #24]
|
|
80066ca: f403 7300 and.w r3, r3, #512 ; 0x200
|
|
80066ce: 431a orrs r2, r3
|
|
80066d0: 687b ldr r3, [r7, #4]
|
|
80066d2: 69db ldr r3, [r3, #28]
|
|
80066d4: 431a orrs r2, r3
|
|
80066d6: 687b ldr r3, [r7, #4]
|
|
80066d8: 6a1b ldr r3, [r3, #32]
|
|
80066da: ea42 0103 orr.w r1, r2, r3
|
|
80066de: 687b ldr r3, [r7, #4]
|
|
80066e0: 6a9a ldr r2, [r3, #40] ; 0x28
|
|
80066e2: 687b ldr r3, [r7, #4]
|
|
80066e4: 681b ldr r3, [r3, #0]
|
|
80066e6: 430a orrs r2, r1
|
|
80066e8: 601a str r2, [r3, #0]
|
|
hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) |
|
|
hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation));
|
|
|
|
/* Configure : NSS management, TI Mode */
|
|
WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode));
|
|
80066ea: 687b ldr r3, [r7, #4]
|
|
80066ec: 699b ldr r3, [r3, #24]
|
|
80066ee: 0c1b lsrs r3, r3, #16
|
|
80066f0: f003 0104 and.w r1, r3, #4
|
|
80066f4: 687b ldr r3, [r7, #4]
|
|
80066f6: 6a5a ldr r2, [r3, #36] ; 0x24
|
|
80066f8: 687b ldr r3, [r7, #4]
|
|
80066fa: 681b ldr r3, [r3, #0]
|
|
80066fc: 430a orrs r2, r1
|
|
80066fe: 605a str r2, [r3, #4]
|
|
}
|
|
#endif /* USE_SPI_CRC */
|
|
|
|
#if defined(SPI_I2SCFGR_I2SMOD)
|
|
/* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
|
|
CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
|
|
8006700: 687b ldr r3, [r7, #4]
|
|
8006702: 681b ldr r3, [r3, #0]
|
|
8006704: 69da ldr r2, [r3, #28]
|
|
8006706: 687b ldr r3, [r7, #4]
|
|
8006708: 681b ldr r3, [r3, #0]
|
|
800670a: f422 6200 bic.w r2, r2, #2048 ; 0x800
|
|
800670e: 61da str r2, [r3, #28]
|
|
#endif /* SPI_I2SCFGR_I2SMOD */
|
|
|
|
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
|
|
8006710: 687b ldr r3, [r7, #4]
|
|
8006712: 2200 movs r2, #0
|
|
8006714: 655a str r2, [r3, #84] ; 0x54
|
|
hspi->State = HAL_SPI_STATE_READY;
|
|
8006716: 687b ldr r3, [r7, #4]
|
|
8006718: 2201 movs r2, #1
|
|
800671a: f883 2051 strb.w r2, [r3, #81] ; 0x51
|
|
|
|
return HAL_OK;
|
|
800671e: 2300 movs r3, #0
|
|
}
|
|
8006720: 4618 mov r0, r3
|
|
8006722: 3708 adds r7, #8
|
|
8006724: 46bd mov sp, r7
|
|
8006726: bd80 pop {r7, pc}
|
|
|
|
08006728 <HAL_UART_Init>:
|
|
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
|
* the configuration information for the specified UART module.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
|
|
{
|
|
8006728: b580 push {r7, lr}
|
|
800672a: b082 sub sp, #8
|
|
800672c: af00 add r7, sp, #0
|
|
800672e: 6078 str r0, [r7, #4]
|
|
/* Check the UART handle allocation */
|
|
if (huart == NULL)
|
|
8006730: 687b ldr r3, [r7, #4]
|
|
8006732: 2b00 cmp r3, #0
|
|
8006734: d101 bne.n 800673a <HAL_UART_Init+0x12>
|
|
{
|
|
return HAL_ERROR;
|
|
8006736: 2301 movs r3, #1
|
|
8006738: e03f b.n 80067ba <HAL_UART_Init+0x92>
|
|
assert_param(IS_UART_INSTANCE(huart->Instance));
|
|
}
|
|
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
|
|
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
|
|
|
|
if (huart->gState == HAL_UART_STATE_RESET)
|
|
800673a: 687b ldr r3, [r7, #4]
|
|
800673c: f893 3039 ldrb.w r3, [r3, #57] ; 0x39
|
|
8006740: b2db uxtb r3, r3
|
|
8006742: 2b00 cmp r3, #0
|
|
8006744: d106 bne.n 8006754 <HAL_UART_Init+0x2c>
|
|
{
|
|
/* Allocate lock resource and initialize it */
|
|
huart->Lock = HAL_UNLOCKED;
|
|
8006746: 687b ldr r3, [r7, #4]
|
|
8006748: 2200 movs r2, #0
|
|
800674a: f883 2038 strb.w r2, [r3, #56] ; 0x38
|
|
|
|
/* Init the low level hardware */
|
|
huart->MspInitCallback(huart);
|
|
#else
|
|
/* Init the low level hardware : GPIO, CLOCK */
|
|
HAL_UART_MspInit(huart);
|
|
800674e: 6878 ldr r0, [r7, #4]
|
|
8006750: f7fb f91c bl 800198c <HAL_UART_MspInit>
|
|
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
|
|
}
|
|
|
|
huart->gState = HAL_UART_STATE_BUSY;
|
|
8006754: 687b ldr r3, [r7, #4]
|
|
8006756: 2224 movs r2, #36 ; 0x24
|
|
8006758: f883 2039 strb.w r2, [r3, #57] ; 0x39
|
|
|
|
/* Disable the peripheral */
|
|
__HAL_UART_DISABLE(huart);
|
|
800675c: 687b ldr r3, [r7, #4]
|
|
800675e: 681b ldr r3, [r3, #0]
|
|
8006760: 68da ldr r2, [r3, #12]
|
|
8006762: 687b ldr r3, [r7, #4]
|
|
8006764: 681b ldr r3, [r3, #0]
|
|
8006766: f422 5200 bic.w r2, r2, #8192 ; 0x2000
|
|
800676a: 60da str r2, [r3, #12]
|
|
|
|
/* Set the UART Communication parameters */
|
|
UART_SetConfig(huart);
|
|
800676c: 6878 ldr r0, [r7, #4]
|
|
800676e: f000 f90b bl 8006988 <UART_SetConfig>
|
|
|
|
/* In asynchronous mode, the following bits must be kept cleared:
|
|
- LINEN and CLKEN bits in the USART_CR2 register,
|
|
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
|
|
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
|
|
8006772: 687b ldr r3, [r7, #4]
|
|
8006774: 681b ldr r3, [r3, #0]
|
|
8006776: 691a ldr r2, [r3, #16]
|
|
8006778: 687b ldr r3, [r7, #4]
|
|
800677a: 681b ldr r3, [r3, #0]
|
|
800677c: f422 4290 bic.w r2, r2, #18432 ; 0x4800
|
|
8006780: 611a str r2, [r3, #16]
|
|
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
|
|
8006782: 687b ldr r3, [r7, #4]
|
|
8006784: 681b ldr r3, [r3, #0]
|
|
8006786: 695a ldr r2, [r3, #20]
|
|
8006788: 687b ldr r3, [r7, #4]
|
|
800678a: 681b ldr r3, [r3, #0]
|
|
800678c: f022 022a bic.w r2, r2, #42 ; 0x2a
|
|
8006790: 615a str r2, [r3, #20]
|
|
|
|
/* Enable the peripheral */
|
|
__HAL_UART_ENABLE(huart);
|
|
8006792: 687b ldr r3, [r7, #4]
|
|
8006794: 681b ldr r3, [r3, #0]
|
|
8006796: 68da ldr r2, [r3, #12]
|
|
8006798: 687b ldr r3, [r7, #4]
|
|
800679a: 681b ldr r3, [r3, #0]
|
|
800679c: f442 5200 orr.w r2, r2, #8192 ; 0x2000
|
|
80067a0: 60da str r2, [r3, #12]
|
|
|
|
/* Initialize the UART state */
|
|
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
|
80067a2: 687b ldr r3, [r7, #4]
|
|
80067a4: 2200 movs r2, #0
|
|
80067a6: 63da str r2, [r3, #60] ; 0x3c
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
80067a8: 687b ldr r3, [r7, #4]
|
|
80067aa: 2220 movs r2, #32
|
|
80067ac: f883 2039 strb.w r2, [r3, #57] ; 0x39
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
80067b0: 687b ldr r3, [r7, #4]
|
|
80067b2: 2220 movs r2, #32
|
|
80067b4: f883 203a strb.w r2, [r3, #58] ; 0x3a
|
|
|
|
return HAL_OK;
|
|
80067b8: 2300 movs r3, #0
|
|
}
|
|
80067ba: 4618 mov r0, r3
|
|
80067bc: 3708 adds r7, #8
|
|
80067be: 46bd mov sp, r7
|
|
80067c0: bd80 pop {r7, pc}
|
|
|
|
080067c2 <HAL_UART_Transmit>:
|
|
* @param Size Amount of data elements (u8 or u16) to be sent
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
|
|
{
|
|
80067c2: b580 push {r7, lr}
|
|
80067c4: b088 sub sp, #32
|
|
80067c6: af02 add r7, sp, #8
|
|
80067c8: 60f8 str r0, [r7, #12]
|
|
80067ca: 60b9 str r1, [r7, #8]
|
|
80067cc: 603b str r3, [r7, #0]
|
|
80067ce: 4613 mov r3, r2
|
|
80067d0: 80fb strh r3, [r7, #6]
|
|
uint16_t *tmp;
|
|
uint32_t tickstart = 0U;
|
|
80067d2: 2300 movs r3, #0
|
|
80067d4: 617b str r3, [r7, #20]
|
|
|
|
/* Check that a Tx process is not already ongoing */
|
|
if (huart->gState == HAL_UART_STATE_READY)
|
|
80067d6: 68fb ldr r3, [r7, #12]
|
|
80067d8: f893 3039 ldrb.w r3, [r3, #57] ; 0x39
|
|
80067dc: b2db uxtb r3, r3
|
|
80067de: 2b20 cmp r3, #32
|
|
80067e0: f040 8083 bne.w 80068ea <HAL_UART_Transmit+0x128>
|
|
{
|
|
if ((pData == NULL) || (Size == 0U))
|
|
80067e4: 68bb ldr r3, [r7, #8]
|
|
80067e6: 2b00 cmp r3, #0
|
|
80067e8: d002 beq.n 80067f0 <HAL_UART_Transmit+0x2e>
|
|
80067ea: 88fb ldrh r3, [r7, #6]
|
|
80067ec: 2b00 cmp r3, #0
|
|
80067ee: d101 bne.n 80067f4 <HAL_UART_Transmit+0x32>
|
|
{
|
|
return HAL_ERROR;
|
|
80067f0: 2301 movs r3, #1
|
|
80067f2: e07b b.n 80068ec <HAL_UART_Transmit+0x12a>
|
|
}
|
|
|
|
/* Process Locked */
|
|
__HAL_LOCK(huart);
|
|
80067f4: 68fb ldr r3, [r7, #12]
|
|
80067f6: f893 3038 ldrb.w r3, [r3, #56] ; 0x38
|
|
80067fa: 2b01 cmp r3, #1
|
|
80067fc: d101 bne.n 8006802 <HAL_UART_Transmit+0x40>
|
|
80067fe: 2302 movs r3, #2
|
|
8006800: e074 b.n 80068ec <HAL_UART_Transmit+0x12a>
|
|
8006802: 68fb ldr r3, [r7, #12]
|
|
8006804: 2201 movs r2, #1
|
|
8006806: f883 2038 strb.w r2, [r3, #56] ; 0x38
|
|
|
|
huart->ErrorCode = HAL_UART_ERROR_NONE;
|
|
800680a: 68fb ldr r3, [r7, #12]
|
|
800680c: 2200 movs r2, #0
|
|
800680e: 63da str r2, [r3, #60] ; 0x3c
|
|
huart->gState = HAL_UART_STATE_BUSY_TX;
|
|
8006810: 68fb ldr r3, [r7, #12]
|
|
8006812: 2221 movs r2, #33 ; 0x21
|
|
8006814: f883 2039 strb.w r2, [r3, #57] ; 0x39
|
|
|
|
/* Init tickstart for timeout managment */
|
|
tickstart = HAL_GetTick();
|
|
8006818: f7fb fd80 bl 800231c <HAL_GetTick>
|
|
800681c: 6178 str r0, [r7, #20]
|
|
|
|
huart->TxXferSize = Size;
|
|
800681e: 68fb ldr r3, [r7, #12]
|
|
8006820: 88fa ldrh r2, [r7, #6]
|
|
8006822: 849a strh r2, [r3, #36] ; 0x24
|
|
huart->TxXferCount = Size;
|
|
8006824: 68fb ldr r3, [r7, #12]
|
|
8006826: 88fa ldrh r2, [r7, #6]
|
|
8006828: 84da strh r2, [r3, #38] ; 0x26
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(huart);
|
|
800682a: 68fb ldr r3, [r7, #12]
|
|
800682c: 2200 movs r2, #0
|
|
800682e: f883 2038 strb.w r2, [r3, #56] ; 0x38
|
|
|
|
while (huart->TxXferCount > 0U)
|
|
8006832: e042 b.n 80068ba <HAL_UART_Transmit+0xf8>
|
|
{
|
|
huart->TxXferCount--;
|
|
8006834: 68fb ldr r3, [r7, #12]
|
|
8006836: 8cdb ldrh r3, [r3, #38] ; 0x26
|
|
8006838: b29b uxth r3, r3
|
|
800683a: 3b01 subs r3, #1
|
|
800683c: b29a uxth r2, r3
|
|
800683e: 68fb ldr r3, [r7, #12]
|
|
8006840: 84da strh r2, [r3, #38] ; 0x26
|
|
if (huart->Init.WordLength == UART_WORDLENGTH_9B)
|
|
8006842: 68fb ldr r3, [r7, #12]
|
|
8006844: 689b ldr r3, [r3, #8]
|
|
8006846: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
|
|
800684a: d122 bne.n 8006892 <HAL_UART_Transmit+0xd0>
|
|
{
|
|
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
|
|
800684c: 683b ldr r3, [r7, #0]
|
|
800684e: 9300 str r3, [sp, #0]
|
|
8006850: 697b ldr r3, [r7, #20]
|
|
8006852: 2200 movs r2, #0
|
|
8006854: 2180 movs r1, #128 ; 0x80
|
|
8006856: 68f8 ldr r0, [r7, #12]
|
|
8006858: f000 f84c bl 80068f4 <UART_WaitOnFlagUntilTimeout>
|
|
800685c: 4603 mov r3, r0
|
|
800685e: 2b00 cmp r3, #0
|
|
8006860: d001 beq.n 8006866 <HAL_UART_Transmit+0xa4>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8006862: 2303 movs r3, #3
|
|
8006864: e042 b.n 80068ec <HAL_UART_Transmit+0x12a>
|
|
}
|
|
tmp = (uint16_t *) pData;
|
|
8006866: 68bb ldr r3, [r7, #8]
|
|
8006868: 613b str r3, [r7, #16]
|
|
huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
|
|
800686a: 693b ldr r3, [r7, #16]
|
|
800686c: 881b ldrh r3, [r3, #0]
|
|
800686e: 461a mov r2, r3
|
|
8006870: 68fb ldr r3, [r7, #12]
|
|
8006872: 681b ldr r3, [r3, #0]
|
|
8006874: f3c2 0208 ubfx r2, r2, #0, #9
|
|
8006878: 605a str r2, [r3, #4]
|
|
if (huart->Init.Parity == UART_PARITY_NONE)
|
|
800687a: 68fb ldr r3, [r7, #12]
|
|
800687c: 691b ldr r3, [r3, #16]
|
|
800687e: 2b00 cmp r3, #0
|
|
8006880: d103 bne.n 800688a <HAL_UART_Transmit+0xc8>
|
|
{
|
|
pData += 2U;
|
|
8006882: 68bb ldr r3, [r7, #8]
|
|
8006884: 3302 adds r3, #2
|
|
8006886: 60bb str r3, [r7, #8]
|
|
8006888: e017 b.n 80068ba <HAL_UART_Transmit+0xf8>
|
|
}
|
|
else
|
|
{
|
|
pData += 1U;
|
|
800688a: 68bb ldr r3, [r7, #8]
|
|
800688c: 3301 adds r3, #1
|
|
800688e: 60bb str r3, [r7, #8]
|
|
8006890: e013 b.n 80068ba <HAL_UART_Transmit+0xf8>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
|
|
8006892: 683b ldr r3, [r7, #0]
|
|
8006894: 9300 str r3, [sp, #0]
|
|
8006896: 697b ldr r3, [r7, #20]
|
|
8006898: 2200 movs r2, #0
|
|
800689a: 2180 movs r1, #128 ; 0x80
|
|
800689c: 68f8 ldr r0, [r7, #12]
|
|
800689e: f000 f829 bl 80068f4 <UART_WaitOnFlagUntilTimeout>
|
|
80068a2: 4603 mov r3, r0
|
|
80068a4: 2b00 cmp r3, #0
|
|
80068a6: d001 beq.n 80068ac <HAL_UART_Transmit+0xea>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80068a8: 2303 movs r3, #3
|
|
80068aa: e01f b.n 80068ec <HAL_UART_Transmit+0x12a>
|
|
}
|
|
huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
|
|
80068ac: 68bb ldr r3, [r7, #8]
|
|
80068ae: 1c5a adds r2, r3, #1
|
|
80068b0: 60ba str r2, [r7, #8]
|
|
80068b2: 781a ldrb r2, [r3, #0]
|
|
80068b4: 68fb ldr r3, [r7, #12]
|
|
80068b6: 681b ldr r3, [r3, #0]
|
|
80068b8: 605a str r2, [r3, #4]
|
|
while (huart->TxXferCount > 0U)
|
|
80068ba: 68fb ldr r3, [r7, #12]
|
|
80068bc: 8cdb ldrh r3, [r3, #38] ; 0x26
|
|
80068be: b29b uxth r3, r3
|
|
80068c0: 2b00 cmp r3, #0
|
|
80068c2: d1b7 bne.n 8006834 <HAL_UART_Transmit+0x72>
|
|
}
|
|
}
|
|
|
|
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
|
|
80068c4: 683b ldr r3, [r7, #0]
|
|
80068c6: 9300 str r3, [sp, #0]
|
|
80068c8: 697b ldr r3, [r7, #20]
|
|
80068ca: 2200 movs r2, #0
|
|
80068cc: 2140 movs r1, #64 ; 0x40
|
|
80068ce: 68f8 ldr r0, [r7, #12]
|
|
80068d0: f000 f810 bl 80068f4 <UART_WaitOnFlagUntilTimeout>
|
|
80068d4: 4603 mov r3, r0
|
|
80068d6: 2b00 cmp r3, #0
|
|
80068d8: d001 beq.n 80068de <HAL_UART_Transmit+0x11c>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80068da: 2303 movs r3, #3
|
|
80068dc: e006 b.n 80068ec <HAL_UART_Transmit+0x12a>
|
|
}
|
|
|
|
/* At end of Tx process, restore huart->gState to Ready */
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
80068de: 68fb ldr r3, [r7, #12]
|
|
80068e0: 2220 movs r2, #32
|
|
80068e2: f883 2039 strb.w r2, [r3, #57] ; 0x39
|
|
|
|
return HAL_OK;
|
|
80068e6: 2300 movs r3, #0
|
|
80068e8: e000 b.n 80068ec <HAL_UART_Transmit+0x12a>
|
|
}
|
|
else
|
|
{
|
|
return HAL_BUSY;
|
|
80068ea: 2302 movs r3, #2
|
|
}
|
|
}
|
|
80068ec: 4618 mov r0, r3
|
|
80068ee: 3718 adds r7, #24
|
|
80068f0: 46bd mov sp, r7
|
|
80068f2: bd80 pop {r7, pc}
|
|
|
|
080068f4 <UART_WaitOnFlagUntilTimeout>:
|
|
* @param Tickstart Tick start value
|
|
* @param Timeout Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
|
|
{
|
|
80068f4: b580 push {r7, lr}
|
|
80068f6: b084 sub sp, #16
|
|
80068f8: af00 add r7, sp, #0
|
|
80068fa: 60f8 str r0, [r7, #12]
|
|
80068fc: 60b9 str r1, [r7, #8]
|
|
80068fe: 603b str r3, [r7, #0]
|
|
8006900: 4613 mov r3, r2
|
|
8006902: 71fb strb r3, [r7, #7]
|
|
/* Wait until flag is set */
|
|
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
|
|
8006904: e02c b.n 8006960 <UART_WaitOnFlagUntilTimeout+0x6c>
|
|
{
|
|
/* Check for the Timeout */
|
|
if (Timeout != HAL_MAX_DELAY)
|
|
8006906: 69bb ldr r3, [r7, #24]
|
|
8006908: f1b3 3fff cmp.w r3, #4294967295
|
|
800690c: d028 beq.n 8006960 <UART_WaitOnFlagUntilTimeout+0x6c>
|
|
{
|
|
if ((Timeout == 0U) || ((HAL_GetTick() - Tickstart) > Timeout))
|
|
800690e: 69bb ldr r3, [r7, #24]
|
|
8006910: 2b00 cmp r3, #0
|
|
8006912: d007 beq.n 8006924 <UART_WaitOnFlagUntilTimeout+0x30>
|
|
8006914: f7fb fd02 bl 800231c <HAL_GetTick>
|
|
8006918: 4602 mov r2, r0
|
|
800691a: 683b ldr r3, [r7, #0]
|
|
800691c: 1ad3 subs r3, r2, r3
|
|
800691e: 69ba ldr r2, [r7, #24]
|
|
8006920: 429a cmp r2, r3
|
|
8006922: d21d bcs.n 8006960 <UART_WaitOnFlagUntilTimeout+0x6c>
|
|
{
|
|
/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
|
|
CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
|
|
8006924: 68fb ldr r3, [r7, #12]
|
|
8006926: 681b ldr r3, [r3, #0]
|
|
8006928: 68da ldr r2, [r3, #12]
|
|
800692a: 68fb ldr r3, [r7, #12]
|
|
800692c: 681b ldr r3, [r3, #0]
|
|
800692e: f422 72d0 bic.w r2, r2, #416 ; 0x1a0
|
|
8006932: 60da str r2, [r3, #12]
|
|
CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
|
|
8006934: 68fb ldr r3, [r7, #12]
|
|
8006936: 681b ldr r3, [r3, #0]
|
|
8006938: 695a ldr r2, [r3, #20]
|
|
800693a: 68fb ldr r3, [r7, #12]
|
|
800693c: 681b ldr r3, [r3, #0]
|
|
800693e: f022 0201 bic.w r2, r2, #1
|
|
8006942: 615a str r2, [r3, #20]
|
|
|
|
huart->gState = HAL_UART_STATE_READY;
|
|
8006944: 68fb ldr r3, [r7, #12]
|
|
8006946: 2220 movs r2, #32
|
|
8006948: f883 2039 strb.w r2, [r3, #57] ; 0x39
|
|
huart->RxState = HAL_UART_STATE_READY;
|
|
800694c: 68fb ldr r3, [r7, #12]
|
|
800694e: 2220 movs r2, #32
|
|
8006950: f883 203a strb.w r2, [r3, #58] ; 0x3a
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(huart);
|
|
8006954: 68fb ldr r3, [r7, #12]
|
|
8006956: 2200 movs r2, #0
|
|
8006958: f883 2038 strb.w r2, [r3, #56] ; 0x38
|
|
|
|
return HAL_TIMEOUT;
|
|
800695c: 2303 movs r3, #3
|
|
800695e: e00f b.n 8006980 <UART_WaitOnFlagUntilTimeout+0x8c>
|
|
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
|
|
8006960: 68fb ldr r3, [r7, #12]
|
|
8006962: 681b ldr r3, [r3, #0]
|
|
8006964: 681a ldr r2, [r3, #0]
|
|
8006966: 68bb ldr r3, [r7, #8]
|
|
8006968: 4013 ands r3, r2
|
|
800696a: 68ba ldr r2, [r7, #8]
|
|
800696c: 429a cmp r2, r3
|
|
800696e: bf0c ite eq
|
|
8006970: 2301 moveq r3, #1
|
|
8006972: 2300 movne r3, #0
|
|
8006974: b2db uxtb r3, r3
|
|
8006976: 461a mov r2, r3
|
|
8006978: 79fb ldrb r3, [r7, #7]
|
|
800697a: 429a cmp r2, r3
|
|
800697c: d0c3 beq.n 8006906 <UART_WaitOnFlagUntilTimeout+0x12>
|
|
}
|
|
}
|
|
}
|
|
return HAL_OK;
|
|
800697e: 2300 movs r3, #0
|
|
}
|
|
8006980: 4618 mov r0, r3
|
|
8006982: 3710 adds r7, #16
|
|
8006984: 46bd mov sp, r7
|
|
8006986: bd80 pop {r7, pc}
|
|
|
|
08006988 <UART_SetConfig>:
|
|
* @param huart Pointer to a UART_HandleTypeDef structure that contains
|
|
* the configuration information for the specified UART module.
|
|
* @retval None
|
|
*/
|
|
static void UART_SetConfig(UART_HandleTypeDef *huart)
|
|
{
|
|
8006988: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800698c: b085 sub sp, #20
|
|
800698e: af00 add r7, sp, #0
|
|
8006990: 6078 str r0, [r7, #4]
|
|
assert_param(IS_UART_MODE(huart->Init.Mode));
|
|
|
|
/*-------------------------- USART CR2 Configuration -----------------------*/
|
|
/* Configure the UART Stop Bits: Set STOP[13:12] bits
|
|
according to huart->Init.StopBits value */
|
|
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
|
|
8006992: 687b ldr r3, [r7, #4]
|
|
8006994: 681b ldr r3, [r3, #0]
|
|
8006996: 691b ldr r3, [r3, #16]
|
|
8006998: f423 5140 bic.w r1, r3, #12288 ; 0x3000
|
|
800699c: 687b ldr r3, [r7, #4]
|
|
800699e: 68da ldr r2, [r3, #12]
|
|
80069a0: 687b ldr r3, [r7, #4]
|
|
80069a2: 681b ldr r3, [r3, #0]
|
|
80069a4: 430a orrs r2, r1
|
|
80069a6: 611a str r2, [r3, #16]
|
|
Set the M bits according to huart->Init.WordLength value
|
|
Set PCE and PS bits according to huart->Init.Parity value
|
|
Set TE and RE bits according to huart->Init.Mode value
|
|
Set OVER8 bit according to huart->Init.OverSampling value */
|
|
|
|
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
|
|
80069a8: 687b ldr r3, [r7, #4]
|
|
80069aa: 689a ldr r2, [r3, #8]
|
|
80069ac: 687b ldr r3, [r7, #4]
|
|
80069ae: 691b ldr r3, [r3, #16]
|
|
80069b0: 431a orrs r2, r3
|
|
80069b2: 687b ldr r3, [r7, #4]
|
|
80069b4: 695b ldr r3, [r3, #20]
|
|
80069b6: 431a orrs r2, r3
|
|
80069b8: 687b ldr r3, [r7, #4]
|
|
80069ba: 69db ldr r3, [r3, #28]
|
|
80069bc: 4313 orrs r3, r2
|
|
80069be: 60fb str r3, [r7, #12]
|
|
MODIFY_REG(huart->Instance->CR1,
|
|
80069c0: 687b ldr r3, [r7, #4]
|
|
80069c2: 681b ldr r3, [r3, #0]
|
|
80069c4: 68db ldr r3, [r3, #12]
|
|
80069c6: f423 4316 bic.w r3, r3, #38400 ; 0x9600
|
|
80069ca: f023 030c bic.w r3, r3, #12
|
|
80069ce: 687a ldr r2, [r7, #4]
|
|
80069d0: 6812 ldr r2, [r2, #0]
|
|
80069d2: 68f9 ldr r1, [r7, #12]
|
|
80069d4: 430b orrs r3, r1
|
|
80069d6: 60d3 str r3, [r2, #12]
|
|
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
|
|
tmpreg);
|
|
|
|
/*-------------------------- USART CR3 Configuration -----------------------*/
|
|
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
|
|
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
|
|
80069d8: 687b ldr r3, [r7, #4]
|
|
80069da: 681b ldr r3, [r3, #0]
|
|
80069dc: 695b ldr r3, [r3, #20]
|
|
80069de: f423 7140 bic.w r1, r3, #768 ; 0x300
|
|
80069e2: 687b ldr r3, [r7, #4]
|
|
80069e4: 699a ldr r2, [r3, #24]
|
|
80069e6: 687b ldr r3, [r7, #4]
|
|
80069e8: 681b ldr r3, [r3, #0]
|
|
80069ea: 430a orrs r2, r1
|
|
80069ec: 615a str r2, [r3, #20]
|
|
|
|
/* Check the Over Sampling */
|
|
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
|
|
80069ee: 687b ldr r3, [r7, #4]
|
|
80069f0: 69db ldr r3, [r3, #28]
|
|
80069f2: f5b3 4f00 cmp.w r3, #32768 ; 0x8000
|
|
80069f6: f040 818b bne.w 8006d10 <UART_SetConfig+0x388>
|
|
{
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
|
|
}
|
|
#elif defined(USART6)
|
|
if ((huart->Instance == USART1) || (huart->Instance == USART6))
|
|
80069fa: 687b ldr r3, [r7, #4]
|
|
80069fc: 681b ldr r3, [r3, #0]
|
|
80069fe: 4ac1 ldr r2, [pc, #772] ; (8006d04 <UART_SetConfig+0x37c>)
|
|
8006a00: 4293 cmp r3, r2
|
|
8006a02: d005 beq.n 8006a10 <UART_SetConfig+0x88>
|
|
8006a04: 687b ldr r3, [r7, #4]
|
|
8006a06: 681b ldr r3, [r3, #0]
|
|
8006a08: 4abf ldr r2, [pc, #764] ; (8006d08 <UART_SetConfig+0x380>)
|
|
8006a0a: 4293 cmp r3, r2
|
|
8006a0c: f040 80bd bne.w 8006b8a <UART_SetConfig+0x202>
|
|
{
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
8006a10: f7ff fcc8 bl 80063a4 <HAL_RCC_GetPCLK2Freq>
|
|
8006a14: 60b8 str r0, [r7, #8]
|
|
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
|
|
8006a16: 68bb ldr r3, [r7, #8]
|
|
8006a18: 461d mov r5, r3
|
|
8006a1a: f04f 0600 mov.w r6, #0
|
|
8006a1e: 46a8 mov r8, r5
|
|
8006a20: 46b1 mov r9, r6
|
|
8006a22: eb18 0308 adds.w r3, r8, r8
|
|
8006a26: eb49 0409 adc.w r4, r9, r9
|
|
8006a2a: 4698 mov r8, r3
|
|
8006a2c: 46a1 mov r9, r4
|
|
8006a2e: eb18 0805 adds.w r8, r8, r5
|
|
8006a32: eb49 0906 adc.w r9, r9, r6
|
|
8006a36: f04f 0100 mov.w r1, #0
|
|
8006a3a: f04f 0200 mov.w r2, #0
|
|
8006a3e: ea4f 02c9 mov.w r2, r9, lsl #3
|
|
8006a42: ea42 7258 orr.w r2, r2, r8, lsr #29
|
|
8006a46: ea4f 01c8 mov.w r1, r8, lsl #3
|
|
8006a4a: 4688 mov r8, r1
|
|
8006a4c: 4691 mov r9, r2
|
|
8006a4e: eb18 0005 adds.w r0, r8, r5
|
|
8006a52: eb49 0106 adc.w r1, r9, r6
|
|
8006a56: 687b ldr r3, [r7, #4]
|
|
8006a58: 685b ldr r3, [r3, #4]
|
|
8006a5a: 461d mov r5, r3
|
|
8006a5c: f04f 0600 mov.w r6, #0
|
|
8006a60: 196b adds r3, r5, r5
|
|
8006a62: eb46 0406 adc.w r4, r6, r6
|
|
8006a66: 461a mov r2, r3
|
|
8006a68: 4623 mov r3, r4
|
|
8006a6a: f7fa f915 bl 8000c98 <__aeabi_uldivmod>
|
|
8006a6e: 4603 mov r3, r0
|
|
8006a70: 460c mov r4, r1
|
|
8006a72: 461a mov r2, r3
|
|
8006a74: 4ba5 ldr r3, [pc, #660] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006a76: fba3 2302 umull r2, r3, r3, r2
|
|
8006a7a: 095b lsrs r3, r3, #5
|
|
8006a7c: ea4f 1803 mov.w r8, r3, lsl #4
|
|
8006a80: 68bb ldr r3, [r7, #8]
|
|
8006a82: 461d mov r5, r3
|
|
8006a84: f04f 0600 mov.w r6, #0
|
|
8006a88: 46a9 mov r9, r5
|
|
8006a8a: 46b2 mov sl, r6
|
|
8006a8c: eb19 0309 adds.w r3, r9, r9
|
|
8006a90: eb4a 040a adc.w r4, sl, sl
|
|
8006a94: 4699 mov r9, r3
|
|
8006a96: 46a2 mov sl, r4
|
|
8006a98: eb19 0905 adds.w r9, r9, r5
|
|
8006a9c: eb4a 0a06 adc.w sl, sl, r6
|
|
8006aa0: f04f 0100 mov.w r1, #0
|
|
8006aa4: f04f 0200 mov.w r2, #0
|
|
8006aa8: ea4f 02ca mov.w r2, sl, lsl #3
|
|
8006aac: ea42 7259 orr.w r2, r2, r9, lsr #29
|
|
8006ab0: ea4f 01c9 mov.w r1, r9, lsl #3
|
|
8006ab4: 4689 mov r9, r1
|
|
8006ab6: 4692 mov sl, r2
|
|
8006ab8: eb19 0005 adds.w r0, r9, r5
|
|
8006abc: eb4a 0106 adc.w r1, sl, r6
|
|
8006ac0: 687b ldr r3, [r7, #4]
|
|
8006ac2: 685b ldr r3, [r3, #4]
|
|
8006ac4: 461d mov r5, r3
|
|
8006ac6: f04f 0600 mov.w r6, #0
|
|
8006aca: 196b adds r3, r5, r5
|
|
8006acc: eb46 0406 adc.w r4, r6, r6
|
|
8006ad0: 461a mov r2, r3
|
|
8006ad2: 4623 mov r3, r4
|
|
8006ad4: f7fa f8e0 bl 8000c98 <__aeabi_uldivmod>
|
|
8006ad8: 4603 mov r3, r0
|
|
8006ada: 460c mov r4, r1
|
|
8006adc: 461a mov r2, r3
|
|
8006ade: 4b8b ldr r3, [pc, #556] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006ae0: fba3 1302 umull r1, r3, r3, r2
|
|
8006ae4: 095b lsrs r3, r3, #5
|
|
8006ae6: 2164 movs r1, #100 ; 0x64
|
|
8006ae8: fb01 f303 mul.w r3, r1, r3
|
|
8006aec: 1ad3 subs r3, r2, r3
|
|
8006aee: 00db lsls r3, r3, #3
|
|
8006af0: 3332 adds r3, #50 ; 0x32
|
|
8006af2: 4a86 ldr r2, [pc, #536] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006af4: fba2 2303 umull r2, r3, r2, r3
|
|
8006af8: 095b lsrs r3, r3, #5
|
|
8006afa: 005b lsls r3, r3, #1
|
|
8006afc: f403 73f8 and.w r3, r3, #496 ; 0x1f0
|
|
8006b00: 4498 add r8, r3
|
|
8006b02: 68bb ldr r3, [r7, #8]
|
|
8006b04: 461d mov r5, r3
|
|
8006b06: f04f 0600 mov.w r6, #0
|
|
8006b0a: 46a9 mov r9, r5
|
|
8006b0c: 46b2 mov sl, r6
|
|
8006b0e: eb19 0309 adds.w r3, r9, r9
|
|
8006b12: eb4a 040a adc.w r4, sl, sl
|
|
8006b16: 4699 mov r9, r3
|
|
8006b18: 46a2 mov sl, r4
|
|
8006b1a: eb19 0905 adds.w r9, r9, r5
|
|
8006b1e: eb4a 0a06 adc.w sl, sl, r6
|
|
8006b22: f04f 0100 mov.w r1, #0
|
|
8006b26: f04f 0200 mov.w r2, #0
|
|
8006b2a: ea4f 02ca mov.w r2, sl, lsl #3
|
|
8006b2e: ea42 7259 orr.w r2, r2, r9, lsr #29
|
|
8006b32: ea4f 01c9 mov.w r1, r9, lsl #3
|
|
8006b36: 4689 mov r9, r1
|
|
8006b38: 4692 mov sl, r2
|
|
8006b3a: eb19 0005 adds.w r0, r9, r5
|
|
8006b3e: eb4a 0106 adc.w r1, sl, r6
|
|
8006b42: 687b ldr r3, [r7, #4]
|
|
8006b44: 685b ldr r3, [r3, #4]
|
|
8006b46: 461d mov r5, r3
|
|
8006b48: f04f 0600 mov.w r6, #0
|
|
8006b4c: 196b adds r3, r5, r5
|
|
8006b4e: eb46 0406 adc.w r4, r6, r6
|
|
8006b52: 461a mov r2, r3
|
|
8006b54: 4623 mov r3, r4
|
|
8006b56: f7fa f89f bl 8000c98 <__aeabi_uldivmod>
|
|
8006b5a: 4603 mov r3, r0
|
|
8006b5c: 460c mov r4, r1
|
|
8006b5e: 461a mov r2, r3
|
|
8006b60: 4b6a ldr r3, [pc, #424] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006b62: fba3 1302 umull r1, r3, r3, r2
|
|
8006b66: 095b lsrs r3, r3, #5
|
|
8006b68: 2164 movs r1, #100 ; 0x64
|
|
8006b6a: fb01 f303 mul.w r3, r1, r3
|
|
8006b6e: 1ad3 subs r3, r2, r3
|
|
8006b70: 00db lsls r3, r3, #3
|
|
8006b72: 3332 adds r3, #50 ; 0x32
|
|
8006b74: 4a65 ldr r2, [pc, #404] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006b76: fba2 2303 umull r2, r3, r2, r3
|
|
8006b7a: 095b lsrs r3, r3, #5
|
|
8006b7c: f003 0207 and.w r2, r3, #7
|
|
8006b80: 687b ldr r3, [r7, #4]
|
|
8006b82: 681b ldr r3, [r3, #0]
|
|
8006b84: 4442 add r2, r8
|
|
8006b86: 609a str r2, [r3, #8]
|
|
8006b88: e26f b.n 800706a <UART_SetConfig+0x6e2>
|
|
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
|
|
}
|
|
#endif /* USART6 */
|
|
else
|
|
{
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
8006b8a: f7ff fbf7 bl 800637c <HAL_RCC_GetPCLK1Freq>
|
|
8006b8e: 60b8 str r0, [r7, #8]
|
|
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
|
|
8006b90: 68bb ldr r3, [r7, #8]
|
|
8006b92: 461d mov r5, r3
|
|
8006b94: f04f 0600 mov.w r6, #0
|
|
8006b98: 46a8 mov r8, r5
|
|
8006b9a: 46b1 mov r9, r6
|
|
8006b9c: eb18 0308 adds.w r3, r8, r8
|
|
8006ba0: eb49 0409 adc.w r4, r9, r9
|
|
8006ba4: 4698 mov r8, r3
|
|
8006ba6: 46a1 mov r9, r4
|
|
8006ba8: eb18 0805 adds.w r8, r8, r5
|
|
8006bac: eb49 0906 adc.w r9, r9, r6
|
|
8006bb0: f04f 0100 mov.w r1, #0
|
|
8006bb4: f04f 0200 mov.w r2, #0
|
|
8006bb8: ea4f 02c9 mov.w r2, r9, lsl #3
|
|
8006bbc: ea42 7258 orr.w r2, r2, r8, lsr #29
|
|
8006bc0: ea4f 01c8 mov.w r1, r8, lsl #3
|
|
8006bc4: 4688 mov r8, r1
|
|
8006bc6: 4691 mov r9, r2
|
|
8006bc8: eb18 0005 adds.w r0, r8, r5
|
|
8006bcc: eb49 0106 adc.w r1, r9, r6
|
|
8006bd0: 687b ldr r3, [r7, #4]
|
|
8006bd2: 685b ldr r3, [r3, #4]
|
|
8006bd4: 461d mov r5, r3
|
|
8006bd6: f04f 0600 mov.w r6, #0
|
|
8006bda: 196b adds r3, r5, r5
|
|
8006bdc: eb46 0406 adc.w r4, r6, r6
|
|
8006be0: 461a mov r2, r3
|
|
8006be2: 4623 mov r3, r4
|
|
8006be4: f7fa f858 bl 8000c98 <__aeabi_uldivmod>
|
|
8006be8: 4603 mov r3, r0
|
|
8006bea: 460c mov r4, r1
|
|
8006bec: 461a mov r2, r3
|
|
8006bee: 4b47 ldr r3, [pc, #284] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006bf0: fba3 2302 umull r2, r3, r3, r2
|
|
8006bf4: 095b lsrs r3, r3, #5
|
|
8006bf6: ea4f 1803 mov.w r8, r3, lsl #4
|
|
8006bfa: 68bb ldr r3, [r7, #8]
|
|
8006bfc: 461d mov r5, r3
|
|
8006bfe: f04f 0600 mov.w r6, #0
|
|
8006c02: 46a9 mov r9, r5
|
|
8006c04: 46b2 mov sl, r6
|
|
8006c06: eb19 0309 adds.w r3, r9, r9
|
|
8006c0a: eb4a 040a adc.w r4, sl, sl
|
|
8006c0e: 4699 mov r9, r3
|
|
8006c10: 46a2 mov sl, r4
|
|
8006c12: eb19 0905 adds.w r9, r9, r5
|
|
8006c16: eb4a 0a06 adc.w sl, sl, r6
|
|
8006c1a: f04f 0100 mov.w r1, #0
|
|
8006c1e: f04f 0200 mov.w r2, #0
|
|
8006c22: ea4f 02ca mov.w r2, sl, lsl #3
|
|
8006c26: ea42 7259 orr.w r2, r2, r9, lsr #29
|
|
8006c2a: ea4f 01c9 mov.w r1, r9, lsl #3
|
|
8006c2e: 4689 mov r9, r1
|
|
8006c30: 4692 mov sl, r2
|
|
8006c32: eb19 0005 adds.w r0, r9, r5
|
|
8006c36: eb4a 0106 adc.w r1, sl, r6
|
|
8006c3a: 687b ldr r3, [r7, #4]
|
|
8006c3c: 685b ldr r3, [r3, #4]
|
|
8006c3e: 461d mov r5, r3
|
|
8006c40: f04f 0600 mov.w r6, #0
|
|
8006c44: 196b adds r3, r5, r5
|
|
8006c46: eb46 0406 adc.w r4, r6, r6
|
|
8006c4a: 461a mov r2, r3
|
|
8006c4c: 4623 mov r3, r4
|
|
8006c4e: f7fa f823 bl 8000c98 <__aeabi_uldivmod>
|
|
8006c52: 4603 mov r3, r0
|
|
8006c54: 460c mov r4, r1
|
|
8006c56: 461a mov r2, r3
|
|
8006c58: 4b2c ldr r3, [pc, #176] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006c5a: fba3 1302 umull r1, r3, r3, r2
|
|
8006c5e: 095b lsrs r3, r3, #5
|
|
8006c60: 2164 movs r1, #100 ; 0x64
|
|
8006c62: fb01 f303 mul.w r3, r1, r3
|
|
8006c66: 1ad3 subs r3, r2, r3
|
|
8006c68: 00db lsls r3, r3, #3
|
|
8006c6a: 3332 adds r3, #50 ; 0x32
|
|
8006c6c: 4a27 ldr r2, [pc, #156] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006c6e: fba2 2303 umull r2, r3, r2, r3
|
|
8006c72: 095b lsrs r3, r3, #5
|
|
8006c74: 005b lsls r3, r3, #1
|
|
8006c76: f403 73f8 and.w r3, r3, #496 ; 0x1f0
|
|
8006c7a: 4498 add r8, r3
|
|
8006c7c: 68bb ldr r3, [r7, #8]
|
|
8006c7e: 461d mov r5, r3
|
|
8006c80: f04f 0600 mov.w r6, #0
|
|
8006c84: 46a9 mov r9, r5
|
|
8006c86: 46b2 mov sl, r6
|
|
8006c88: eb19 0309 adds.w r3, r9, r9
|
|
8006c8c: eb4a 040a adc.w r4, sl, sl
|
|
8006c90: 4699 mov r9, r3
|
|
8006c92: 46a2 mov sl, r4
|
|
8006c94: eb19 0905 adds.w r9, r9, r5
|
|
8006c98: eb4a 0a06 adc.w sl, sl, r6
|
|
8006c9c: f04f 0100 mov.w r1, #0
|
|
8006ca0: f04f 0200 mov.w r2, #0
|
|
8006ca4: ea4f 02ca mov.w r2, sl, lsl #3
|
|
8006ca8: ea42 7259 orr.w r2, r2, r9, lsr #29
|
|
8006cac: ea4f 01c9 mov.w r1, r9, lsl #3
|
|
8006cb0: 4689 mov r9, r1
|
|
8006cb2: 4692 mov sl, r2
|
|
8006cb4: eb19 0005 adds.w r0, r9, r5
|
|
8006cb8: eb4a 0106 adc.w r1, sl, r6
|
|
8006cbc: 687b ldr r3, [r7, #4]
|
|
8006cbe: 685b ldr r3, [r3, #4]
|
|
8006cc0: 461d mov r5, r3
|
|
8006cc2: f04f 0600 mov.w r6, #0
|
|
8006cc6: 196b adds r3, r5, r5
|
|
8006cc8: eb46 0406 adc.w r4, r6, r6
|
|
8006ccc: 461a mov r2, r3
|
|
8006cce: 4623 mov r3, r4
|
|
8006cd0: f7f9 ffe2 bl 8000c98 <__aeabi_uldivmod>
|
|
8006cd4: 4603 mov r3, r0
|
|
8006cd6: 460c mov r4, r1
|
|
8006cd8: 461a mov r2, r3
|
|
8006cda: 4b0c ldr r3, [pc, #48] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006cdc: fba3 1302 umull r1, r3, r3, r2
|
|
8006ce0: 095b lsrs r3, r3, #5
|
|
8006ce2: 2164 movs r1, #100 ; 0x64
|
|
8006ce4: fb01 f303 mul.w r3, r1, r3
|
|
8006ce8: 1ad3 subs r3, r2, r3
|
|
8006cea: 00db lsls r3, r3, #3
|
|
8006cec: 3332 adds r3, #50 ; 0x32
|
|
8006cee: 4a07 ldr r2, [pc, #28] ; (8006d0c <UART_SetConfig+0x384>)
|
|
8006cf0: fba2 2303 umull r2, r3, r2, r3
|
|
8006cf4: 095b lsrs r3, r3, #5
|
|
8006cf6: f003 0207 and.w r2, r3, #7
|
|
8006cfa: 687b ldr r3, [r7, #4]
|
|
8006cfc: 681b ldr r3, [r3, #0]
|
|
8006cfe: 4442 add r2, r8
|
|
8006d00: 609a str r2, [r3, #8]
|
|
{
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
}
|
|
}
|
|
}
|
|
8006d02: e1b2 b.n 800706a <UART_SetConfig+0x6e2>
|
|
8006d04: 40011000 .word 0x40011000
|
|
8006d08: 40011400 .word 0x40011400
|
|
8006d0c: 51eb851f .word 0x51eb851f
|
|
if ((huart->Instance == USART1) || (huart->Instance == USART6))
|
|
8006d10: 687b ldr r3, [r7, #4]
|
|
8006d12: 681b ldr r3, [r3, #0]
|
|
8006d14: 4ad7 ldr r2, [pc, #860] ; (8007074 <UART_SetConfig+0x6ec>)
|
|
8006d16: 4293 cmp r3, r2
|
|
8006d18: d005 beq.n 8006d26 <UART_SetConfig+0x39e>
|
|
8006d1a: 687b ldr r3, [r7, #4]
|
|
8006d1c: 681b ldr r3, [r3, #0]
|
|
8006d1e: 4ad6 ldr r2, [pc, #856] ; (8007078 <UART_SetConfig+0x6f0>)
|
|
8006d20: 4293 cmp r3, r2
|
|
8006d22: f040 80d1 bne.w 8006ec8 <UART_SetConfig+0x540>
|
|
pclk = HAL_RCC_GetPCLK2Freq();
|
|
8006d26: f7ff fb3d bl 80063a4 <HAL_RCC_GetPCLK2Freq>
|
|
8006d2a: 60b8 str r0, [r7, #8]
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
8006d2c: 68bb ldr r3, [r7, #8]
|
|
8006d2e: 469a mov sl, r3
|
|
8006d30: f04f 0b00 mov.w fp, #0
|
|
8006d34: 46d0 mov r8, sl
|
|
8006d36: 46d9 mov r9, fp
|
|
8006d38: eb18 0308 adds.w r3, r8, r8
|
|
8006d3c: eb49 0409 adc.w r4, r9, r9
|
|
8006d40: 4698 mov r8, r3
|
|
8006d42: 46a1 mov r9, r4
|
|
8006d44: eb18 080a adds.w r8, r8, sl
|
|
8006d48: eb49 090b adc.w r9, r9, fp
|
|
8006d4c: f04f 0100 mov.w r1, #0
|
|
8006d50: f04f 0200 mov.w r2, #0
|
|
8006d54: ea4f 02c9 mov.w r2, r9, lsl #3
|
|
8006d58: ea42 7258 orr.w r2, r2, r8, lsr #29
|
|
8006d5c: ea4f 01c8 mov.w r1, r8, lsl #3
|
|
8006d60: 4688 mov r8, r1
|
|
8006d62: 4691 mov r9, r2
|
|
8006d64: eb1a 0508 adds.w r5, sl, r8
|
|
8006d68: eb4b 0609 adc.w r6, fp, r9
|
|
8006d6c: 687b ldr r3, [r7, #4]
|
|
8006d6e: 685b ldr r3, [r3, #4]
|
|
8006d70: 4619 mov r1, r3
|
|
8006d72: f04f 0200 mov.w r2, #0
|
|
8006d76: f04f 0300 mov.w r3, #0
|
|
8006d7a: f04f 0400 mov.w r4, #0
|
|
8006d7e: 0094 lsls r4, r2, #2
|
|
8006d80: ea44 7491 orr.w r4, r4, r1, lsr #30
|
|
8006d84: 008b lsls r3, r1, #2
|
|
8006d86: 461a mov r2, r3
|
|
8006d88: 4623 mov r3, r4
|
|
8006d8a: 4628 mov r0, r5
|
|
8006d8c: 4631 mov r1, r6
|
|
8006d8e: f7f9 ff83 bl 8000c98 <__aeabi_uldivmod>
|
|
8006d92: 4603 mov r3, r0
|
|
8006d94: 460c mov r4, r1
|
|
8006d96: 461a mov r2, r3
|
|
8006d98: 4bb8 ldr r3, [pc, #736] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8006d9a: fba3 2302 umull r2, r3, r3, r2
|
|
8006d9e: 095b lsrs r3, r3, #5
|
|
8006da0: ea4f 1803 mov.w r8, r3, lsl #4
|
|
8006da4: 68bb ldr r3, [r7, #8]
|
|
8006da6: 469b mov fp, r3
|
|
8006da8: f04f 0c00 mov.w ip, #0
|
|
8006dac: 46d9 mov r9, fp
|
|
8006dae: 46e2 mov sl, ip
|
|
8006db0: eb19 0309 adds.w r3, r9, r9
|
|
8006db4: eb4a 040a adc.w r4, sl, sl
|
|
8006db8: 4699 mov r9, r3
|
|
8006dba: 46a2 mov sl, r4
|
|
8006dbc: eb19 090b adds.w r9, r9, fp
|
|
8006dc0: eb4a 0a0c adc.w sl, sl, ip
|
|
8006dc4: f04f 0100 mov.w r1, #0
|
|
8006dc8: f04f 0200 mov.w r2, #0
|
|
8006dcc: ea4f 02ca mov.w r2, sl, lsl #3
|
|
8006dd0: ea42 7259 orr.w r2, r2, r9, lsr #29
|
|
8006dd4: ea4f 01c9 mov.w r1, r9, lsl #3
|
|
8006dd8: 4689 mov r9, r1
|
|
8006dda: 4692 mov sl, r2
|
|
8006ddc: eb1b 0509 adds.w r5, fp, r9
|
|
8006de0: eb4c 060a adc.w r6, ip, sl
|
|
8006de4: 687b ldr r3, [r7, #4]
|
|
8006de6: 685b ldr r3, [r3, #4]
|
|
8006de8: 4619 mov r1, r3
|
|
8006dea: f04f 0200 mov.w r2, #0
|
|
8006dee: f04f 0300 mov.w r3, #0
|
|
8006df2: f04f 0400 mov.w r4, #0
|
|
8006df6: 0094 lsls r4, r2, #2
|
|
8006df8: ea44 7491 orr.w r4, r4, r1, lsr #30
|
|
8006dfc: 008b lsls r3, r1, #2
|
|
8006dfe: 461a mov r2, r3
|
|
8006e00: 4623 mov r3, r4
|
|
8006e02: 4628 mov r0, r5
|
|
8006e04: 4631 mov r1, r6
|
|
8006e06: f7f9 ff47 bl 8000c98 <__aeabi_uldivmod>
|
|
8006e0a: 4603 mov r3, r0
|
|
8006e0c: 460c mov r4, r1
|
|
8006e0e: 461a mov r2, r3
|
|
8006e10: 4b9a ldr r3, [pc, #616] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8006e12: fba3 1302 umull r1, r3, r3, r2
|
|
8006e16: 095b lsrs r3, r3, #5
|
|
8006e18: 2164 movs r1, #100 ; 0x64
|
|
8006e1a: fb01 f303 mul.w r3, r1, r3
|
|
8006e1e: 1ad3 subs r3, r2, r3
|
|
8006e20: 011b lsls r3, r3, #4
|
|
8006e22: 3332 adds r3, #50 ; 0x32
|
|
8006e24: 4a95 ldr r2, [pc, #596] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8006e26: fba2 2303 umull r2, r3, r2, r3
|
|
8006e2a: 095b lsrs r3, r3, #5
|
|
8006e2c: f003 03f0 and.w r3, r3, #240 ; 0xf0
|
|
8006e30: 4498 add r8, r3
|
|
8006e32: 68bb ldr r3, [r7, #8]
|
|
8006e34: 469b mov fp, r3
|
|
8006e36: f04f 0c00 mov.w ip, #0
|
|
8006e3a: 46d9 mov r9, fp
|
|
8006e3c: 46e2 mov sl, ip
|
|
8006e3e: eb19 0309 adds.w r3, r9, r9
|
|
8006e42: eb4a 040a adc.w r4, sl, sl
|
|
8006e46: 4699 mov r9, r3
|
|
8006e48: 46a2 mov sl, r4
|
|
8006e4a: eb19 090b adds.w r9, r9, fp
|
|
8006e4e: eb4a 0a0c adc.w sl, sl, ip
|
|
8006e52: f04f 0100 mov.w r1, #0
|
|
8006e56: f04f 0200 mov.w r2, #0
|
|
8006e5a: ea4f 02ca mov.w r2, sl, lsl #3
|
|
8006e5e: ea42 7259 orr.w r2, r2, r9, lsr #29
|
|
8006e62: ea4f 01c9 mov.w r1, r9, lsl #3
|
|
8006e66: 4689 mov r9, r1
|
|
8006e68: 4692 mov sl, r2
|
|
8006e6a: eb1b 0509 adds.w r5, fp, r9
|
|
8006e6e: eb4c 060a adc.w r6, ip, sl
|
|
8006e72: 687b ldr r3, [r7, #4]
|
|
8006e74: 685b ldr r3, [r3, #4]
|
|
8006e76: 4619 mov r1, r3
|
|
8006e78: f04f 0200 mov.w r2, #0
|
|
8006e7c: f04f 0300 mov.w r3, #0
|
|
8006e80: f04f 0400 mov.w r4, #0
|
|
8006e84: 0094 lsls r4, r2, #2
|
|
8006e86: ea44 7491 orr.w r4, r4, r1, lsr #30
|
|
8006e8a: 008b lsls r3, r1, #2
|
|
8006e8c: 461a mov r2, r3
|
|
8006e8e: 4623 mov r3, r4
|
|
8006e90: 4628 mov r0, r5
|
|
8006e92: 4631 mov r1, r6
|
|
8006e94: f7f9 ff00 bl 8000c98 <__aeabi_uldivmod>
|
|
8006e98: 4603 mov r3, r0
|
|
8006e9a: 460c mov r4, r1
|
|
8006e9c: 461a mov r2, r3
|
|
8006e9e: 4b77 ldr r3, [pc, #476] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8006ea0: fba3 1302 umull r1, r3, r3, r2
|
|
8006ea4: 095b lsrs r3, r3, #5
|
|
8006ea6: 2164 movs r1, #100 ; 0x64
|
|
8006ea8: fb01 f303 mul.w r3, r1, r3
|
|
8006eac: 1ad3 subs r3, r2, r3
|
|
8006eae: 011b lsls r3, r3, #4
|
|
8006eb0: 3332 adds r3, #50 ; 0x32
|
|
8006eb2: 4a72 ldr r2, [pc, #456] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8006eb4: fba2 2303 umull r2, r3, r2, r3
|
|
8006eb8: 095b lsrs r3, r3, #5
|
|
8006eba: f003 020f and.w r2, r3, #15
|
|
8006ebe: 687b ldr r3, [r7, #4]
|
|
8006ec0: 681b ldr r3, [r3, #0]
|
|
8006ec2: 4442 add r2, r8
|
|
8006ec4: 609a str r2, [r3, #8]
|
|
8006ec6: e0d0 b.n 800706a <UART_SetConfig+0x6e2>
|
|
pclk = HAL_RCC_GetPCLK1Freq();
|
|
8006ec8: f7ff fa58 bl 800637c <HAL_RCC_GetPCLK1Freq>
|
|
8006ecc: 60b8 str r0, [r7, #8]
|
|
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
|
|
8006ece: 68bb ldr r3, [r7, #8]
|
|
8006ed0: 469a mov sl, r3
|
|
8006ed2: f04f 0b00 mov.w fp, #0
|
|
8006ed6: 46d0 mov r8, sl
|
|
8006ed8: 46d9 mov r9, fp
|
|
8006eda: eb18 0308 adds.w r3, r8, r8
|
|
8006ede: eb49 0409 adc.w r4, r9, r9
|
|
8006ee2: 4698 mov r8, r3
|
|
8006ee4: 46a1 mov r9, r4
|
|
8006ee6: eb18 080a adds.w r8, r8, sl
|
|
8006eea: eb49 090b adc.w r9, r9, fp
|
|
8006eee: f04f 0100 mov.w r1, #0
|
|
8006ef2: f04f 0200 mov.w r2, #0
|
|
8006ef6: ea4f 02c9 mov.w r2, r9, lsl #3
|
|
8006efa: ea42 7258 orr.w r2, r2, r8, lsr #29
|
|
8006efe: ea4f 01c8 mov.w r1, r8, lsl #3
|
|
8006f02: 4688 mov r8, r1
|
|
8006f04: 4691 mov r9, r2
|
|
8006f06: eb1a 0508 adds.w r5, sl, r8
|
|
8006f0a: eb4b 0609 adc.w r6, fp, r9
|
|
8006f0e: 687b ldr r3, [r7, #4]
|
|
8006f10: 685b ldr r3, [r3, #4]
|
|
8006f12: 4619 mov r1, r3
|
|
8006f14: f04f 0200 mov.w r2, #0
|
|
8006f18: f04f 0300 mov.w r3, #0
|
|
8006f1c: f04f 0400 mov.w r4, #0
|
|
8006f20: 0094 lsls r4, r2, #2
|
|
8006f22: ea44 7491 orr.w r4, r4, r1, lsr #30
|
|
8006f26: 008b lsls r3, r1, #2
|
|
8006f28: 461a mov r2, r3
|
|
8006f2a: 4623 mov r3, r4
|
|
8006f2c: 4628 mov r0, r5
|
|
8006f2e: 4631 mov r1, r6
|
|
8006f30: f7f9 feb2 bl 8000c98 <__aeabi_uldivmod>
|
|
8006f34: 4603 mov r3, r0
|
|
8006f36: 460c mov r4, r1
|
|
8006f38: 461a mov r2, r3
|
|
8006f3a: 4b50 ldr r3, [pc, #320] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8006f3c: fba3 2302 umull r2, r3, r3, r2
|
|
8006f40: 095b lsrs r3, r3, #5
|
|
8006f42: ea4f 1803 mov.w r8, r3, lsl #4
|
|
8006f46: 68bb ldr r3, [r7, #8]
|
|
8006f48: 469b mov fp, r3
|
|
8006f4a: f04f 0c00 mov.w ip, #0
|
|
8006f4e: 46d9 mov r9, fp
|
|
8006f50: 46e2 mov sl, ip
|
|
8006f52: eb19 0309 adds.w r3, r9, r9
|
|
8006f56: eb4a 040a adc.w r4, sl, sl
|
|
8006f5a: 4699 mov r9, r3
|
|
8006f5c: 46a2 mov sl, r4
|
|
8006f5e: eb19 090b adds.w r9, r9, fp
|
|
8006f62: eb4a 0a0c adc.w sl, sl, ip
|
|
8006f66: f04f 0100 mov.w r1, #0
|
|
8006f6a: f04f 0200 mov.w r2, #0
|
|
8006f6e: ea4f 02ca mov.w r2, sl, lsl #3
|
|
8006f72: ea42 7259 orr.w r2, r2, r9, lsr #29
|
|
8006f76: ea4f 01c9 mov.w r1, r9, lsl #3
|
|
8006f7a: 4689 mov r9, r1
|
|
8006f7c: 4692 mov sl, r2
|
|
8006f7e: eb1b 0509 adds.w r5, fp, r9
|
|
8006f82: eb4c 060a adc.w r6, ip, sl
|
|
8006f86: 687b ldr r3, [r7, #4]
|
|
8006f88: 685b ldr r3, [r3, #4]
|
|
8006f8a: 4619 mov r1, r3
|
|
8006f8c: f04f 0200 mov.w r2, #0
|
|
8006f90: f04f 0300 mov.w r3, #0
|
|
8006f94: f04f 0400 mov.w r4, #0
|
|
8006f98: 0094 lsls r4, r2, #2
|
|
8006f9a: ea44 7491 orr.w r4, r4, r1, lsr #30
|
|
8006f9e: 008b lsls r3, r1, #2
|
|
8006fa0: 461a mov r2, r3
|
|
8006fa2: 4623 mov r3, r4
|
|
8006fa4: 4628 mov r0, r5
|
|
8006fa6: 4631 mov r1, r6
|
|
8006fa8: f7f9 fe76 bl 8000c98 <__aeabi_uldivmod>
|
|
8006fac: 4603 mov r3, r0
|
|
8006fae: 460c mov r4, r1
|
|
8006fb0: 461a mov r2, r3
|
|
8006fb2: 4b32 ldr r3, [pc, #200] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8006fb4: fba3 1302 umull r1, r3, r3, r2
|
|
8006fb8: 095b lsrs r3, r3, #5
|
|
8006fba: 2164 movs r1, #100 ; 0x64
|
|
8006fbc: fb01 f303 mul.w r3, r1, r3
|
|
8006fc0: 1ad3 subs r3, r2, r3
|
|
8006fc2: 011b lsls r3, r3, #4
|
|
8006fc4: 3332 adds r3, #50 ; 0x32
|
|
8006fc6: 4a2d ldr r2, [pc, #180] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8006fc8: fba2 2303 umull r2, r3, r2, r3
|
|
8006fcc: 095b lsrs r3, r3, #5
|
|
8006fce: f003 03f0 and.w r3, r3, #240 ; 0xf0
|
|
8006fd2: 4498 add r8, r3
|
|
8006fd4: 68bb ldr r3, [r7, #8]
|
|
8006fd6: 469b mov fp, r3
|
|
8006fd8: f04f 0c00 mov.w ip, #0
|
|
8006fdc: 46d9 mov r9, fp
|
|
8006fde: 46e2 mov sl, ip
|
|
8006fe0: eb19 0309 adds.w r3, r9, r9
|
|
8006fe4: eb4a 040a adc.w r4, sl, sl
|
|
8006fe8: 4699 mov r9, r3
|
|
8006fea: 46a2 mov sl, r4
|
|
8006fec: eb19 090b adds.w r9, r9, fp
|
|
8006ff0: eb4a 0a0c adc.w sl, sl, ip
|
|
8006ff4: f04f 0100 mov.w r1, #0
|
|
8006ff8: f04f 0200 mov.w r2, #0
|
|
8006ffc: ea4f 02ca mov.w r2, sl, lsl #3
|
|
8007000: ea42 7259 orr.w r2, r2, r9, lsr #29
|
|
8007004: ea4f 01c9 mov.w r1, r9, lsl #3
|
|
8007008: 4689 mov r9, r1
|
|
800700a: 4692 mov sl, r2
|
|
800700c: eb1b 0509 adds.w r5, fp, r9
|
|
8007010: eb4c 060a adc.w r6, ip, sl
|
|
8007014: 687b ldr r3, [r7, #4]
|
|
8007016: 685b ldr r3, [r3, #4]
|
|
8007018: 4619 mov r1, r3
|
|
800701a: f04f 0200 mov.w r2, #0
|
|
800701e: f04f 0300 mov.w r3, #0
|
|
8007022: f04f 0400 mov.w r4, #0
|
|
8007026: 0094 lsls r4, r2, #2
|
|
8007028: ea44 7491 orr.w r4, r4, r1, lsr #30
|
|
800702c: 008b lsls r3, r1, #2
|
|
800702e: 461a mov r2, r3
|
|
8007030: 4623 mov r3, r4
|
|
8007032: 4628 mov r0, r5
|
|
8007034: 4631 mov r1, r6
|
|
8007036: f7f9 fe2f bl 8000c98 <__aeabi_uldivmod>
|
|
800703a: 4603 mov r3, r0
|
|
800703c: 460c mov r4, r1
|
|
800703e: 461a mov r2, r3
|
|
8007040: 4b0e ldr r3, [pc, #56] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8007042: fba3 1302 umull r1, r3, r3, r2
|
|
8007046: 095b lsrs r3, r3, #5
|
|
8007048: 2164 movs r1, #100 ; 0x64
|
|
800704a: fb01 f303 mul.w r3, r1, r3
|
|
800704e: 1ad3 subs r3, r2, r3
|
|
8007050: 011b lsls r3, r3, #4
|
|
8007052: 3332 adds r3, #50 ; 0x32
|
|
8007054: 4a09 ldr r2, [pc, #36] ; (800707c <UART_SetConfig+0x6f4>)
|
|
8007056: fba2 2303 umull r2, r3, r2, r3
|
|
800705a: 095b lsrs r3, r3, #5
|
|
800705c: f003 020f and.w r2, r3, #15
|
|
8007060: 687b ldr r3, [r7, #4]
|
|
8007062: 681b ldr r3, [r3, #0]
|
|
8007064: 4442 add r2, r8
|
|
8007066: 609a str r2, [r3, #8]
|
|
}
|
|
8007068: e7ff b.n 800706a <UART_SetConfig+0x6e2>
|
|
800706a: bf00 nop
|
|
800706c: 3714 adds r7, #20
|
|
800706e: 46bd mov sp, r7
|
|
8007070: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
8007074: 40011000 .word 0x40011000
|
|
8007078: 40011400 .word 0x40011400
|
|
800707c: 51eb851f .word 0x51eb851f
|
|
|
|
08007080 <USB_CoreInit>:
|
|
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
|
|
* the configuration information for the specified USBx peripheral.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
|
|
{
|
|
8007080: b084 sub sp, #16
|
|
8007082: b580 push {r7, lr}
|
|
8007084: b084 sub sp, #16
|
|
8007086: af00 add r7, sp, #0
|
|
8007088: 6078 str r0, [r7, #4]
|
|
800708a: f107 001c add.w r0, r7, #28
|
|
800708e: e880 000e stmia.w r0, {r1, r2, r3}
|
|
HAL_StatusTypeDef ret;
|
|
|
|
if (cfg.phy_itface == USB_OTG_ULPI_PHY)
|
|
8007092: 6b3b ldr r3, [r7, #48] ; 0x30
|
|
8007094: 2b01 cmp r3, #1
|
|
8007096: d122 bne.n 80070de <USB_CoreInit+0x5e>
|
|
{
|
|
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
|
|
8007098: 687b ldr r3, [r7, #4]
|
|
800709a: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
800709c: f423 3280 bic.w r2, r3, #65536 ; 0x10000
|
|
80070a0: 687b ldr r3, [r7, #4]
|
|
80070a2: 639a str r2, [r3, #56] ; 0x38
|
|
|
|
/* Init The ULPI Interface */
|
|
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL);
|
|
80070a4: 687b ldr r3, [r7, #4]
|
|
80070a6: 68db ldr r3, [r3, #12]
|
|
80070a8: f423 0384 bic.w r3, r3, #4325376 ; 0x420000
|
|
80070ac: f023 0340 bic.w r3, r3, #64 ; 0x40
|
|
80070b0: 687a ldr r2, [r7, #4]
|
|
80070b2: 60d3 str r3, [r2, #12]
|
|
|
|
/* Select vbus source */
|
|
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI);
|
|
80070b4: 687b ldr r3, [r7, #4]
|
|
80070b6: 68db ldr r3, [r3, #12]
|
|
80070b8: f423 1240 bic.w r2, r3, #3145728 ; 0x300000
|
|
80070bc: 687b ldr r3, [r7, #4]
|
|
80070be: 60da str r2, [r3, #12]
|
|
if (cfg.use_external_vbus == 1U)
|
|
80070c0: 6cfb ldr r3, [r7, #76] ; 0x4c
|
|
80070c2: 2b01 cmp r3, #1
|
|
80070c4: d105 bne.n 80070d2 <USB_CoreInit+0x52>
|
|
{
|
|
USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD;
|
|
80070c6: 687b ldr r3, [r7, #4]
|
|
80070c8: 68db ldr r3, [r3, #12]
|
|
80070ca: f443 1280 orr.w r2, r3, #1048576 ; 0x100000
|
|
80070ce: 687b ldr r3, [r7, #4]
|
|
80070d0: 60da str r2, [r3, #12]
|
|
}
|
|
/* Reset after a PHY select */
|
|
ret = USB_CoreReset(USBx);
|
|
80070d2: 6878 ldr r0, [r7, #4]
|
|
80070d4: f000 f94a bl 800736c <USB_CoreReset>
|
|
80070d8: 4603 mov r3, r0
|
|
80070da: 73fb strb r3, [r7, #15]
|
|
80070dc: e01a b.n 8007114 <USB_CoreInit+0x94>
|
|
}
|
|
else /* FS interface (embedded Phy) */
|
|
{
|
|
/* Select FS Embedded PHY */
|
|
USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
|
|
80070de: 687b ldr r3, [r7, #4]
|
|
80070e0: 68db ldr r3, [r3, #12]
|
|
80070e2: f043 0240 orr.w r2, r3, #64 ; 0x40
|
|
80070e6: 687b ldr r3, [r7, #4]
|
|
80070e8: 60da str r2, [r3, #12]
|
|
|
|
/* Reset after a PHY select */
|
|
ret = USB_CoreReset(USBx);
|
|
80070ea: 6878 ldr r0, [r7, #4]
|
|
80070ec: f000 f93e bl 800736c <USB_CoreReset>
|
|
80070f0: 4603 mov r3, r0
|
|
80070f2: 73fb strb r3, [r7, #15]
|
|
|
|
if (cfg.battery_charging_enable == 0U)
|
|
80070f4: 6c3b ldr r3, [r7, #64] ; 0x40
|
|
80070f6: 2b00 cmp r3, #0
|
|
80070f8: d106 bne.n 8007108 <USB_CoreInit+0x88>
|
|
{
|
|
/* Activate the USB Transceiver */
|
|
USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN;
|
|
80070fa: 687b ldr r3, [r7, #4]
|
|
80070fc: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
80070fe: f443 3280 orr.w r2, r3, #65536 ; 0x10000
|
|
8007102: 687b ldr r3, [r7, #4]
|
|
8007104: 639a str r2, [r3, #56] ; 0x38
|
|
8007106: e005 b.n 8007114 <USB_CoreInit+0x94>
|
|
}
|
|
else
|
|
{
|
|
/* Deactivate the USB Transceiver */
|
|
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
|
|
8007108: 687b ldr r3, [r7, #4]
|
|
800710a: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
800710c: f423 3280 bic.w r2, r3, #65536 ; 0x10000
|
|
8007110: 687b ldr r3, [r7, #4]
|
|
8007112: 639a str r2, [r3, #56] ; 0x38
|
|
}
|
|
}
|
|
|
|
if (cfg.dma_enable == 1U)
|
|
8007114: 6abb ldr r3, [r7, #40] ; 0x28
|
|
8007116: 2b01 cmp r3, #1
|
|
8007118: d10b bne.n 8007132 <USB_CoreInit+0xb2>
|
|
{
|
|
USBx->GAHBCFG |= USB_OTG_GAHBCFG_HBSTLEN_2;
|
|
800711a: 687b ldr r3, [r7, #4]
|
|
800711c: 689b ldr r3, [r3, #8]
|
|
800711e: f043 0206 orr.w r2, r3, #6
|
|
8007122: 687b ldr r3, [r7, #4]
|
|
8007124: 609a str r2, [r3, #8]
|
|
USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN;
|
|
8007126: 687b ldr r3, [r7, #4]
|
|
8007128: 689b ldr r3, [r3, #8]
|
|
800712a: f043 0220 orr.w r2, r3, #32
|
|
800712e: 687b ldr r3, [r7, #4]
|
|
8007130: 609a str r2, [r3, #8]
|
|
}
|
|
|
|
return ret;
|
|
8007132: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8007134: 4618 mov r0, r3
|
|
8007136: 3710 adds r7, #16
|
|
8007138: 46bd mov sp, r7
|
|
800713a: e8bd 4080 ldmia.w sp!, {r7, lr}
|
|
800713e: b004 add sp, #16
|
|
8007140: 4770 bx lr
|
|
|
|
08007142 <USB_EnableGlobalInt>:
|
|
* Enables the controller's Global Int in the AHB Config reg
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
8007142: b480 push {r7}
|
|
8007144: b083 sub sp, #12
|
|
8007146: af00 add r7, sp, #0
|
|
8007148: 6078 str r0, [r7, #4]
|
|
USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
|
|
800714a: 687b ldr r3, [r7, #4]
|
|
800714c: 689b ldr r3, [r3, #8]
|
|
800714e: f043 0201 orr.w r2, r3, #1
|
|
8007152: 687b ldr r3, [r7, #4]
|
|
8007154: 609a str r2, [r3, #8]
|
|
return HAL_OK;
|
|
8007156: 2300 movs r3, #0
|
|
}
|
|
8007158: 4618 mov r0, r3
|
|
800715a: 370c adds r7, #12
|
|
800715c: 46bd mov sp, r7
|
|
800715e: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007162: 4770 bx lr
|
|
|
|
08007164 <USB_DisableGlobalInt>:
|
|
* Disable the controller's Global Int in the AHB Config reg
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
8007164: b480 push {r7}
|
|
8007166: b083 sub sp, #12
|
|
8007168: af00 add r7, sp, #0
|
|
800716a: 6078 str r0, [r7, #4]
|
|
USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
|
|
800716c: 687b ldr r3, [r7, #4]
|
|
800716e: 689b ldr r3, [r3, #8]
|
|
8007170: f023 0201 bic.w r2, r3, #1
|
|
8007174: 687b ldr r3, [r7, #4]
|
|
8007176: 609a str r2, [r3, #8]
|
|
return HAL_OK;
|
|
8007178: 2300 movs r3, #0
|
|
}
|
|
800717a: 4618 mov r0, r3
|
|
800717c: 370c adds r7, #12
|
|
800717e: 46bd mov sp, r7
|
|
8007180: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007184: 4770 bx lr
|
|
|
|
08007186 <USB_SetCurrentMode>:
|
|
* @arg USB_DEVICE_MODE Peripheral mode
|
|
* @arg USB_HOST_MODE Host mode
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode)
|
|
{
|
|
8007186: b580 push {r7, lr}
|
|
8007188: b082 sub sp, #8
|
|
800718a: af00 add r7, sp, #0
|
|
800718c: 6078 str r0, [r7, #4]
|
|
800718e: 460b mov r3, r1
|
|
8007190: 70fb strb r3, [r7, #3]
|
|
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
|
|
8007192: 687b ldr r3, [r7, #4]
|
|
8007194: 68db ldr r3, [r3, #12]
|
|
8007196: f023 42c0 bic.w r2, r3, #1610612736 ; 0x60000000
|
|
800719a: 687b ldr r3, [r7, #4]
|
|
800719c: 60da str r2, [r3, #12]
|
|
|
|
if (mode == USB_HOST_MODE)
|
|
800719e: 78fb ldrb r3, [r7, #3]
|
|
80071a0: 2b01 cmp r3, #1
|
|
80071a2: d106 bne.n 80071b2 <USB_SetCurrentMode+0x2c>
|
|
{
|
|
USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
|
|
80071a4: 687b ldr r3, [r7, #4]
|
|
80071a6: 68db ldr r3, [r3, #12]
|
|
80071a8: f043 5200 orr.w r2, r3, #536870912 ; 0x20000000
|
|
80071ac: 687b ldr r3, [r7, #4]
|
|
80071ae: 60da str r2, [r3, #12]
|
|
80071b0: e00b b.n 80071ca <USB_SetCurrentMode+0x44>
|
|
}
|
|
else if (mode == USB_DEVICE_MODE)
|
|
80071b2: 78fb ldrb r3, [r7, #3]
|
|
80071b4: 2b00 cmp r3, #0
|
|
80071b6: d106 bne.n 80071c6 <USB_SetCurrentMode+0x40>
|
|
{
|
|
USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
|
|
80071b8: 687b ldr r3, [r7, #4]
|
|
80071ba: 68db ldr r3, [r3, #12]
|
|
80071bc: f043 4280 orr.w r2, r3, #1073741824 ; 0x40000000
|
|
80071c0: 687b ldr r3, [r7, #4]
|
|
80071c2: 60da str r2, [r3, #12]
|
|
80071c4: e001 b.n 80071ca <USB_SetCurrentMode+0x44>
|
|
}
|
|
else
|
|
{
|
|
return HAL_ERROR;
|
|
80071c6: 2301 movs r3, #1
|
|
80071c8: e003 b.n 80071d2 <USB_SetCurrentMode+0x4c>
|
|
}
|
|
HAL_Delay(50U);
|
|
80071ca: 2032 movs r0, #50 ; 0x32
|
|
80071cc: f7fb f8b2 bl 8002334 <HAL_Delay>
|
|
|
|
return HAL_OK;
|
|
80071d0: 2300 movs r3, #0
|
|
}
|
|
80071d2: 4618 mov r0, r3
|
|
80071d4: 3708 adds r7, #8
|
|
80071d6: 46bd mov sp, r7
|
|
80071d8: bd80 pop {r7, pc}
|
|
...
|
|
|
|
080071dc <USB_FlushTxFifo>:
|
|
* This parameter can be a value from 1 to 15
|
|
15 means Flush all Tx FIFOs
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
|
|
{
|
|
80071dc: b480 push {r7}
|
|
80071de: b085 sub sp, #20
|
|
80071e0: af00 add r7, sp, #0
|
|
80071e2: 6078 str r0, [r7, #4]
|
|
80071e4: 6039 str r1, [r7, #0]
|
|
uint32_t count = 0U;
|
|
80071e6: 2300 movs r3, #0
|
|
80071e8: 60fb str r3, [r7, #12]
|
|
|
|
USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6));
|
|
80071ea: 683b ldr r3, [r7, #0]
|
|
80071ec: 019b lsls r3, r3, #6
|
|
80071ee: f043 0220 orr.w r2, r3, #32
|
|
80071f2: 687b ldr r3, [r7, #4]
|
|
80071f4: 611a str r2, [r3, #16]
|
|
|
|
do
|
|
{
|
|
if (++count > 200000U)
|
|
80071f6: 68fb ldr r3, [r7, #12]
|
|
80071f8: 3301 adds r3, #1
|
|
80071fa: 60fb str r3, [r7, #12]
|
|
80071fc: 68fb ldr r3, [r7, #12]
|
|
80071fe: 4a09 ldr r2, [pc, #36] ; (8007224 <USB_FlushTxFifo+0x48>)
|
|
8007200: 4293 cmp r3, r2
|
|
8007202: d901 bls.n 8007208 <USB_FlushTxFifo+0x2c>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8007204: 2303 movs r3, #3
|
|
8007206: e006 b.n 8007216 <USB_FlushTxFifo+0x3a>
|
|
}
|
|
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
|
|
8007208: 687b ldr r3, [r7, #4]
|
|
800720a: 691b ldr r3, [r3, #16]
|
|
800720c: f003 0320 and.w r3, r3, #32
|
|
8007210: 2b20 cmp r3, #32
|
|
8007212: d0f0 beq.n 80071f6 <USB_FlushTxFifo+0x1a>
|
|
|
|
return HAL_OK;
|
|
8007214: 2300 movs r3, #0
|
|
}
|
|
8007216: 4618 mov r0, r3
|
|
8007218: 3714 adds r7, #20
|
|
800721a: 46bd mov sp, r7
|
|
800721c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007220: 4770 bx lr
|
|
8007222: bf00 nop
|
|
8007224: 00030d40 .word 0x00030d40
|
|
|
|
08007228 <USB_FlushRxFifo>:
|
|
* @brief USB_FlushRxFifo : Flush Rx FIFO
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
8007228: b480 push {r7}
|
|
800722a: b085 sub sp, #20
|
|
800722c: af00 add r7, sp, #0
|
|
800722e: 6078 str r0, [r7, #4]
|
|
uint32_t count = 0;
|
|
8007230: 2300 movs r3, #0
|
|
8007232: 60fb str r3, [r7, #12]
|
|
|
|
USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
|
|
8007234: 687b ldr r3, [r7, #4]
|
|
8007236: 2210 movs r2, #16
|
|
8007238: 611a str r2, [r3, #16]
|
|
|
|
do
|
|
{
|
|
if (++count > 200000U)
|
|
800723a: 68fb ldr r3, [r7, #12]
|
|
800723c: 3301 adds r3, #1
|
|
800723e: 60fb str r3, [r7, #12]
|
|
8007240: 68fb ldr r3, [r7, #12]
|
|
8007242: 4a09 ldr r2, [pc, #36] ; (8007268 <USB_FlushRxFifo+0x40>)
|
|
8007244: 4293 cmp r3, r2
|
|
8007246: d901 bls.n 800724c <USB_FlushRxFifo+0x24>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8007248: 2303 movs r3, #3
|
|
800724a: e006 b.n 800725a <USB_FlushRxFifo+0x32>
|
|
}
|
|
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
|
|
800724c: 687b ldr r3, [r7, #4]
|
|
800724e: 691b ldr r3, [r3, #16]
|
|
8007250: f003 0310 and.w r3, r3, #16
|
|
8007254: 2b10 cmp r3, #16
|
|
8007256: d0f0 beq.n 800723a <USB_FlushRxFifo+0x12>
|
|
|
|
return HAL_OK;
|
|
8007258: 2300 movs r3, #0
|
|
}
|
|
800725a: 4618 mov r0, r3
|
|
800725c: 3714 adds r7, #20
|
|
800725e: 46bd mov sp, r7
|
|
8007260: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007264: 4770 bx lr
|
|
8007266: bf00 nop
|
|
8007268: 00030d40 .word 0x00030d40
|
|
|
|
0800726c <USB_WritePacket>:
|
|
* 1 : DMA feature used
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
|
|
uint8_t ch_ep_num, uint16_t len, uint8_t dma)
|
|
{
|
|
800726c: b480 push {r7}
|
|
800726e: b089 sub sp, #36 ; 0x24
|
|
8007270: af00 add r7, sp, #0
|
|
8007272: 60f8 str r0, [r7, #12]
|
|
8007274: 60b9 str r1, [r7, #8]
|
|
8007276: 4611 mov r1, r2
|
|
8007278: 461a mov r2, r3
|
|
800727a: 460b mov r3, r1
|
|
800727c: 71fb strb r3, [r7, #7]
|
|
800727e: 4613 mov r3, r2
|
|
8007280: 80bb strh r3, [r7, #4]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8007282: 68fb ldr r3, [r7, #12]
|
|
8007284: 617b str r3, [r7, #20]
|
|
uint32_t *pSrc = (uint32_t *)src;
|
|
8007286: 68bb ldr r3, [r7, #8]
|
|
8007288: 61fb str r3, [r7, #28]
|
|
uint32_t count32b, i;
|
|
|
|
if (dma == 0U)
|
|
800728a: f897 3028 ldrb.w r3, [r7, #40] ; 0x28
|
|
800728e: 2b00 cmp r3, #0
|
|
8007290: d11a bne.n 80072c8 <USB_WritePacket+0x5c>
|
|
{
|
|
count32b = ((uint32_t)len + 3U) / 4U;
|
|
8007292: 88bb ldrh r3, [r7, #4]
|
|
8007294: 3303 adds r3, #3
|
|
8007296: 089b lsrs r3, r3, #2
|
|
8007298: 613b str r3, [r7, #16]
|
|
for (i = 0U; i < count32b; i++)
|
|
800729a: 2300 movs r3, #0
|
|
800729c: 61bb str r3, [r7, #24]
|
|
800729e: e00f b.n 80072c0 <USB_WritePacket+0x54>
|
|
{
|
|
USBx_DFIFO((uint32_t)ch_ep_num) = __UNALIGNED_UINT32_READ(pSrc);
|
|
80072a0: 79fb ldrb r3, [r7, #7]
|
|
80072a2: 031a lsls r2, r3, #12
|
|
80072a4: 697b ldr r3, [r7, #20]
|
|
80072a6: 4413 add r3, r2
|
|
80072a8: f503 5380 add.w r3, r3, #4096 ; 0x1000
|
|
80072ac: 461a mov r2, r3
|
|
80072ae: 69fb ldr r3, [r7, #28]
|
|
80072b0: 681b ldr r3, [r3, #0]
|
|
80072b2: 6013 str r3, [r2, #0]
|
|
pSrc++;
|
|
80072b4: 69fb ldr r3, [r7, #28]
|
|
80072b6: 3304 adds r3, #4
|
|
80072b8: 61fb str r3, [r7, #28]
|
|
for (i = 0U; i < count32b; i++)
|
|
80072ba: 69bb ldr r3, [r7, #24]
|
|
80072bc: 3301 adds r3, #1
|
|
80072be: 61bb str r3, [r7, #24]
|
|
80072c0: 69ba ldr r2, [r7, #24]
|
|
80072c2: 693b ldr r3, [r7, #16]
|
|
80072c4: 429a cmp r2, r3
|
|
80072c6: d3eb bcc.n 80072a0 <USB_WritePacket+0x34>
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
80072c8: 2300 movs r3, #0
|
|
}
|
|
80072ca: 4618 mov r0, r3
|
|
80072cc: 3724 adds r7, #36 ; 0x24
|
|
80072ce: 46bd mov sp, r7
|
|
80072d0: f85d 7b04 ldr.w r7, [sp], #4
|
|
80072d4: 4770 bx lr
|
|
|
|
080072d6 <USB_ReadPacket>:
|
|
* @param dest source pointer
|
|
* @param len Number of bytes to read
|
|
* @retval pointer to destination buffer
|
|
*/
|
|
void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
|
|
{
|
|
80072d6: b480 push {r7}
|
|
80072d8: b089 sub sp, #36 ; 0x24
|
|
80072da: af00 add r7, sp, #0
|
|
80072dc: 60f8 str r0, [r7, #12]
|
|
80072de: 60b9 str r1, [r7, #8]
|
|
80072e0: 4613 mov r3, r2
|
|
80072e2: 80fb strh r3, [r7, #6]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
80072e4: 68fb ldr r3, [r7, #12]
|
|
80072e6: 617b str r3, [r7, #20]
|
|
uint32_t *pDest = (uint32_t *)dest;
|
|
80072e8: 68bb ldr r3, [r7, #8]
|
|
80072ea: 61fb str r3, [r7, #28]
|
|
uint32_t i;
|
|
uint32_t count32b = ((uint32_t)len + 3U) / 4U;
|
|
80072ec: 88fb ldrh r3, [r7, #6]
|
|
80072ee: 3303 adds r3, #3
|
|
80072f0: 089b lsrs r3, r3, #2
|
|
80072f2: 613b str r3, [r7, #16]
|
|
|
|
for (i = 0U; i < count32b; i++)
|
|
80072f4: 2300 movs r3, #0
|
|
80072f6: 61bb str r3, [r7, #24]
|
|
80072f8: e00b b.n 8007312 <USB_ReadPacket+0x3c>
|
|
{
|
|
__UNALIGNED_UINT32_WRITE(pDest, USBx_DFIFO(0U));
|
|
80072fa: 697b ldr r3, [r7, #20]
|
|
80072fc: f503 5380 add.w r3, r3, #4096 ; 0x1000
|
|
8007300: 681a ldr r2, [r3, #0]
|
|
8007302: 69fb ldr r3, [r7, #28]
|
|
8007304: 601a str r2, [r3, #0]
|
|
pDest++;
|
|
8007306: 69fb ldr r3, [r7, #28]
|
|
8007308: 3304 adds r3, #4
|
|
800730a: 61fb str r3, [r7, #28]
|
|
for (i = 0U; i < count32b; i++)
|
|
800730c: 69bb ldr r3, [r7, #24]
|
|
800730e: 3301 adds r3, #1
|
|
8007310: 61bb str r3, [r7, #24]
|
|
8007312: 69ba ldr r2, [r7, #24]
|
|
8007314: 693b ldr r3, [r7, #16]
|
|
8007316: 429a cmp r2, r3
|
|
8007318: d3ef bcc.n 80072fa <USB_ReadPacket+0x24>
|
|
}
|
|
|
|
return ((void *)pDest);
|
|
800731a: 69fb ldr r3, [r7, #28]
|
|
}
|
|
800731c: 4618 mov r0, r3
|
|
800731e: 3724 adds r7, #36 ; 0x24
|
|
8007320: 46bd mov sp, r7
|
|
8007322: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007326: 4770 bx lr
|
|
|
|
08007328 <USB_ReadInterrupts>:
|
|
* @brief USB_ReadInterrupts: return the global USB interrupt status
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
8007328: b480 push {r7}
|
|
800732a: b085 sub sp, #20
|
|
800732c: af00 add r7, sp, #0
|
|
800732e: 6078 str r0, [r7, #4]
|
|
uint32_t tmpreg;
|
|
|
|
tmpreg = USBx->GINTSTS;
|
|
8007330: 687b ldr r3, [r7, #4]
|
|
8007332: 695b ldr r3, [r3, #20]
|
|
8007334: 60fb str r3, [r7, #12]
|
|
tmpreg &= USBx->GINTMSK;
|
|
8007336: 687b ldr r3, [r7, #4]
|
|
8007338: 699b ldr r3, [r3, #24]
|
|
800733a: 68fa ldr r2, [r7, #12]
|
|
800733c: 4013 ands r3, r2
|
|
800733e: 60fb str r3, [r7, #12]
|
|
|
|
return tmpreg;
|
|
8007340: 68fb ldr r3, [r7, #12]
|
|
}
|
|
8007342: 4618 mov r0, r3
|
|
8007344: 3714 adds r7, #20
|
|
8007346: 46bd mov sp, r7
|
|
8007348: f85d 7b04 ldr.w r7, [sp], #4
|
|
800734c: 4770 bx lr
|
|
|
|
0800734e <USB_GetMode>:
|
|
* This parameter can be one of these values:
|
|
* 0 : Host
|
|
* 1 : Device
|
|
*/
|
|
uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
800734e: b480 push {r7}
|
|
8007350: b083 sub sp, #12
|
|
8007352: af00 add r7, sp, #0
|
|
8007354: 6078 str r0, [r7, #4]
|
|
return ((USBx->GINTSTS) & 0x1U);
|
|
8007356: 687b ldr r3, [r7, #4]
|
|
8007358: 695b ldr r3, [r3, #20]
|
|
800735a: f003 0301 and.w r3, r3, #1
|
|
}
|
|
800735e: 4618 mov r0, r3
|
|
8007360: 370c adds r7, #12
|
|
8007362: 46bd mov sp, r7
|
|
8007364: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007368: 4770 bx lr
|
|
...
|
|
|
|
0800736c <USB_CoreReset>:
|
|
* @brief Reset the USB Core (needed after USB clock settings change)
|
|
* @param USBx Selected device
|
|
* @retval HAL status
|
|
*/
|
|
static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
800736c: b480 push {r7}
|
|
800736e: b085 sub sp, #20
|
|
8007370: af00 add r7, sp, #0
|
|
8007372: 6078 str r0, [r7, #4]
|
|
uint32_t count = 0U;
|
|
8007374: 2300 movs r3, #0
|
|
8007376: 60fb str r3, [r7, #12]
|
|
|
|
/* Wait for AHB master IDLE state. */
|
|
do
|
|
{
|
|
if (++count > 200000U)
|
|
8007378: 68fb ldr r3, [r7, #12]
|
|
800737a: 3301 adds r3, #1
|
|
800737c: 60fb str r3, [r7, #12]
|
|
800737e: 68fb ldr r3, [r7, #12]
|
|
8007380: 4a13 ldr r2, [pc, #76] ; (80073d0 <USB_CoreReset+0x64>)
|
|
8007382: 4293 cmp r3, r2
|
|
8007384: d901 bls.n 800738a <USB_CoreReset+0x1e>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
8007386: 2303 movs r3, #3
|
|
8007388: e01b b.n 80073c2 <USB_CoreReset+0x56>
|
|
}
|
|
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
|
|
800738a: 687b ldr r3, [r7, #4]
|
|
800738c: 691b ldr r3, [r3, #16]
|
|
800738e: 2b00 cmp r3, #0
|
|
8007390: daf2 bge.n 8007378 <USB_CoreReset+0xc>
|
|
|
|
/* Core Soft Reset */
|
|
count = 0U;
|
|
8007392: 2300 movs r3, #0
|
|
8007394: 60fb str r3, [r7, #12]
|
|
USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
|
|
8007396: 687b ldr r3, [r7, #4]
|
|
8007398: 691b ldr r3, [r3, #16]
|
|
800739a: f043 0201 orr.w r2, r3, #1
|
|
800739e: 687b ldr r3, [r7, #4]
|
|
80073a0: 611a str r2, [r3, #16]
|
|
|
|
do
|
|
{
|
|
if (++count > 200000U)
|
|
80073a2: 68fb ldr r3, [r7, #12]
|
|
80073a4: 3301 adds r3, #1
|
|
80073a6: 60fb str r3, [r7, #12]
|
|
80073a8: 68fb ldr r3, [r7, #12]
|
|
80073aa: 4a09 ldr r2, [pc, #36] ; (80073d0 <USB_CoreReset+0x64>)
|
|
80073ac: 4293 cmp r3, r2
|
|
80073ae: d901 bls.n 80073b4 <USB_CoreReset+0x48>
|
|
{
|
|
return HAL_TIMEOUT;
|
|
80073b0: 2303 movs r3, #3
|
|
80073b2: e006 b.n 80073c2 <USB_CoreReset+0x56>
|
|
}
|
|
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
|
|
80073b4: 687b ldr r3, [r7, #4]
|
|
80073b6: 691b ldr r3, [r3, #16]
|
|
80073b8: f003 0301 and.w r3, r3, #1
|
|
80073bc: 2b01 cmp r3, #1
|
|
80073be: d0f0 beq.n 80073a2 <USB_CoreReset+0x36>
|
|
|
|
return HAL_OK;
|
|
80073c0: 2300 movs r3, #0
|
|
}
|
|
80073c2: 4618 mov r0, r3
|
|
80073c4: 3714 adds r7, #20
|
|
80073c6: 46bd mov sp, r7
|
|
80073c8: f85d 7b04 ldr.w r7, [sp], #4
|
|
80073cc: 4770 bx lr
|
|
80073ce: bf00 nop
|
|
80073d0: 00030d40 .word 0x00030d40
|
|
|
|
080073d4 <USB_HostInit>:
|
|
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
|
|
* the configuration information for the specified USBx peripheral.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
|
|
{
|
|
80073d4: b084 sub sp, #16
|
|
80073d6: b580 push {r7, lr}
|
|
80073d8: b084 sub sp, #16
|
|
80073da: af00 add r7, sp, #0
|
|
80073dc: 6078 str r0, [r7, #4]
|
|
80073de: f107 001c add.w r0, r7, #28
|
|
80073e2: e880 000e stmia.w r0, {r1, r2, r3}
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
80073e6: 687b ldr r3, [r7, #4]
|
|
80073e8: 60bb str r3, [r7, #8]
|
|
uint32_t i;
|
|
|
|
/* Restart the Phy Clock */
|
|
USBx_PCGCCTL = 0U;
|
|
80073ea: 68bb ldr r3, [r7, #8]
|
|
80073ec: f503 6360 add.w r3, r3, #3584 ; 0xe00
|
|
80073f0: 461a mov r2, r3
|
|
80073f2: 2300 movs r3, #0
|
|
80073f4: 6013 str r3, [r2, #0]
|
|
#else
|
|
/*
|
|
* Disable HW VBUS sensing. VBUS is internally considered to be always
|
|
* at VBUS-Valid level (5V).
|
|
*/
|
|
USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
|
|
80073f6: 687b ldr r3, [r7, #4]
|
|
80073f8: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
80073fa: f443 1200 orr.w r2, r3, #2097152 ; 0x200000
|
|
80073fe: 687b ldr r3, [r7, #4]
|
|
8007400: 639a str r2, [r3, #56] ; 0x38
|
|
USBx->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
|
|
8007402: 687b ldr r3, [r7, #4]
|
|
8007404: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8007406: f423 2200 bic.w r2, r3, #524288 ; 0x80000
|
|
800740a: 687b ldr r3, [r7, #4]
|
|
800740c: 639a str r2, [r3, #56] ; 0x38
|
|
USBx->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
|
|
800740e: 687b ldr r3, [r7, #4]
|
|
8007410: 6b9b ldr r3, [r3, #56] ; 0x38
|
|
8007412: f423 2280 bic.w r2, r3, #262144 ; 0x40000
|
|
8007416: 687b ldr r3, [r7, #4]
|
|
8007418: 639a str r2, [r3, #56] ; 0x38
|
|
#if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
|
|
/* Disable Battery chargin detector */
|
|
USBx->GCCFG &= ~(USB_OTG_GCCFG_BCDEN);
|
|
#endif /* defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */
|
|
|
|
if ((USBx->CID & (0x1U << 8)) != 0U)
|
|
800741a: 687b ldr r3, [r7, #4]
|
|
800741c: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
800741e: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8007422: 2b00 cmp r3, #0
|
|
8007424: d018 beq.n 8007458 <USB_HostInit+0x84>
|
|
{
|
|
if (cfg.speed == USBH_FSLS_SPEED)
|
|
8007426: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8007428: 2b01 cmp r3, #1
|
|
800742a: d10a bne.n 8007442 <USB_HostInit+0x6e>
|
|
{
|
|
/* Force Device Enumeration to FS/LS mode only */
|
|
USBx_HOST->HCFG |= USB_OTG_HCFG_FSLSS;
|
|
800742c: 68bb ldr r3, [r7, #8]
|
|
800742e: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007432: 681b ldr r3, [r3, #0]
|
|
8007434: 68ba ldr r2, [r7, #8]
|
|
8007436: f502 6280 add.w r2, r2, #1024 ; 0x400
|
|
800743a: f043 0304 orr.w r3, r3, #4
|
|
800743e: 6013 str r3, [r2, #0]
|
|
8007440: e014 b.n 800746c <USB_HostInit+0x98>
|
|
}
|
|
else
|
|
{
|
|
/* Set default Max speed support */
|
|
USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
|
|
8007442: 68bb ldr r3, [r7, #8]
|
|
8007444: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007448: 681b ldr r3, [r3, #0]
|
|
800744a: 68ba ldr r2, [r7, #8]
|
|
800744c: f502 6280 add.w r2, r2, #1024 ; 0x400
|
|
8007450: f023 0304 bic.w r3, r3, #4
|
|
8007454: 6013 str r3, [r2, #0]
|
|
8007456: e009 b.n 800746c <USB_HostInit+0x98>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* Set default Max speed support */
|
|
USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
|
|
8007458: 68bb ldr r3, [r7, #8]
|
|
800745a: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
800745e: 681b ldr r3, [r3, #0]
|
|
8007460: 68ba ldr r2, [r7, #8]
|
|
8007462: f502 6280 add.w r2, r2, #1024 ; 0x400
|
|
8007466: f023 0304 bic.w r3, r3, #4
|
|
800746a: 6013 str r3, [r2, #0]
|
|
}
|
|
|
|
/* Make sure the FIFOs are flushed. */
|
|
(void)USB_FlushTxFifo(USBx, 0x10U); /* all Tx FIFOs */
|
|
800746c: 2110 movs r1, #16
|
|
800746e: 6878 ldr r0, [r7, #4]
|
|
8007470: f7ff feb4 bl 80071dc <USB_FlushTxFifo>
|
|
(void)USB_FlushRxFifo(USBx);
|
|
8007474: 6878 ldr r0, [r7, #4]
|
|
8007476: f7ff fed7 bl 8007228 <USB_FlushRxFifo>
|
|
|
|
/* Clear all pending HC Interrupts */
|
|
for (i = 0U; i < cfg.Host_channels; i++)
|
|
800747a: 2300 movs r3, #0
|
|
800747c: 60fb str r3, [r7, #12]
|
|
800747e: e015 b.n 80074ac <USB_HostInit+0xd8>
|
|
{
|
|
USBx_HC(i)->HCINT = 0xFFFFFFFFU;
|
|
8007480: 68fb ldr r3, [r7, #12]
|
|
8007482: 015a lsls r2, r3, #5
|
|
8007484: 68bb ldr r3, [r7, #8]
|
|
8007486: 4413 add r3, r2
|
|
8007488: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800748c: 461a mov r2, r3
|
|
800748e: f04f 33ff mov.w r3, #4294967295
|
|
8007492: 6093 str r3, [r2, #8]
|
|
USBx_HC(i)->HCINTMSK = 0U;
|
|
8007494: 68fb ldr r3, [r7, #12]
|
|
8007496: 015a lsls r2, r3, #5
|
|
8007498: 68bb ldr r3, [r7, #8]
|
|
800749a: 4413 add r3, r2
|
|
800749c: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80074a0: 461a mov r2, r3
|
|
80074a2: 2300 movs r3, #0
|
|
80074a4: 60d3 str r3, [r2, #12]
|
|
for (i = 0U; i < cfg.Host_channels; i++)
|
|
80074a6: 68fb ldr r3, [r7, #12]
|
|
80074a8: 3301 adds r3, #1
|
|
80074aa: 60fb str r3, [r7, #12]
|
|
80074ac: 6a3b ldr r3, [r7, #32]
|
|
80074ae: 68fa ldr r2, [r7, #12]
|
|
80074b0: 429a cmp r2, r3
|
|
80074b2: d3e5 bcc.n 8007480 <USB_HostInit+0xac>
|
|
}
|
|
|
|
/* Enable VBUS driving */
|
|
(void)USB_DriveVbus(USBx, 1U);
|
|
80074b4: 2101 movs r1, #1
|
|
80074b6: 6878 ldr r0, [r7, #4]
|
|
80074b8: f000 f8ac bl 8007614 <USB_DriveVbus>
|
|
|
|
HAL_Delay(200U);
|
|
80074bc: 20c8 movs r0, #200 ; 0xc8
|
|
80074be: f7fa ff39 bl 8002334 <HAL_Delay>
|
|
|
|
/* Disable all interrupts. */
|
|
USBx->GINTMSK = 0U;
|
|
80074c2: 687b ldr r3, [r7, #4]
|
|
80074c4: 2200 movs r2, #0
|
|
80074c6: 619a str r2, [r3, #24]
|
|
|
|
/* Clear any pending interrupts */
|
|
USBx->GINTSTS = 0xFFFFFFFFU;
|
|
80074c8: 687b ldr r3, [r7, #4]
|
|
80074ca: f04f 32ff mov.w r2, #4294967295
|
|
80074ce: 615a str r2, [r3, #20]
|
|
|
|
if ((USBx->CID & (0x1U << 8)) != 0U)
|
|
80074d0: 687b ldr r3, [r7, #4]
|
|
80074d2: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
80074d4: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
80074d8: 2b00 cmp r3, #0
|
|
80074da: d00b beq.n 80074f4 <USB_HostInit+0x120>
|
|
{
|
|
/* set Rx FIFO size */
|
|
USBx->GRXFSIZ = 0x200U;
|
|
80074dc: 687b ldr r3, [r7, #4]
|
|
80074de: f44f 7200 mov.w r2, #512 ; 0x200
|
|
80074e2: 625a str r2, [r3, #36] ; 0x24
|
|
USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t)(((0x100U << 16) & USB_OTG_NPTXFD) | 0x200U);
|
|
80074e4: 687b ldr r3, [r7, #4]
|
|
80074e6: 4a14 ldr r2, [pc, #80] ; (8007538 <USB_HostInit+0x164>)
|
|
80074e8: 629a str r2, [r3, #40] ; 0x28
|
|
USBx->HPTXFSIZ = (uint32_t)(((0xE0U << 16) & USB_OTG_HPTXFSIZ_PTXFD) | 0x300U);
|
|
80074ea: 687b ldr r3, [r7, #4]
|
|
80074ec: 4a13 ldr r2, [pc, #76] ; (800753c <USB_HostInit+0x168>)
|
|
80074ee: f8c3 2100 str.w r2, [r3, #256] ; 0x100
|
|
80074f2: e009 b.n 8007508 <USB_HostInit+0x134>
|
|
}
|
|
else
|
|
{
|
|
/* set Rx FIFO size */
|
|
USBx->GRXFSIZ = 0x80U;
|
|
80074f4: 687b ldr r3, [r7, #4]
|
|
80074f6: 2280 movs r2, #128 ; 0x80
|
|
80074f8: 625a str r2, [r3, #36] ; 0x24
|
|
USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t)(((0x60U << 16) & USB_OTG_NPTXFD) | 0x80U);
|
|
80074fa: 687b ldr r3, [r7, #4]
|
|
80074fc: 4a10 ldr r2, [pc, #64] ; (8007540 <USB_HostInit+0x16c>)
|
|
80074fe: 629a str r2, [r3, #40] ; 0x28
|
|
USBx->HPTXFSIZ = (uint32_t)(((0x40U << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0U);
|
|
8007500: 687b ldr r3, [r7, #4]
|
|
8007502: 4a10 ldr r2, [pc, #64] ; (8007544 <USB_HostInit+0x170>)
|
|
8007504: f8c3 2100 str.w r2, [r3, #256] ; 0x100
|
|
}
|
|
|
|
/* Enable the common interrupts */
|
|
if (cfg.dma_enable == 0U)
|
|
8007508: 6abb ldr r3, [r7, #40] ; 0x28
|
|
800750a: 2b00 cmp r3, #0
|
|
800750c: d105 bne.n 800751a <USB_HostInit+0x146>
|
|
{
|
|
USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
|
|
800750e: 687b ldr r3, [r7, #4]
|
|
8007510: 699b ldr r3, [r3, #24]
|
|
8007512: f043 0210 orr.w r2, r3, #16
|
|
8007516: 687b ldr r3, [r7, #4]
|
|
8007518: 619a str r2, [r3, #24]
|
|
}
|
|
|
|
/* Enable interrupts matching to the Host mode ONLY */
|
|
USBx->GINTMSK |= (USB_OTG_GINTMSK_PRTIM | USB_OTG_GINTMSK_HCIM | \
|
|
800751a: 687b ldr r3, [r7, #4]
|
|
800751c: 699a ldr r2, [r3, #24]
|
|
800751e: 4b0a ldr r3, [pc, #40] ; (8007548 <USB_HostInit+0x174>)
|
|
8007520: 4313 orrs r3, r2
|
|
8007522: 687a ldr r2, [r7, #4]
|
|
8007524: 6193 str r3, [r2, #24]
|
|
USB_OTG_GINTMSK_SOFM | USB_OTG_GINTSTS_DISCINT | \
|
|
USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM);
|
|
|
|
return HAL_OK;
|
|
8007526: 2300 movs r3, #0
|
|
}
|
|
8007528: 4618 mov r0, r3
|
|
800752a: 3710 adds r7, #16
|
|
800752c: 46bd mov sp, r7
|
|
800752e: e8bd 4080 ldmia.w sp!, {r7, lr}
|
|
8007532: b004 add sp, #16
|
|
8007534: 4770 bx lr
|
|
8007536: bf00 nop
|
|
8007538: 01000200 .word 0x01000200
|
|
800753c: 00e00300 .word 0x00e00300
|
|
8007540: 00600080 .word 0x00600080
|
|
8007544: 004000e0 .word 0x004000e0
|
|
8007548: a3200008 .word 0xa3200008
|
|
|
|
0800754c <USB_InitFSLSPClkSel>:
|
|
* HCFG_48_MHZ : Full Speed 48 MHz Clock
|
|
* HCFG_6_MHZ : Low Speed 6 MHz Clock
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq)
|
|
{
|
|
800754c: b480 push {r7}
|
|
800754e: b085 sub sp, #20
|
|
8007550: af00 add r7, sp, #0
|
|
8007552: 6078 str r0, [r7, #4]
|
|
8007554: 460b mov r3, r1
|
|
8007556: 70fb strb r3, [r7, #3]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8007558: 687b ldr r3, [r7, #4]
|
|
800755a: 60fb str r3, [r7, #12]
|
|
|
|
USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
|
|
800755c: 68fb ldr r3, [r7, #12]
|
|
800755e: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007562: 681b ldr r3, [r3, #0]
|
|
8007564: 68fa ldr r2, [r7, #12]
|
|
8007566: f502 6280 add.w r2, r2, #1024 ; 0x400
|
|
800756a: f023 0303 bic.w r3, r3, #3
|
|
800756e: 6013 str r3, [r2, #0]
|
|
USBx_HOST->HCFG |= (uint32_t)freq & USB_OTG_HCFG_FSLSPCS;
|
|
8007570: 68fb ldr r3, [r7, #12]
|
|
8007572: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007576: 681a ldr r2, [r3, #0]
|
|
8007578: 78fb ldrb r3, [r7, #3]
|
|
800757a: f003 0303 and.w r3, r3, #3
|
|
800757e: 68f9 ldr r1, [r7, #12]
|
|
8007580: f501 6180 add.w r1, r1, #1024 ; 0x400
|
|
8007584: 4313 orrs r3, r2
|
|
8007586: 600b str r3, [r1, #0]
|
|
|
|
if (freq == HCFG_48_MHZ)
|
|
8007588: 78fb ldrb r3, [r7, #3]
|
|
800758a: 2b01 cmp r3, #1
|
|
800758c: d107 bne.n 800759e <USB_InitFSLSPClkSel+0x52>
|
|
{
|
|
USBx_HOST->HFIR = 48000U;
|
|
800758e: 68fb ldr r3, [r7, #12]
|
|
8007590: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007594: 461a mov r2, r3
|
|
8007596: f64b 3380 movw r3, #48000 ; 0xbb80
|
|
800759a: 6053 str r3, [r2, #4]
|
|
800759c: e009 b.n 80075b2 <USB_InitFSLSPClkSel+0x66>
|
|
}
|
|
else if (freq == HCFG_6_MHZ)
|
|
800759e: 78fb ldrb r3, [r7, #3]
|
|
80075a0: 2b02 cmp r3, #2
|
|
80075a2: d106 bne.n 80075b2 <USB_InitFSLSPClkSel+0x66>
|
|
{
|
|
USBx_HOST->HFIR = 6000U;
|
|
80075a4: 68fb ldr r3, [r7, #12]
|
|
80075a6: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80075aa: 461a mov r2, r3
|
|
80075ac: f241 7370 movw r3, #6000 ; 0x1770
|
|
80075b0: 6053 str r3, [r2, #4]
|
|
else
|
|
{
|
|
/* ... */
|
|
}
|
|
|
|
return HAL_OK;
|
|
80075b2: 2300 movs r3, #0
|
|
}
|
|
80075b4: 4618 mov r0, r3
|
|
80075b6: 3714 adds r7, #20
|
|
80075b8: 46bd mov sp, r7
|
|
80075ba: f85d 7b04 ldr.w r7, [sp], #4
|
|
80075be: 4770 bx lr
|
|
|
|
080075c0 <USB_ResetPort>:
|
|
* @retval HAL status
|
|
* @note (1)The application must wait at least 10 ms
|
|
* before clearing the reset bit.
|
|
*/
|
|
HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
80075c0: b580 push {r7, lr}
|
|
80075c2: b084 sub sp, #16
|
|
80075c4: af00 add r7, sp, #0
|
|
80075c6: 6078 str r0, [r7, #4]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
80075c8: 687b ldr r3, [r7, #4]
|
|
80075ca: 60fb str r3, [r7, #12]
|
|
|
|
__IO uint32_t hprt0 = 0U;
|
|
80075cc: 2300 movs r3, #0
|
|
80075ce: 60bb str r3, [r7, #8]
|
|
|
|
hprt0 = USBx_HPRT0;
|
|
80075d0: 68fb ldr r3, [r7, #12]
|
|
80075d2: f503 6388 add.w r3, r3, #1088 ; 0x440
|
|
80075d6: 681b ldr r3, [r3, #0]
|
|
80075d8: 60bb str r3, [r7, #8]
|
|
|
|
hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |
|
|
80075da: 68bb ldr r3, [r7, #8]
|
|
80075dc: f023 032e bic.w r3, r3, #46 ; 0x2e
|
|
80075e0: 60bb str r3, [r7, #8]
|
|
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
|
|
|
|
USBx_HPRT0 = (USB_OTG_HPRT_PRST | hprt0);
|
|
80075e2: 68bb ldr r3, [r7, #8]
|
|
80075e4: 68fa ldr r2, [r7, #12]
|
|
80075e6: f502 6288 add.w r2, r2, #1088 ; 0x440
|
|
80075ea: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
80075ee: 6013 str r3, [r2, #0]
|
|
HAL_Delay(100U); /* See Note #1 */
|
|
80075f0: 2064 movs r0, #100 ; 0x64
|
|
80075f2: f7fa fe9f bl 8002334 <HAL_Delay>
|
|
USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
|
|
80075f6: 68bb ldr r3, [r7, #8]
|
|
80075f8: 68fa ldr r2, [r7, #12]
|
|
80075fa: f502 6288 add.w r2, r2, #1088 ; 0x440
|
|
80075fe: f423 7380 bic.w r3, r3, #256 ; 0x100
|
|
8007602: 6013 str r3, [r2, #0]
|
|
HAL_Delay(10U);
|
|
8007604: 200a movs r0, #10
|
|
8007606: f7fa fe95 bl 8002334 <HAL_Delay>
|
|
|
|
return HAL_OK;
|
|
800760a: 2300 movs r3, #0
|
|
}
|
|
800760c: 4618 mov r0, r3
|
|
800760e: 3710 adds r7, #16
|
|
8007610: 46bd mov sp, r7
|
|
8007612: bd80 pop {r7, pc}
|
|
|
|
08007614 <USB_DriveVbus>:
|
|
* 0 : Deactivate VBUS
|
|
* 1 : Activate VBUS
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state)
|
|
{
|
|
8007614: b480 push {r7}
|
|
8007616: b085 sub sp, #20
|
|
8007618: af00 add r7, sp, #0
|
|
800761a: 6078 str r0, [r7, #4]
|
|
800761c: 460b mov r3, r1
|
|
800761e: 70fb strb r3, [r7, #3]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8007620: 687b ldr r3, [r7, #4]
|
|
8007622: 60fb str r3, [r7, #12]
|
|
__IO uint32_t hprt0 = 0U;
|
|
8007624: 2300 movs r3, #0
|
|
8007626: 60bb str r3, [r7, #8]
|
|
|
|
hprt0 = USBx_HPRT0;
|
|
8007628: 68fb ldr r3, [r7, #12]
|
|
800762a: f503 6388 add.w r3, r3, #1088 ; 0x440
|
|
800762e: 681b ldr r3, [r3, #0]
|
|
8007630: 60bb str r3, [r7, #8]
|
|
|
|
hprt0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |
|
|
8007632: 68bb ldr r3, [r7, #8]
|
|
8007634: f023 032e bic.w r3, r3, #46 ; 0x2e
|
|
8007638: 60bb str r3, [r7, #8]
|
|
USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG);
|
|
|
|
if (((hprt0 & USB_OTG_HPRT_PPWR) == 0U) && (state == 1U))
|
|
800763a: 68bb ldr r3, [r7, #8]
|
|
800763c: f403 5380 and.w r3, r3, #4096 ; 0x1000
|
|
8007640: 2b00 cmp r3, #0
|
|
8007642: d109 bne.n 8007658 <USB_DriveVbus+0x44>
|
|
8007644: 78fb ldrb r3, [r7, #3]
|
|
8007646: 2b01 cmp r3, #1
|
|
8007648: d106 bne.n 8007658 <USB_DriveVbus+0x44>
|
|
{
|
|
USBx_HPRT0 = (USB_OTG_HPRT_PPWR | hprt0);
|
|
800764a: 68bb ldr r3, [r7, #8]
|
|
800764c: 68fa ldr r2, [r7, #12]
|
|
800764e: f502 6288 add.w r2, r2, #1088 ; 0x440
|
|
8007652: f443 5380 orr.w r3, r3, #4096 ; 0x1000
|
|
8007656: 6013 str r3, [r2, #0]
|
|
}
|
|
if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0U))
|
|
8007658: 68bb ldr r3, [r7, #8]
|
|
800765a: f403 5380 and.w r3, r3, #4096 ; 0x1000
|
|
800765e: f5b3 5f80 cmp.w r3, #4096 ; 0x1000
|
|
8007662: d109 bne.n 8007678 <USB_DriveVbus+0x64>
|
|
8007664: 78fb ldrb r3, [r7, #3]
|
|
8007666: 2b00 cmp r3, #0
|
|
8007668: d106 bne.n 8007678 <USB_DriveVbus+0x64>
|
|
{
|
|
USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
|
|
800766a: 68bb ldr r3, [r7, #8]
|
|
800766c: 68fa ldr r2, [r7, #12]
|
|
800766e: f502 6288 add.w r2, r2, #1088 ; 0x440
|
|
8007672: f423 5380 bic.w r3, r3, #4096 ; 0x1000
|
|
8007676: 6013 str r3, [r2, #0]
|
|
}
|
|
return HAL_OK;
|
|
8007678: 2300 movs r3, #0
|
|
}
|
|
800767a: 4618 mov r0, r3
|
|
800767c: 3714 adds r7, #20
|
|
800767e: 46bd mov sp, r7
|
|
8007680: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007684: 4770 bx lr
|
|
|
|
08007686 <USB_GetHostSpeed>:
|
|
* @arg HCD_SPEED_HIGH: High speed mode
|
|
* @arg HCD_SPEED_FULL: Full speed mode
|
|
* @arg HCD_SPEED_LOW: Low speed mode
|
|
*/
|
|
uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
8007686: b480 push {r7}
|
|
8007688: b085 sub sp, #20
|
|
800768a: af00 add r7, sp, #0
|
|
800768c: 6078 str r0, [r7, #4]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
800768e: 687b ldr r3, [r7, #4]
|
|
8007690: 60fb str r3, [r7, #12]
|
|
__IO uint32_t hprt0 = 0U;
|
|
8007692: 2300 movs r3, #0
|
|
8007694: 60bb str r3, [r7, #8]
|
|
|
|
hprt0 = USBx_HPRT0;
|
|
8007696: 68fb ldr r3, [r7, #12]
|
|
8007698: f503 6388 add.w r3, r3, #1088 ; 0x440
|
|
800769c: 681b ldr r3, [r3, #0]
|
|
800769e: 60bb str r3, [r7, #8]
|
|
return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17);
|
|
80076a0: 68bb ldr r3, [r7, #8]
|
|
80076a2: 0c5b lsrs r3, r3, #17
|
|
80076a4: f003 0303 and.w r3, r3, #3
|
|
}
|
|
80076a8: 4618 mov r0, r3
|
|
80076aa: 3714 adds r7, #20
|
|
80076ac: 46bd mov sp, r7
|
|
80076ae: f85d 7b04 ldr.w r7, [sp], #4
|
|
80076b2: 4770 bx lr
|
|
|
|
080076b4 <USB_GetCurrentFrame>:
|
|
* @brief Return Host Current Frame number
|
|
* @param USBx Selected device
|
|
* @retval current frame number
|
|
*/
|
|
uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
80076b4: b480 push {r7}
|
|
80076b6: b085 sub sp, #20
|
|
80076b8: af00 add r7, sp, #0
|
|
80076ba: 6078 str r0, [r7, #4]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
80076bc: 687b ldr r3, [r7, #4]
|
|
80076be: 60fb str r3, [r7, #12]
|
|
|
|
return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
|
|
80076c0: 68fb ldr r3, [r7, #12]
|
|
80076c2: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
80076c6: 689b ldr r3, [r3, #8]
|
|
80076c8: b29b uxth r3, r3
|
|
}
|
|
80076ca: 4618 mov r0, r3
|
|
80076cc: 3714 adds r7, #20
|
|
80076ce: 46bd mov sp, r7
|
|
80076d0: f85d 7b04 ldr.w r7, [sp], #4
|
|
80076d4: 4770 bx lr
|
|
...
|
|
|
|
080076d8 <USB_HC_Init>:
|
|
* @retval HAL state
|
|
*/
|
|
HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
|
|
uint8_t epnum, uint8_t dev_address, uint8_t speed,
|
|
uint8_t ep_type, uint16_t mps)
|
|
{
|
|
80076d8: b480 push {r7}
|
|
80076da: b087 sub sp, #28
|
|
80076dc: af00 add r7, sp, #0
|
|
80076de: 6078 str r0, [r7, #4]
|
|
80076e0: 4608 mov r0, r1
|
|
80076e2: 4611 mov r1, r2
|
|
80076e4: 461a mov r2, r3
|
|
80076e6: 4603 mov r3, r0
|
|
80076e8: 70fb strb r3, [r7, #3]
|
|
80076ea: 460b mov r3, r1
|
|
80076ec: 70bb strb r3, [r7, #2]
|
|
80076ee: 4613 mov r3, r2
|
|
80076f0: 707b strb r3, [r7, #1]
|
|
HAL_StatusTypeDef ret = HAL_OK;
|
|
80076f2: 2300 movs r3, #0
|
|
80076f4: 75fb strb r3, [r7, #23]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
80076f6: 687b ldr r3, [r7, #4]
|
|
80076f8: 60bb str r3, [r7, #8]
|
|
uint32_t HCcharEpDir, HCcharLowSpeed;
|
|
|
|
/* Clear old interrupt conditions for this host channel. */
|
|
USBx_HC((uint32_t)ch_num)->HCINT = 0xFFFFFFFFU;
|
|
80076fa: 78fb ldrb r3, [r7, #3]
|
|
80076fc: 015a lsls r2, r3, #5
|
|
80076fe: 68bb ldr r3, [r7, #8]
|
|
8007700: 4413 add r3, r2
|
|
8007702: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007706: 461a mov r2, r3
|
|
8007708: f04f 33ff mov.w r3, #4294967295
|
|
800770c: 6093 str r3, [r2, #8]
|
|
|
|
/* Enable channel interrupts required for this transfer. */
|
|
switch (ep_type)
|
|
800770e: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
|
|
8007712: 2b03 cmp r3, #3
|
|
8007714: d87e bhi.n 8007814 <USB_HC_Init+0x13c>
|
|
8007716: a201 add r2, pc, #4 ; (adr r2, 800771c <USB_HC_Init+0x44>)
|
|
8007718: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
800771c: 0800772d .word 0x0800772d
|
|
8007720: 080077d7 .word 0x080077d7
|
|
8007724: 0800772d .word 0x0800772d
|
|
8007728: 08007799 .word 0x08007799
|
|
{
|
|
case EP_TYPE_CTRL:
|
|
case EP_TYPE_BULK:
|
|
USBx_HC((uint32_t)ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |
|
|
800772c: 78fb ldrb r3, [r7, #3]
|
|
800772e: 015a lsls r2, r3, #5
|
|
8007730: 68bb ldr r3, [r7, #8]
|
|
8007732: 4413 add r3, r2
|
|
8007734: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007738: 461a mov r2, r3
|
|
800773a: f240 439d movw r3, #1181 ; 0x49d
|
|
800773e: 60d3 str r3, [r2, #12]
|
|
USB_OTG_HCINTMSK_TXERRM |
|
|
USB_OTG_HCINTMSK_DTERRM |
|
|
USB_OTG_HCINTMSK_AHBERR |
|
|
USB_OTG_HCINTMSK_NAKM;
|
|
|
|
if ((epnum & 0x80U) == 0x80U)
|
|
8007740: f997 3002 ldrsb.w r3, [r7, #2]
|
|
8007744: 2b00 cmp r3, #0
|
|
8007746: da10 bge.n 800776a <USB_HC_Init+0x92>
|
|
{
|
|
USBx_HC((uint32_t)ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
|
|
8007748: 78fb ldrb r3, [r7, #3]
|
|
800774a: 015a lsls r2, r3, #5
|
|
800774c: 68bb ldr r3, [r7, #8]
|
|
800774e: 4413 add r3, r2
|
|
8007750: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007754: 68db ldr r3, [r3, #12]
|
|
8007756: 78fa ldrb r2, [r7, #3]
|
|
8007758: 0151 lsls r1, r2, #5
|
|
800775a: 68ba ldr r2, [r7, #8]
|
|
800775c: 440a add r2, r1
|
|
800775e: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007762: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
8007766: 60d3 str r3, [r2, #12]
|
|
if ((USBx->CID & (0x1U << 8)) != 0U)
|
|
{
|
|
USBx_HC((uint32_t)ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
|
|
}
|
|
}
|
|
break;
|
|
8007768: e057 b.n 800781a <USB_HC_Init+0x142>
|
|
if ((USBx->CID & (0x1U << 8)) != 0U)
|
|
800776a: 687b ldr r3, [r7, #4]
|
|
800776c: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
800776e: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8007772: 2b00 cmp r3, #0
|
|
8007774: d051 beq.n 800781a <USB_HC_Init+0x142>
|
|
USBx_HC((uint32_t)ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
|
|
8007776: 78fb ldrb r3, [r7, #3]
|
|
8007778: 015a lsls r2, r3, #5
|
|
800777a: 68bb ldr r3, [r7, #8]
|
|
800777c: 4413 add r3, r2
|
|
800777e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007782: 68db ldr r3, [r3, #12]
|
|
8007784: 78fa ldrb r2, [r7, #3]
|
|
8007786: 0151 lsls r1, r2, #5
|
|
8007788: 68ba ldr r2, [r7, #8]
|
|
800778a: 440a add r2, r1
|
|
800778c: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007790: f043 0360 orr.w r3, r3, #96 ; 0x60
|
|
8007794: 60d3 str r3, [r2, #12]
|
|
break;
|
|
8007796: e040 b.n 800781a <USB_HC_Init+0x142>
|
|
|
|
case EP_TYPE_INTR:
|
|
USBx_HC((uint32_t)ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |
|
|
8007798: 78fb ldrb r3, [r7, #3]
|
|
800779a: 015a lsls r2, r3, #5
|
|
800779c: 68bb ldr r3, [r7, #8]
|
|
800779e: 4413 add r3, r2
|
|
80077a0: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80077a4: 461a mov r2, r3
|
|
80077a6: f240 639d movw r3, #1693 ; 0x69d
|
|
80077aa: 60d3 str r3, [r2, #12]
|
|
USB_OTG_HCINTMSK_DTERRM |
|
|
USB_OTG_HCINTMSK_NAKM |
|
|
USB_OTG_HCINTMSK_AHBERR |
|
|
USB_OTG_HCINTMSK_FRMORM;
|
|
|
|
if ((epnum & 0x80U) == 0x80U)
|
|
80077ac: f997 3002 ldrsb.w r3, [r7, #2]
|
|
80077b0: 2b00 cmp r3, #0
|
|
80077b2: da34 bge.n 800781e <USB_HC_Init+0x146>
|
|
{
|
|
USBx_HC((uint32_t)ch_num)->HCINTMSK |= USB_OTG_HCINTMSK_BBERRM;
|
|
80077b4: 78fb ldrb r3, [r7, #3]
|
|
80077b6: 015a lsls r2, r3, #5
|
|
80077b8: 68bb ldr r3, [r7, #8]
|
|
80077ba: 4413 add r3, r2
|
|
80077bc: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80077c0: 68db ldr r3, [r3, #12]
|
|
80077c2: 78fa ldrb r2, [r7, #3]
|
|
80077c4: 0151 lsls r1, r2, #5
|
|
80077c6: 68ba ldr r2, [r7, #8]
|
|
80077c8: 440a add r2, r1
|
|
80077ca: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
80077ce: f443 7380 orr.w r3, r3, #256 ; 0x100
|
|
80077d2: 60d3 str r3, [r2, #12]
|
|
}
|
|
|
|
break;
|
|
80077d4: e023 b.n 800781e <USB_HC_Init+0x146>
|
|
|
|
case EP_TYPE_ISOC:
|
|
USBx_HC((uint32_t)ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |
|
|
80077d6: 78fb ldrb r3, [r7, #3]
|
|
80077d8: 015a lsls r2, r3, #5
|
|
80077da: 68bb ldr r3, [r7, #8]
|
|
80077dc: 4413 add r3, r2
|
|
80077de: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80077e2: 461a mov r2, r3
|
|
80077e4: f240 2325 movw r3, #549 ; 0x225
|
|
80077e8: 60d3 str r3, [r2, #12]
|
|
USB_OTG_HCINTMSK_ACKM |
|
|
USB_OTG_HCINTMSK_AHBERR |
|
|
USB_OTG_HCINTMSK_FRMORM;
|
|
|
|
if ((epnum & 0x80U) == 0x80U)
|
|
80077ea: f997 3002 ldrsb.w r3, [r7, #2]
|
|
80077ee: 2b00 cmp r3, #0
|
|
80077f0: da17 bge.n 8007822 <USB_HC_Init+0x14a>
|
|
{
|
|
USBx_HC((uint32_t)ch_num)->HCINTMSK |= (USB_OTG_HCINTMSK_TXERRM | USB_OTG_HCINTMSK_BBERRM);
|
|
80077f2: 78fb ldrb r3, [r7, #3]
|
|
80077f4: 015a lsls r2, r3, #5
|
|
80077f6: 68bb ldr r3, [r7, #8]
|
|
80077f8: 4413 add r3, r2
|
|
80077fa: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80077fe: 68db ldr r3, [r3, #12]
|
|
8007800: 78fa ldrb r2, [r7, #3]
|
|
8007802: 0151 lsls r1, r2, #5
|
|
8007804: 68ba ldr r2, [r7, #8]
|
|
8007806: 440a add r2, r1
|
|
8007808: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
800780c: f443 73c0 orr.w r3, r3, #384 ; 0x180
|
|
8007810: 60d3 str r3, [r2, #12]
|
|
}
|
|
break;
|
|
8007812: e006 b.n 8007822 <USB_HC_Init+0x14a>
|
|
|
|
default:
|
|
ret = HAL_ERROR;
|
|
8007814: 2301 movs r3, #1
|
|
8007816: 75fb strb r3, [r7, #23]
|
|
break;
|
|
8007818: e004 b.n 8007824 <USB_HC_Init+0x14c>
|
|
break;
|
|
800781a: bf00 nop
|
|
800781c: e002 b.n 8007824 <USB_HC_Init+0x14c>
|
|
break;
|
|
800781e: bf00 nop
|
|
8007820: e000 b.n 8007824 <USB_HC_Init+0x14c>
|
|
break;
|
|
8007822: bf00 nop
|
|
}
|
|
|
|
/* Enable the top level host channel interrupt. */
|
|
USBx_HOST->HAINTMSK |= 1UL << (ch_num & 0xFU);
|
|
8007824: 68bb ldr r3, [r7, #8]
|
|
8007826: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
800782a: 699a ldr r2, [r3, #24]
|
|
800782c: 78fb ldrb r3, [r7, #3]
|
|
800782e: f003 030f and.w r3, r3, #15
|
|
8007832: 2101 movs r1, #1
|
|
8007834: fa01 f303 lsl.w r3, r1, r3
|
|
8007838: 68b9 ldr r1, [r7, #8]
|
|
800783a: f501 6180 add.w r1, r1, #1024 ; 0x400
|
|
800783e: 4313 orrs r3, r2
|
|
8007840: 618b str r3, [r1, #24]
|
|
|
|
/* Make sure host channel interrupts are enabled. */
|
|
USBx->GINTMSK |= USB_OTG_GINTMSK_HCIM;
|
|
8007842: 687b ldr r3, [r7, #4]
|
|
8007844: 699b ldr r3, [r3, #24]
|
|
8007846: f043 7200 orr.w r2, r3, #33554432 ; 0x2000000
|
|
800784a: 687b ldr r3, [r7, #4]
|
|
800784c: 619a str r2, [r3, #24]
|
|
|
|
/* Program the HCCHAR register */
|
|
if ((epnum & 0x80U) == 0x80U)
|
|
800784e: f997 3002 ldrsb.w r3, [r7, #2]
|
|
8007852: 2b00 cmp r3, #0
|
|
8007854: da03 bge.n 800785e <USB_HC_Init+0x186>
|
|
{
|
|
HCcharEpDir = (0x1U << 15) & USB_OTG_HCCHAR_EPDIR;
|
|
8007856: f44f 4300 mov.w r3, #32768 ; 0x8000
|
|
800785a: 613b str r3, [r7, #16]
|
|
800785c: e001 b.n 8007862 <USB_HC_Init+0x18a>
|
|
}
|
|
else
|
|
{
|
|
HCcharEpDir = 0U;
|
|
800785e: 2300 movs r3, #0
|
|
8007860: 613b str r3, [r7, #16]
|
|
}
|
|
|
|
if (speed == HPRT0_PRTSPD_LOW_SPEED)
|
|
8007862: f897 3020 ldrb.w r3, [r7, #32]
|
|
8007866: 2b02 cmp r3, #2
|
|
8007868: d103 bne.n 8007872 <USB_HC_Init+0x19a>
|
|
{
|
|
HCcharLowSpeed = (0x1U << 17) & USB_OTG_HCCHAR_LSDEV;
|
|
800786a: f44f 3300 mov.w r3, #131072 ; 0x20000
|
|
800786e: 60fb str r3, [r7, #12]
|
|
8007870: e001 b.n 8007876 <USB_HC_Init+0x19e>
|
|
}
|
|
else
|
|
{
|
|
HCcharLowSpeed = 0U;
|
|
8007872: 2300 movs r3, #0
|
|
8007874: 60fb str r3, [r7, #12]
|
|
}
|
|
|
|
USBx_HC((uint32_t)ch_num)->HCCHAR = (((uint32_t)dev_address << 22) & USB_OTG_HCCHAR_DAD) |
|
|
8007876: 787b ldrb r3, [r7, #1]
|
|
8007878: 059b lsls r3, r3, #22
|
|
800787a: f003 52fe and.w r2, r3, #532676608 ; 0x1fc00000
|
|
((((uint32_t)epnum & 0x7FU) << 11) & USB_OTG_HCCHAR_EPNUM) |
|
|
800787e: 78bb ldrb r3, [r7, #2]
|
|
8007880: 02db lsls r3, r3, #11
|
|
8007882: f403 43f0 and.w r3, r3, #30720 ; 0x7800
|
|
USBx_HC((uint32_t)ch_num)->HCCHAR = (((uint32_t)dev_address << 22) & USB_OTG_HCCHAR_DAD) |
|
|
8007886: 431a orrs r2, r3
|
|
(((uint32_t)ep_type << 18) & USB_OTG_HCCHAR_EPTYP) |
|
|
8007888: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
|
|
800788c: 049b lsls r3, r3, #18
|
|
800788e: f403 2340 and.w r3, r3, #786432 ; 0xc0000
|
|
((((uint32_t)epnum & 0x7FU) << 11) & USB_OTG_HCCHAR_EPNUM) |
|
|
8007892: 431a orrs r2, r3
|
|
((uint32_t)mps & USB_OTG_HCCHAR_MPSIZ) | HCcharEpDir | HCcharLowSpeed;
|
|
8007894: 8d3b ldrh r3, [r7, #40] ; 0x28
|
|
8007896: f3c3 030a ubfx r3, r3, #0, #11
|
|
(((uint32_t)ep_type << 18) & USB_OTG_HCCHAR_EPTYP) |
|
|
800789a: 431a orrs r2, r3
|
|
((uint32_t)mps & USB_OTG_HCCHAR_MPSIZ) | HCcharEpDir | HCcharLowSpeed;
|
|
800789c: 693b ldr r3, [r7, #16]
|
|
800789e: 431a orrs r2, r3
|
|
USBx_HC((uint32_t)ch_num)->HCCHAR = (((uint32_t)dev_address << 22) & USB_OTG_HCCHAR_DAD) |
|
|
80078a0: 78fb ldrb r3, [r7, #3]
|
|
80078a2: 0159 lsls r1, r3, #5
|
|
80078a4: 68bb ldr r3, [r7, #8]
|
|
80078a6: 440b add r3, r1
|
|
80078a8: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80078ac: 4619 mov r1, r3
|
|
((uint32_t)mps & USB_OTG_HCCHAR_MPSIZ) | HCcharEpDir | HCcharLowSpeed;
|
|
80078ae: 68fb ldr r3, [r7, #12]
|
|
80078b0: 4313 orrs r3, r2
|
|
USBx_HC((uint32_t)ch_num)->HCCHAR = (((uint32_t)dev_address << 22) & USB_OTG_HCCHAR_DAD) |
|
|
80078b2: 600b str r3, [r1, #0]
|
|
|
|
if (ep_type == EP_TYPE_INTR)
|
|
80078b4: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
|
|
80078b8: 2b03 cmp r3, #3
|
|
80078ba: d10f bne.n 80078dc <USB_HC_Init+0x204>
|
|
{
|
|
USBx_HC((uint32_t)ch_num)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM ;
|
|
80078bc: 78fb ldrb r3, [r7, #3]
|
|
80078be: 015a lsls r2, r3, #5
|
|
80078c0: 68bb ldr r3, [r7, #8]
|
|
80078c2: 4413 add r3, r2
|
|
80078c4: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80078c8: 681b ldr r3, [r3, #0]
|
|
80078ca: 78fa ldrb r2, [r7, #3]
|
|
80078cc: 0151 lsls r1, r2, #5
|
|
80078ce: 68ba ldr r2, [r7, #8]
|
|
80078d0: 440a add r2, r1
|
|
80078d2: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
80078d6: f043 5300 orr.w r3, r3, #536870912 ; 0x20000000
|
|
80078da: 6013 str r3, [r2, #0]
|
|
}
|
|
|
|
return ret;
|
|
80078dc: 7dfb ldrb r3, [r7, #23]
|
|
}
|
|
80078de: 4618 mov r0, r3
|
|
80078e0: 371c adds r7, #28
|
|
80078e2: 46bd mov sp, r7
|
|
80078e4: f85d 7b04 ldr.w r7, [sp], #4
|
|
80078e8: 4770 bx lr
|
|
80078ea: bf00 nop
|
|
|
|
080078ec <USB_HC_StartXfer>:
|
|
* 0 : DMA feature not used
|
|
* 1 : DMA feature used
|
|
* @retval HAL state
|
|
*/
|
|
HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma)
|
|
{
|
|
80078ec: b580 push {r7, lr}
|
|
80078ee: b08c sub sp, #48 ; 0x30
|
|
80078f0: af02 add r7, sp, #8
|
|
80078f2: 60f8 str r0, [r7, #12]
|
|
80078f4: 60b9 str r1, [r7, #8]
|
|
80078f6: 4613 mov r3, r2
|
|
80078f8: 71fb strb r3, [r7, #7]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
80078fa: 68fb ldr r3, [r7, #12]
|
|
80078fc: 623b str r3, [r7, #32]
|
|
uint32_t ch_num = (uint32_t)hc->ch_num;
|
|
80078fe: 68bb ldr r3, [r7, #8]
|
|
8007900: 785b ldrb r3, [r3, #1]
|
|
8007902: 61fb str r3, [r7, #28]
|
|
static __IO uint32_t tmpreg = 0U;
|
|
uint8_t is_oddframe;
|
|
uint16_t len_words;
|
|
uint16_t num_packets;
|
|
uint16_t max_hc_pkt_count = 256U;
|
|
8007904: f44f 7380 mov.w r3, #256 ; 0x100
|
|
8007908: 837b strh r3, [r7, #26]
|
|
|
|
if (((USBx->CID & (0x1U << 8)) != 0U) && (hc->speed == USBH_HS_SPEED))
|
|
800790a: 68fb ldr r3, [r7, #12]
|
|
800790c: 6bdb ldr r3, [r3, #60] ; 0x3c
|
|
800790e: f403 7380 and.w r3, r3, #256 ; 0x100
|
|
8007912: 2b00 cmp r3, #0
|
|
8007914: d028 beq.n 8007968 <USB_HC_StartXfer+0x7c>
|
|
8007916: 68bb ldr r3, [r7, #8]
|
|
8007918: 791b ldrb r3, [r3, #4]
|
|
800791a: 2b00 cmp r3, #0
|
|
800791c: d124 bne.n 8007968 <USB_HC_StartXfer+0x7c>
|
|
{
|
|
if ((dma == 0U) && (hc->do_ping == 1U))
|
|
800791e: 79fb ldrb r3, [r7, #7]
|
|
8007920: 2b00 cmp r3, #0
|
|
8007922: d10b bne.n 800793c <USB_HC_StartXfer+0x50>
|
|
8007924: 68bb ldr r3, [r7, #8]
|
|
8007926: 795b ldrb r3, [r3, #5]
|
|
8007928: 2b01 cmp r3, #1
|
|
800792a: d107 bne.n 800793c <USB_HC_StartXfer+0x50>
|
|
{
|
|
(void)USB_DoPing(USBx, hc->ch_num);
|
|
800792c: 68bb ldr r3, [r7, #8]
|
|
800792e: 785b ldrb r3, [r3, #1]
|
|
8007930: 4619 mov r1, r3
|
|
8007932: 68f8 ldr r0, [r7, #12]
|
|
8007934: f000 fa30 bl 8007d98 <USB_DoPing>
|
|
return HAL_OK;
|
|
8007938: 2300 movs r3, #0
|
|
800793a: e114 b.n 8007b66 <USB_HC_StartXfer+0x27a>
|
|
}
|
|
else if (dma == 1U)
|
|
800793c: 79fb ldrb r3, [r7, #7]
|
|
800793e: 2b01 cmp r3, #1
|
|
8007940: d112 bne.n 8007968 <USB_HC_StartXfer+0x7c>
|
|
{
|
|
USBx_HC(ch_num)->HCINTMSK &= ~(USB_OTG_HCINTMSK_NYET | USB_OTG_HCINTMSK_ACKM);
|
|
8007942: 69fb ldr r3, [r7, #28]
|
|
8007944: 015a lsls r2, r3, #5
|
|
8007946: 6a3b ldr r3, [r7, #32]
|
|
8007948: 4413 add r3, r2
|
|
800794a: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
800794e: 68db ldr r3, [r3, #12]
|
|
8007950: 69fa ldr r2, [r7, #28]
|
|
8007952: 0151 lsls r1, r2, #5
|
|
8007954: 6a3a ldr r2, [r7, #32]
|
|
8007956: 440a add r2, r1
|
|
8007958: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
800795c: f023 0360 bic.w r3, r3, #96 ; 0x60
|
|
8007960: 60d3 str r3, [r2, #12]
|
|
hc->do_ping = 0U;
|
|
8007962: 68bb ldr r3, [r7, #8]
|
|
8007964: 2200 movs r2, #0
|
|
8007966: 715a strb r2, [r3, #5]
|
|
/* ... */
|
|
}
|
|
}
|
|
|
|
/* Compute the expected number of packets associated to the transfer */
|
|
if (hc->xfer_len > 0U)
|
|
8007968: 68bb ldr r3, [r7, #8]
|
|
800796a: 691b ldr r3, [r3, #16]
|
|
800796c: 2b00 cmp r3, #0
|
|
800796e: d018 beq.n 80079a2 <USB_HC_StartXfer+0xb6>
|
|
{
|
|
num_packets = (uint16_t)((hc->xfer_len + hc->max_packet - 1U) / hc->max_packet);
|
|
8007970: 68bb ldr r3, [r7, #8]
|
|
8007972: 691b ldr r3, [r3, #16]
|
|
8007974: 68ba ldr r2, [r7, #8]
|
|
8007976: 8912 ldrh r2, [r2, #8]
|
|
8007978: 4413 add r3, r2
|
|
800797a: 3b01 subs r3, #1
|
|
800797c: 68ba ldr r2, [r7, #8]
|
|
800797e: 8912 ldrh r2, [r2, #8]
|
|
8007980: fbb3 f3f2 udiv r3, r3, r2
|
|
8007984: 84fb strh r3, [r7, #38] ; 0x26
|
|
|
|
if (num_packets > max_hc_pkt_count)
|
|
8007986: 8cfa ldrh r2, [r7, #38] ; 0x26
|
|
8007988: 8b7b ldrh r3, [r7, #26]
|
|
800798a: 429a cmp r2, r3
|
|
800798c: d90b bls.n 80079a6 <USB_HC_StartXfer+0xba>
|
|
{
|
|
num_packets = max_hc_pkt_count;
|
|
800798e: 8b7b ldrh r3, [r7, #26]
|
|
8007990: 84fb strh r3, [r7, #38] ; 0x26
|
|
hc->xfer_len = (uint32_t)num_packets * hc->max_packet;
|
|
8007992: 8cfb ldrh r3, [r7, #38] ; 0x26
|
|
8007994: 68ba ldr r2, [r7, #8]
|
|
8007996: 8912 ldrh r2, [r2, #8]
|
|
8007998: fb02 f203 mul.w r2, r2, r3
|
|
800799c: 68bb ldr r3, [r7, #8]
|
|
800799e: 611a str r2, [r3, #16]
|
|
80079a0: e001 b.n 80079a6 <USB_HC_StartXfer+0xba>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
num_packets = 1U;
|
|
80079a2: 2301 movs r3, #1
|
|
80079a4: 84fb strh r3, [r7, #38] ; 0x26
|
|
}
|
|
if (hc->ep_is_in != 0U)
|
|
80079a6: 68bb ldr r3, [r7, #8]
|
|
80079a8: 78db ldrb r3, [r3, #3]
|
|
80079aa: 2b00 cmp r3, #0
|
|
80079ac: d006 beq.n 80079bc <USB_HC_StartXfer+0xd0>
|
|
{
|
|
hc->xfer_len = (uint32_t)num_packets * hc->max_packet;
|
|
80079ae: 8cfb ldrh r3, [r7, #38] ; 0x26
|
|
80079b0: 68ba ldr r2, [r7, #8]
|
|
80079b2: 8912 ldrh r2, [r2, #8]
|
|
80079b4: fb02 f203 mul.w r2, r2, r3
|
|
80079b8: 68bb ldr r3, [r7, #8]
|
|
80079ba: 611a str r2, [r3, #16]
|
|
}
|
|
|
|
/* Initialize the HCTSIZn register */
|
|
USBx_HC(ch_num)->HCTSIZ = (hc->xfer_len & USB_OTG_HCTSIZ_XFRSIZ) |
|
|
80079bc: 68bb ldr r3, [r7, #8]
|
|
80079be: 691b ldr r3, [r3, #16]
|
|
80079c0: f3c3 0212 ubfx r2, r3, #0, #19
|
|
(((uint32_t)num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |
|
|
80079c4: 8cfb ldrh r3, [r7, #38] ; 0x26
|
|
80079c6: 04d9 lsls r1, r3, #19
|
|
80079c8: 4b69 ldr r3, [pc, #420] ; (8007b70 <USB_HC_StartXfer+0x284>)
|
|
80079ca: 400b ands r3, r1
|
|
USBx_HC(ch_num)->HCTSIZ = (hc->xfer_len & USB_OTG_HCTSIZ_XFRSIZ) |
|
|
80079cc: 431a orrs r2, r3
|
|
(((uint32_t)hc->data_pid << 29) & USB_OTG_HCTSIZ_DPID);
|
|
80079ce: 68bb ldr r3, [r7, #8]
|
|
80079d0: 7a9b ldrb r3, [r3, #10]
|
|
80079d2: 075b lsls r3, r3, #29
|
|
80079d4: f003 43c0 and.w r3, r3, #1610612736 ; 0x60000000
|
|
USBx_HC(ch_num)->HCTSIZ = (hc->xfer_len & USB_OTG_HCTSIZ_XFRSIZ) |
|
|
80079d8: 69f9 ldr r1, [r7, #28]
|
|
80079da: 0148 lsls r0, r1, #5
|
|
80079dc: 6a39 ldr r1, [r7, #32]
|
|
80079de: 4401 add r1, r0
|
|
80079e0: f501 61a0 add.w r1, r1, #1280 ; 0x500
|
|
(((uint32_t)num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |
|
|
80079e4: 4313 orrs r3, r2
|
|
USBx_HC(ch_num)->HCTSIZ = (hc->xfer_len & USB_OTG_HCTSIZ_XFRSIZ) |
|
|
80079e6: 610b str r3, [r1, #16]
|
|
|
|
if (dma != 0U)
|
|
80079e8: 79fb ldrb r3, [r7, #7]
|
|
80079ea: 2b00 cmp r3, #0
|
|
80079ec: d009 beq.n 8007a02 <USB_HC_StartXfer+0x116>
|
|
{
|
|
/* xfer_buff MUST be 32-bits aligned */
|
|
USBx_HC(ch_num)->HCDMA = (uint32_t)hc->xfer_buff;
|
|
80079ee: 68bb ldr r3, [r7, #8]
|
|
80079f0: 68d9 ldr r1, [r3, #12]
|
|
80079f2: 69fb ldr r3, [r7, #28]
|
|
80079f4: 015a lsls r2, r3, #5
|
|
80079f6: 6a3b ldr r3, [r7, #32]
|
|
80079f8: 4413 add r3, r2
|
|
80079fa: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
80079fe: 460a mov r2, r1
|
|
8007a00: 615a str r2, [r3, #20]
|
|
}
|
|
|
|
is_oddframe = (((uint32_t)USBx_HOST->HFNUM & 0x01U) != 0U) ? 0U : 1U;
|
|
8007a02: 6a3b ldr r3, [r7, #32]
|
|
8007a04: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007a08: 689b ldr r3, [r3, #8]
|
|
8007a0a: f003 0301 and.w r3, r3, #1
|
|
8007a0e: 2b00 cmp r3, #0
|
|
8007a10: bf0c ite eq
|
|
8007a12: 2301 moveq r3, #1
|
|
8007a14: 2300 movne r3, #0
|
|
8007a16: b2db uxtb r3, r3
|
|
8007a18: 767b strb r3, [r7, #25]
|
|
USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
|
|
8007a1a: 69fb ldr r3, [r7, #28]
|
|
8007a1c: 015a lsls r2, r3, #5
|
|
8007a1e: 6a3b ldr r3, [r7, #32]
|
|
8007a20: 4413 add r3, r2
|
|
8007a22: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007a26: 681b ldr r3, [r3, #0]
|
|
8007a28: 69fa ldr r2, [r7, #28]
|
|
8007a2a: 0151 lsls r1, r2, #5
|
|
8007a2c: 6a3a ldr r2, [r7, #32]
|
|
8007a2e: 440a add r2, r1
|
|
8007a30: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007a34: f023 5300 bic.w r3, r3, #536870912 ; 0x20000000
|
|
8007a38: 6013 str r3, [r2, #0]
|
|
USBx_HC(ch_num)->HCCHAR |= (uint32_t)is_oddframe << 29;
|
|
8007a3a: 69fb ldr r3, [r7, #28]
|
|
8007a3c: 015a lsls r2, r3, #5
|
|
8007a3e: 6a3b ldr r3, [r7, #32]
|
|
8007a40: 4413 add r3, r2
|
|
8007a42: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007a46: 681a ldr r2, [r3, #0]
|
|
8007a48: 7e7b ldrb r3, [r7, #25]
|
|
8007a4a: 075b lsls r3, r3, #29
|
|
8007a4c: 69f9 ldr r1, [r7, #28]
|
|
8007a4e: 0148 lsls r0, r1, #5
|
|
8007a50: 6a39 ldr r1, [r7, #32]
|
|
8007a52: 4401 add r1, r0
|
|
8007a54: f501 61a0 add.w r1, r1, #1280 ; 0x500
|
|
8007a58: 4313 orrs r3, r2
|
|
8007a5a: 600b str r3, [r1, #0]
|
|
|
|
/* Set host channel enable */
|
|
tmpreg = USBx_HC(ch_num)->HCCHAR;
|
|
8007a5c: 69fb ldr r3, [r7, #28]
|
|
8007a5e: 015a lsls r2, r3, #5
|
|
8007a60: 6a3b ldr r3, [r7, #32]
|
|
8007a62: 4413 add r3, r2
|
|
8007a64: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007a68: 681b ldr r3, [r3, #0]
|
|
8007a6a: 4a42 ldr r2, [pc, #264] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007a6c: 6013 str r3, [r2, #0]
|
|
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
|
|
8007a6e: 4b41 ldr r3, [pc, #260] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007a70: 681b ldr r3, [r3, #0]
|
|
8007a72: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
|
|
8007a76: 4a3f ldr r2, [pc, #252] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007a78: 6013 str r3, [r2, #0]
|
|
|
|
/* make sure to set the correct ep direction */
|
|
if (hc->ep_is_in != 0U)
|
|
8007a7a: 68bb ldr r3, [r7, #8]
|
|
8007a7c: 78db ldrb r3, [r3, #3]
|
|
8007a7e: 2b00 cmp r3, #0
|
|
8007a80: d006 beq.n 8007a90 <USB_HC_StartXfer+0x1a4>
|
|
{
|
|
tmpreg |= USB_OTG_HCCHAR_EPDIR;
|
|
8007a82: 4b3c ldr r3, [pc, #240] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007a84: 681b ldr r3, [r3, #0]
|
|
8007a86: f443 4300 orr.w r3, r3, #32768 ; 0x8000
|
|
8007a8a: 4a3a ldr r2, [pc, #232] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007a8c: 6013 str r3, [r2, #0]
|
|
8007a8e: e005 b.n 8007a9c <USB_HC_StartXfer+0x1b0>
|
|
}
|
|
else
|
|
{
|
|
tmpreg &= ~USB_OTG_HCCHAR_EPDIR;
|
|
8007a90: 4b38 ldr r3, [pc, #224] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007a92: 681b ldr r3, [r3, #0]
|
|
8007a94: f423 4300 bic.w r3, r3, #32768 ; 0x8000
|
|
8007a98: 4a36 ldr r2, [pc, #216] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007a9a: 6013 str r3, [r2, #0]
|
|
}
|
|
tmpreg |= USB_OTG_HCCHAR_CHENA;
|
|
8007a9c: 4b35 ldr r3, [pc, #212] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007a9e: 681b ldr r3, [r3, #0]
|
|
8007aa0: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8007aa4: 4a33 ldr r2, [pc, #204] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007aa6: 6013 str r3, [r2, #0]
|
|
USBx_HC(ch_num)->HCCHAR = tmpreg;
|
|
8007aa8: 69fb ldr r3, [r7, #28]
|
|
8007aaa: 015a lsls r2, r3, #5
|
|
8007aac: 6a3b ldr r3, [r7, #32]
|
|
8007aae: 4413 add r3, r2
|
|
8007ab0: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007ab4: 461a mov r2, r3
|
|
8007ab6: 4b2f ldr r3, [pc, #188] ; (8007b74 <USB_HC_StartXfer+0x288>)
|
|
8007ab8: 681b ldr r3, [r3, #0]
|
|
8007aba: 6013 str r3, [r2, #0]
|
|
|
|
if (dma != 0U) /* dma mode */
|
|
8007abc: 79fb ldrb r3, [r7, #7]
|
|
8007abe: 2b00 cmp r3, #0
|
|
8007ac0: d001 beq.n 8007ac6 <USB_HC_StartXfer+0x1da>
|
|
{
|
|
return HAL_OK;
|
|
8007ac2: 2300 movs r3, #0
|
|
8007ac4: e04f b.n 8007b66 <USB_HC_StartXfer+0x27a>
|
|
}
|
|
|
|
if ((hc->ep_is_in == 0U) && (hc->xfer_len > 0U))
|
|
8007ac6: 68bb ldr r3, [r7, #8]
|
|
8007ac8: 78db ldrb r3, [r3, #3]
|
|
8007aca: 2b00 cmp r3, #0
|
|
8007acc: d14a bne.n 8007b64 <USB_HC_StartXfer+0x278>
|
|
8007ace: 68bb ldr r3, [r7, #8]
|
|
8007ad0: 691b ldr r3, [r3, #16]
|
|
8007ad2: 2b00 cmp r3, #0
|
|
8007ad4: d046 beq.n 8007b64 <USB_HC_StartXfer+0x278>
|
|
{
|
|
switch (hc->ep_type)
|
|
8007ad6: 68bb ldr r3, [r7, #8]
|
|
8007ad8: 79db ldrb r3, [r3, #7]
|
|
8007ada: 2b03 cmp r3, #3
|
|
8007adc: d830 bhi.n 8007b40 <USB_HC_StartXfer+0x254>
|
|
8007ade: a201 add r2, pc, #4 ; (adr r2, 8007ae4 <USB_HC_StartXfer+0x1f8>)
|
|
8007ae0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8007ae4: 08007af5 .word 0x08007af5
|
|
8007ae8: 08007b19 .word 0x08007b19
|
|
8007aec: 08007af5 .word 0x08007af5
|
|
8007af0: 08007b19 .word 0x08007b19
|
|
{
|
|
/* Non periodic transfer */
|
|
case EP_TYPE_CTRL:
|
|
case EP_TYPE_BULK:
|
|
|
|
len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
|
|
8007af4: 68bb ldr r3, [r7, #8]
|
|
8007af6: 691b ldr r3, [r3, #16]
|
|
8007af8: 3303 adds r3, #3
|
|
8007afa: 089b lsrs r3, r3, #2
|
|
8007afc: 82fb strh r3, [r7, #22]
|
|
|
|
/* check if there is enough space in FIFO space */
|
|
if (len_words > (USBx->HNPTXSTS & 0xFFFFU))
|
|
8007afe: 8afa ldrh r2, [r7, #22]
|
|
8007b00: 68fb ldr r3, [r7, #12]
|
|
8007b02: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8007b04: b29b uxth r3, r3
|
|
8007b06: 429a cmp r2, r3
|
|
8007b08: d91c bls.n 8007b44 <USB_HC_StartXfer+0x258>
|
|
{
|
|
/* need to process data in nptxfempty interrupt */
|
|
USBx->GINTMSK |= USB_OTG_GINTMSK_NPTXFEM;
|
|
8007b0a: 68fb ldr r3, [r7, #12]
|
|
8007b0c: 699b ldr r3, [r3, #24]
|
|
8007b0e: f043 0220 orr.w r2, r3, #32
|
|
8007b12: 68fb ldr r3, [r7, #12]
|
|
8007b14: 619a str r2, [r3, #24]
|
|
}
|
|
break;
|
|
8007b16: e015 b.n 8007b44 <USB_HC_StartXfer+0x258>
|
|
|
|
/* Periodic transfer */
|
|
case EP_TYPE_INTR:
|
|
case EP_TYPE_ISOC:
|
|
len_words = (uint16_t)((hc->xfer_len + 3U) / 4U);
|
|
8007b18: 68bb ldr r3, [r7, #8]
|
|
8007b1a: 691b ldr r3, [r3, #16]
|
|
8007b1c: 3303 adds r3, #3
|
|
8007b1e: 089b lsrs r3, r3, #2
|
|
8007b20: 82fb strh r3, [r7, #22]
|
|
/* check if there is enough space in FIFO space */
|
|
if (len_words > (USBx_HOST->HPTXSTS & 0xFFFFU)) /* split the transfer */
|
|
8007b22: 8afa ldrh r2, [r7, #22]
|
|
8007b24: 6a3b ldr r3, [r7, #32]
|
|
8007b26: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007b2a: 691b ldr r3, [r3, #16]
|
|
8007b2c: b29b uxth r3, r3
|
|
8007b2e: 429a cmp r2, r3
|
|
8007b30: d90a bls.n 8007b48 <USB_HC_StartXfer+0x25c>
|
|
{
|
|
/* need to process data in ptxfempty interrupt */
|
|
USBx->GINTMSK |= USB_OTG_GINTMSK_PTXFEM;
|
|
8007b32: 68fb ldr r3, [r7, #12]
|
|
8007b34: 699b ldr r3, [r3, #24]
|
|
8007b36: f043 6280 orr.w r2, r3, #67108864 ; 0x4000000
|
|
8007b3a: 68fb ldr r3, [r7, #12]
|
|
8007b3c: 619a str r2, [r3, #24]
|
|
}
|
|
break;
|
|
8007b3e: e003 b.n 8007b48 <USB_HC_StartXfer+0x25c>
|
|
|
|
default:
|
|
break;
|
|
8007b40: bf00 nop
|
|
8007b42: e002 b.n 8007b4a <USB_HC_StartXfer+0x25e>
|
|
break;
|
|
8007b44: bf00 nop
|
|
8007b46: e000 b.n 8007b4a <USB_HC_StartXfer+0x25e>
|
|
break;
|
|
8007b48: bf00 nop
|
|
}
|
|
|
|
/* Write packet into the Tx FIFO. */
|
|
(void)USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, (uint16_t)hc->xfer_len, 0);
|
|
8007b4a: 68bb ldr r3, [r7, #8]
|
|
8007b4c: 68d9 ldr r1, [r3, #12]
|
|
8007b4e: 68bb ldr r3, [r7, #8]
|
|
8007b50: 785a ldrb r2, [r3, #1]
|
|
8007b52: 68bb ldr r3, [r7, #8]
|
|
8007b54: 691b ldr r3, [r3, #16]
|
|
8007b56: b298 uxth r0, r3
|
|
8007b58: 2300 movs r3, #0
|
|
8007b5a: 9300 str r3, [sp, #0]
|
|
8007b5c: 4603 mov r3, r0
|
|
8007b5e: 68f8 ldr r0, [r7, #12]
|
|
8007b60: f7ff fb84 bl 800726c <USB_WritePacket>
|
|
}
|
|
|
|
return HAL_OK;
|
|
8007b64: 2300 movs r3, #0
|
|
}
|
|
8007b66: 4618 mov r0, r3
|
|
8007b68: 3728 adds r7, #40 ; 0x28
|
|
8007b6a: 46bd mov sp, r7
|
|
8007b6c: bd80 pop {r7, pc}
|
|
8007b6e: bf00 nop
|
|
8007b70: 1ff80000 .word 0x1ff80000
|
|
8007b74: 2000022c .word 0x2000022c
|
|
|
|
08007b78 <USB_HC_ReadInterrupt>:
|
|
* @brief Read all host channel interrupts status
|
|
* @param USBx Selected device
|
|
* @retval HAL state
|
|
*/
|
|
uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
8007b78: b480 push {r7}
|
|
8007b7a: b085 sub sp, #20
|
|
8007b7c: af00 add r7, sp, #0
|
|
8007b7e: 6078 str r0, [r7, #4]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8007b80: 687b ldr r3, [r7, #4]
|
|
8007b82: 60fb str r3, [r7, #12]
|
|
|
|
return ((USBx_HOST->HAINT) & 0xFFFFU);
|
|
8007b84: 68fb ldr r3, [r7, #12]
|
|
8007b86: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007b8a: 695b ldr r3, [r3, #20]
|
|
8007b8c: b29b uxth r3, r3
|
|
}
|
|
8007b8e: 4618 mov r0, r3
|
|
8007b90: 3714 adds r7, #20
|
|
8007b92: 46bd mov sp, r7
|
|
8007b94: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007b98: 4770 bx lr
|
|
|
|
08007b9a <USB_HC_Halt>:
|
|
* @param hc_num Host Channel number
|
|
* This parameter can be a value from 1 to 15
|
|
* @retval HAL state
|
|
*/
|
|
HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num)
|
|
{
|
|
8007b9a: b480 push {r7}
|
|
8007b9c: b087 sub sp, #28
|
|
8007b9e: af00 add r7, sp, #0
|
|
8007ba0: 6078 str r0, [r7, #4]
|
|
8007ba2: 460b mov r3, r1
|
|
8007ba4: 70fb strb r3, [r7, #3]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8007ba6: 687b ldr r3, [r7, #4]
|
|
8007ba8: 613b str r3, [r7, #16]
|
|
uint32_t hcnum = (uint32_t)hc_num;
|
|
8007baa: 78fb ldrb r3, [r7, #3]
|
|
8007bac: 60fb str r3, [r7, #12]
|
|
uint32_t count = 0U;
|
|
8007bae: 2300 movs r3, #0
|
|
8007bb0: 617b str r3, [r7, #20]
|
|
uint32_t HcEpType = (USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_EPTYP) >> 18;
|
|
8007bb2: 68fb ldr r3, [r7, #12]
|
|
8007bb4: 015a lsls r2, r3, #5
|
|
8007bb6: 693b ldr r3, [r7, #16]
|
|
8007bb8: 4413 add r3, r2
|
|
8007bba: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007bbe: 681b ldr r3, [r3, #0]
|
|
8007bc0: 0c9b lsrs r3, r3, #18
|
|
8007bc2: f003 0303 and.w r3, r3, #3
|
|
8007bc6: 60bb str r3, [r7, #8]
|
|
|
|
/* Check for space in the request queue to issue the halt. */
|
|
if ((HcEpType == HCCHAR_CTRL) || (HcEpType == HCCHAR_BULK))
|
|
8007bc8: 68bb ldr r3, [r7, #8]
|
|
8007bca: 2b00 cmp r3, #0
|
|
8007bcc: d002 beq.n 8007bd4 <USB_HC_Halt+0x3a>
|
|
8007bce: 68bb ldr r3, [r7, #8]
|
|
8007bd0: 2b02 cmp r3, #2
|
|
8007bd2: d16c bne.n 8007cae <USB_HC_Halt+0x114>
|
|
{
|
|
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
|
|
8007bd4: 68fb ldr r3, [r7, #12]
|
|
8007bd6: 015a lsls r2, r3, #5
|
|
8007bd8: 693b ldr r3, [r7, #16]
|
|
8007bda: 4413 add r3, r2
|
|
8007bdc: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007be0: 681b ldr r3, [r3, #0]
|
|
8007be2: 68fa ldr r2, [r7, #12]
|
|
8007be4: 0151 lsls r1, r2, #5
|
|
8007be6: 693a ldr r2, [r7, #16]
|
|
8007be8: 440a add r2, r1
|
|
8007bea: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007bee: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000
|
|
8007bf2: 6013 str r3, [r2, #0]
|
|
|
|
if ((USBx->HNPTXSTS & (0xFFU << 16)) == 0U)
|
|
8007bf4: 687b ldr r3, [r7, #4]
|
|
8007bf6: 6adb ldr r3, [r3, #44] ; 0x2c
|
|
8007bf8: f403 037f and.w r3, r3, #16711680 ; 0xff0000
|
|
8007bfc: 2b00 cmp r3, #0
|
|
8007bfe: d143 bne.n 8007c88 <USB_HC_Halt+0xee>
|
|
{
|
|
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
|
|
8007c00: 68fb ldr r3, [r7, #12]
|
|
8007c02: 015a lsls r2, r3, #5
|
|
8007c04: 693b ldr r3, [r7, #16]
|
|
8007c06: 4413 add r3, r2
|
|
8007c08: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007c0c: 681b ldr r3, [r3, #0]
|
|
8007c0e: 68fa ldr r2, [r7, #12]
|
|
8007c10: 0151 lsls r1, r2, #5
|
|
8007c12: 693a ldr r2, [r7, #16]
|
|
8007c14: 440a add r2, r1
|
|
8007c16: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007c1a: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
|
|
8007c1e: 6013 str r3, [r2, #0]
|
|
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
|
|
8007c20: 68fb ldr r3, [r7, #12]
|
|
8007c22: 015a lsls r2, r3, #5
|
|
8007c24: 693b ldr r3, [r7, #16]
|
|
8007c26: 4413 add r3, r2
|
|
8007c28: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007c2c: 681b ldr r3, [r3, #0]
|
|
8007c2e: 68fa ldr r2, [r7, #12]
|
|
8007c30: 0151 lsls r1, r2, #5
|
|
8007c32: 693a ldr r2, [r7, #16]
|
|
8007c34: 440a add r2, r1
|
|
8007c36: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007c3a: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8007c3e: 6013 str r3, [r2, #0]
|
|
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
|
|
8007c40: 68fb ldr r3, [r7, #12]
|
|
8007c42: 015a lsls r2, r3, #5
|
|
8007c44: 693b ldr r3, [r7, #16]
|
|
8007c46: 4413 add r3, r2
|
|
8007c48: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007c4c: 681b ldr r3, [r3, #0]
|
|
8007c4e: 68fa ldr r2, [r7, #12]
|
|
8007c50: 0151 lsls r1, r2, #5
|
|
8007c52: 693a ldr r2, [r7, #16]
|
|
8007c54: 440a add r2, r1
|
|
8007c56: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007c5a: f423 4300 bic.w r3, r3, #32768 ; 0x8000
|
|
8007c5e: 6013 str r3, [r2, #0]
|
|
do
|
|
{
|
|
if (++count > 1000U)
|
|
8007c60: 697b ldr r3, [r7, #20]
|
|
8007c62: 3301 adds r3, #1
|
|
8007c64: 617b str r3, [r7, #20]
|
|
8007c66: 697b ldr r3, [r7, #20]
|
|
8007c68: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
|
|
8007c6c: d81d bhi.n 8007caa <USB_HC_Halt+0x110>
|
|
{
|
|
break;
|
|
}
|
|
} while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
|
|
8007c6e: 68fb ldr r3, [r7, #12]
|
|
8007c70: 015a lsls r2, r3, #5
|
|
8007c72: 693b ldr r3, [r7, #16]
|
|
8007c74: 4413 add r3, r2
|
|
8007c76: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007c7a: 681b ldr r3, [r3, #0]
|
|
8007c7c: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000
|
|
8007c80: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
|
|
8007c84: d0ec beq.n 8007c60 <USB_HC_Halt+0xc6>
|
|
if ((USBx->HNPTXSTS & (0xFFU << 16)) == 0U)
|
|
8007c86: e080 b.n 8007d8a <USB_HC_Halt+0x1f0>
|
|
}
|
|
else
|
|
{
|
|
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
|
|
8007c88: 68fb ldr r3, [r7, #12]
|
|
8007c8a: 015a lsls r2, r3, #5
|
|
8007c8c: 693b ldr r3, [r7, #16]
|
|
8007c8e: 4413 add r3, r2
|
|
8007c90: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007c94: 681b ldr r3, [r3, #0]
|
|
8007c96: 68fa ldr r2, [r7, #12]
|
|
8007c98: 0151 lsls r1, r2, #5
|
|
8007c9a: 693a ldr r2, [r7, #16]
|
|
8007c9c: 440a add r2, r1
|
|
8007c9e: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007ca2: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8007ca6: 6013 str r3, [r2, #0]
|
|
if ((USBx->HNPTXSTS & (0xFFU << 16)) == 0U)
|
|
8007ca8: e06f b.n 8007d8a <USB_HC_Halt+0x1f0>
|
|
break;
|
|
8007caa: bf00 nop
|
|
if ((USBx->HNPTXSTS & (0xFFU << 16)) == 0U)
|
|
8007cac: e06d b.n 8007d8a <USB_HC_Halt+0x1f0>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHDIS;
|
|
8007cae: 68fb ldr r3, [r7, #12]
|
|
8007cb0: 015a lsls r2, r3, #5
|
|
8007cb2: 693b ldr r3, [r7, #16]
|
|
8007cb4: 4413 add r3, r2
|
|
8007cb6: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007cba: 681b ldr r3, [r3, #0]
|
|
8007cbc: 68fa ldr r2, [r7, #12]
|
|
8007cbe: 0151 lsls r1, r2, #5
|
|
8007cc0: 693a ldr r2, [r7, #16]
|
|
8007cc2: 440a add r2, r1
|
|
8007cc4: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007cc8: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000
|
|
8007ccc: 6013 str r3, [r2, #0]
|
|
|
|
if ((USBx_HOST->HPTXSTS & (0xFFU << 16)) == 0U)
|
|
8007cce: 693b ldr r3, [r7, #16]
|
|
8007cd0: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007cd4: 691b ldr r3, [r3, #16]
|
|
8007cd6: f403 037f and.w r3, r3, #16711680 ; 0xff0000
|
|
8007cda: 2b00 cmp r3, #0
|
|
8007cdc: d143 bne.n 8007d66 <USB_HC_Halt+0x1cc>
|
|
{
|
|
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
|
|
8007cde: 68fb ldr r3, [r7, #12]
|
|
8007ce0: 015a lsls r2, r3, #5
|
|
8007ce2: 693b ldr r3, [r7, #16]
|
|
8007ce4: 4413 add r3, r2
|
|
8007ce6: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007cea: 681b ldr r3, [r3, #0]
|
|
8007cec: 68fa ldr r2, [r7, #12]
|
|
8007cee: 0151 lsls r1, r2, #5
|
|
8007cf0: 693a ldr r2, [r7, #16]
|
|
8007cf2: 440a add r2, r1
|
|
8007cf4: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007cf8: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
|
|
8007cfc: 6013 str r3, [r2, #0]
|
|
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
|
|
8007cfe: 68fb ldr r3, [r7, #12]
|
|
8007d00: 015a lsls r2, r3, #5
|
|
8007d02: 693b ldr r3, [r7, #16]
|
|
8007d04: 4413 add r3, r2
|
|
8007d06: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007d0a: 681b ldr r3, [r3, #0]
|
|
8007d0c: 68fa ldr r2, [r7, #12]
|
|
8007d0e: 0151 lsls r1, r2, #5
|
|
8007d10: 693a ldr r2, [r7, #16]
|
|
8007d12: 440a add r2, r1
|
|
8007d14: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007d18: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8007d1c: 6013 str r3, [r2, #0]
|
|
USBx_HC(hcnum)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
|
|
8007d1e: 68fb ldr r3, [r7, #12]
|
|
8007d20: 015a lsls r2, r3, #5
|
|
8007d22: 693b ldr r3, [r7, #16]
|
|
8007d24: 4413 add r3, r2
|
|
8007d26: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007d2a: 681b ldr r3, [r3, #0]
|
|
8007d2c: 68fa ldr r2, [r7, #12]
|
|
8007d2e: 0151 lsls r1, r2, #5
|
|
8007d30: 693a ldr r2, [r7, #16]
|
|
8007d32: 440a add r2, r1
|
|
8007d34: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007d38: f423 4300 bic.w r3, r3, #32768 ; 0x8000
|
|
8007d3c: 6013 str r3, [r2, #0]
|
|
do
|
|
{
|
|
if (++count > 1000U)
|
|
8007d3e: 697b ldr r3, [r7, #20]
|
|
8007d40: 3301 adds r3, #1
|
|
8007d42: 617b str r3, [r7, #20]
|
|
8007d44: 697b ldr r3, [r7, #20]
|
|
8007d46: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
|
|
8007d4a: d81d bhi.n 8007d88 <USB_HC_Halt+0x1ee>
|
|
{
|
|
break;
|
|
}
|
|
} while ((USBx_HC(hcnum)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
|
|
8007d4c: 68fb ldr r3, [r7, #12]
|
|
8007d4e: 015a lsls r2, r3, #5
|
|
8007d50: 693b ldr r3, [r7, #16]
|
|
8007d52: 4413 add r3, r2
|
|
8007d54: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007d58: 681b ldr r3, [r3, #0]
|
|
8007d5a: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000
|
|
8007d5e: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
|
|
8007d62: d0ec beq.n 8007d3e <USB_HC_Halt+0x1a4>
|
|
8007d64: e011 b.n 8007d8a <USB_HC_Halt+0x1f0>
|
|
}
|
|
else
|
|
{
|
|
USBx_HC(hcnum)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
|
|
8007d66: 68fb ldr r3, [r7, #12]
|
|
8007d68: 015a lsls r2, r3, #5
|
|
8007d6a: 693b ldr r3, [r7, #16]
|
|
8007d6c: 4413 add r3, r2
|
|
8007d6e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007d72: 681b ldr r3, [r3, #0]
|
|
8007d74: 68fa ldr r2, [r7, #12]
|
|
8007d76: 0151 lsls r1, r2, #5
|
|
8007d78: 693a ldr r2, [r7, #16]
|
|
8007d7a: 440a add r2, r1
|
|
8007d7c: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007d80: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8007d84: 6013 str r3, [r2, #0]
|
|
8007d86: e000 b.n 8007d8a <USB_HC_Halt+0x1f0>
|
|
break;
|
|
8007d88: bf00 nop
|
|
}
|
|
}
|
|
|
|
return HAL_OK;
|
|
8007d8a: 2300 movs r3, #0
|
|
}
|
|
8007d8c: 4618 mov r0, r3
|
|
8007d8e: 371c adds r7, #28
|
|
8007d90: 46bd mov sp, r7
|
|
8007d92: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007d96: 4770 bx lr
|
|
|
|
08007d98 <USB_DoPing>:
|
|
* @param hc_num Host Channel number
|
|
* This parameter can be a value from 1 to 15
|
|
* @retval HAL state
|
|
*/
|
|
HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num)
|
|
{
|
|
8007d98: b480 push {r7}
|
|
8007d9a: b087 sub sp, #28
|
|
8007d9c: af00 add r7, sp, #0
|
|
8007d9e: 6078 str r0, [r7, #4]
|
|
8007da0: 460b mov r3, r1
|
|
8007da2: 70fb strb r3, [r7, #3]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8007da4: 687b ldr r3, [r7, #4]
|
|
8007da6: 617b str r3, [r7, #20]
|
|
uint32_t chnum = (uint32_t)ch_num;
|
|
8007da8: 78fb ldrb r3, [r7, #3]
|
|
8007daa: 613b str r3, [r7, #16]
|
|
uint32_t num_packets = 1U;
|
|
8007dac: 2301 movs r3, #1
|
|
8007dae: 60fb str r3, [r7, #12]
|
|
uint32_t tmpreg;
|
|
|
|
USBx_HC(chnum)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |
|
|
8007db0: 68fb ldr r3, [r7, #12]
|
|
8007db2: 04da lsls r2, r3, #19
|
|
8007db4: 4b15 ldr r3, [pc, #84] ; (8007e0c <USB_DoPing+0x74>)
|
|
8007db6: 4013 ands r3, r2
|
|
8007db8: 693a ldr r2, [r7, #16]
|
|
8007dba: 0151 lsls r1, r2, #5
|
|
8007dbc: 697a ldr r2, [r7, #20]
|
|
8007dbe: 440a add r2, r1
|
|
8007dc0: f502 62a0 add.w r2, r2, #1280 ; 0x500
|
|
8007dc4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8007dc8: 6113 str r3, [r2, #16]
|
|
USB_OTG_HCTSIZ_DOPING;
|
|
|
|
/* Set host channel enable */
|
|
tmpreg = USBx_HC(chnum)->HCCHAR;
|
|
8007dca: 693b ldr r3, [r7, #16]
|
|
8007dcc: 015a lsls r2, r3, #5
|
|
8007dce: 697b ldr r3, [r7, #20]
|
|
8007dd0: 4413 add r3, r2
|
|
8007dd2: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007dd6: 681b ldr r3, [r3, #0]
|
|
8007dd8: 60bb str r3, [r7, #8]
|
|
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
|
|
8007dda: 68bb ldr r3, [r7, #8]
|
|
8007ddc: f023 4380 bic.w r3, r3, #1073741824 ; 0x40000000
|
|
8007de0: 60bb str r3, [r7, #8]
|
|
tmpreg |= USB_OTG_HCCHAR_CHENA;
|
|
8007de2: 68bb ldr r3, [r7, #8]
|
|
8007de4: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8007de8: 60bb str r3, [r7, #8]
|
|
USBx_HC(chnum)->HCCHAR = tmpreg;
|
|
8007dea: 693b ldr r3, [r7, #16]
|
|
8007dec: 015a lsls r2, r3, #5
|
|
8007dee: 697b ldr r3, [r7, #20]
|
|
8007df0: 4413 add r3, r2
|
|
8007df2: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007df6: 461a mov r2, r3
|
|
8007df8: 68bb ldr r3, [r7, #8]
|
|
8007dfa: 6013 str r3, [r2, #0]
|
|
|
|
return HAL_OK;
|
|
8007dfc: 2300 movs r3, #0
|
|
}
|
|
8007dfe: 4618 mov r0, r3
|
|
8007e00: 371c adds r7, #28
|
|
8007e02: 46bd mov sp, r7
|
|
8007e04: f85d 7b04 ldr.w r7, [sp], #4
|
|
8007e08: 4770 bx lr
|
|
8007e0a: bf00 nop
|
|
8007e0c: 1ff80000 .word 0x1ff80000
|
|
|
|
08007e10 <USB_StopHost>:
|
|
* @brief Stop Host Core
|
|
* @param USBx Selected device
|
|
* @retval HAL state
|
|
*/
|
|
HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
|
|
{
|
|
8007e10: b580 push {r7, lr}
|
|
8007e12: b086 sub sp, #24
|
|
8007e14: af00 add r7, sp, #0
|
|
8007e16: 6078 str r0, [r7, #4]
|
|
uint32_t USBx_BASE = (uint32_t)USBx;
|
|
8007e18: 687b ldr r3, [r7, #4]
|
|
8007e1a: 60fb str r3, [r7, #12]
|
|
uint32_t count = 0U;
|
|
8007e1c: 2300 movs r3, #0
|
|
8007e1e: 617b str r3, [r7, #20]
|
|
uint32_t value;
|
|
uint32_t i;
|
|
|
|
(void)USB_DisableGlobalInt(USBx);
|
|
8007e20: 6878 ldr r0, [r7, #4]
|
|
8007e22: f7ff f99f bl 8007164 <USB_DisableGlobalInt>
|
|
|
|
/* Flush FIFO */
|
|
(void)USB_FlushTxFifo(USBx, 0x10U);
|
|
8007e26: 2110 movs r1, #16
|
|
8007e28: 6878 ldr r0, [r7, #4]
|
|
8007e2a: f7ff f9d7 bl 80071dc <USB_FlushTxFifo>
|
|
(void)USB_FlushRxFifo(USBx);
|
|
8007e2e: 6878 ldr r0, [r7, #4]
|
|
8007e30: f7ff f9fa bl 8007228 <USB_FlushRxFifo>
|
|
|
|
/* Flush out any leftover queued requests. */
|
|
for (i = 0U; i <= 15U; i++)
|
|
8007e34: 2300 movs r3, #0
|
|
8007e36: 613b str r3, [r7, #16]
|
|
8007e38: e01f b.n 8007e7a <USB_StopHost+0x6a>
|
|
{
|
|
value = USBx_HC(i)->HCCHAR;
|
|
8007e3a: 693b ldr r3, [r7, #16]
|
|
8007e3c: 015a lsls r2, r3, #5
|
|
8007e3e: 68fb ldr r3, [r7, #12]
|
|
8007e40: 4413 add r3, r2
|
|
8007e42: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007e46: 681b ldr r3, [r3, #0]
|
|
8007e48: 60bb str r3, [r7, #8]
|
|
value |= USB_OTG_HCCHAR_CHDIS;
|
|
8007e4a: 68bb ldr r3, [r7, #8]
|
|
8007e4c: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000
|
|
8007e50: 60bb str r3, [r7, #8]
|
|
value &= ~USB_OTG_HCCHAR_CHENA;
|
|
8007e52: 68bb ldr r3, [r7, #8]
|
|
8007e54: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
|
|
8007e58: 60bb str r3, [r7, #8]
|
|
value &= ~USB_OTG_HCCHAR_EPDIR;
|
|
8007e5a: 68bb ldr r3, [r7, #8]
|
|
8007e5c: f423 4300 bic.w r3, r3, #32768 ; 0x8000
|
|
8007e60: 60bb str r3, [r7, #8]
|
|
USBx_HC(i)->HCCHAR = value;
|
|
8007e62: 693b ldr r3, [r7, #16]
|
|
8007e64: 015a lsls r2, r3, #5
|
|
8007e66: 68fb ldr r3, [r7, #12]
|
|
8007e68: 4413 add r3, r2
|
|
8007e6a: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007e6e: 461a mov r2, r3
|
|
8007e70: 68bb ldr r3, [r7, #8]
|
|
8007e72: 6013 str r3, [r2, #0]
|
|
for (i = 0U; i <= 15U; i++)
|
|
8007e74: 693b ldr r3, [r7, #16]
|
|
8007e76: 3301 adds r3, #1
|
|
8007e78: 613b str r3, [r7, #16]
|
|
8007e7a: 693b ldr r3, [r7, #16]
|
|
8007e7c: 2b0f cmp r3, #15
|
|
8007e7e: d9dc bls.n 8007e3a <USB_StopHost+0x2a>
|
|
}
|
|
|
|
/* Halt all channels to put them into a known state. */
|
|
for (i = 0U; i <= 15U; i++)
|
|
8007e80: 2300 movs r3, #0
|
|
8007e82: 613b str r3, [r7, #16]
|
|
8007e84: e034 b.n 8007ef0 <USB_StopHost+0xe0>
|
|
{
|
|
value = USBx_HC(i)->HCCHAR;
|
|
8007e86: 693b ldr r3, [r7, #16]
|
|
8007e88: 015a lsls r2, r3, #5
|
|
8007e8a: 68fb ldr r3, [r7, #12]
|
|
8007e8c: 4413 add r3, r2
|
|
8007e8e: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007e92: 681b ldr r3, [r3, #0]
|
|
8007e94: 60bb str r3, [r7, #8]
|
|
value |= USB_OTG_HCCHAR_CHDIS;
|
|
8007e96: 68bb ldr r3, [r7, #8]
|
|
8007e98: f043 4380 orr.w r3, r3, #1073741824 ; 0x40000000
|
|
8007e9c: 60bb str r3, [r7, #8]
|
|
value |= USB_OTG_HCCHAR_CHENA;
|
|
8007e9e: 68bb ldr r3, [r7, #8]
|
|
8007ea0: f043 4300 orr.w r3, r3, #2147483648 ; 0x80000000
|
|
8007ea4: 60bb str r3, [r7, #8]
|
|
value &= ~USB_OTG_HCCHAR_EPDIR;
|
|
8007ea6: 68bb ldr r3, [r7, #8]
|
|
8007ea8: f423 4300 bic.w r3, r3, #32768 ; 0x8000
|
|
8007eac: 60bb str r3, [r7, #8]
|
|
USBx_HC(i)->HCCHAR = value;
|
|
8007eae: 693b ldr r3, [r7, #16]
|
|
8007eb0: 015a lsls r2, r3, #5
|
|
8007eb2: 68fb ldr r3, [r7, #12]
|
|
8007eb4: 4413 add r3, r2
|
|
8007eb6: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007eba: 461a mov r2, r3
|
|
8007ebc: 68bb ldr r3, [r7, #8]
|
|
8007ebe: 6013 str r3, [r2, #0]
|
|
|
|
do
|
|
{
|
|
if (++count > 1000U)
|
|
8007ec0: 697b ldr r3, [r7, #20]
|
|
8007ec2: 3301 adds r3, #1
|
|
8007ec4: 617b str r3, [r7, #20]
|
|
8007ec6: 697b ldr r3, [r7, #20]
|
|
8007ec8: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
|
|
8007ecc: d80c bhi.n 8007ee8 <USB_StopHost+0xd8>
|
|
{
|
|
break;
|
|
}
|
|
} while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
|
|
8007ece: 693b ldr r3, [r7, #16]
|
|
8007ed0: 015a lsls r2, r3, #5
|
|
8007ed2: 68fb ldr r3, [r7, #12]
|
|
8007ed4: 4413 add r3, r2
|
|
8007ed6: f503 63a0 add.w r3, r3, #1280 ; 0x500
|
|
8007eda: 681b ldr r3, [r3, #0]
|
|
8007edc: f003 4300 and.w r3, r3, #2147483648 ; 0x80000000
|
|
8007ee0: f1b3 4f00 cmp.w r3, #2147483648 ; 0x80000000
|
|
8007ee4: d0ec beq.n 8007ec0 <USB_StopHost+0xb0>
|
|
8007ee6: e000 b.n 8007eea <USB_StopHost+0xda>
|
|
break;
|
|
8007ee8: bf00 nop
|
|
for (i = 0U; i <= 15U; i++)
|
|
8007eea: 693b ldr r3, [r7, #16]
|
|
8007eec: 3301 adds r3, #1
|
|
8007eee: 613b str r3, [r7, #16]
|
|
8007ef0: 693b ldr r3, [r7, #16]
|
|
8007ef2: 2b0f cmp r3, #15
|
|
8007ef4: d9c7 bls.n 8007e86 <USB_StopHost+0x76>
|
|
}
|
|
|
|
/* Clear any pending Host interrupts */
|
|
USBx_HOST->HAINT = 0xFFFFFFFFU;
|
|
8007ef6: 68fb ldr r3, [r7, #12]
|
|
8007ef8: f503 6380 add.w r3, r3, #1024 ; 0x400
|
|
8007efc: 461a mov r2, r3
|
|
8007efe: f04f 33ff mov.w r3, #4294967295
|
|
8007f02: 6153 str r3, [r2, #20]
|
|
USBx->GINTSTS = 0xFFFFFFFFU;
|
|
8007f04: 687b ldr r3, [r7, #4]
|
|
8007f06: f04f 32ff mov.w r2, #4294967295
|
|
8007f0a: 615a str r2, [r3, #20]
|
|
|
|
(void)USB_EnableGlobalInt(USBx);
|
|
8007f0c: 6878 ldr r0, [r7, #4]
|
|
8007f0e: f7ff f918 bl 8007142 <USB_EnableGlobalInt>
|
|
|
|
return HAL_OK;
|
|
8007f12: 2300 movs r3, #0
|
|
}
|
|
8007f14: 4618 mov r0, r3
|
|
8007f16: 3718 adds r7, #24
|
|
8007f18: 46bd mov sp, r7
|
|
8007f1a: bd80 pop {r7, pc}
|
|
|
|
08007f1c <USBH_CDC_InterfaceInit>:
|
|
* The function init the CDC class.
|
|
* @param phost: Host handle
|
|
* @retval USBH Status
|
|
*/
|
|
static USBH_StatusTypeDef USBH_CDC_InterfaceInit(USBH_HandleTypeDef *phost)
|
|
{
|
|
8007f1c: b590 push {r4, r7, lr}
|
|
8007f1e: b089 sub sp, #36 ; 0x24
|
|
8007f20: af04 add r7, sp, #16
|
|
8007f22: 6078 str r0, [r7, #4]
|
|
|
|
USBH_StatusTypeDef status;
|
|
uint8_t interface;
|
|
CDC_HandleTypeDef *CDC_Handle;
|
|
|
|
interface = USBH_FindInterface(phost, COMMUNICATION_INTERFACE_CLASS_CODE,
|
|
8007f24: 2301 movs r3, #1
|
|
8007f26: 2202 movs r2, #2
|
|
8007f28: 2102 movs r1, #2
|
|
8007f2a: 6878 ldr r0, [r7, #4]
|
|
8007f2c: f000 fc68 bl 8008800 <USBH_FindInterface>
|
|
8007f30: 4603 mov r3, r0
|
|
8007f32: 73fb strb r3, [r7, #15]
|
|
ABSTRACT_CONTROL_MODEL, COMMON_AT_COMMAND);
|
|
|
|
if ((interface == 0xFFU) || (interface >= USBH_MAX_NUM_INTERFACES)) /* No Valid Interface */
|
|
8007f34: 7bfb ldrb r3, [r7, #15]
|
|
8007f36: 2bff cmp r3, #255 ; 0xff
|
|
8007f38: d002 beq.n 8007f40 <USBH_CDC_InterfaceInit+0x24>
|
|
8007f3a: 7bfb ldrb r3, [r7, #15]
|
|
8007f3c: 2b01 cmp r3, #1
|
|
8007f3e: d901 bls.n 8007f44 <USBH_CDC_InterfaceInit+0x28>
|
|
{
|
|
USBH_DbgLog("Cannot Find the interface for Communication Interface Class.", phost->pActiveClass->Name);
|
|
return USBH_FAIL;
|
|
8007f40: 2302 movs r3, #2
|
|
8007f42: e13d b.n 80081c0 <USBH_CDC_InterfaceInit+0x2a4>
|
|
}
|
|
|
|
status = USBH_SelectInterface(phost, interface);
|
|
8007f44: 7bfb ldrb r3, [r7, #15]
|
|
8007f46: 4619 mov r1, r3
|
|
8007f48: 6878 ldr r0, [r7, #4]
|
|
8007f4a: f000 fc3d bl 80087c8 <USBH_SelectInterface>
|
|
8007f4e: 4603 mov r3, r0
|
|
8007f50: 73bb strb r3, [r7, #14]
|
|
|
|
if (status != USBH_OK)
|
|
8007f52: 7bbb ldrb r3, [r7, #14]
|
|
8007f54: 2b00 cmp r3, #0
|
|
8007f56: d001 beq.n 8007f5c <USBH_CDC_InterfaceInit+0x40>
|
|
{
|
|
return USBH_FAIL;
|
|
8007f58: 2302 movs r3, #2
|
|
8007f5a: e131 b.n 80081c0 <USBH_CDC_InterfaceInit+0x2a4>
|
|
}
|
|
|
|
phost->pActiveClass->pData = (CDC_HandleTypeDef *)USBH_malloc(sizeof(CDC_HandleTypeDef));
|
|
8007f5c: 687b ldr r3, [r7, #4]
|
|
8007f5e: f8d3 437c ldr.w r4, [r3, #892] ; 0x37c
|
|
8007f62: 2050 movs r0, #80 ; 0x50
|
|
8007f64: f002 fa04 bl 800a370 <malloc>
|
|
8007f68: 4603 mov r3, r0
|
|
8007f6a: 61e3 str r3, [r4, #28]
|
|
CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
|
|
8007f6c: 687b ldr r3, [r7, #4]
|
|
8007f6e: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8007f72: 69db ldr r3, [r3, #28]
|
|
8007f74: 60bb str r3, [r7, #8]
|
|
|
|
if (CDC_Handle == NULL)
|
|
8007f76: 68bb ldr r3, [r7, #8]
|
|
8007f78: 2b00 cmp r3, #0
|
|
8007f7a: d101 bne.n 8007f80 <USBH_CDC_InterfaceInit+0x64>
|
|
{
|
|
USBH_DbgLog("Cannot allocate memory for CDC Handle");
|
|
return USBH_FAIL;
|
|
8007f7c: 2302 movs r3, #2
|
|
8007f7e: e11f b.n 80081c0 <USBH_CDC_InterfaceInit+0x2a4>
|
|
}
|
|
|
|
/* Initialize cdc handler */
|
|
USBH_memset(CDC_Handle, 0, sizeof(CDC_HandleTypeDef));
|
|
8007f80: 2250 movs r2, #80 ; 0x50
|
|
8007f82: 2100 movs r1, #0
|
|
8007f84: 68b8 ldr r0, [r7, #8]
|
|
8007f86: f002 fa03 bl 800a390 <memset>
|
|
|
|
/*Collect the notification endpoint address and length*/
|
|
if (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80U)
|
|
8007f8a: 7bfb ldrb r3, [r7, #15]
|
|
8007f8c: 687a ldr r2, [r7, #4]
|
|
8007f8e: 211a movs r1, #26
|
|
8007f90: fb01 f303 mul.w r3, r1, r3
|
|
8007f94: 4413 add r3, r2
|
|
8007f96: f203 334e addw r3, r3, #846 ; 0x34e
|
|
8007f9a: 781b ldrb r3, [r3, #0]
|
|
8007f9c: b25b sxtb r3, r3
|
|
8007f9e: 2b00 cmp r3, #0
|
|
8007fa0: da15 bge.n 8007fce <USBH_CDC_InterfaceInit+0xb2>
|
|
{
|
|
CDC_Handle->CommItf.NotifEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress;
|
|
8007fa2: 7bfb ldrb r3, [r7, #15]
|
|
8007fa4: 687a ldr r2, [r7, #4]
|
|
8007fa6: 211a movs r1, #26
|
|
8007fa8: fb01 f303 mul.w r3, r1, r3
|
|
8007fac: 4413 add r3, r2
|
|
8007fae: f203 334e addw r3, r3, #846 ; 0x34e
|
|
8007fb2: 781a ldrb r2, [r3, #0]
|
|
8007fb4: 68bb ldr r3, [r7, #8]
|
|
8007fb6: 705a strb r2, [r3, #1]
|
|
CDC_Handle->CommItf.NotifEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize;
|
|
8007fb8: 7bfb ldrb r3, [r7, #15]
|
|
8007fba: 687a ldr r2, [r7, #4]
|
|
8007fbc: 211a movs r1, #26
|
|
8007fbe: fb01 f303 mul.w r3, r1, r3
|
|
8007fc2: 4413 add r3, r2
|
|
8007fc4: f503 7354 add.w r3, r3, #848 ; 0x350
|
|
8007fc8: 881a ldrh r2, [r3, #0]
|
|
8007fca: 68bb ldr r3, [r7, #8]
|
|
8007fcc: 815a strh r2, [r3, #10]
|
|
}
|
|
|
|
/*Allocate the length for host channel number in*/
|
|
CDC_Handle->CommItf.NotifPipe = USBH_AllocPipe(phost, CDC_Handle->CommItf.NotifEp);
|
|
8007fce: 68bb ldr r3, [r7, #8]
|
|
8007fd0: 785b ldrb r3, [r3, #1]
|
|
8007fd2: 4619 mov r1, r3
|
|
8007fd4: 6878 ldr r0, [r7, #4]
|
|
8007fd6: f001 fe36 bl 8009c46 <USBH_AllocPipe>
|
|
8007fda: 4603 mov r3, r0
|
|
8007fdc: 461a mov r2, r3
|
|
8007fde: 68bb ldr r3, [r7, #8]
|
|
8007fe0: 701a strb r2, [r3, #0]
|
|
|
|
/* Open pipe for Notification endpoint */
|
|
USBH_OpenPipe(phost, CDC_Handle->CommItf.NotifPipe, CDC_Handle->CommItf.NotifEp,
|
|
8007fe2: 68bb ldr r3, [r7, #8]
|
|
8007fe4: 7819 ldrb r1, [r3, #0]
|
|
8007fe6: 68bb ldr r3, [r7, #8]
|
|
8007fe8: 7858 ldrb r0, [r3, #1]
|
|
8007fea: 687b ldr r3, [r7, #4]
|
|
8007fec: f893 431c ldrb.w r4, [r3, #796] ; 0x31c
|
|
8007ff0: 687b ldr r3, [r7, #4]
|
|
8007ff2: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
8007ff6: 68ba ldr r2, [r7, #8]
|
|
8007ff8: 8952 ldrh r2, [r2, #10]
|
|
8007ffa: 9202 str r2, [sp, #8]
|
|
8007ffc: 2203 movs r2, #3
|
|
8007ffe: 9201 str r2, [sp, #4]
|
|
8008000: 9300 str r3, [sp, #0]
|
|
8008002: 4623 mov r3, r4
|
|
8008004: 4602 mov r2, r0
|
|
8008006: 6878 ldr r0, [r7, #4]
|
|
8008008: f001 fdee bl 8009be8 <USBH_OpenPipe>
|
|
phost->device.address, phost->device.speed, USB_EP_TYPE_INTR,
|
|
CDC_Handle->CommItf.NotifEpSize);
|
|
|
|
USBH_LL_SetToggle(phost, CDC_Handle->CommItf.NotifPipe, 0U);
|
|
800800c: 68bb ldr r3, [r7, #8]
|
|
800800e: 781b ldrb r3, [r3, #0]
|
|
8008010: 2200 movs r2, #0
|
|
8008012: 4619 mov r1, r3
|
|
8008014: 6878 ldr r0, [r7, #4]
|
|
8008016: f002 f8fb bl 800a210 <USBH_LL_SetToggle>
|
|
|
|
interface = USBH_FindInterface(phost, DATA_INTERFACE_CLASS_CODE,
|
|
800801a: 2300 movs r3, #0
|
|
800801c: 2200 movs r2, #0
|
|
800801e: 210a movs r1, #10
|
|
8008020: 6878 ldr r0, [r7, #4]
|
|
8008022: f000 fbed bl 8008800 <USBH_FindInterface>
|
|
8008026: 4603 mov r3, r0
|
|
8008028: 73fb strb r3, [r7, #15]
|
|
RESERVED, NO_CLASS_SPECIFIC_PROTOCOL_CODE);
|
|
|
|
if ((interface == 0xFFU) || (interface >= USBH_MAX_NUM_INTERFACES)) /* No Valid Interface */
|
|
800802a: 7bfb ldrb r3, [r7, #15]
|
|
800802c: 2bff cmp r3, #255 ; 0xff
|
|
800802e: d002 beq.n 8008036 <USBH_CDC_InterfaceInit+0x11a>
|
|
8008030: 7bfb ldrb r3, [r7, #15]
|
|
8008032: 2b01 cmp r3, #1
|
|
8008034: d901 bls.n 800803a <USBH_CDC_InterfaceInit+0x11e>
|
|
{
|
|
USBH_DbgLog("Cannot Find the interface for Data Interface Class.", phost->pActiveClass->Name);
|
|
return USBH_FAIL;
|
|
8008036: 2302 movs r3, #2
|
|
8008038: e0c2 b.n 80081c0 <USBH_CDC_InterfaceInit+0x2a4>
|
|
}
|
|
|
|
/*Collect the class specific endpoint address and length*/
|
|
if (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress & 0x80U)
|
|
800803a: 7bfb ldrb r3, [r7, #15]
|
|
800803c: 687a ldr r2, [r7, #4]
|
|
800803e: 211a movs r1, #26
|
|
8008040: fb01 f303 mul.w r3, r1, r3
|
|
8008044: 4413 add r3, r2
|
|
8008046: f203 334e addw r3, r3, #846 ; 0x34e
|
|
800804a: 781b ldrb r3, [r3, #0]
|
|
800804c: b25b sxtb r3, r3
|
|
800804e: 2b00 cmp r3, #0
|
|
8008050: da16 bge.n 8008080 <USBH_CDC_InterfaceInit+0x164>
|
|
{
|
|
CDC_Handle->DataItf.InEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress;
|
|
8008052: 7bfb ldrb r3, [r7, #15]
|
|
8008054: 687a ldr r2, [r7, #4]
|
|
8008056: 211a movs r1, #26
|
|
8008058: fb01 f303 mul.w r3, r1, r3
|
|
800805c: 4413 add r3, r2
|
|
800805e: f203 334e addw r3, r3, #846 ; 0x34e
|
|
8008062: 781a ldrb r2, [r3, #0]
|
|
8008064: 68bb ldr r3, [r7, #8]
|
|
8008066: 73da strb r2, [r3, #15]
|
|
CDC_Handle->DataItf.InEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize;
|
|
8008068: 7bfb ldrb r3, [r7, #15]
|
|
800806a: 687a ldr r2, [r7, #4]
|
|
800806c: 211a movs r1, #26
|
|
800806e: fb01 f303 mul.w r3, r1, r3
|
|
8008072: 4413 add r3, r2
|
|
8008074: f503 7354 add.w r3, r3, #848 ; 0x350
|
|
8008078: 881a ldrh r2, [r3, #0]
|
|
800807a: 68bb ldr r3, [r7, #8]
|
|
800807c: 835a strh r2, [r3, #26]
|
|
800807e: e015 b.n 80080ac <USBH_CDC_InterfaceInit+0x190>
|
|
}
|
|
else
|
|
{
|
|
CDC_Handle->DataItf.OutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].bEndpointAddress;
|
|
8008080: 7bfb ldrb r3, [r7, #15]
|
|
8008082: 687a ldr r2, [r7, #4]
|
|
8008084: 211a movs r1, #26
|
|
8008086: fb01 f303 mul.w r3, r1, r3
|
|
800808a: 4413 add r3, r2
|
|
800808c: f203 334e addw r3, r3, #846 ; 0x34e
|
|
8008090: 781a ldrb r2, [r3, #0]
|
|
8008092: 68bb ldr r3, [r7, #8]
|
|
8008094: 739a strb r2, [r3, #14]
|
|
CDC_Handle->DataItf.OutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[0].wMaxPacketSize;
|
|
8008096: 7bfb ldrb r3, [r7, #15]
|
|
8008098: 687a ldr r2, [r7, #4]
|
|
800809a: 211a movs r1, #26
|
|
800809c: fb01 f303 mul.w r3, r1, r3
|
|
80080a0: 4413 add r3, r2
|
|
80080a2: f503 7354 add.w r3, r3, #848 ; 0x350
|
|
80080a6: 881a ldrh r2, [r3, #0]
|
|
80080a8: 68bb ldr r3, [r7, #8]
|
|
80080aa: 831a strh r2, [r3, #24]
|
|
}
|
|
|
|
if (phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress & 0x80U)
|
|
80080ac: 7bfb ldrb r3, [r7, #15]
|
|
80080ae: 687a ldr r2, [r7, #4]
|
|
80080b0: 211a movs r1, #26
|
|
80080b2: fb01 f303 mul.w r3, r1, r3
|
|
80080b6: 4413 add r3, r2
|
|
80080b8: f203 3356 addw r3, r3, #854 ; 0x356
|
|
80080bc: 781b ldrb r3, [r3, #0]
|
|
80080be: b25b sxtb r3, r3
|
|
80080c0: 2b00 cmp r3, #0
|
|
80080c2: da16 bge.n 80080f2 <USBH_CDC_InterfaceInit+0x1d6>
|
|
{
|
|
CDC_Handle->DataItf.InEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress;
|
|
80080c4: 7bfb ldrb r3, [r7, #15]
|
|
80080c6: 687a ldr r2, [r7, #4]
|
|
80080c8: 211a movs r1, #26
|
|
80080ca: fb01 f303 mul.w r3, r1, r3
|
|
80080ce: 4413 add r3, r2
|
|
80080d0: f203 3356 addw r3, r3, #854 ; 0x356
|
|
80080d4: 781a ldrb r2, [r3, #0]
|
|
80080d6: 68bb ldr r3, [r7, #8]
|
|
80080d8: 73da strb r2, [r3, #15]
|
|
CDC_Handle->DataItf.InEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].wMaxPacketSize;
|
|
80080da: 7bfb ldrb r3, [r7, #15]
|
|
80080dc: 687a ldr r2, [r7, #4]
|
|
80080de: 211a movs r1, #26
|
|
80080e0: fb01 f303 mul.w r3, r1, r3
|
|
80080e4: 4413 add r3, r2
|
|
80080e6: f503 7356 add.w r3, r3, #856 ; 0x358
|
|
80080ea: 881a ldrh r2, [r3, #0]
|
|
80080ec: 68bb ldr r3, [r7, #8]
|
|
80080ee: 835a strh r2, [r3, #26]
|
|
80080f0: e015 b.n 800811e <USBH_CDC_InterfaceInit+0x202>
|
|
}
|
|
else
|
|
{
|
|
CDC_Handle->DataItf.OutEp = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].bEndpointAddress;
|
|
80080f2: 7bfb ldrb r3, [r7, #15]
|
|
80080f4: 687a ldr r2, [r7, #4]
|
|
80080f6: 211a movs r1, #26
|
|
80080f8: fb01 f303 mul.w r3, r1, r3
|
|
80080fc: 4413 add r3, r2
|
|
80080fe: f203 3356 addw r3, r3, #854 ; 0x356
|
|
8008102: 781a ldrb r2, [r3, #0]
|
|
8008104: 68bb ldr r3, [r7, #8]
|
|
8008106: 739a strb r2, [r3, #14]
|
|
CDC_Handle->DataItf.OutEpSize = phost->device.CfgDesc.Itf_Desc[interface].Ep_Desc[1].wMaxPacketSize;
|
|
8008108: 7bfb ldrb r3, [r7, #15]
|
|
800810a: 687a ldr r2, [r7, #4]
|
|
800810c: 211a movs r1, #26
|
|
800810e: fb01 f303 mul.w r3, r1, r3
|
|
8008112: 4413 add r3, r2
|
|
8008114: f503 7356 add.w r3, r3, #856 ; 0x358
|
|
8008118: 881a ldrh r2, [r3, #0]
|
|
800811a: 68bb ldr r3, [r7, #8]
|
|
800811c: 831a strh r2, [r3, #24]
|
|
}
|
|
|
|
/*Allocate the length for host channel number out*/
|
|
CDC_Handle->DataItf.OutPipe = USBH_AllocPipe(phost, CDC_Handle->DataItf.OutEp);
|
|
800811e: 68bb ldr r3, [r7, #8]
|
|
8008120: 7b9b ldrb r3, [r3, #14]
|
|
8008122: 4619 mov r1, r3
|
|
8008124: 6878 ldr r0, [r7, #4]
|
|
8008126: f001 fd8e bl 8009c46 <USBH_AllocPipe>
|
|
800812a: 4603 mov r3, r0
|
|
800812c: 461a mov r2, r3
|
|
800812e: 68bb ldr r3, [r7, #8]
|
|
8008130: 735a strb r2, [r3, #13]
|
|
|
|
/*Allocate the length for host channel number in*/
|
|
CDC_Handle->DataItf.InPipe = USBH_AllocPipe(phost, CDC_Handle->DataItf.InEp);
|
|
8008132: 68bb ldr r3, [r7, #8]
|
|
8008134: 7bdb ldrb r3, [r3, #15]
|
|
8008136: 4619 mov r1, r3
|
|
8008138: 6878 ldr r0, [r7, #4]
|
|
800813a: f001 fd84 bl 8009c46 <USBH_AllocPipe>
|
|
800813e: 4603 mov r3, r0
|
|
8008140: 461a mov r2, r3
|
|
8008142: 68bb ldr r3, [r7, #8]
|
|
8008144: 731a strb r2, [r3, #12]
|
|
|
|
/* Open channel for OUT endpoint */
|
|
USBH_OpenPipe(phost, CDC_Handle->DataItf.OutPipe, CDC_Handle->DataItf.OutEp,
|
|
8008146: 68bb ldr r3, [r7, #8]
|
|
8008148: 7b59 ldrb r1, [r3, #13]
|
|
800814a: 68bb ldr r3, [r7, #8]
|
|
800814c: 7b98 ldrb r0, [r3, #14]
|
|
800814e: 687b ldr r3, [r7, #4]
|
|
8008150: f893 431c ldrb.w r4, [r3, #796] ; 0x31c
|
|
8008154: 687b ldr r3, [r7, #4]
|
|
8008156: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
800815a: 68ba ldr r2, [r7, #8]
|
|
800815c: 8b12 ldrh r2, [r2, #24]
|
|
800815e: 9202 str r2, [sp, #8]
|
|
8008160: 2202 movs r2, #2
|
|
8008162: 9201 str r2, [sp, #4]
|
|
8008164: 9300 str r3, [sp, #0]
|
|
8008166: 4623 mov r3, r4
|
|
8008168: 4602 mov r2, r0
|
|
800816a: 6878 ldr r0, [r7, #4]
|
|
800816c: f001 fd3c bl 8009be8 <USBH_OpenPipe>
|
|
phost->device.address, phost->device.speed, USB_EP_TYPE_BULK,
|
|
CDC_Handle->DataItf.OutEpSize);
|
|
|
|
/* Open channel for IN endpoint */
|
|
USBH_OpenPipe(phost, CDC_Handle->DataItf.InPipe, CDC_Handle->DataItf.InEp,
|
|
8008170: 68bb ldr r3, [r7, #8]
|
|
8008172: 7b19 ldrb r1, [r3, #12]
|
|
8008174: 68bb ldr r3, [r7, #8]
|
|
8008176: 7bd8 ldrb r0, [r3, #15]
|
|
8008178: 687b ldr r3, [r7, #4]
|
|
800817a: f893 431c ldrb.w r4, [r3, #796] ; 0x31c
|
|
800817e: 687b ldr r3, [r7, #4]
|
|
8008180: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
8008184: 68ba ldr r2, [r7, #8]
|
|
8008186: 8b52 ldrh r2, [r2, #26]
|
|
8008188: 9202 str r2, [sp, #8]
|
|
800818a: 2202 movs r2, #2
|
|
800818c: 9201 str r2, [sp, #4]
|
|
800818e: 9300 str r3, [sp, #0]
|
|
8008190: 4623 mov r3, r4
|
|
8008192: 4602 mov r2, r0
|
|
8008194: 6878 ldr r0, [r7, #4]
|
|
8008196: f001 fd27 bl 8009be8 <USBH_OpenPipe>
|
|
phost->device.address, phost->device.speed, USB_EP_TYPE_BULK,
|
|
CDC_Handle->DataItf.InEpSize);
|
|
|
|
CDC_Handle->state = CDC_IDLE_STATE;
|
|
800819a: 68bb ldr r3, [r7, #8]
|
|
800819c: 2200 movs r2, #0
|
|
800819e: f883 204c strb.w r2, [r3, #76] ; 0x4c
|
|
|
|
USBH_LL_SetToggle(phost, CDC_Handle->DataItf.OutPipe, 0U);
|
|
80081a2: 68bb ldr r3, [r7, #8]
|
|
80081a4: 7b5b ldrb r3, [r3, #13]
|
|
80081a6: 2200 movs r2, #0
|
|
80081a8: 4619 mov r1, r3
|
|
80081aa: 6878 ldr r0, [r7, #4]
|
|
80081ac: f002 f830 bl 800a210 <USBH_LL_SetToggle>
|
|
USBH_LL_SetToggle(phost, CDC_Handle->DataItf.InPipe, 0U);
|
|
80081b0: 68bb ldr r3, [r7, #8]
|
|
80081b2: 7b1b ldrb r3, [r3, #12]
|
|
80081b4: 2200 movs r2, #0
|
|
80081b6: 4619 mov r1, r3
|
|
80081b8: 6878 ldr r0, [r7, #4]
|
|
80081ba: f002 f829 bl 800a210 <USBH_LL_SetToggle>
|
|
|
|
return USBH_OK;
|
|
80081be: 2300 movs r3, #0
|
|
}
|
|
80081c0: 4618 mov r0, r3
|
|
80081c2: 3714 adds r7, #20
|
|
80081c4: 46bd mov sp, r7
|
|
80081c6: bd90 pop {r4, r7, pc}
|
|
|
|
080081c8 <USBH_CDC_InterfaceDeInit>:
|
|
* The function DeInit the Pipes used for the CDC class.
|
|
* @param phost: Host handle
|
|
* @retval USBH Status
|
|
*/
|
|
static USBH_StatusTypeDef USBH_CDC_InterfaceDeInit(USBH_HandleTypeDef *phost)
|
|
{
|
|
80081c8: b580 push {r7, lr}
|
|
80081ca: b084 sub sp, #16
|
|
80081cc: af00 add r7, sp, #0
|
|
80081ce: 6078 str r0, [r7, #4]
|
|
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
|
|
80081d0: 687b ldr r3, [r7, #4]
|
|
80081d2: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
80081d6: 69db ldr r3, [r3, #28]
|
|
80081d8: 60fb str r3, [r7, #12]
|
|
|
|
if (CDC_Handle->CommItf.NotifPipe)
|
|
80081da: 68fb ldr r3, [r7, #12]
|
|
80081dc: 781b ldrb r3, [r3, #0]
|
|
80081de: 2b00 cmp r3, #0
|
|
80081e0: d00e beq.n 8008200 <USBH_CDC_InterfaceDeInit+0x38>
|
|
{
|
|
USBH_ClosePipe(phost, CDC_Handle->CommItf.NotifPipe);
|
|
80081e2: 68fb ldr r3, [r7, #12]
|
|
80081e4: 781b ldrb r3, [r3, #0]
|
|
80081e6: 4619 mov r1, r3
|
|
80081e8: 6878 ldr r0, [r7, #4]
|
|
80081ea: f001 fd1c bl 8009c26 <USBH_ClosePipe>
|
|
USBH_FreePipe(phost, CDC_Handle->CommItf.NotifPipe);
|
|
80081ee: 68fb ldr r3, [r7, #12]
|
|
80081f0: 781b ldrb r3, [r3, #0]
|
|
80081f2: 4619 mov r1, r3
|
|
80081f4: 6878 ldr r0, [r7, #4]
|
|
80081f6: f001 fd47 bl 8009c88 <USBH_FreePipe>
|
|
CDC_Handle->CommItf.NotifPipe = 0U; /* Reset the Channel as Free */
|
|
80081fa: 68fb ldr r3, [r7, #12]
|
|
80081fc: 2200 movs r2, #0
|
|
80081fe: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
if (CDC_Handle->DataItf.InPipe)
|
|
8008200: 68fb ldr r3, [r7, #12]
|
|
8008202: 7b1b ldrb r3, [r3, #12]
|
|
8008204: 2b00 cmp r3, #0
|
|
8008206: d00e beq.n 8008226 <USBH_CDC_InterfaceDeInit+0x5e>
|
|
{
|
|
USBH_ClosePipe(phost, CDC_Handle->DataItf.InPipe);
|
|
8008208: 68fb ldr r3, [r7, #12]
|
|
800820a: 7b1b ldrb r3, [r3, #12]
|
|
800820c: 4619 mov r1, r3
|
|
800820e: 6878 ldr r0, [r7, #4]
|
|
8008210: f001 fd09 bl 8009c26 <USBH_ClosePipe>
|
|
USBH_FreePipe(phost, CDC_Handle->DataItf.InPipe);
|
|
8008214: 68fb ldr r3, [r7, #12]
|
|
8008216: 7b1b ldrb r3, [r3, #12]
|
|
8008218: 4619 mov r1, r3
|
|
800821a: 6878 ldr r0, [r7, #4]
|
|
800821c: f001 fd34 bl 8009c88 <USBH_FreePipe>
|
|
CDC_Handle->DataItf.InPipe = 0U; /* Reset the Channel as Free */
|
|
8008220: 68fb ldr r3, [r7, #12]
|
|
8008222: 2200 movs r2, #0
|
|
8008224: 731a strb r2, [r3, #12]
|
|
}
|
|
|
|
if (CDC_Handle->DataItf.OutPipe)
|
|
8008226: 68fb ldr r3, [r7, #12]
|
|
8008228: 7b5b ldrb r3, [r3, #13]
|
|
800822a: 2b00 cmp r3, #0
|
|
800822c: d00e beq.n 800824c <USBH_CDC_InterfaceDeInit+0x84>
|
|
{
|
|
USBH_ClosePipe(phost, CDC_Handle->DataItf.OutPipe);
|
|
800822e: 68fb ldr r3, [r7, #12]
|
|
8008230: 7b5b ldrb r3, [r3, #13]
|
|
8008232: 4619 mov r1, r3
|
|
8008234: 6878 ldr r0, [r7, #4]
|
|
8008236: f001 fcf6 bl 8009c26 <USBH_ClosePipe>
|
|
USBH_FreePipe(phost, CDC_Handle->DataItf.OutPipe);
|
|
800823a: 68fb ldr r3, [r7, #12]
|
|
800823c: 7b5b ldrb r3, [r3, #13]
|
|
800823e: 4619 mov r1, r3
|
|
8008240: 6878 ldr r0, [r7, #4]
|
|
8008242: f001 fd21 bl 8009c88 <USBH_FreePipe>
|
|
CDC_Handle->DataItf.OutPipe = 0U; /* Reset the Channel as Free */
|
|
8008246: 68fb ldr r3, [r7, #12]
|
|
8008248: 2200 movs r2, #0
|
|
800824a: 735a strb r2, [r3, #13]
|
|
}
|
|
|
|
if (phost->pActiveClass->pData)
|
|
800824c: 687b ldr r3, [r7, #4]
|
|
800824e: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008252: 69db ldr r3, [r3, #28]
|
|
8008254: 2b00 cmp r3, #0
|
|
8008256: d00b beq.n 8008270 <USBH_CDC_InterfaceDeInit+0xa8>
|
|
{
|
|
USBH_free(phost->pActiveClass->pData);
|
|
8008258: 687b ldr r3, [r7, #4]
|
|
800825a: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
800825e: 69db ldr r3, [r3, #28]
|
|
8008260: 4618 mov r0, r3
|
|
8008262: f002 f88d bl 800a380 <free>
|
|
phost->pActiveClass->pData = 0U;
|
|
8008266: 687b ldr r3, [r7, #4]
|
|
8008268: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
800826c: 2200 movs r2, #0
|
|
800826e: 61da str r2, [r3, #28]
|
|
}
|
|
|
|
return USBH_OK;
|
|
8008270: 2300 movs r3, #0
|
|
}
|
|
8008272: 4618 mov r0, r3
|
|
8008274: 3710 adds r7, #16
|
|
8008276: 46bd mov sp, r7
|
|
8008278: bd80 pop {r7, pc}
|
|
|
|
0800827a <USBH_CDC_ClassRequest>:
|
|
* for CDC class.
|
|
* @param phost: Host handle
|
|
* @retval USBH Status
|
|
*/
|
|
static USBH_StatusTypeDef USBH_CDC_ClassRequest(USBH_HandleTypeDef *phost)
|
|
{
|
|
800827a: b580 push {r7, lr}
|
|
800827c: b084 sub sp, #16
|
|
800827e: af00 add r7, sp, #0
|
|
8008280: 6078 str r0, [r7, #4]
|
|
USBH_StatusTypeDef status;
|
|
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
|
|
8008282: 687b ldr r3, [r7, #4]
|
|
8008284: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008288: 69db ldr r3, [r3, #28]
|
|
800828a: 60fb str r3, [r7, #12]
|
|
|
|
/* Issue the get line coding request */
|
|
status = GetLineCoding(phost, &CDC_Handle->LineCoding);
|
|
800828c: 68fb ldr r3, [r7, #12]
|
|
800828e: 3340 adds r3, #64 ; 0x40
|
|
8008290: 4619 mov r1, r3
|
|
8008292: 6878 ldr r0, [r7, #4]
|
|
8008294: f000 f8b1 bl 80083fa <GetLineCoding>
|
|
8008298: 4603 mov r3, r0
|
|
800829a: 72fb strb r3, [r7, #11]
|
|
if (status == USBH_OK)
|
|
800829c: 7afb ldrb r3, [r7, #11]
|
|
800829e: 2b00 cmp r3, #0
|
|
80082a0: d105 bne.n 80082ae <USBH_CDC_ClassRequest+0x34>
|
|
{
|
|
phost->pUser(phost, HOST_USER_CLASS_ACTIVE);
|
|
80082a2: 687b ldr r3, [r7, #4]
|
|
80082a4: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
|
|
80082a8: 2102 movs r1, #2
|
|
80082aa: 6878 ldr r0, [r7, #4]
|
|
80082ac: 4798 blx r3
|
|
else
|
|
{
|
|
/* .. */
|
|
}
|
|
|
|
return status;
|
|
80082ae: 7afb ldrb r3, [r7, #11]
|
|
}
|
|
80082b0: 4618 mov r0, r3
|
|
80082b2: 3710 adds r7, #16
|
|
80082b4: 46bd mov sp, r7
|
|
80082b6: bd80 pop {r7, pc}
|
|
|
|
080082b8 <USBH_CDC_Process>:
|
|
* The function is for managing state machine for CDC data transfers
|
|
* @param phost: Host handle
|
|
* @retval USBH Status
|
|
*/
|
|
static USBH_StatusTypeDef USBH_CDC_Process(USBH_HandleTypeDef *phost)
|
|
{
|
|
80082b8: b580 push {r7, lr}
|
|
80082ba: b084 sub sp, #16
|
|
80082bc: af00 add r7, sp, #0
|
|
80082be: 6078 str r0, [r7, #4]
|
|
USBH_StatusTypeDef status = USBH_BUSY;
|
|
80082c0: 2301 movs r3, #1
|
|
80082c2: 73fb strb r3, [r7, #15]
|
|
USBH_StatusTypeDef req_status = USBH_OK;
|
|
80082c4: 2300 movs r3, #0
|
|
80082c6: 73bb strb r3, [r7, #14]
|
|
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
|
|
80082c8: 687b ldr r3, [r7, #4]
|
|
80082ca: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
80082ce: 69db ldr r3, [r3, #28]
|
|
80082d0: 60bb str r3, [r7, #8]
|
|
|
|
switch (CDC_Handle->state)
|
|
80082d2: 68bb ldr r3, [r7, #8]
|
|
80082d4: f893 304c ldrb.w r3, [r3, #76] ; 0x4c
|
|
80082d8: 2b04 cmp r3, #4
|
|
80082da: d877 bhi.n 80083cc <USBH_CDC_Process+0x114>
|
|
80082dc: a201 add r2, pc, #4 ; (adr r2, 80082e4 <USBH_CDC_Process+0x2c>)
|
|
80082de: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
80082e2: bf00 nop
|
|
80082e4: 080082f9 .word 0x080082f9
|
|
80082e8: 080082ff .word 0x080082ff
|
|
80082ec: 0800832f .word 0x0800832f
|
|
80082f0: 080083a3 .word 0x080083a3
|
|
80082f4: 080083b1 .word 0x080083b1
|
|
{
|
|
|
|
case CDC_IDLE_STATE:
|
|
status = USBH_OK;
|
|
80082f8: 2300 movs r3, #0
|
|
80082fa: 73fb strb r3, [r7, #15]
|
|
break;
|
|
80082fc: e06d b.n 80083da <USBH_CDC_Process+0x122>
|
|
|
|
case CDC_SET_LINE_CODING_STATE:
|
|
req_status = SetLineCoding(phost, CDC_Handle->pUserLineCoding);
|
|
80082fe: 68bb ldr r3, [r7, #8]
|
|
8008300: 6c9b ldr r3, [r3, #72] ; 0x48
|
|
8008302: 4619 mov r1, r3
|
|
8008304: 6878 ldr r0, [r7, #4]
|
|
8008306: f000 f897 bl 8008438 <SetLineCoding>
|
|
800830a: 4603 mov r3, r0
|
|
800830c: 73bb strb r3, [r7, #14]
|
|
|
|
if (req_status == USBH_OK)
|
|
800830e: 7bbb ldrb r3, [r7, #14]
|
|
8008310: 2b00 cmp r3, #0
|
|
8008312: d104 bne.n 800831e <USBH_CDC_Process+0x66>
|
|
{
|
|
CDC_Handle->state = CDC_GET_LAST_LINE_CODING_STATE;
|
|
8008314: 68bb ldr r3, [r7, #8]
|
|
8008316: 2202 movs r2, #2
|
|
8008318: f883 204c strb.w r2, [r3, #76] ; 0x4c
|
|
if (req_status != USBH_BUSY)
|
|
{
|
|
CDC_Handle->state = CDC_ERROR_STATE;
|
|
}
|
|
}
|
|
break;
|
|
800831c: e058 b.n 80083d0 <USBH_CDC_Process+0x118>
|
|
if (req_status != USBH_BUSY)
|
|
800831e: 7bbb ldrb r3, [r7, #14]
|
|
8008320: 2b01 cmp r3, #1
|
|
8008322: d055 beq.n 80083d0 <USBH_CDC_Process+0x118>
|
|
CDC_Handle->state = CDC_ERROR_STATE;
|
|
8008324: 68bb ldr r3, [r7, #8]
|
|
8008326: 2204 movs r2, #4
|
|
8008328: f883 204c strb.w r2, [r3, #76] ; 0x4c
|
|
break;
|
|
800832c: e050 b.n 80083d0 <USBH_CDC_Process+0x118>
|
|
|
|
|
|
case CDC_GET_LAST_LINE_CODING_STATE:
|
|
req_status = GetLineCoding(phost, &(CDC_Handle->LineCoding));
|
|
800832e: 68bb ldr r3, [r7, #8]
|
|
8008330: 3340 adds r3, #64 ; 0x40
|
|
8008332: 4619 mov r1, r3
|
|
8008334: 6878 ldr r0, [r7, #4]
|
|
8008336: f000 f860 bl 80083fa <GetLineCoding>
|
|
800833a: 4603 mov r3, r0
|
|
800833c: 73bb strb r3, [r7, #14]
|
|
|
|
if (req_status == USBH_OK)
|
|
800833e: 7bbb ldrb r3, [r7, #14]
|
|
8008340: 2b00 cmp r3, #0
|
|
8008342: d126 bne.n 8008392 <USBH_CDC_Process+0xda>
|
|
{
|
|
CDC_Handle->state = CDC_IDLE_STATE;
|
|
8008344: 68bb ldr r3, [r7, #8]
|
|
8008346: 2200 movs r2, #0
|
|
8008348: f883 204c strb.w r2, [r3, #76] ; 0x4c
|
|
|
|
if ((CDC_Handle->LineCoding.b.bCharFormat == CDC_Handle->pUserLineCoding->b.bCharFormat) &&
|
|
800834c: 68bb ldr r3, [r7, #8]
|
|
800834e: f893 2044 ldrb.w r2, [r3, #68] ; 0x44
|
|
8008352: 68bb ldr r3, [r7, #8]
|
|
8008354: 6c9b ldr r3, [r3, #72] ; 0x48
|
|
8008356: 791b ldrb r3, [r3, #4]
|
|
8008358: 429a cmp r2, r3
|
|
800835a: d13b bne.n 80083d4 <USBH_CDC_Process+0x11c>
|
|
(CDC_Handle->LineCoding.b.bDataBits == CDC_Handle->pUserLineCoding->b.bDataBits) &&
|
|
800835c: 68bb ldr r3, [r7, #8]
|
|
800835e: f893 2046 ldrb.w r2, [r3, #70] ; 0x46
|
|
8008362: 68bb ldr r3, [r7, #8]
|
|
8008364: 6c9b ldr r3, [r3, #72] ; 0x48
|
|
8008366: 799b ldrb r3, [r3, #6]
|
|
if ((CDC_Handle->LineCoding.b.bCharFormat == CDC_Handle->pUserLineCoding->b.bCharFormat) &&
|
|
8008368: 429a cmp r2, r3
|
|
800836a: d133 bne.n 80083d4 <USBH_CDC_Process+0x11c>
|
|
(CDC_Handle->LineCoding.b.bParityType == CDC_Handle->pUserLineCoding->b.bParityType) &&
|
|
800836c: 68bb ldr r3, [r7, #8]
|
|
800836e: f893 2045 ldrb.w r2, [r3, #69] ; 0x45
|
|
8008372: 68bb ldr r3, [r7, #8]
|
|
8008374: 6c9b ldr r3, [r3, #72] ; 0x48
|
|
8008376: 795b ldrb r3, [r3, #5]
|
|
(CDC_Handle->LineCoding.b.bDataBits == CDC_Handle->pUserLineCoding->b.bDataBits) &&
|
|
8008378: 429a cmp r2, r3
|
|
800837a: d12b bne.n 80083d4 <USBH_CDC_Process+0x11c>
|
|
(CDC_Handle->LineCoding.b.dwDTERate == CDC_Handle->pUserLineCoding->b.dwDTERate))
|
|
800837c: 68bb ldr r3, [r7, #8]
|
|
800837e: 6c1a ldr r2, [r3, #64] ; 0x40
|
|
8008380: 68bb ldr r3, [r7, #8]
|
|
8008382: 6c9b ldr r3, [r3, #72] ; 0x48
|
|
8008384: 681b ldr r3, [r3, #0]
|
|
(CDC_Handle->LineCoding.b.bParityType == CDC_Handle->pUserLineCoding->b.bParityType) &&
|
|
8008386: 429a cmp r2, r3
|
|
8008388: d124 bne.n 80083d4 <USBH_CDC_Process+0x11c>
|
|
{
|
|
USBH_CDC_LineCodingChanged(phost);
|
|
800838a: 6878 ldr r0, [r7, #4]
|
|
800838c: f000 f95a bl 8008644 <USBH_CDC_LineCodingChanged>
|
|
if (req_status != USBH_BUSY)
|
|
{
|
|
CDC_Handle->state = CDC_ERROR_STATE;
|
|
}
|
|
}
|
|
break;
|
|
8008390: e020 b.n 80083d4 <USBH_CDC_Process+0x11c>
|
|
if (req_status != USBH_BUSY)
|
|
8008392: 7bbb ldrb r3, [r7, #14]
|
|
8008394: 2b01 cmp r3, #1
|
|
8008396: d01d beq.n 80083d4 <USBH_CDC_Process+0x11c>
|
|
CDC_Handle->state = CDC_ERROR_STATE;
|
|
8008398: 68bb ldr r3, [r7, #8]
|
|
800839a: 2204 movs r2, #4
|
|
800839c: f883 204c strb.w r2, [r3, #76] ; 0x4c
|
|
break;
|
|
80083a0: e018 b.n 80083d4 <USBH_CDC_Process+0x11c>
|
|
|
|
case CDC_TRANSFER_DATA:
|
|
CDC_ProcessTransmission(phost);
|
|
80083a2: 6878 ldr r0, [r7, #4]
|
|
80083a4: f000 f867 bl 8008476 <CDC_ProcessTransmission>
|
|
CDC_ProcessReception(phost);
|
|
80083a8: 6878 ldr r0, [r7, #4]
|
|
80083aa: f000 f8dc bl 8008566 <CDC_ProcessReception>
|
|
break;
|
|
80083ae: e014 b.n 80083da <USBH_CDC_Process+0x122>
|
|
|
|
case CDC_ERROR_STATE:
|
|
req_status = USBH_ClrFeature(phost, 0x00U);
|
|
80083b0: 2100 movs r1, #0
|
|
80083b2: 6878 ldr r0, [r7, #4]
|
|
80083b4: f000 ffe5 bl 8009382 <USBH_ClrFeature>
|
|
80083b8: 4603 mov r3, r0
|
|
80083ba: 73bb strb r3, [r7, #14]
|
|
|
|
if (req_status == USBH_OK)
|
|
80083bc: 7bbb ldrb r3, [r7, #14]
|
|
80083be: 2b00 cmp r3, #0
|
|
80083c0: d10a bne.n 80083d8 <USBH_CDC_Process+0x120>
|
|
{
|
|
/*Change the state to waiting*/
|
|
CDC_Handle->state = CDC_IDLE_STATE;
|
|
80083c2: 68bb ldr r3, [r7, #8]
|
|
80083c4: 2200 movs r2, #0
|
|
80083c6: f883 204c strb.w r2, [r3, #76] ; 0x4c
|
|
}
|
|
break;
|
|
80083ca: e005 b.n 80083d8 <USBH_CDC_Process+0x120>
|
|
|
|
default:
|
|
break;
|
|
80083cc: bf00 nop
|
|
80083ce: e004 b.n 80083da <USBH_CDC_Process+0x122>
|
|
break;
|
|
80083d0: bf00 nop
|
|
80083d2: e002 b.n 80083da <USBH_CDC_Process+0x122>
|
|
break;
|
|
80083d4: bf00 nop
|
|
80083d6: e000 b.n 80083da <USBH_CDC_Process+0x122>
|
|
break;
|
|
80083d8: bf00 nop
|
|
|
|
}
|
|
|
|
return status;
|
|
80083da: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80083dc: 4618 mov r0, r3
|
|
80083de: 3710 adds r7, #16
|
|
80083e0: 46bd mov sp, r7
|
|
80083e2: bd80 pop {r7, pc}
|
|
|
|
080083e4 <USBH_CDC_SOFProcess>:
|
|
* The function is for managing SOF callback
|
|
* @param phost: Host handle
|
|
* @retval USBH Status
|
|
*/
|
|
static USBH_StatusTypeDef USBH_CDC_SOFProcess(USBH_HandleTypeDef *phost)
|
|
{
|
|
80083e4: b480 push {r7}
|
|
80083e6: b083 sub sp, #12
|
|
80083e8: af00 add r7, sp, #0
|
|
80083ea: 6078 str r0, [r7, #4]
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(phost);
|
|
|
|
return USBH_OK;
|
|
80083ec: 2300 movs r3, #0
|
|
}
|
|
80083ee: 4618 mov r0, r3
|
|
80083f0: 370c adds r7, #12
|
|
80083f2: 46bd mov sp, r7
|
|
80083f4: f85d 7b04 ldr.w r7, [sp], #4
|
|
80083f8: 4770 bx lr
|
|
|
|
080083fa <GetLineCoding>:
|
|
* configured line coding.
|
|
* @param pdev: Selected device
|
|
* @retval USBH_StatusTypeDef : USB ctl xfer status
|
|
*/
|
|
static USBH_StatusTypeDef GetLineCoding(USBH_HandleTypeDef *phost, CDC_LineCodingTypeDef *linecoding)
|
|
{
|
|
80083fa: b580 push {r7, lr}
|
|
80083fc: b082 sub sp, #8
|
|
80083fe: af00 add r7, sp, #0
|
|
8008400: 6078 str r0, [r7, #4]
|
|
8008402: 6039 str r1, [r7, #0]
|
|
|
|
phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_TYPE_CLASS | \
|
|
8008404: 687b ldr r3, [r7, #4]
|
|
8008406: 22a1 movs r2, #161 ; 0xa1
|
|
8008408: 741a strb r2, [r3, #16]
|
|
USB_REQ_RECIPIENT_INTERFACE;
|
|
|
|
phost->Control.setup.b.bRequest = CDC_GET_LINE_CODING;
|
|
800840a: 687b ldr r3, [r7, #4]
|
|
800840c: 2221 movs r2, #33 ; 0x21
|
|
800840e: 745a strb r2, [r3, #17]
|
|
phost->Control.setup.b.wValue.w = 0U;
|
|
8008410: 687b ldr r3, [r7, #4]
|
|
8008412: 2200 movs r2, #0
|
|
8008414: 825a strh r2, [r3, #18]
|
|
phost->Control.setup.b.wIndex.w = 0U;
|
|
8008416: 687b ldr r3, [r7, #4]
|
|
8008418: 2200 movs r2, #0
|
|
800841a: 829a strh r2, [r3, #20]
|
|
phost->Control.setup.b.wLength.w = LINE_CODING_STRUCTURE_SIZE;
|
|
800841c: 687b ldr r3, [r7, #4]
|
|
800841e: 2207 movs r2, #7
|
|
8008420: 82da strh r2, [r3, #22]
|
|
|
|
return USBH_CtlReq(phost, linecoding->Array, LINE_CODING_STRUCTURE_SIZE);
|
|
8008422: 683b ldr r3, [r7, #0]
|
|
8008424: 2207 movs r2, #7
|
|
8008426: 4619 mov r1, r3
|
|
8008428: 6878 ldr r0, [r7, #4]
|
|
800842a: f001 f98a bl 8009742 <USBH_CtlReq>
|
|
800842e: 4603 mov r3, r0
|
|
}
|
|
8008430: 4618 mov r0, r3
|
|
8008432: 3708 adds r7, #8
|
|
8008434: 46bd mov sp, r7
|
|
8008436: bd80 pop {r7, pc}
|
|
|
|
08008438 <SetLineCoding>:
|
|
* @param pdev: Selected device
|
|
* @retval USBH_StatusTypeDef : USB ctl xfer status
|
|
*/
|
|
static USBH_StatusTypeDef SetLineCoding(USBH_HandleTypeDef *phost,
|
|
CDC_LineCodingTypeDef *linecoding)
|
|
{
|
|
8008438: b580 push {r7, lr}
|
|
800843a: b082 sub sp, #8
|
|
800843c: af00 add r7, sp, #0
|
|
800843e: 6078 str r0, [r7, #4]
|
|
8008440: 6039 str r1, [r7, #0]
|
|
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_TYPE_CLASS |
|
|
8008442: 687b ldr r3, [r7, #4]
|
|
8008444: 2221 movs r2, #33 ; 0x21
|
|
8008446: 741a strb r2, [r3, #16]
|
|
USB_REQ_RECIPIENT_INTERFACE;
|
|
|
|
phost->Control.setup.b.bRequest = CDC_SET_LINE_CODING;
|
|
8008448: 687b ldr r3, [r7, #4]
|
|
800844a: 2220 movs r2, #32
|
|
800844c: 745a strb r2, [r3, #17]
|
|
phost->Control.setup.b.wValue.w = 0U;
|
|
800844e: 687b ldr r3, [r7, #4]
|
|
8008450: 2200 movs r2, #0
|
|
8008452: 825a strh r2, [r3, #18]
|
|
|
|
phost->Control.setup.b.wIndex.w = 0U;
|
|
8008454: 687b ldr r3, [r7, #4]
|
|
8008456: 2200 movs r2, #0
|
|
8008458: 829a strh r2, [r3, #20]
|
|
|
|
phost->Control.setup.b.wLength.w = LINE_CODING_STRUCTURE_SIZE;
|
|
800845a: 687b ldr r3, [r7, #4]
|
|
800845c: 2207 movs r2, #7
|
|
800845e: 82da strh r2, [r3, #22]
|
|
|
|
return USBH_CtlReq(phost, linecoding->Array, LINE_CODING_STRUCTURE_SIZE);
|
|
8008460: 683b ldr r3, [r7, #0]
|
|
8008462: 2207 movs r2, #7
|
|
8008464: 4619 mov r1, r3
|
|
8008466: 6878 ldr r0, [r7, #4]
|
|
8008468: f001 f96b bl 8009742 <USBH_CtlReq>
|
|
800846c: 4603 mov r3, r0
|
|
}
|
|
800846e: 4618 mov r0, r3
|
|
8008470: 3708 adds r7, #8
|
|
8008472: 46bd mov sp, r7
|
|
8008474: bd80 pop {r7, pc}
|
|
|
|
08008476 <CDC_ProcessTransmission>:
|
|
* @brief The function is responsible for sending data to the device
|
|
* @param pdev: Selected device
|
|
* @retval None
|
|
*/
|
|
static void CDC_ProcessTransmission(USBH_HandleTypeDef *phost)
|
|
{
|
|
8008476: b580 push {r7, lr}
|
|
8008478: b086 sub sp, #24
|
|
800847a: af02 add r7, sp, #8
|
|
800847c: 6078 str r0, [r7, #4]
|
|
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
|
|
800847e: 687b ldr r3, [r7, #4]
|
|
8008480: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008484: 69db ldr r3, [r3, #28]
|
|
8008486: 60fb str r3, [r7, #12]
|
|
USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE;
|
|
8008488: 2300 movs r3, #0
|
|
800848a: 72fb strb r3, [r7, #11]
|
|
|
|
switch (CDC_Handle->data_tx_state)
|
|
800848c: 68fb ldr r3, [r7, #12]
|
|
800848e: f893 304d ldrb.w r3, [r3, #77] ; 0x4d
|
|
8008492: 2b01 cmp r3, #1
|
|
8008494: d002 beq.n 800849c <CDC_ProcessTransmission+0x26>
|
|
8008496: 2b02 cmp r3, #2
|
|
8008498: d025 beq.n 80084e6 <CDC_ProcessTransmission+0x70>
|
|
}
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
800849a: e060 b.n 800855e <CDC_ProcessTransmission+0xe8>
|
|
if (CDC_Handle->TxDataLength > CDC_Handle->DataItf.OutEpSize)
|
|
800849c: 68fb ldr r3, [r7, #12]
|
|
800849e: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
80084a0: 68fa ldr r2, [r7, #12]
|
|
80084a2: 8b12 ldrh r2, [r2, #24]
|
|
80084a4: 4293 cmp r3, r2
|
|
80084a6: d90c bls.n 80084c2 <CDC_ProcessTransmission+0x4c>
|
|
USBH_BulkSendData(phost,
|
|
80084a8: 68fb ldr r3, [r7, #12]
|
|
80084aa: 69d9 ldr r1, [r3, #28]
|
|
80084ac: 68fb ldr r3, [r7, #12]
|
|
80084ae: 8b1a ldrh r2, [r3, #24]
|
|
80084b0: 68fb ldr r3, [r7, #12]
|
|
80084b2: 7b58 ldrb r0, [r3, #13]
|
|
80084b4: 2301 movs r3, #1
|
|
80084b6: 9300 str r3, [sp, #0]
|
|
80084b8: 4603 mov r3, r0
|
|
80084ba: 6878 ldr r0, [r7, #4]
|
|
80084bc: f001 fb51 bl 8009b62 <USBH_BulkSendData>
|
|
80084c0: e00c b.n 80084dc <CDC_ProcessTransmission+0x66>
|
|
USBH_BulkSendData(phost,
|
|
80084c2: 68fb ldr r3, [r7, #12]
|
|
80084c4: 69d9 ldr r1, [r3, #28]
|
|
(uint16_t)CDC_Handle->TxDataLength,
|
|
80084c6: 68fb ldr r3, [r7, #12]
|
|
80084c8: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
USBH_BulkSendData(phost,
|
|
80084ca: b29a uxth r2, r3
|
|
80084cc: 68fb ldr r3, [r7, #12]
|
|
80084ce: 7b58 ldrb r0, [r3, #13]
|
|
80084d0: 2301 movs r3, #1
|
|
80084d2: 9300 str r3, [sp, #0]
|
|
80084d4: 4603 mov r3, r0
|
|
80084d6: 6878 ldr r0, [r7, #4]
|
|
80084d8: f001 fb43 bl 8009b62 <USBH_BulkSendData>
|
|
CDC_Handle->data_tx_state = CDC_SEND_DATA_WAIT;
|
|
80084dc: 68fb ldr r3, [r7, #12]
|
|
80084de: 2202 movs r2, #2
|
|
80084e0: f883 204d strb.w r2, [r3, #77] ; 0x4d
|
|
break;
|
|
80084e4: e03b b.n 800855e <CDC_ProcessTransmission+0xe8>
|
|
URB_Status = USBH_LL_GetURBState(phost, CDC_Handle->DataItf.OutPipe);
|
|
80084e6: 68fb ldr r3, [r7, #12]
|
|
80084e8: 7b5b ldrb r3, [r3, #13]
|
|
80084ea: 4619 mov r1, r3
|
|
80084ec: 6878 ldr r0, [r7, #4]
|
|
80084ee: f001 fe65 bl 800a1bc <USBH_LL_GetURBState>
|
|
80084f2: 4603 mov r3, r0
|
|
80084f4: 72fb strb r3, [r7, #11]
|
|
if (URB_Status == USBH_URB_DONE)
|
|
80084f6: 7afb ldrb r3, [r7, #11]
|
|
80084f8: 2b01 cmp r3, #1
|
|
80084fa: d128 bne.n 800854e <CDC_ProcessTransmission+0xd8>
|
|
if (CDC_Handle->TxDataLength > CDC_Handle->DataItf.OutEpSize)
|
|
80084fc: 68fb ldr r3, [r7, #12]
|
|
80084fe: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8008500: 68fa ldr r2, [r7, #12]
|
|
8008502: 8b12 ldrh r2, [r2, #24]
|
|
8008504: 4293 cmp r3, r2
|
|
8008506: d90e bls.n 8008526 <CDC_ProcessTransmission+0xb0>
|
|
CDC_Handle->TxDataLength -= CDC_Handle->DataItf.OutEpSize;
|
|
8008508: 68fb ldr r3, [r7, #12]
|
|
800850a: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
800850c: 68fa ldr r2, [r7, #12]
|
|
800850e: 8b12 ldrh r2, [r2, #24]
|
|
8008510: 1a9a subs r2, r3, r2
|
|
8008512: 68fb ldr r3, [r7, #12]
|
|
8008514: 625a str r2, [r3, #36] ; 0x24
|
|
CDC_Handle->pTxData += CDC_Handle->DataItf.OutEpSize;
|
|
8008516: 68fb ldr r3, [r7, #12]
|
|
8008518: 69db ldr r3, [r3, #28]
|
|
800851a: 68fa ldr r2, [r7, #12]
|
|
800851c: 8b12 ldrh r2, [r2, #24]
|
|
800851e: 441a add r2, r3
|
|
8008520: 68fb ldr r3, [r7, #12]
|
|
8008522: 61da str r2, [r3, #28]
|
|
8008524: e002 b.n 800852c <CDC_ProcessTransmission+0xb6>
|
|
CDC_Handle->TxDataLength = 0U;
|
|
8008526: 68fb ldr r3, [r7, #12]
|
|
8008528: 2200 movs r2, #0
|
|
800852a: 625a str r2, [r3, #36] ; 0x24
|
|
if (CDC_Handle->TxDataLength > 0U)
|
|
800852c: 68fb ldr r3, [r7, #12]
|
|
800852e: 6a5b ldr r3, [r3, #36] ; 0x24
|
|
8008530: 2b00 cmp r3, #0
|
|
8008532: d004 beq.n 800853e <CDC_ProcessTransmission+0xc8>
|
|
CDC_Handle->data_tx_state = CDC_SEND_DATA;
|
|
8008534: 68fb ldr r3, [r7, #12]
|
|
8008536: 2201 movs r2, #1
|
|
8008538: f883 204d strb.w r2, [r3, #77] ; 0x4d
|
|
break;
|
|
800853c: e00e b.n 800855c <CDC_ProcessTransmission+0xe6>
|
|
CDC_Handle->data_tx_state = CDC_IDLE;
|
|
800853e: 68fb ldr r3, [r7, #12]
|
|
8008540: 2200 movs r2, #0
|
|
8008542: f883 204d strb.w r2, [r3, #77] ; 0x4d
|
|
USBH_CDC_TransmitCallback(phost);
|
|
8008546: 6878 ldr r0, [r7, #4]
|
|
8008548: f000 f868 bl 800861c <USBH_CDC_TransmitCallback>
|
|
break;
|
|
800854c: e006 b.n 800855c <CDC_ProcessTransmission+0xe6>
|
|
if (URB_Status == USBH_URB_NOTREADY)
|
|
800854e: 7afb ldrb r3, [r7, #11]
|
|
8008550: 2b02 cmp r3, #2
|
|
8008552: d103 bne.n 800855c <CDC_ProcessTransmission+0xe6>
|
|
CDC_Handle->data_tx_state = CDC_SEND_DATA;
|
|
8008554: 68fb ldr r3, [r7, #12]
|
|
8008556: 2201 movs r2, #1
|
|
8008558: f883 204d strb.w r2, [r3, #77] ; 0x4d
|
|
break;
|
|
800855c: bf00 nop
|
|
}
|
|
}
|
|
800855e: bf00 nop
|
|
8008560: 3710 adds r7, #16
|
|
8008562: 46bd mov sp, r7
|
|
8008564: bd80 pop {r7, pc}
|
|
|
|
08008566 <CDC_ProcessReception>:
|
|
* @param pdev: Selected device
|
|
* @retval None
|
|
*/
|
|
|
|
static void CDC_ProcessReception(USBH_HandleTypeDef *phost)
|
|
{
|
|
8008566: b580 push {r7, lr}
|
|
8008568: b086 sub sp, #24
|
|
800856a: af00 add r7, sp, #0
|
|
800856c: 6078 str r0, [r7, #4]
|
|
CDC_HandleTypeDef *CDC_Handle = (CDC_HandleTypeDef *) phost->pActiveClass->pData;
|
|
800856e: 687b ldr r3, [r7, #4]
|
|
8008570: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008574: 69db ldr r3, [r3, #28]
|
|
8008576: 617b str r3, [r7, #20]
|
|
USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE;
|
|
8008578: 2300 movs r3, #0
|
|
800857a: 74fb strb r3, [r7, #19]
|
|
uint32_t length;
|
|
|
|
switch (CDC_Handle->data_rx_state)
|
|
800857c: 697b ldr r3, [r7, #20]
|
|
800857e: f893 304e ldrb.w r3, [r3, #78] ; 0x4e
|
|
8008582: 2b03 cmp r3, #3
|
|
8008584: d002 beq.n 800858c <CDC_ProcessReception+0x26>
|
|
8008586: 2b04 cmp r3, #4
|
|
8008588: d00e beq.n 80085a8 <CDC_ProcessReception+0x42>
|
|
#endif
|
|
}
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
800858a: e043 b.n 8008614 <CDC_ProcessReception+0xae>
|
|
USBH_BulkReceiveData(phost,
|
|
800858c: 697b ldr r3, [r7, #20]
|
|
800858e: 6a19 ldr r1, [r3, #32]
|
|
8008590: 697b ldr r3, [r7, #20]
|
|
8008592: 8b5a ldrh r2, [r3, #26]
|
|
8008594: 697b ldr r3, [r7, #20]
|
|
8008596: 7b1b ldrb r3, [r3, #12]
|
|
8008598: 6878 ldr r0, [r7, #4]
|
|
800859a: f001 fb07 bl 8009bac <USBH_BulkReceiveData>
|
|
CDC_Handle->data_rx_state = CDC_RECEIVE_DATA_WAIT;
|
|
800859e: 697b ldr r3, [r7, #20]
|
|
80085a0: 2204 movs r2, #4
|
|
80085a2: f883 204e strb.w r2, [r3, #78] ; 0x4e
|
|
break;
|
|
80085a6: e035 b.n 8008614 <CDC_ProcessReception+0xae>
|
|
URB_Status = USBH_LL_GetURBState(phost, CDC_Handle->DataItf.InPipe);
|
|
80085a8: 697b ldr r3, [r7, #20]
|
|
80085aa: 7b1b ldrb r3, [r3, #12]
|
|
80085ac: 4619 mov r1, r3
|
|
80085ae: 6878 ldr r0, [r7, #4]
|
|
80085b0: f001 fe04 bl 800a1bc <USBH_LL_GetURBState>
|
|
80085b4: 4603 mov r3, r0
|
|
80085b6: 74fb strb r3, [r7, #19]
|
|
if (URB_Status == USBH_URB_DONE)
|
|
80085b8: 7cfb ldrb r3, [r7, #19]
|
|
80085ba: 2b01 cmp r3, #1
|
|
80085bc: d129 bne.n 8008612 <CDC_ProcessReception+0xac>
|
|
length = USBH_LL_GetLastXferSize(phost, CDC_Handle->DataItf.InPipe);
|
|
80085be: 697b ldr r3, [r7, #20]
|
|
80085c0: 7b1b ldrb r3, [r3, #12]
|
|
80085c2: 4619 mov r1, r3
|
|
80085c4: 6878 ldr r0, [r7, #4]
|
|
80085c6: f001 fd67 bl 800a098 <USBH_LL_GetLastXferSize>
|
|
80085ca: 60f8 str r0, [r7, #12]
|
|
if (((CDC_Handle->RxDataLength - length) > 0U) && (length > CDC_Handle->DataItf.InEpSize))
|
|
80085cc: 697b ldr r3, [r7, #20]
|
|
80085ce: 6a9b ldr r3, [r3, #40] ; 0x28
|
|
80085d0: 68fa ldr r2, [r7, #12]
|
|
80085d2: 429a cmp r2, r3
|
|
80085d4: d016 beq.n 8008604 <CDC_ProcessReception+0x9e>
|
|
80085d6: 697b ldr r3, [r7, #20]
|
|
80085d8: 8b5b ldrh r3, [r3, #26]
|
|
80085da: 461a mov r2, r3
|
|
80085dc: 68fb ldr r3, [r7, #12]
|
|
80085de: 4293 cmp r3, r2
|
|
80085e0: d910 bls.n 8008604 <CDC_ProcessReception+0x9e>
|
|
CDC_Handle->RxDataLength -= length ;
|
|
80085e2: 697b ldr r3, [r7, #20]
|
|
80085e4: 6a9a ldr r2, [r3, #40] ; 0x28
|
|
80085e6: 68fb ldr r3, [r7, #12]
|
|
80085e8: 1ad2 subs r2, r2, r3
|
|
80085ea: 697b ldr r3, [r7, #20]
|
|
80085ec: 629a str r2, [r3, #40] ; 0x28
|
|
CDC_Handle->pRxData += length;
|
|
80085ee: 697b ldr r3, [r7, #20]
|
|
80085f0: 6a1a ldr r2, [r3, #32]
|
|
80085f2: 68fb ldr r3, [r7, #12]
|
|
80085f4: 441a add r2, r3
|
|
80085f6: 697b ldr r3, [r7, #20]
|
|
80085f8: 621a str r2, [r3, #32]
|
|
CDC_Handle->data_rx_state = CDC_RECEIVE_DATA;
|
|
80085fa: 697b ldr r3, [r7, #20]
|
|
80085fc: 2203 movs r2, #3
|
|
80085fe: f883 204e strb.w r2, [r3, #78] ; 0x4e
|
|
break;
|
|
8008602: e006 b.n 8008612 <CDC_ProcessReception+0xac>
|
|
CDC_Handle->data_rx_state = CDC_IDLE;
|
|
8008604: 697b ldr r3, [r7, #20]
|
|
8008606: 2200 movs r2, #0
|
|
8008608: f883 204e strb.w r2, [r3, #78] ; 0x4e
|
|
USBH_CDC_ReceiveCallback(phost);
|
|
800860c: 6878 ldr r0, [r7, #4]
|
|
800860e: f000 f80f bl 8008630 <USBH_CDC_ReceiveCallback>
|
|
break;
|
|
8008612: bf00 nop
|
|
}
|
|
}
|
|
8008614: bf00 nop
|
|
8008616: 3718 adds r7, #24
|
|
8008618: 46bd mov sp, r7
|
|
800861a: bd80 pop {r7, pc}
|
|
|
|
0800861c <USBH_CDC_TransmitCallback>:
|
|
* @brief The function informs user that data have been received
|
|
* @param pdev: Selected device
|
|
* @retval None
|
|
*/
|
|
__weak void USBH_CDC_TransmitCallback(USBH_HandleTypeDef *phost)
|
|
{
|
|
800861c: b480 push {r7}
|
|
800861e: b083 sub sp, #12
|
|
8008620: af00 add r7, sp, #0
|
|
8008622: 6078 str r0, [r7, #4]
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(phost);
|
|
}
|
|
8008624: bf00 nop
|
|
8008626: 370c adds r7, #12
|
|
8008628: 46bd mov sp, r7
|
|
800862a: f85d 7b04 ldr.w r7, [sp], #4
|
|
800862e: 4770 bx lr
|
|
|
|
08008630 <USBH_CDC_ReceiveCallback>:
|
|
* @brief The function informs user that data have been sent
|
|
* @param pdev: Selected device
|
|
* @retval None
|
|
*/
|
|
__weak void USBH_CDC_ReceiveCallback(USBH_HandleTypeDef *phost)
|
|
{
|
|
8008630: b480 push {r7}
|
|
8008632: b083 sub sp, #12
|
|
8008634: af00 add r7, sp, #0
|
|
8008636: 6078 str r0, [r7, #4]
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(phost);
|
|
}
|
|
8008638: bf00 nop
|
|
800863a: 370c adds r7, #12
|
|
800863c: 46bd mov sp, r7
|
|
800863e: f85d 7b04 ldr.w r7, [sp], #4
|
|
8008642: 4770 bx lr
|
|
|
|
08008644 <USBH_CDC_LineCodingChanged>:
|
|
* @brief The function informs user that Settings have been changed
|
|
* @param pdev: Selected device
|
|
* @retval None
|
|
*/
|
|
__weak void USBH_CDC_LineCodingChanged(USBH_HandleTypeDef *phost)
|
|
{
|
|
8008644: b480 push {r7}
|
|
8008646: b083 sub sp, #12
|
|
8008648: af00 add r7, sp, #0
|
|
800864a: 6078 str r0, [r7, #4]
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(phost);
|
|
}
|
|
800864c: bf00 nop
|
|
800864e: 370c adds r7, #12
|
|
8008650: 46bd mov sp, r7
|
|
8008652: f85d 7b04 ldr.w r7, [sp], #4
|
|
8008656: 4770 bx lr
|
|
|
|
08008658 <USBH_Init>:
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_Init(USBH_HandleTypeDef *phost,
|
|
void (*pUsrFunc)(USBH_HandleTypeDef *phost,
|
|
uint8_t id), uint8_t id)
|
|
{
|
|
8008658: b580 push {r7, lr}
|
|
800865a: b084 sub sp, #16
|
|
800865c: af00 add r7, sp, #0
|
|
800865e: 60f8 str r0, [r7, #12]
|
|
8008660: 60b9 str r1, [r7, #8]
|
|
8008662: 4613 mov r3, r2
|
|
8008664: 71fb strb r3, [r7, #7]
|
|
/* Check whether the USB Host handle is valid */
|
|
if (phost == NULL)
|
|
8008666: 68fb ldr r3, [r7, #12]
|
|
8008668: 2b00 cmp r3, #0
|
|
800866a: d101 bne.n 8008670 <USBH_Init+0x18>
|
|
{
|
|
USBH_ErrLog("Invalid Host handle");
|
|
return USBH_FAIL;
|
|
800866c: 2302 movs r3, #2
|
|
800866e: e029 b.n 80086c4 <USBH_Init+0x6c>
|
|
}
|
|
|
|
/* Set DRiver ID */
|
|
phost->id = id;
|
|
8008670: 68fb ldr r3, [r7, #12]
|
|
8008672: 79fa ldrb r2, [r7, #7]
|
|
8008674: f883 23cc strb.w r2, [r3, #972] ; 0x3cc
|
|
|
|
/* Unlink class*/
|
|
phost->pActiveClass = NULL;
|
|
8008678: 68fb ldr r3, [r7, #12]
|
|
800867a: 2200 movs r2, #0
|
|
800867c: f8c3 237c str.w r2, [r3, #892] ; 0x37c
|
|
phost->ClassNumber = 0U;
|
|
8008680: 68fb ldr r3, [r7, #12]
|
|
8008682: 2200 movs r2, #0
|
|
8008684: f8c3 2380 str.w r2, [r3, #896] ; 0x380
|
|
|
|
/* Restore default states and prepare EP0 */
|
|
DeInitStateMachine(phost);
|
|
8008688: 68f8 ldr r0, [r7, #12]
|
|
800868a: f000 f81f bl 80086cc <DeInitStateMachine>
|
|
|
|
/* Restore default Device connection states */
|
|
phost->device.PortEnabled = 0U;
|
|
800868e: 68fb ldr r3, [r7, #12]
|
|
8008690: 2200 movs r2, #0
|
|
8008692: f883 2323 strb.w r2, [r3, #803] ; 0x323
|
|
phost->device.is_connected = 0U;
|
|
8008696: 68fb ldr r3, [r7, #12]
|
|
8008698: 2200 movs r2, #0
|
|
800869a: f883 2320 strb.w r2, [r3, #800] ; 0x320
|
|
phost->device.is_disconnected = 0U;
|
|
800869e: 68fb ldr r3, [r7, #12]
|
|
80086a0: 2200 movs r2, #0
|
|
80086a2: f883 2321 strb.w r2, [r3, #801] ; 0x321
|
|
phost->device.is_ReEnumerated = 0U;
|
|
80086a6: 68fb ldr r3, [r7, #12]
|
|
80086a8: 2200 movs r2, #0
|
|
80086aa: f883 2322 strb.w r2, [r3, #802] ; 0x322
|
|
|
|
/* Assign User process */
|
|
if (pUsrFunc != NULL)
|
|
80086ae: 68bb ldr r3, [r7, #8]
|
|
80086b0: 2b00 cmp r3, #0
|
|
80086b2: d003 beq.n 80086bc <USBH_Init+0x64>
|
|
{
|
|
phost->pUser = pUsrFunc;
|
|
80086b4: 68fb ldr r3, [r7, #12]
|
|
80086b6: 68ba ldr r2, [r7, #8]
|
|
80086b8: f8c3 23d4 str.w r2, [r3, #980] ; 0x3d4
|
|
|
|
#endif /* (osCMSIS < 0x20000U) */
|
|
#endif /* (USBH_USE_OS == 1U) */
|
|
|
|
/* Initialize low level driver */
|
|
USBH_LL_Init(phost);
|
|
80086bc: 68f8 ldr r0, [r7, #12]
|
|
80086be: f001 fc39 bl 8009f34 <USBH_LL_Init>
|
|
|
|
return USBH_OK;
|
|
80086c2: 2300 movs r3, #0
|
|
}
|
|
80086c4: 4618 mov r0, r3
|
|
80086c6: 3710 adds r7, #16
|
|
80086c8: 46bd mov sp, r7
|
|
80086ca: bd80 pop {r7, pc}
|
|
|
|
080086cc <DeInitStateMachine>:
|
|
* De-Initialize the Host state machine.
|
|
* @param phost: Host Handle
|
|
* @retval USBH Status
|
|
*/
|
|
static USBH_StatusTypeDef DeInitStateMachine(USBH_HandleTypeDef *phost)
|
|
{
|
|
80086cc: b480 push {r7}
|
|
80086ce: b085 sub sp, #20
|
|
80086d0: af00 add r7, sp, #0
|
|
80086d2: 6078 str r0, [r7, #4]
|
|
uint32_t i = 0U;
|
|
80086d4: 2300 movs r3, #0
|
|
80086d6: 60fb str r3, [r7, #12]
|
|
|
|
/* Clear Pipes flags*/
|
|
for (i = 0U; i < USBH_MAX_PIPES_NBR; i++)
|
|
80086d8: 2300 movs r3, #0
|
|
80086da: 60fb str r3, [r7, #12]
|
|
80086dc: e009 b.n 80086f2 <DeInitStateMachine+0x26>
|
|
{
|
|
phost->Pipes[i] = 0U;
|
|
80086de: 687a ldr r2, [r7, #4]
|
|
80086e0: 68fb ldr r3, [r7, #12]
|
|
80086e2: 33e0 adds r3, #224 ; 0xe0
|
|
80086e4: 009b lsls r3, r3, #2
|
|
80086e6: 4413 add r3, r2
|
|
80086e8: 2200 movs r2, #0
|
|
80086ea: 605a str r2, [r3, #4]
|
|
for (i = 0U; i < USBH_MAX_PIPES_NBR; i++)
|
|
80086ec: 68fb ldr r3, [r7, #12]
|
|
80086ee: 3301 adds r3, #1
|
|
80086f0: 60fb str r3, [r7, #12]
|
|
80086f2: 68fb ldr r3, [r7, #12]
|
|
80086f4: 2b0e cmp r3, #14
|
|
80086f6: d9f2 bls.n 80086de <DeInitStateMachine+0x12>
|
|
}
|
|
|
|
for (i = 0U; i < USBH_MAX_DATA_BUFFER; i++)
|
|
80086f8: 2300 movs r3, #0
|
|
80086fa: 60fb str r3, [r7, #12]
|
|
80086fc: e009 b.n 8008712 <DeInitStateMachine+0x46>
|
|
{
|
|
phost->device.Data[i] = 0U;
|
|
80086fe: 687a ldr r2, [r7, #4]
|
|
8008700: 68fb ldr r3, [r7, #12]
|
|
8008702: 4413 add r3, r2
|
|
8008704: f503 738e add.w r3, r3, #284 ; 0x11c
|
|
8008708: 2200 movs r2, #0
|
|
800870a: 701a strb r2, [r3, #0]
|
|
for (i = 0U; i < USBH_MAX_DATA_BUFFER; i++)
|
|
800870c: 68fb ldr r3, [r7, #12]
|
|
800870e: 3301 adds r3, #1
|
|
8008710: 60fb str r3, [r7, #12]
|
|
8008712: 68fb ldr r3, [r7, #12]
|
|
8008714: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
8008718: d3f1 bcc.n 80086fe <DeInitStateMachine+0x32>
|
|
}
|
|
|
|
phost->gState = HOST_IDLE;
|
|
800871a: 687b ldr r3, [r7, #4]
|
|
800871c: 2200 movs r2, #0
|
|
800871e: 701a strb r2, [r3, #0]
|
|
phost->EnumState = ENUM_IDLE;
|
|
8008720: 687b ldr r3, [r7, #4]
|
|
8008722: 2200 movs r2, #0
|
|
8008724: 705a strb r2, [r3, #1]
|
|
phost->RequestState = CMD_SEND;
|
|
8008726: 687b ldr r3, [r7, #4]
|
|
8008728: 2201 movs r2, #1
|
|
800872a: 709a strb r2, [r3, #2]
|
|
phost->Timer = 0U;
|
|
800872c: 687b ldr r3, [r7, #4]
|
|
800872e: 2200 movs r2, #0
|
|
8008730: f8c3 23c4 str.w r2, [r3, #964] ; 0x3c4
|
|
|
|
phost->Control.state = CTRL_SETUP;
|
|
8008734: 687b ldr r3, [r7, #4]
|
|
8008736: 2201 movs r2, #1
|
|
8008738: 761a strb r2, [r3, #24]
|
|
phost->Control.pipe_size = USBH_MPS_DEFAULT;
|
|
800873a: 687b ldr r3, [r7, #4]
|
|
800873c: 2240 movs r2, #64 ; 0x40
|
|
800873e: 719a strb r2, [r3, #6]
|
|
phost->Control.errorcount = 0U;
|
|
8008740: 687b ldr r3, [r7, #4]
|
|
8008742: 2200 movs r2, #0
|
|
8008744: 765a strb r2, [r3, #25]
|
|
|
|
phost->device.address = USBH_ADDRESS_DEFAULT;
|
|
8008746: 687b ldr r3, [r7, #4]
|
|
8008748: 2200 movs r2, #0
|
|
800874a: f883 231c strb.w r2, [r3, #796] ; 0x31c
|
|
phost->device.speed = USBH_SPEED_FULL;
|
|
800874e: 687b ldr r3, [r7, #4]
|
|
8008750: 2201 movs r2, #1
|
|
8008752: f883 231d strb.w r2, [r3, #797] ; 0x31d
|
|
phost->device.RstCnt = 0U;
|
|
8008756: 687b ldr r3, [r7, #4]
|
|
8008758: 2200 movs r2, #0
|
|
800875a: f883 231f strb.w r2, [r3, #799] ; 0x31f
|
|
phost->device.EnumCnt = 0U;
|
|
800875e: 687b ldr r3, [r7, #4]
|
|
8008760: 2200 movs r2, #0
|
|
8008762: f883 231e strb.w r2, [r3, #798] ; 0x31e
|
|
|
|
return USBH_OK;
|
|
8008766: 2300 movs r3, #0
|
|
}
|
|
8008768: 4618 mov r0, r3
|
|
800876a: 3714 adds r7, #20
|
|
800876c: 46bd mov sp, r7
|
|
800876e: f85d 7b04 ldr.w r7, [sp], #4
|
|
8008772: 4770 bx lr
|
|
|
|
08008774 <USBH_RegisterClass>:
|
|
* @param phost : Host Handle
|
|
* @param pclass: Class handle
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_RegisterClass(USBH_HandleTypeDef *phost, USBH_ClassTypeDef *pclass)
|
|
{
|
|
8008774: b480 push {r7}
|
|
8008776: b085 sub sp, #20
|
|
8008778: af00 add r7, sp, #0
|
|
800877a: 6078 str r0, [r7, #4]
|
|
800877c: 6039 str r1, [r7, #0]
|
|
USBH_StatusTypeDef status = USBH_OK;
|
|
800877e: 2300 movs r3, #0
|
|
8008780: 73fb strb r3, [r7, #15]
|
|
|
|
if (pclass != NULL)
|
|
8008782: 683b ldr r3, [r7, #0]
|
|
8008784: 2b00 cmp r3, #0
|
|
8008786: d016 beq.n 80087b6 <USBH_RegisterClass+0x42>
|
|
{
|
|
if (phost->ClassNumber < USBH_MAX_NUM_SUPPORTED_CLASS)
|
|
8008788: 687b ldr r3, [r7, #4]
|
|
800878a: f8d3 3380 ldr.w r3, [r3, #896] ; 0x380
|
|
800878e: 2b00 cmp r3, #0
|
|
8008790: d10e bne.n 80087b0 <USBH_RegisterClass+0x3c>
|
|
{
|
|
/* link the class to the USB Host handle */
|
|
phost->pClass[phost->ClassNumber++] = pclass;
|
|
8008792: 687b ldr r3, [r7, #4]
|
|
8008794: f8d3 3380 ldr.w r3, [r3, #896] ; 0x380
|
|
8008798: 1c59 adds r1, r3, #1
|
|
800879a: 687a ldr r2, [r7, #4]
|
|
800879c: f8c2 1380 str.w r1, [r2, #896] ; 0x380
|
|
80087a0: 687a ldr r2, [r7, #4]
|
|
80087a2: 33de adds r3, #222 ; 0xde
|
|
80087a4: 6839 ldr r1, [r7, #0]
|
|
80087a6: f842 1023 str.w r1, [r2, r3, lsl #2]
|
|
status = USBH_OK;
|
|
80087aa: 2300 movs r3, #0
|
|
80087ac: 73fb strb r3, [r7, #15]
|
|
80087ae: e004 b.n 80087ba <USBH_RegisterClass+0x46>
|
|
}
|
|
else
|
|
{
|
|
USBH_ErrLog("Max Class Number reached");
|
|
status = USBH_FAIL;
|
|
80087b0: 2302 movs r3, #2
|
|
80087b2: 73fb strb r3, [r7, #15]
|
|
80087b4: e001 b.n 80087ba <USBH_RegisterClass+0x46>
|
|
}
|
|
}
|
|
else
|
|
{
|
|
USBH_ErrLog("Invalid Class handle");
|
|
status = USBH_FAIL;
|
|
80087b6: 2302 movs r3, #2
|
|
80087b8: 73fb strb r3, [r7, #15]
|
|
}
|
|
|
|
return status;
|
|
80087ba: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80087bc: 4618 mov r0, r3
|
|
80087be: 3714 adds r7, #20
|
|
80087c0: 46bd mov sp, r7
|
|
80087c2: f85d 7b04 ldr.w r7, [sp], #4
|
|
80087c6: 4770 bx lr
|
|
|
|
080087c8 <USBH_SelectInterface>:
|
|
* @param phost: Host Handle
|
|
* @param interface: Interface number
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_SelectInterface(USBH_HandleTypeDef *phost, uint8_t interface)
|
|
{
|
|
80087c8: b480 push {r7}
|
|
80087ca: b085 sub sp, #20
|
|
80087cc: af00 add r7, sp, #0
|
|
80087ce: 6078 str r0, [r7, #4]
|
|
80087d0: 460b mov r3, r1
|
|
80087d2: 70fb strb r3, [r7, #3]
|
|
USBH_StatusTypeDef status = USBH_OK;
|
|
80087d4: 2300 movs r3, #0
|
|
80087d6: 73fb strb r3, [r7, #15]
|
|
|
|
if (interface < phost->device.CfgDesc.bNumInterfaces)
|
|
80087d8: 687b ldr r3, [r7, #4]
|
|
80087da: f893 333c ldrb.w r3, [r3, #828] ; 0x33c
|
|
80087de: 78fa ldrb r2, [r7, #3]
|
|
80087e0: 429a cmp r2, r3
|
|
80087e2: d204 bcs.n 80087ee <USBH_SelectInterface+0x26>
|
|
{
|
|
phost->device.current_interface = interface;
|
|
80087e4: 687b ldr r3, [r7, #4]
|
|
80087e6: 78fa ldrb r2, [r7, #3]
|
|
80087e8: f883 2324 strb.w r2, [r3, #804] ; 0x324
|
|
80087ec: e001 b.n 80087f2 <USBH_SelectInterface+0x2a>
|
|
USBH_UsrLog("Protocol : %xh", phost->device.CfgDesc.Itf_Desc[interface].bInterfaceProtocol);
|
|
}
|
|
else
|
|
{
|
|
USBH_ErrLog("Cannot Select This Interface.");
|
|
status = USBH_FAIL;
|
|
80087ee: 2302 movs r3, #2
|
|
80087f0: 73fb strb r3, [r7, #15]
|
|
}
|
|
|
|
return status;
|
|
80087f2: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
80087f4: 4618 mov r0, r3
|
|
80087f6: 3714 adds r7, #20
|
|
80087f8: 46bd mov sp, r7
|
|
80087fa: f85d 7b04 ldr.w r7, [sp], #4
|
|
80087fe: 4770 bx lr
|
|
|
|
08008800 <USBH_FindInterface>:
|
|
* @param Protocol: Protocol code
|
|
* @retval interface index in the configuration structure
|
|
* @note : (1)interface index 0xFF means interface index not found
|
|
*/
|
|
uint8_t USBH_FindInterface(USBH_HandleTypeDef *phost, uint8_t Class, uint8_t SubClass, uint8_t Protocol)
|
|
{
|
|
8008800: b480 push {r7}
|
|
8008802: b087 sub sp, #28
|
|
8008804: af00 add r7, sp, #0
|
|
8008806: 6078 str r0, [r7, #4]
|
|
8008808: 4608 mov r0, r1
|
|
800880a: 4611 mov r1, r2
|
|
800880c: 461a mov r2, r3
|
|
800880e: 4603 mov r3, r0
|
|
8008810: 70fb strb r3, [r7, #3]
|
|
8008812: 460b mov r3, r1
|
|
8008814: 70bb strb r3, [r7, #2]
|
|
8008816: 4613 mov r3, r2
|
|
8008818: 707b strb r3, [r7, #1]
|
|
USBH_InterfaceDescTypeDef *pif;
|
|
USBH_CfgDescTypeDef *pcfg;
|
|
uint8_t if_ix = 0U;
|
|
800881a: 2300 movs r3, #0
|
|
800881c: 75fb strb r3, [r7, #23]
|
|
|
|
pif = (USBH_InterfaceDescTypeDef *)0;
|
|
800881e: 2300 movs r3, #0
|
|
8008820: 613b str r3, [r7, #16]
|
|
pcfg = &phost->device.CfgDesc;
|
|
8008822: 687b ldr r3, [r7, #4]
|
|
8008824: f503 734e add.w r3, r3, #824 ; 0x338
|
|
8008828: 60fb str r3, [r7, #12]
|
|
|
|
while (if_ix < USBH_MAX_NUM_INTERFACES)
|
|
800882a: e025 b.n 8008878 <USBH_FindInterface+0x78>
|
|
{
|
|
pif = &pcfg->Itf_Desc[if_ix];
|
|
800882c: 7dfb ldrb r3, [r7, #23]
|
|
800882e: 221a movs r2, #26
|
|
8008830: fb02 f303 mul.w r3, r2, r3
|
|
8008834: 3308 adds r3, #8
|
|
8008836: 68fa ldr r2, [r7, #12]
|
|
8008838: 4413 add r3, r2
|
|
800883a: 3302 adds r3, #2
|
|
800883c: 613b str r3, [r7, #16]
|
|
if (((pif->bInterfaceClass == Class) || (Class == 0xFFU)) &&
|
|
800883e: 693b ldr r3, [r7, #16]
|
|
8008840: 795b ldrb r3, [r3, #5]
|
|
8008842: 78fa ldrb r2, [r7, #3]
|
|
8008844: 429a cmp r2, r3
|
|
8008846: d002 beq.n 800884e <USBH_FindInterface+0x4e>
|
|
8008848: 78fb ldrb r3, [r7, #3]
|
|
800884a: 2bff cmp r3, #255 ; 0xff
|
|
800884c: d111 bne.n 8008872 <USBH_FindInterface+0x72>
|
|
((pif->bInterfaceSubClass == SubClass) || (SubClass == 0xFFU)) &&
|
|
800884e: 693b ldr r3, [r7, #16]
|
|
8008850: 799b ldrb r3, [r3, #6]
|
|
if (((pif->bInterfaceClass == Class) || (Class == 0xFFU)) &&
|
|
8008852: 78ba ldrb r2, [r7, #2]
|
|
8008854: 429a cmp r2, r3
|
|
8008856: d002 beq.n 800885e <USBH_FindInterface+0x5e>
|
|
((pif->bInterfaceSubClass == SubClass) || (SubClass == 0xFFU)) &&
|
|
8008858: 78bb ldrb r3, [r7, #2]
|
|
800885a: 2bff cmp r3, #255 ; 0xff
|
|
800885c: d109 bne.n 8008872 <USBH_FindInterface+0x72>
|
|
((pif->bInterfaceProtocol == Protocol) || (Protocol == 0xFFU)))
|
|
800885e: 693b ldr r3, [r7, #16]
|
|
8008860: 79db ldrb r3, [r3, #7]
|
|
((pif->bInterfaceSubClass == SubClass) || (SubClass == 0xFFU)) &&
|
|
8008862: 787a ldrb r2, [r7, #1]
|
|
8008864: 429a cmp r2, r3
|
|
8008866: d002 beq.n 800886e <USBH_FindInterface+0x6e>
|
|
((pif->bInterfaceProtocol == Protocol) || (Protocol == 0xFFU)))
|
|
8008868: 787b ldrb r3, [r7, #1]
|
|
800886a: 2bff cmp r3, #255 ; 0xff
|
|
800886c: d101 bne.n 8008872 <USBH_FindInterface+0x72>
|
|
{
|
|
return if_ix;
|
|
800886e: 7dfb ldrb r3, [r7, #23]
|
|
8008870: e006 b.n 8008880 <USBH_FindInterface+0x80>
|
|
}
|
|
if_ix++;
|
|
8008872: 7dfb ldrb r3, [r7, #23]
|
|
8008874: 3301 adds r3, #1
|
|
8008876: 75fb strb r3, [r7, #23]
|
|
while (if_ix < USBH_MAX_NUM_INTERFACES)
|
|
8008878: 7dfb ldrb r3, [r7, #23]
|
|
800887a: 2b01 cmp r3, #1
|
|
800887c: d9d6 bls.n 800882c <USBH_FindInterface+0x2c>
|
|
}
|
|
return 0xFFU;
|
|
800887e: 23ff movs r3, #255 ; 0xff
|
|
}
|
|
8008880: 4618 mov r0, r3
|
|
8008882: 371c adds r7, #28
|
|
8008884: 46bd mov sp, r7
|
|
8008886: f85d 7b04 ldr.w r7, [sp], #4
|
|
800888a: 4770 bx lr
|
|
|
|
0800888c <USBH_Start>:
|
|
* Start the USB Host Core.
|
|
* @param phost: Host Handle
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_Start(USBH_HandleTypeDef *phost)
|
|
{
|
|
800888c: b580 push {r7, lr}
|
|
800888e: b082 sub sp, #8
|
|
8008890: af00 add r7, sp, #0
|
|
8008892: 6078 str r0, [r7, #4]
|
|
/* Start the low level driver */
|
|
USBH_LL_Start(phost);
|
|
8008894: 6878 ldr r0, [r7, #4]
|
|
8008896: f001 fb89 bl 8009fac <USBH_LL_Start>
|
|
|
|
/* Activate VBUS on the port */
|
|
USBH_LL_DriverVBUS(phost, TRUE);
|
|
800889a: 2101 movs r1, #1
|
|
800889c: 6878 ldr r0, [r7, #4]
|
|
800889e: f001 fca0 bl 800a1e2 <USBH_LL_DriverVBUS>
|
|
|
|
return USBH_OK;
|
|
80088a2: 2300 movs r3, #0
|
|
}
|
|
80088a4: 4618 mov r0, r3
|
|
80088a6: 3708 adds r7, #8
|
|
80088a8: 46bd mov sp, r7
|
|
80088aa: bd80 pop {r7, pc}
|
|
|
|
080088ac <USBH_Process>:
|
|
* Background process of the USB Core.
|
|
* @param phost: Host Handle
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_Process(USBH_HandleTypeDef *phost)
|
|
{
|
|
80088ac: b580 push {r7, lr}
|
|
80088ae: b088 sub sp, #32
|
|
80088b0: af04 add r7, sp, #16
|
|
80088b2: 6078 str r0, [r7, #4]
|
|
__IO USBH_StatusTypeDef status = USBH_FAIL;
|
|
80088b4: 2302 movs r3, #2
|
|
80088b6: 73bb strb r3, [r7, #14]
|
|
uint8_t idx = 0U;
|
|
80088b8: 2300 movs r3, #0
|
|
80088ba: 73fb strb r3, [r7, #15]
|
|
|
|
/* check for Host pending port disconnect event */
|
|
if (phost->device.is_disconnected == 1U)
|
|
80088bc: 687b ldr r3, [r7, #4]
|
|
80088be: f893 3321 ldrb.w r3, [r3, #801] ; 0x321
|
|
80088c2: b2db uxtb r3, r3
|
|
80088c4: 2b01 cmp r3, #1
|
|
80088c6: d102 bne.n 80088ce <USBH_Process+0x22>
|
|
{
|
|
phost->gState = HOST_DEV_DISCONNECTED;
|
|
80088c8: 687b ldr r3, [r7, #4]
|
|
80088ca: 2203 movs r2, #3
|
|
80088cc: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
switch (phost->gState)
|
|
80088ce: 687b ldr r3, [r7, #4]
|
|
80088d0: 781b ldrb r3, [r3, #0]
|
|
80088d2: b2db uxtb r3, r3
|
|
80088d4: 2b0b cmp r3, #11
|
|
80088d6: f200 81b3 bhi.w 8008c40 <USBH_Process+0x394>
|
|
80088da: a201 add r2, pc, #4 ; (adr r2, 80088e0 <USBH_Process+0x34>)
|
|
80088dc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
80088e0: 08008911 .word 0x08008911
|
|
80088e4: 08008943 .word 0x08008943
|
|
80088e8: 080089ab .word 0x080089ab
|
|
80088ec: 08008bdb .word 0x08008bdb
|
|
80088f0: 08008c41 .word 0x08008c41
|
|
80088f4: 08008a4f .word 0x08008a4f
|
|
80088f8: 08008b81 .word 0x08008b81
|
|
80088fc: 08008a85 .word 0x08008a85
|
|
8008900: 08008aa5 .word 0x08008aa5
|
|
8008904: 08008ac5 .word 0x08008ac5
|
|
8008908: 08008af3 .word 0x08008af3
|
|
800890c: 08008bc3 .word 0x08008bc3
|
|
{
|
|
case HOST_IDLE :
|
|
|
|
if (phost->device.is_connected)
|
|
8008910: 687b ldr r3, [r7, #4]
|
|
8008912: f893 3320 ldrb.w r3, [r3, #800] ; 0x320
|
|
8008916: b2db uxtb r3, r3
|
|
8008918: 2b00 cmp r3, #0
|
|
800891a: f000 8193 beq.w 8008c44 <USBH_Process+0x398>
|
|
{
|
|
USBH_UsrLog("USB Device Connected");
|
|
|
|
/* Wait for 200 ms after connection */
|
|
phost->gState = HOST_DEV_WAIT_FOR_ATTACHMENT;
|
|
800891e: 687b ldr r3, [r7, #4]
|
|
8008920: 2201 movs r2, #1
|
|
8008922: 701a strb r2, [r3, #0]
|
|
USBH_Delay(200U);
|
|
8008924: 20c8 movs r0, #200 ; 0xc8
|
|
8008926: f001 fca6 bl 800a276 <USBH_Delay>
|
|
USBH_LL_ResetPort(phost);
|
|
800892a: 6878 ldr r0, [r7, #4]
|
|
800892c: f001 fb99 bl 800a062 <USBH_LL_ResetPort>
|
|
|
|
/* Make sure to start with Default address */
|
|
phost->device.address = USBH_ADDRESS_DEFAULT;
|
|
8008930: 687b ldr r3, [r7, #4]
|
|
8008932: 2200 movs r2, #0
|
|
8008934: f883 231c strb.w r2, [r3, #796] ; 0x31c
|
|
phost->Timeout = 0U;
|
|
8008938: 687b ldr r3, [r7, #4]
|
|
800893a: 2200 movs r2, #0
|
|
800893c: f8c3 23c8 str.w r2, [r3, #968] ; 0x3c8
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
break;
|
|
8008940: e180 b.n 8008c44 <USBH_Process+0x398>
|
|
|
|
case HOST_DEV_WAIT_FOR_ATTACHMENT: /* Wait for Port Enabled */
|
|
|
|
if (phost->device.PortEnabled == 1U)
|
|
8008942: 687b ldr r3, [r7, #4]
|
|
8008944: f893 3323 ldrb.w r3, [r3, #803] ; 0x323
|
|
8008948: 2b01 cmp r3, #1
|
|
800894a: d107 bne.n 800895c <USBH_Process+0xb0>
|
|
{
|
|
USBH_UsrLog("USB Device Reset Completed");
|
|
phost->device.RstCnt = 0U;
|
|
800894c: 687b ldr r3, [r7, #4]
|
|
800894e: 2200 movs r2, #0
|
|
8008950: f883 231f strb.w r2, [r3, #799] ; 0x31f
|
|
phost->gState = HOST_DEV_ATTACHED;
|
|
8008954: 687b ldr r3, [r7, #4]
|
|
8008956: 2202 movs r2, #2
|
|
8008958: 701a strb r2, [r3, #0]
|
|
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
break;
|
|
800895a: e182 b.n 8008c62 <USBH_Process+0x3b6>
|
|
if (phost->Timeout > USBH_DEV_RESET_TIMEOUT)
|
|
800895c: 687b ldr r3, [r7, #4]
|
|
800895e: f8d3 33c8 ldr.w r3, [r3, #968] ; 0x3c8
|
|
8008962: f5b3 7f7a cmp.w r3, #1000 ; 0x3e8
|
|
8008966: d914 bls.n 8008992 <USBH_Process+0xe6>
|
|
phost->device.RstCnt++;
|
|
8008968: 687b ldr r3, [r7, #4]
|
|
800896a: f893 331f ldrb.w r3, [r3, #799] ; 0x31f
|
|
800896e: 3301 adds r3, #1
|
|
8008970: b2da uxtb r2, r3
|
|
8008972: 687b ldr r3, [r7, #4]
|
|
8008974: f883 231f strb.w r2, [r3, #799] ; 0x31f
|
|
if (phost->device.RstCnt > 3U)
|
|
8008978: 687b ldr r3, [r7, #4]
|
|
800897a: f893 331f ldrb.w r3, [r3, #799] ; 0x31f
|
|
800897e: 2b03 cmp r3, #3
|
|
8008980: d903 bls.n 800898a <USBH_Process+0xde>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008982: 687b ldr r3, [r7, #4]
|
|
8008984: 220d movs r2, #13
|
|
8008986: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008988: e16b b.n 8008c62 <USBH_Process+0x3b6>
|
|
phost->gState = HOST_IDLE;
|
|
800898a: 687b ldr r3, [r7, #4]
|
|
800898c: 2200 movs r2, #0
|
|
800898e: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008990: e167 b.n 8008c62 <USBH_Process+0x3b6>
|
|
phost->Timeout += 10U;
|
|
8008992: 687b ldr r3, [r7, #4]
|
|
8008994: f8d3 33c8 ldr.w r3, [r3, #968] ; 0x3c8
|
|
8008998: f103 020a add.w r2, r3, #10
|
|
800899c: 687b ldr r3, [r7, #4]
|
|
800899e: f8c3 23c8 str.w r2, [r3, #968] ; 0x3c8
|
|
USBH_Delay(10U);
|
|
80089a2: 200a movs r0, #10
|
|
80089a4: f001 fc67 bl 800a276 <USBH_Delay>
|
|
break;
|
|
80089a8: e15b b.n 8008c62 <USBH_Process+0x3b6>
|
|
|
|
case HOST_DEV_ATTACHED :
|
|
|
|
if (phost->pUser != NULL)
|
|
80089aa: 687b ldr r3, [r7, #4]
|
|
80089ac: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
|
|
80089b0: 2b00 cmp r3, #0
|
|
80089b2: d005 beq.n 80089c0 <USBH_Process+0x114>
|
|
{
|
|
phost->pUser(phost, HOST_USER_CONNECTION);
|
|
80089b4: 687b ldr r3, [r7, #4]
|
|
80089b6: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
|
|
80089ba: 2104 movs r1, #4
|
|
80089bc: 6878 ldr r0, [r7, #4]
|
|
80089be: 4798 blx r3
|
|
}
|
|
|
|
/* Wait for 100 ms after Reset */
|
|
USBH_Delay(100U);
|
|
80089c0: 2064 movs r0, #100 ; 0x64
|
|
80089c2: f001 fc58 bl 800a276 <USBH_Delay>
|
|
|
|
phost->device.speed = USBH_LL_GetSpeed(phost);
|
|
80089c6: 6878 ldr r0, [r7, #4]
|
|
80089c8: f001 fb26 bl 800a018 <USBH_LL_GetSpeed>
|
|
80089cc: 4603 mov r3, r0
|
|
80089ce: 461a mov r2, r3
|
|
80089d0: 687b ldr r3, [r7, #4]
|
|
80089d2: f883 231d strb.w r2, [r3, #797] ; 0x31d
|
|
|
|
phost->gState = HOST_ENUMERATION;
|
|
80089d6: 687b ldr r3, [r7, #4]
|
|
80089d8: 2205 movs r2, #5
|
|
80089da: 701a strb r2, [r3, #0]
|
|
|
|
phost->Control.pipe_out = USBH_AllocPipe(phost, 0x00U);
|
|
80089dc: 2100 movs r1, #0
|
|
80089de: 6878 ldr r0, [r7, #4]
|
|
80089e0: f001 f931 bl 8009c46 <USBH_AllocPipe>
|
|
80089e4: 4603 mov r3, r0
|
|
80089e6: 461a mov r2, r3
|
|
80089e8: 687b ldr r3, [r7, #4]
|
|
80089ea: 715a strb r2, [r3, #5]
|
|
phost->Control.pipe_in = USBH_AllocPipe(phost, 0x80U);
|
|
80089ec: 2180 movs r1, #128 ; 0x80
|
|
80089ee: 6878 ldr r0, [r7, #4]
|
|
80089f0: f001 f929 bl 8009c46 <USBH_AllocPipe>
|
|
80089f4: 4603 mov r3, r0
|
|
80089f6: 461a mov r2, r3
|
|
80089f8: 687b ldr r3, [r7, #4]
|
|
80089fa: 711a strb r2, [r3, #4]
|
|
|
|
/* Open Control pipes */
|
|
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U,
|
|
80089fc: 687b ldr r3, [r7, #4]
|
|
80089fe: 7919 ldrb r1, [r3, #4]
|
|
8008a00: 687b ldr r3, [r7, #4]
|
|
8008a02: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
|
|
8008a06: 687b ldr r3, [r7, #4]
|
|
8008a08: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
phost->device.address, phost->device.speed,
|
|
USBH_EP_CONTROL, (uint16_t)phost->Control.pipe_size);
|
|
8008a0c: 687a ldr r2, [r7, #4]
|
|
8008a0e: 7992 ldrb r2, [r2, #6]
|
|
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U,
|
|
8008a10: b292 uxth r2, r2
|
|
8008a12: 9202 str r2, [sp, #8]
|
|
8008a14: 2200 movs r2, #0
|
|
8008a16: 9201 str r2, [sp, #4]
|
|
8008a18: 9300 str r3, [sp, #0]
|
|
8008a1a: 4603 mov r3, r0
|
|
8008a1c: 2280 movs r2, #128 ; 0x80
|
|
8008a1e: 6878 ldr r0, [r7, #4]
|
|
8008a20: f001 f8e2 bl 8009be8 <USBH_OpenPipe>
|
|
|
|
/* Open Control pipes */
|
|
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U,
|
|
8008a24: 687b ldr r3, [r7, #4]
|
|
8008a26: 7959 ldrb r1, [r3, #5]
|
|
8008a28: 687b ldr r3, [r7, #4]
|
|
8008a2a: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
|
|
8008a2e: 687b ldr r3, [r7, #4]
|
|
8008a30: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
phost->device.address, phost->device.speed,
|
|
USBH_EP_CONTROL, (uint16_t)phost->Control.pipe_size);
|
|
8008a34: 687a ldr r2, [r7, #4]
|
|
8008a36: 7992 ldrb r2, [r2, #6]
|
|
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U,
|
|
8008a38: b292 uxth r2, r2
|
|
8008a3a: 9202 str r2, [sp, #8]
|
|
8008a3c: 2200 movs r2, #0
|
|
8008a3e: 9201 str r2, [sp, #4]
|
|
8008a40: 9300 str r3, [sp, #0]
|
|
8008a42: 4603 mov r3, r0
|
|
8008a44: 2200 movs r2, #0
|
|
8008a46: 6878 ldr r0, [r7, #4]
|
|
8008a48: f001 f8ce bl 8009be8 <USBH_OpenPipe>
|
|
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
break;
|
|
8008a4c: e109 b.n 8008c62 <USBH_Process+0x3b6>
|
|
|
|
case HOST_ENUMERATION:
|
|
/* Check for enumeration status */
|
|
status = USBH_HandleEnum(phost);
|
|
8008a4e: 6878 ldr r0, [r7, #4]
|
|
8008a50: f000 f90c bl 8008c6c <USBH_HandleEnum>
|
|
8008a54: 4603 mov r3, r0
|
|
8008a56: 73bb strb r3, [r7, #14]
|
|
if (status == USBH_OK)
|
|
8008a58: 7bbb ldrb r3, [r7, #14]
|
|
8008a5a: b2db uxtb r3, r3
|
|
8008a5c: 2b00 cmp r3, #0
|
|
8008a5e: f040 80f3 bne.w 8008c48 <USBH_Process+0x39c>
|
|
{
|
|
/* The function shall return USBH_OK when full enumeration is complete */
|
|
USBH_UsrLog("Enumeration done.");
|
|
|
|
phost->device.current_interface = 0U;
|
|
8008a62: 687b ldr r3, [r7, #4]
|
|
8008a64: 2200 movs r2, #0
|
|
8008a66: f883 2324 strb.w r2, [r3, #804] ; 0x324
|
|
|
|
if (phost->device.DevDesc.bNumConfigurations == 1U)
|
|
8008a6a: 687b ldr r3, [r7, #4]
|
|
8008a6c: f893 3337 ldrb.w r3, [r3, #823] ; 0x337
|
|
8008a70: 2b01 cmp r3, #1
|
|
8008a72: d103 bne.n 8008a7c <USBH_Process+0x1d0>
|
|
{
|
|
USBH_UsrLog("This device has only 1 configuration.");
|
|
phost->gState = HOST_SET_CONFIGURATION;
|
|
8008a74: 687b ldr r3, [r7, #4]
|
|
8008a76: 2208 movs r2, #8
|
|
8008a78: 701a strb r2, [r3, #0]
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
break;
|
|
8008a7a: e0e5 b.n 8008c48 <USBH_Process+0x39c>
|
|
phost->gState = HOST_INPUT;
|
|
8008a7c: 687b ldr r3, [r7, #4]
|
|
8008a7e: 2207 movs r2, #7
|
|
8008a80: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008a82: e0e1 b.n 8008c48 <USBH_Process+0x39c>
|
|
|
|
case HOST_INPUT:
|
|
{
|
|
/* user callback for end of device basic enumeration */
|
|
if (phost->pUser != NULL)
|
|
8008a84: 687b ldr r3, [r7, #4]
|
|
8008a86: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
|
|
8008a8a: 2b00 cmp r3, #0
|
|
8008a8c: f000 80de beq.w 8008c4c <USBH_Process+0x3a0>
|
|
{
|
|
phost->pUser(phost, HOST_USER_SELECT_CONFIGURATION);
|
|
8008a90: 687b ldr r3, [r7, #4]
|
|
8008a92: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
|
|
8008a96: 2101 movs r1, #1
|
|
8008a98: 6878 ldr r0, [r7, #4]
|
|
8008a9a: 4798 blx r3
|
|
phost->gState = HOST_SET_CONFIGURATION;
|
|
8008a9c: 687b ldr r3, [r7, #4]
|
|
8008a9e: 2208 movs r2, #8
|
|
8008aa0: 701a strb r2, [r3, #0]
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
}
|
|
break;
|
|
8008aa2: e0d3 b.n 8008c4c <USBH_Process+0x3a0>
|
|
|
|
case HOST_SET_CONFIGURATION:
|
|
/* set configuration */
|
|
if (USBH_SetCfg(phost, (uint16_t)phost->device.CfgDesc.bConfigurationValue) == USBH_OK)
|
|
8008aa4: 687b ldr r3, [r7, #4]
|
|
8008aa6: f893 333d ldrb.w r3, [r3, #829] ; 0x33d
|
|
8008aaa: b29b uxth r3, r3
|
|
8008aac: 4619 mov r1, r3
|
|
8008aae: 6878 ldr r0, [r7, #4]
|
|
8008ab0: f000 fc20 bl 80092f4 <USBH_SetCfg>
|
|
8008ab4: 4603 mov r3, r0
|
|
8008ab6: 2b00 cmp r3, #0
|
|
8008ab8: f040 80ca bne.w 8008c50 <USBH_Process+0x3a4>
|
|
{
|
|
phost->gState = HOST_SET_WAKEUP_FEATURE;
|
|
8008abc: 687b ldr r3, [r7, #4]
|
|
8008abe: 2209 movs r2, #9
|
|
8008ac0: 701a strb r2, [r3, #0]
|
|
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
break;
|
|
8008ac2: e0c5 b.n 8008c50 <USBH_Process+0x3a4>
|
|
|
|
case HOST_SET_WAKEUP_FEATURE:
|
|
|
|
if ((phost->device.CfgDesc.bmAttributes) & (1U << 5))
|
|
8008ac4: 687b ldr r3, [r7, #4]
|
|
8008ac6: f893 333f ldrb.w r3, [r3, #831] ; 0x33f
|
|
8008aca: f003 0320 and.w r3, r3, #32
|
|
8008ace: 2b00 cmp r3, #0
|
|
8008ad0: d00b beq.n 8008aea <USBH_Process+0x23e>
|
|
{
|
|
if (USBH_SetFeature(phost, FEATURE_SELECTOR_REMOTEWAKEUP) == USBH_OK)
|
|
8008ad2: 2101 movs r1, #1
|
|
8008ad4: 6878 ldr r0, [r7, #4]
|
|
8008ad6: f000 fc30 bl 800933a <USBH_SetFeature>
|
|
8008ada: 4603 mov r3, r0
|
|
8008adc: 2b00 cmp r3, #0
|
|
8008ade: f040 80b9 bne.w 8008c54 <USBH_Process+0x3a8>
|
|
{
|
|
USBH_UsrLog("Device remote wakeup enabled");
|
|
phost->gState = HOST_CHECK_CLASS;
|
|
8008ae2: 687b ldr r3, [r7, #4]
|
|
8008ae4: 220a movs r2, #10
|
|
8008ae6: 701a strb r2, [r3, #0]
|
|
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
break;
|
|
8008ae8: e0b4 b.n 8008c54 <USBH_Process+0x3a8>
|
|
phost->gState = HOST_CHECK_CLASS;
|
|
8008aea: 687b ldr r3, [r7, #4]
|
|
8008aec: 220a movs r2, #10
|
|
8008aee: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008af0: e0b0 b.n 8008c54 <USBH_Process+0x3a8>
|
|
|
|
case HOST_CHECK_CLASS:
|
|
|
|
if (phost->ClassNumber == 0U)
|
|
8008af2: 687b ldr r3, [r7, #4]
|
|
8008af4: f8d3 3380 ldr.w r3, [r3, #896] ; 0x380
|
|
8008af8: 2b00 cmp r3, #0
|
|
8008afa: f000 80ad beq.w 8008c58 <USBH_Process+0x3ac>
|
|
{
|
|
USBH_UsrLog("No Class has been registered.");
|
|
}
|
|
else
|
|
{
|
|
phost->pActiveClass = NULL;
|
|
8008afe: 687b ldr r3, [r7, #4]
|
|
8008b00: 2200 movs r2, #0
|
|
8008b02: f8c3 237c str.w r2, [r3, #892] ; 0x37c
|
|
|
|
for (idx = 0U; idx < USBH_MAX_NUM_SUPPORTED_CLASS; idx++)
|
|
8008b06: 2300 movs r3, #0
|
|
8008b08: 73fb strb r3, [r7, #15]
|
|
8008b0a: e016 b.n 8008b3a <USBH_Process+0x28e>
|
|
{
|
|
if (phost->pClass[idx]->ClassCode == phost->device.CfgDesc.Itf_Desc[0].bInterfaceClass)
|
|
8008b0c: 7bfa ldrb r2, [r7, #15]
|
|
8008b0e: 687b ldr r3, [r7, #4]
|
|
8008b10: 32de adds r2, #222 ; 0xde
|
|
8008b12: f853 3022 ldr.w r3, [r3, r2, lsl #2]
|
|
8008b16: 791a ldrb r2, [r3, #4]
|
|
8008b18: 687b ldr r3, [r7, #4]
|
|
8008b1a: f893 3347 ldrb.w r3, [r3, #839] ; 0x347
|
|
8008b1e: 429a cmp r2, r3
|
|
8008b20: d108 bne.n 8008b34 <USBH_Process+0x288>
|
|
{
|
|
phost->pActiveClass = phost->pClass[idx];
|
|
8008b22: 7bfa ldrb r2, [r7, #15]
|
|
8008b24: 687b ldr r3, [r7, #4]
|
|
8008b26: 32de adds r2, #222 ; 0xde
|
|
8008b28: f853 2022 ldr.w r2, [r3, r2, lsl #2]
|
|
8008b2c: 687b ldr r3, [r7, #4]
|
|
8008b2e: f8c3 237c str.w r2, [r3, #892] ; 0x37c
|
|
break;
|
|
8008b32: e005 b.n 8008b40 <USBH_Process+0x294>
|
|
for (idx = 0U; idx < USBH_MAX_NUM_SUPPORTED_CLASS; idx++)
|
|
8008b34: 7bfb ldrb r3, [r7, #15]
|
|
8008b36: 3301 adds r3, #1
|
|
8008b38: 73fb strb r3, [r7, #15]
|
|
8008b3a: 7bfb ldrb r3, [r7, #15]
|
|
8008b3c: 2b00 cmp r3, #0
|
|
8008b3e: d0e5 beq.n 8008b0c <USBH_Process+0x260>
|
|
}
|
|
}
|
|
|
|
if (phost->pActiveClass != NULL)
|
|
8008b40: 687b ldr r3, [r7, #4]
|
|
8008b42: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008b46: 2b00 cmp r3, #0
|
|
8008b48: d016 beq.n 8008b78 <USBH_Process+0x2cc>
|
|
{
|
|
if (phost->pActiveClass->Init(phost) == USBH_OK)
|
|
8008b4a: 687b ldr r3, [r7, #4]
|
|
8008b4c: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008b50: 689b ldr r3, [r3, #8]
|
|
8008b52: 6878 ldr r0, [r7, #4]
|
|
8008b54: 4798 blx r3
|
|
8008b56: 4603 mov r3, r0
|
|
8008b58: 2b00 cmp r3, #0
|
|
8008b5a: d109 bne.n 8008b70 <USBH_Process+0x2c4>
|
|
{
|
|
phost->gState = HOST_CLASS_REQUEST;
|
|
8008b5c: 687b ldr r3, [r7, #4]
|
|
8008b5e: 2206 movs r2, #6
|
|
8008b60: 701a strb r2, [r3, #0]
|
|
USBH_UsrLog("%s class started.", phost->pActiveClass->Name);
|
|
|
|
/* Inform user that a class has been activated */
|
|
phost->pUser(phost, HOST_USER_CLASS_SELECTED);
|
|
8008b62: 687b ldr r3, [r7, #4]
|
|
8008b64: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
|
|
8008b68: 2103 movs r1, #3
|
|
8008b6a: 6878 ldr r0, [r7, #4]
|
|
8008b6c: 4798 blx r3
|
|
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
break;
|
|
8008b6e: e073 b.n 8008c58 <USBH_Process+0x3ac>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008b70: 687b ldr r3, [r7, #4]
|
|
8008b72: 220d movs r2, #13
|
|
8008b74: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008b76: e06f b.n 8008c58 <USBH_Process+0x3ac>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008b78: 687b ldr r3, [r7, #4]
|
|
8008b7a: 220d movs r2, #13
|
|
8008b7c: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008b7e: e06b b.n 8008c58 <USBH_Process+0x3ac>
|
|
|
|
case HOST_CLASS_REQUEST:
|
|
/* process class standard control requests state machine */
|
|
if (phost->pActiveClass != NULL)
|
|
8008b80: 687b ldr r3, [r7, #4]
|
|
8008b82: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008b86: 2b00 cmp r3, #0
|
|
8008b88: d017 beq.n 8008bba <USBH_Process+0x30e>
|
|
{
|
|
status = phost->pActiveClass->Requests(phost);
|
|
8008b8a: 687b ldr r3, [r7, #4]
|
|
8008b8c: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008b90: 691b ldr r3, [r3, #16]
|
|
8008b92: 6878 ldr r0, [r7, #4]
|
|
8008b94: 4798 blx r3
|
|
8008b96: 4603 mov r3, r0
|
|
8008b98: 73bb strb r3, [r7, #14]
|
|
|
|
if (status == USBH_OK)
|
|
8008b9a: 7bbb ldrb r3, [r7, #14]
|
|
8008b9c: b2db uxtb r3, r3
|
|
8008b9e: 2b00 cmp r3, #0
|
|
8008ba0: d103 bne.n 8008baa <USBH_Process+0x2fe>
|
|
{
|
|
phost->gState = HOST_CLASS;
|
|
8008ba2: 687b ldr r3, [r7, #4]
|
|
8008ba4: 220b movs r2, #11
|
|
8008ba6: 701a strb r2, [r3, #0]
|
|
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
break;
|
|
8008ba8: e058 b.n 8008c5c <USBH_Process+0x3b0>
|
|
else if (status == USBH_FAIL)
|
|
8008baa: 7bbb ldrb r3, [r7, #14]
|
|
8008bac: b2db uxtb r3, r3
|
|
8008bae: 2b02 cmp r3, #2
|
|
8008bb0: d154 bne.n 8008c5c <USBH_Process+0x3b0>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008bb2: 687b ldr r3, [r7, #4]
|
|
8008bb4: 220d movs r2, #13
|
|
8008bb6: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008bb8: e050 b.n 8008c5c <USBH_Process+0x3b0>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008bba: 687b ldr r3, [r7, #4]
|
|
8008bbc: 220d movs r2, #13
|
|
8008bbe: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008bc0: e04c b.n 8008c5c <USBH_Process+0x3b0>
|
|
|
|
case HOST_CLASS:
|
|
/* process class state machine */
|
|
if (phost->pActiveClass != NULL)
|
|
8008bc2: 687b ldr r3, [r7, #4]
|
|
8008bc4: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008bc8: 2b00 cmp r3, #0
|
|
8008bca: d049 beq.n 8008c60 <USBH_Process+0x3b4>
|
|
{
|
|
phost->pActiveClass->BgndProcess(phost);
|
|
8008bcc: 687b ldr r3, [r7, #4]
|
|
8008bce: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008bd2: 695b ldr r3, [r3, #20]
|
|
8008bd4: 6878 ldr r0, [r7, #4]
|
|
8008bd6: 4798 blx r3
|
|
}
|
|
break;
|
|
8008bd8: e042 b.n 8008c60 <USBH_Process+0x3b4>
|
|
|
|
case HOST_DEV_DISCONNECTED :
|
|
phost->device.is_disconnected = 0U;
|
|
8008bda: 687b ldr r3, [r7, #4]
|
|
8008bdc: 2200 movs r2, #0
|
|
8008bde: f883 2321 strb.w r2, [r3, #801] ; 0x321
|
|
|
|
DeInitStateMachine(phost);
|
|
8008be2: 6878 ldr r0, [r7, #4]
|
|
8008be4: f7ff fd72 bl 80086cc <DeInitStateMachine>
|
|
|
|
/* Re-Initilaize Host for new Enumeration */
|
|
if (phost->pActiveClass != NULL)
|
|
8008be8: 687b ldr r3, [r7, #4]
|
|
8008bea: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008bee: 2b00 cmp r3, #0
|
|
8008bf0: d009 beq.n 8008c06 <USBH_Process+0x35a>
|
|
{
|
|
phost->pActiveClass->DeInit(phost);
|
|
8008bf2: 687b ldr r3, [r7, #4]
|
|
8008bf4: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8008bf8: 68db ldr r3, [r3, #12]
|
|
8008bfa: 6878 ldr r0, [r7, #4]
|
|
8008bfc: 4798 blx r3
|
|
phost->pActiveClass = NULL;
|
|
8008bfe: 687b ldr r3, [r7, #4]
|
|
8008c00: 2200 movs r2, #0
|
|
8008c02: f8c3 237c str.w r2, [r3, #892] ; 0x37c
|
|
}
|
|
|
|
if (phost->pUser != NULL)
|
|
8008c06: 687b ldr r3, [r7, #4]
|
|
8008c08: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
|
|
8008c0c: 2b00 cmp r3, #0
|
|
8008c0e: d005 beq.n 8008c1c <USBH_Process+0x370>
|
|
{
|
|
phost->pUser(phost, HOST_USER_DISCONNECTION);
|
|
8008c10: 687b ldr r3, [r7, #4]
|
|
8008c12: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
|
|
8008c16: 2105 movs r1, #5
|
|
8008c18: 6878 ldr r0, [r7, #4]
|
|
8008c1a: 4798 blx r3
|
|
}
|
|
USBH_UsrLog("USB Device disconnected");
|
|
|
|
if (phost->device.is_ReEnumerated == 1U)
|
|
8008c1c: 687b ldr r3, [r7, #4]
|
|
8008c1e: f893 3322 ldrb.w r3, [r3, #802] ; 0x322
|
|
8008c22: b2db uxtb r3, r3
|
|
8008c24: 2b01 cmp r3, #1
|
|
8008c26: d107 bne.n 8008c38 <USBH_Process+0x38c>
|
|
{
|
|
phost->device.is_ReEnumerated = 0U;
|
|
8008c28: 687b ldr r3, [r7, #4]
|
|
8008c2a: 2200 movs r2, #0
|
|
8008c2c: f883 2322 strb.w r2, [r3, #802] ; 0x322
|
|
|
|
/* Start the host and re-enable Vbus */
|
|
USBH_Start(phost);
|
|
8008c30: 6878 ldr r0, [r7, #4]
|
|
8008c32: f7ff fe2b bl 800888c <USBH_Start>
|
|
(void)osMessagePut(phost->os_event, phost->os_msg, 0U);
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
break;
|
|
8008c36: e014 b.n 8008c62 <USBH_Process+0x3b6>
|
|
USBH_LL_Start(phost);
|
|
8008c38: 6878 ldr r0, [r7, #4]
|
|
8008c3a: f001 f9b7 bl 8009fac <USBH_LL_Start>
|
|
break;
|
|
8008c3e: e010 b.n 8008c62 <USBH_Process+0x3b6>
|
|
|
|
case HOST_ABORT_STATE:
|
|
default :
|
|
break;
|
|
8008c40: bf00 nop
|
|
8008c42: e00e b.n 8008c62 <USBH_Process+0x3b6>
|
|
break;
|
|
8008c44: bf00 nop
|
|
8008c46: e00c b.n 8008c62 <USBH_Process+0x3b6>
|
|
break;
|
|
8008c48: bf00 nop
|
|
8008c4a: e00a b.n 8008c62 <USBH_Process+0x3b6>
|
|
break;
|
|
8008c4c: bf00 nop
|
|
8008c4e: e008 b.n 8008c62 <USBH_Process+0x3b6>
|
|
break;
|
|
8008c50: bf00 nop
|
|
8008c52: e006 b.n 8008c62 <USBH_Process+0x3b6>
|
|
break;
|
|
8008c54: bf00 nop
|
|
8008c56: e004 b.n 8008c62 <USBH_Process+0x3b6>
|
|
break;
|
|
8008c58: bf00 nop
|
|
8008c5a: e002 b.n 8008c62 <USBH_Process+0x3b6>
|
|
break;
|
|
8008c5c: bf00 nop
|
|
8008c5e: e000 b.n 8008c62 <USBH_Process+0x3b6>
|
|
break;
|
|
8008c60: bf00 nop
|
|
}
|
|
return USBH_OK;
|
|
8008c62: 2300 movs r3, #0
|
|
}
|
|
8008c64: 4618 mov r0, r3
|
|
8008c66: 3710 adds r7, #16
|
|
8008c68: 46bd mov sp, r7
|
|
8008c6a: bd80 pop {r7, pc}
|
|
|
|
08008c6c <USBH_HandleEnum>:
|
|
* This function includes the complete enumeration process
|
|
* @param phost: Host Handle
|
|
* @retval USBH_Status
|
|
*/
|
|
static USBH_StatusTypeDef USBH_HandleEnum(USBH_HandleTypeDef *phost)
|
|
{
|
|
8008c6c: b580 push {r7, lr}
|
|
8008c6e: b088 sub sp, #32
|
|
8008c70: af04 add r7, sp, #16
|
|
8008c72: 6078 str r0, [r7, #4]
|
|
USBH_StatusTypeDef Status = USBH_BUSY;
|
|
8008c74: 2301 movs r3, #1
|
|
8008c76: 73fb strb r3, [r7, #15]
|
|
USBH_StatusTypeDef ReqStatus = USBH_BUSY;
|
|
8008c78: 2301 movs r3, #1
|
|
8008c7a: 73bb strb r3, [r7, #14]
|
|
|
|
switch (phost->EnumState)
|
|
8008c7c: 687b ldr r3, [r7, #4]
|
|
8008c7e: 785b ldrb r3, [r3, #1]
|
|
8008c80: 2b07 cmp r3, #7
|
|
8008c82: f200 81c1 bhi.w 8009008 <USBH_HandleEnum+0x39c>
|
|
8008c86: a201 add r2, pc, #4 ; (adr r2, 8008c8c <USBH_HandleEnum+0x20>)
|
|
8008c88: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8008c8c: 08008cad .word 0x08008cad
|
|
8008c90: 08008d6b .word 0x08008d6b
|
|
8008c94: 08008dd5 .word 0x08008dd5
|
|
8008c98: 08008e63 .word 0x08008e63
|
|
8008c9c: 08008ecd .word 0x08008ecd
|
|
8008ca0: 08008f3d .word 0x08008f3d
|
|
8008ca4: 08008f83 .word 0x08008f83
|
|
8008ca8: 08008fc9 .word 0x08008fc9
|
|
{
|
|
case ENUM_IDLE:
|
|
/* Get Device Desc for only 1st 8 bytes : To get EP0 MaxPacketSize */
|
|
ReqStatus = USBH_Get_DevDesc(phost, 8U);
|
|
8008cac: 2108 movs r1, #8
|
|
8008cae: 6878 ldr r0, [r7, #4]
|
|
8008cb0: f000 fa50 bl 8009154 <USBH_Get_DevDesc>
|
|
8008cb4: 4603 mov r3, r0
|
|
8008cb6: 73bb strb r3, [r7, #14]
|
|
if (ReqStatus == USBH_OK)
|
|
8008cb8: 7bbb ldrb r3, [r7, #14]
|
|
8008cba: 2b00 cmp r3, #0
|
|
8008cbc: d130 bne.n 8008d20 <USBH_HandleEnum+0xb4>
|
|
{
|
|
phost->Control.pipe_size = phost->device.DevDesc.bMaxPacketSize;
|
|
8008cbe: 687b ldr r3, [r7, #4]
|
|
8008cc0: f893 232d ldrb.w r2, [r3, #813] ; 0x32d
|
|
8008cc4: 687b ldr r3, [r7, #4]
|
|
8008cc6: 719a strb r2, [r3, #6]
|
|
|
|
phost->EnumState = ENUM_GET_FULL_DEV_DESC;
|
|
8008cc8: 687b ldr r3, [r7, #4]
|
|
8008cca: 2201 movs r2, #1
|
|
8008ccc: 705a strb r2, [r3, #1]
|
|
|
|
/* modify control channels configuration for MaxPacket size */
|
|
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U, phost->device.address,
|
|
8008cce: 687b ldr r3, [r7, #4]
|
|
8008cd0: 7919 ldrb r1, [r3, #4]
|
|
8008cd2: 687b ldr r3, [r7, #4]
|
|
8008cd4: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
|
|
8008cd8: 687b ldr r3, [r7, #4]
|
|
8008cda: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
phost->device.speed, USBH_EP_CONTROL,
|
|
(uint16_t)phost->Control.pipe_size);
|
|
8008cde: 687a ldr r2, [r7, #4]
|
|
8008ce0: 7992 ldrb r2, [r2, #6]
|
|
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U, phost->device.address,
|
|
8008ce2: b292 uxth r2, r2
|
|
8008ce4: 9202 str r2, [sp, #8]
|
|
8008ce6: 2200 movs r2, #0
|
|
8008ce8: 9201 str r2, [sp, #4]
|
|
8008cea: 9300 str r3, [sp, #0]
|
|
8008cec: 4603 mov r3, r0
|
|
8008cee: 2280 movs r2, #128 ; 0x80
|
|
8008cf0: 6878 ldr r0, [r7, #4]
|
|
8008cf2: f000 ff79 bl 8009be8 <USBH_OpenPipe>
|
|
|
|
/* Open Control pipes */
|
|
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U, phost->device.address,
|
|
8008cf6: 687b ldr r3, [r7, #4]
|
|
8008cf8: 7959 ldrb r1, [r3, #5]
|
|
8008cfa: 687b ldr r3, [r7, #4]
|
|
8008cfc: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
|
|
8008d00: 687b ldr r3, [r7, #4]
|
|
8008d02: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
phost->device.speed, USBH_EP_CONTROL,
|
|
(uint16_t)phost->Control.pipe_size);
|
|
8008d06: 687a ldr r2, [r7, #4]
|
|
8008d08: 7992 ldrb r2, [r2, #6]
|
|
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U, phost->device.address,
|
|
8008d0a: b292 uxth r2, r2
|
|
8008d0c: 9202 str r2, [sp, #8]
|
|
8008d0e: 2200 movs r2, #0
|
|
8008d10: 9201 str r2, [sp, #4]
|
|
8008d12: 9300 str r3, [sp, #0]
|
|
8008d14: 4603 mov r3, r0
|
|
8008d16: 2200 movs r2, #0
|
|
8008d18: 6878 ldr r0, [r7, #4]
|
|
8008d1a: f000 ff65 bl 8009be8 <USBH_OpenPipe>
|
|
}
|
|
else
|
|
{
|
|
/* .. */
|
|
}
|
|
break;
|
|
8008d1e: e175 b.n 800900c <USBH_HandleEnum+0x3a0>
|
|
else if (ReqStatus == USBH_NOT_SUPPORTED)
|
|
8008d20: 7bbb ldrb r3, [r7, #14]
|
|
8008d22: 2b03 cmp r3, #3
|
|
8008d24: f040 8172 bne.w 800900c <USBH_HandleEnum+0x3a0>
|
|
phost->device.EnumCnt++;
|
|
8008d28: 687b ldr r3, [r7, #4]
|
|
8008d2a: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
|
|
8008d2e: 3301 adds r3, #1
|
|
8008d30: b2da uxtb r2, r3
|
|
8008d32: 687b ldr r3, [r7, #4]
|
|
8008d34: f883 231e strb.w r2, [r3, #798] ; 0x31e
|
|
if (phost->device.EnumCnt > 3U)
|
|
8008d38: 687b ldr r3, [r7, #4]
|
|
8008d3a: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
|
|
8008d3e: 2b03 cmp r3, #3
|
|
8008d40: d903 bls.n 8008d4a <USBH_HandleEnum+0xde>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008d42: 687b ldr r3, [r7, #4]
|
|
8008d44: 220d movs r2, #13
|
|
8008d46: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008d48: e160 b.n 800900c <USBH_HandleEnum+0x3a0>
|
|
USBH_FreePipe(phost, phost->Control.pipe_out);
|
|
8008d4a: 687b ldr r3, [r7, #4]
|
|
8008d4c: 795b ldrb r3, [r3, #5]
|
|
8008d4e: 4619 mov r1, r3
|
|
8008d50: 6878 ldr r0, [r7, #4]
|
|
8008d52: f000 ff99 bl 8009c88 <USBH_FreePipe>
|
|
USBH_FreePipe(phost, phost->Control.pipe_in);
|
|
8008d56: 687b ldr r3, [r7, #4]
|
|
8008d58: 791b ldrb r3, [r3, #4]
|
|
8008d5a: 4619 mov r1, r3
|
|
8008d5c: 6878 ldr r0, [r7, #4]
|
|
8008d5e: f000 ff93 bl 8009c88 <USBH_FreePipe>
|
|
phost->gState = HOST_IDLE;
|
|
8008d62: 687b ldr r3, [r7, #4]
|
|
8008d64: 2200 movs r2, #0
|
|
8008d66: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008d68: e150 b.n 800900c <USBH_HandleEnum+0x3a0>
|
|
|
|
case ENUM_GET_FULL_DEV_DESC:
|
|
/* Get FULL Device Desc */
|
|
ReqStatus = USBH_Get_DevDesc(phost, USB_DEVICE_DESC_SIZE);
|
|
8008d6a: 2112 movs r1, #18
|
|
8008d6c: 6878 ldr r0, [r7, #4]
|
|
8008d6e: f000 f9f1 bl 8009154 <USBH_Get_DevDesc>
|
|
8008d72: 4603 mov r3, r0
|
|
8008d74: 73bb strb r3, [r7, #14]
|
|
if (ReqStatus == USBH_OK)
|
|
8008d76: 7bbb ldrb r3, [r7, #14]
|
|
8008d78: 2b00 cmp r3, #0
|
|
8008d7a: d103 bne.n 8008d84 <USBH_HandleEnum+0x118>
|
|
{
|
|
USBH_UsrLog("PID: %xh", phost->device.DevDesc.idProduct);
|
|
USBH_UsrLog("VID: %xh", phost->device.DevDesc.idVendor);
|
|
|
|
phost->EnumState = ENUM_SET_ADDR;
|
|
8008d7c: 687b ldr r3, [r7, #4]
|
|
8008d7e: 2202 movs r2, #2
|
|
8008d80: 705a strb r2, [r3, #1]
|
|
}
|
|
else
|
|
{
|
|
/* .. */
|
|
}
|
|
break;
|
|
8008d82: e145 b.n 8009010 <USBH_HandleEnum+0x3a4>
|
|
else if (ReqStatus == USBH_NOT_SUPPORTED)
|
|
8008d84: 7bbb ldrb r3, [r7, #14]
|
|
8008d86: 2b03 cmp r3, #3
|
|
8008d88: f040 8142 bne.w 8009010 <USBH_HandleEnum+0x3a4>
|
|
phost->device.EnumCnt++;
|
|
8008d8c: 687b ldr r3, [r7, #4]
|
|
8008d8e: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
|
|
8008d92: 3301 adds r3, #1
|
|
8008d94: b2da uxtb r2, r3
|
|
8008d96: 687b ldr r3, [r7, #4]
|
|
8008d98: f883 231e strb.w r2, [r3, #798] ; 0x31e
|
|
if (phost->device.EnumCnt > 3U)
|
|
8008d9c: 687b ldr r3, [r7, #4]
|
|
8008d9e: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
|
|
8008da2: 2b03 cmp r3, #3
|
|
8008da4: d903 bls.n 8008dae <USBH_HandleEnum+0x142>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008da6: 687b ldr r3, [r7, #4]
|
|
8008da8: 220d movs r2, #13
|
|
8008daa: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008dac: e130 b.n 8009010 <USBH_HandleEnum+0x3a4>
|
|
USBH_FreePipe(phost, phost->Control.pipe_out);
|
|
8008dae: 687b ldr r3, [r7, #4]
|
|
8008db0: 795b ldrb r3, [r3, #5]
|
|
8008db2: 4619 mov r1, r3
|
|
8008db4: 6878 ldr r0, [r7, #4]
|
|
8008db6: f000 ff67 bl 8009c88 <USBH_FreePipe>
|
|
USBH_FreePipe(phost, phost->Control.pipe_in);
|
|
8008dba: 687b ldr r3, [r7, #4]
|
|
8008dbc: 791b ldrb r3, [r3, #4]
|
|
8008dbe: 4619 mov r1, r3
|
|
8008dc0: 6878 ldr r0, [r7, #4]
|
|
8008dc2: f000 ff61 bl 8009c88 <USBH_FreePipe>
|
|
phost->EnumState = ENUM_IDLE;
|
|
8008dc6: 687b ldr r3, [r7, #4]
|
|
8008dc8: 2200 movs r2, #0
|
|
8008dca: 705a strb r2, [r3, #1]
|
|
phost->gState = HOST_IDLE;
|
|
8008dcc: 687b ldr r3, [r7, #4]
|
|
8008dce: 2200 movs r2, #0
|
|
8008dd0: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008dd2: e11d b.n 8009010 <USBH_HandleEnum+0x3a4>
|
|
|
|
case ENUM_SET_ADDR:
|
|
/* set address */
|
|
ReqStatus = USBH_SetAddress(phost, USBH_DEVICE_ADDRESS);
|
|
8008dd4: 2101 movs r1, #1
|
|
8008dd6: 6878 ldr r0, [r7, #4]
|
|
8008dd8: f000 fa68 bl 80092ac <USBH_SetAddress>
|
|
8008ddc: 4603 mov r3, r0
|
|
8008dde: 73bb strb r3, [r7, #14]
|
|
if (ReqStatus == USBH_OK)
|
|
8008de0: 7bbb ldrb r3, [r7, #14]
|
|
8008de2: 2b00 cmp r3, #0
|
|
8008de4: d132 bne.n 8008e4c <USBH_HandleEnum+0x1e0>
|
|
{
|
|
USBH_Delay(2U);
|
|
8008de6: 2002 movs r0, #2
|
|
8008de8: f001 fa45 bl 800a276 <USBH_Delay>
|
|
phost->device.address = USBH_DEVICE_ADDRESS;
|
|
8008dec: 687b ldr r3, [r7, #4]
|
|
8008dee: 2201 movs r2, #1
|
|
8008df0: f883 231c strb.w r2, [r3, #796] ; 0x31c
|
|
|
|
/* user callback for device address assigned */
|
|
USBH_UsrLog("Address (#%d) assigned.", phost->device.address);
|
|
phost->EnumState = ENUM_GET_CFG_DESC;
|
|
8008df4: 687b ldr r3, [r7, #4]
|
|
8008df6: 2203 movs r2, #3
|
|
8008df8: 705a strb r2, [r3, #1]
|
|
|
|
/* modify control channels to update device address */
|
|
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U, phost->device.address,
|
|
8008dfa: 687b ldr r3, [r7, #4]
|
|
8008dfc: 7919 ldrb r1, [r3, #4]
|
|
8008dfe: 687b ldr r3, [r7, #4]
|
|
8008e00: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
|
|
8008e04: 687b ldr r3, [r7, #4]
|
|
8008e06: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
phost->device.speed, USBH_EP_CONTROL,
|
|
(uint16_t)phost->Control.pipe_size);
|
|
8008e0a: 687a ldr r2, [r7, #4]
|
|
8008e0c: 7992 ldrb r2, [r2, #6]
|
|
USBH_OpenPipe(phost, phost->Control.pipe_in, 0x80U, phost->device.address,
|
|
8008e0e: b292 uxth r2, r2
|
|
8008e10: 9202 str r2, [sp, #8]
|
|
8008e12: 2200 movs r2, #0
|
|
8008e14: 9201 str r2, [sp, #4]
|
|
8008e16: 9300 str r3, [sp, #0]
|
|
8008e18: 4603 mov r3, r0
|
|
8008e1a: 2280 movs r2, #128 ; 0x80
|
|
8008e1c: 6878 ldr r0, [r7, #4]
|
|
8008e1e: f000 fee3 bl 8009be8 <USBH_OpenPipe>
|
|
|
|
/* Open Control pipes */
|
|
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U, phost->device.address,
|
|
8008e22: 687b ldr r3, [r7, #4]
|
|
8008e24: 7959 ldrb r1, [r3, #5]
|
|
8008e26: 687b ldr r3, [r7, #4]
|
|
8008e28: f893 031c ldrb.w r0, [r3, #796] ; 0x31c
|
|
8008e2c: 687b ldr r3, [r7, #4]
|
|
8008e2e: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
phost->device.speed, USBH_EP_CONTROL,
|
|
(uint16_t)phost->Control.pipe_size);
|
|
8008e32: 687a ldr r2, [r7, #4]
|
|
8008e34: 7992 ldrb r2, [r2, #6]
|
|
USBH_OpenPipe(phost, phost->Control.pipe_out, 0x00U, phost->device.address,
|
|
8008e36: b292 uxth r2, r2
|
|
8008e38: 9202 str r2, [sp, #8]
|
|
8008e3a: 2200 movs r2, #0
|
|
8008e3c: 9201 str r2, [sp, #4]
|
|
8008e3e: 9300 str r3, [sp, #0]
|
|
8008e40: 4603 mov r3, r0
|
|
8008e42: 2200 movs r2, #0
|
|
8008e44: 6878 ldr r0, [r7, #4]
|
|
8008e46: f000 fecf bl 8009be8 <USBH_OpenPipe>
|
|
}
|
|
else
|
|
{
|
|
/* .. */
|
|
}
|
|
break;
|
|
8008e4a: e0e3 b.n 8009014 <USBH_HandleEnum+0x3a8>
|
|
else if (ReqStatus == USBH_NOT_SUPPORTED)
|
|
8008e4c: 7bbb ldrb r3, [r7, #14]
|
|
8008e4e: 2b03 cmp r3, #3
|
|
8008e50: f040 80e0 bne.w 8009014 <USBH_HandleEnum+0x3a8>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008e54: 687b ldr r3, [r7, #4]
|
|
8008e56: 220d movs r2, #13
|
|
8008e58: 701a strb r2, [r3, #0]
|
|
phost->EnumState = ENUM_IDLE;
|
|
8008e5a: 687b ldr r3, [r7, #4]
|
|
8008e5c: 2200 movs r2, #0
|
|
8008e5e: 705a strb r2, [r3, #1]
|
|
break;
|
|
8008e60: e0d8 b.n 8009014 <USBH_HandleEnum+0x3a8>
|
|
|
|
case ENUM_GET_CFG_DESC:
|
|
/* get standard configuration descriptor */
|
|
ReqStatus = USBH_Get_CfgDesc(phost, USB_CONFIGURATION_DESC_SIZE);
|
|
8008e62: 2109 movs r1, #9
|
|
8008e64: 6878 ldr r0, [r7, #4]
|
|
8008e66: f000 f99d bl 80091a4 <USBH_Get_CfgDesc>
|
|
8008e6a: 4603 mov r3, r0
|
|
8008e6c: 73bb strb r3, [r7, #14]
|
|
if (ReqStatus == USBH_OK)
|
|
8008e6e: 7bbb ldrb r3, [r7, #14]
|
|
8008e70: 2b00 cmp r3, #0
|
|
8008e72: d103 bne.n 8008e7c <USBH_HandleEnum+0x210>
|
|
{
|
|
phost->EnumState = ENUM_GET_FULL_CFG_DESC;
|
|
8008e74: 687b ldr r3, [r7, #4]
|
|
8008e76: 2204 movs r2, #4
|
|
8008e78: 705a strb r2, [r3, #1]
|
|
}
|
|
else
|
|
{
|
|
/* .. */
|
|
}
|
|
break;
|
|
8008e7a: e0cd b.n 8009018 <USBH_HandleEnum+0x3ac>
|
|
else if (ReqStatus == USBH_NOT_SUPPORTED)
|
|
8008e7c: 7bbb ldrb r3, [r7, #14]
|
|
8008e7e: 2b03 cmp r3, #3
|
|
8008e80: f040 80ca bne.w 8009018 <USBH_HandleEnum+0x3ac>
|
|
phost->device.EnumCnt++;
|
|
8008e84: 687b ldr r3, [r7, #4]
|
|
8008e86: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
|
|
8008e8a: 3301 adds r3, #1
|
|
8008e8c: b2da uxtb r2, r3
|
|
8008e8e: 687b ldr r3, [r7, #4]
|
|
8008e90: f883 231e strb.w r2, [r3, #798] ; 0x31e
|
|
if (phost->device.EnumCnt > 3U)
|
|
8008e94: 687b ldr r3, [r7, #4]
|
|
8008e96: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
|
|
8008e9a: 2b03 cmp r3, #3
|
|
8008e9c: d903 bls.n 8008ea6 <USBH_HandleEnum+0x23a>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008e9e: 687b ldr r3, [r7, #4]
|
|
8008ea0: 220d movs r2, #13
|
|
8008ea2: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008ea4: e0b8 b.n 8009018 <USBH_HandleEnum+0x3ac>
|
|
USBH_FreePipe(phost, phost->Control.pipe_out);
|
|
8008ea6: 687b ldr r3, [r7, #4]
|
|
8008ea8: 795b ldrb r3, [r3, #5]
|
|
8008eaa: 4619 mov r1, r3
|
|
8008eac: 6878 ldr r0, [r7, #4]
|
|
8008eae: f000 feeb bl 8009c88 <USBH_FreePipe>
|
|
USBH_FreePipe(phost, phost->Control.pipe_in);
|
|
8008eb2: 687b ldr r3, [r7, #4]
|
|
8008eb4: 791b ldrb r3, [r3, #4]
|
|
8008eb6: 4619 mov r1, r3
|
|
8008eb8: 6878 ldr r0, [r7, #4]
|
|
8008eba: f000 fee5 bl 8009c88 <USBH_FreePipe>
|
|
phost->EnumState = ENUM_IDLE;
|
|
8008ebe: 687b ldr r3, [r7, #4]
|
|
8008ec0: 2200 movs r2, #0
|
|
8008ec2: 705a strb r2, [r3, #1]
|
|
phost->gState = HOST_IDLE;
|
|
8008ec4: 687b ldr r3, [r7, #4]
|
|
8008ec6: 2200 movs r2, #0
|
|
8008ec8: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008eca: e0a5 b.n 8009018 <USBH_HandleEnum+0x3ac>
|
|
|
|
case ENUM_GET_FULL_CFG_DESC:
|
|
/* get FULL config descriptor (config, interface, endpoints) */
|
|
ReqStatus = USBH_Get_CfgDesc(phost, phost->device.CfgDesc.wTotalLength);
|
|
8008ecc: 687b ldr r3, [r7, #4]
|
|
8008ece: f8b3 333a ldrh.w r3, [r3, #826] ; 0x33a
|
|
8008ed2: 4619 mov r1, r3
|
|
8008ed4: 6878 ldr r0, [r7, #4]
|
|
8008ed6: f000 f965 bl 80091a4 <USBH_Get_CfgDesc>
|
|
8008eda: 4603 mov r3, r0
|
|
8008edc: 73bb strb r3, [r7, #14]
|
|
if (ReqStatus == USBH_OK)
|
|
8008ede: 7bbb ldrb r3, [r7, #14]
|
|
8008ee0: 2b00 cmp r3, #0
|
|
8008ee2: d103 bne.n 8008eec <USBH_HandleEnum+0x280>
|
|
{
|
|
phost->EnumState = ENUM_GET_MFC_STRING_DESC;
|
|
8008ee4: 687b ldr r3, [r7, #4]
|
|
8008ee6: 2205 movs r2, #5
|
|
8008ee8: 705a strb r2, [r3, #1]
|
|
}
|
|
else
|
|
{
|
|
/* .. */
|
|
}
|
|
break;
|
|
8008eea: e097 b.n 800901c <USBH_HandleEnum+0x3b0>
|
|
else if (ReqStatus == USBH_NOT_SUPPORTED)
|
|
8008eec: 7bbb ldrb r3, [r7, #14]
|
|
8008eee: 2b03 cmp r3, #3
|
|
8008ef0: f040 8094 bne.w 800901c <USBH_HandleEnum+0x3b0>
|
|
phost->device.EnumCnt++;
|
|
8008ef4: 687b ldr r3, [r7, #4]
|
|
8008ef6: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
|
|
8008efa: 3301 adds r3, #1
|
|
8008efc: b2da uxtb r2, r3
|
|
8008efe: 687b ldr r3, [r7, #4]
|
|
8008f00: f883 231e strb.w r2, [r3, #798] ; 0x31e
|
|
if (phost->device.EnumCnt > 3U)
|
|
8008f04: 687b ldr r3, [r7, #4]
|
|
8008f06: f893 331e ldrb.w r3, [r3, #798] ; 0x31e
|
|
8008f0a: 2b03 cmp r3, #3
|
|
8008f0c: d903 bls.n 8008f16 <USBH_HandleEnum+0x2aa>
|
|
phost->gState = HOST_ABORT_STATE;
|
|
8008f0e: 687b ldr r3, [r7, #4]
|
|
8008f10: 220d movs r2, #13
|
|
8008f12: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008f14: e082 b.n 800901c <USBH_HandleEnum+0x3b0>
|
|
USBH_FreePipe(phost, phost->Control.pipe_out);
|
|
8008f16: 687b ldr r3, [r7, #4]
|
|
8008f18: 795b ldrb r3, [r3, #5]
|
|
8008f1a: 4619 mov r1, r3
|
|
8008f1c: 6878 ldr r0, [r7, #4]
|
|
8008f1e: f000 feb3 bl 8009c88 <USBH_FreePipe>
|
|
USBH_FreePipe(phost, phost->Control.pipe_in);
|
|
8008f22: 687b ldr r3, [r7, #4]
|
|
8008f24: 791b ldrb r3, [r3, #4]
|
|
8008f26: 4619 mov r1, r3
|
|
8008f28: 6878 ldr r0, [r7, #4]
|
|
8008f2a: f000 fead bl 8009c88 <USBH_FreePipe>
|
|
phost->EnumState = ENUM_IDLE;
|
|
8008f2e: 687b ldr r3, [r7, #4]
|
|
8008f30: 2200 movs r2, #0
|
|
8008f32: 705a strb r2, [r3, #1]
|
|
phost->gState = HOST_IDLE;
|
|
8008f34: 687b ldr r3, [r7, #4]
|
|
8008f36: 2200 movs r2, #0
|
|
8008f38: 701a strb r2, [r3, #0]
|
|
break;
|
|
8008f3a: e06f b.n 800901c <USBH_HandleEnum+0x3b0>
|
|
|
|
case ENUM_GET_MFC_STRING_DESC:
|
|
if (phost->device.DevDesc.iManufacturer != 0U)
|
|
8008f3c: 687b ldr r3, [r7, #4]
|
|
8008f3e: f893 3334 ldrb.w r3, [r3, #820] ; 0x334
|
|
8008f42: 2b00 cmp r3, #0
|
|
8008f44: d019 beq.n 8008f7a <USBH_HandleEnum+0x30e>
|
|
{
|
|
/* Check that Manufacturer String is available */
|
|
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iManufacturer,
|
|
8008f46: 687b ldr r3, [r7, #4]
|
|
8008f48: f893 1334 ldrb.w r1, [r3, #820] ; 0x334
|
|
phost->device.Data, 0xFFU);
|
|
8008f4c: 687b ldr r3, [r7, #4]
|
|
8008f4e: f503 728e add.w r2, r3, #284 ; 0x11c
|
|
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iManufacturer,
|
|
8008f52: 23ff movs r3, #255 ; 0xff
|
|
8008f54: 6878 ldr r0, [r7, #4]
|
|
8008f56: f000 f949 bl 80091ec <USBH_Get_StringDesc>
|
|
8008f5a: 4603 mov r3, r0
|
|
8008f5c: 73bb strb r3, [r7, #14]
|
|
if (ReqStatus == USBH_OK)
|
|
8008f5e: 7bbb ldrb r3, [r7, #14]
|
|
8008f60: 2b00 cmp r3, #0
|
|
8008f62: d103 bne.n 8008f6c <USBH_HandleEnum+0x300>
|
|
{
|
|
/* User callback for Manufacturing string */
|
|
USBH_UsrLog("Manufacturer : %s", (char *)(void *)phost->device.Data);
|
|
phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC;
|
|
8008f64: 687b ldr r3, [r7, #4]
|
|
8008f66: 2206 movs r2, #6
|
|
8008f68: 705a strb r2, [r3, #1]
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
break;
|
|
8008f6a: e059 b.n 8009020 <USBH_HandleEnum+0x3b4>
|
|
else if (ReqStatus == USBH_NOT_SUPPORTED)
|
|
8008f6c: 7bbb ldrb r3, [r7, #14]
|
|
8008f6e: 2b03 cmp r3, #3
|
|
8008f70: d156 bne.n 8009020 <USBH_HandleEnum+0x3b4>
|
|
phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC;
|
|
8008f72: 687b ldr r3, [r7, #4]
|
|
8008f74: 2206 movs r2, #6
|
|
8008f76: 705a strb r2, [r3, #1]
|
|
break;
|
|
8008f78: e052 b.n 8009020 <USBH_HandleEnum+0x3b4>
|
|
phost->EnumState = ENUM_GET_PRODUCT_STRING_DESC;
|
|
8008f7a: 687b ldr r3, [r7, #4]
|
|
8008f7c: 2206 movs r2, #6
|
|
8008f7e: 705a strb r2, [r3, #1]
|
|
break;
|
|
8008f80: e04e b.n 8009020 <USBH_HandleEnum+0x3b4>
|
|
|
|
case ENUM_GET_PRODUCT_STRING_DESC:
|
|
if (phost->device.DevDesc.iProduct != 0U)
|
|
8008f82: 687b ldr r3, [r7, #4]
|
|
8008f84: f893 3335 ldrb.w r3, [r3, #821] ; 0x335
|
|
8008f88: 2b00 cmp r3, #0
|
|
8008f8a: d019 beq.n 8008fc0 <USBH_HandleEnum+0x354>
|
|
{
|
|
/* Check that Product string is available */
|
|
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iProduct,
|
|
8008f8c: 687b ldr r3, [r7, #4]
|
|
8008f8e: f893 1335 ldrb.w r1, [r3, #821] ; 0x335
|
|
phost->device.Data, 0xFFU);
|
|
8008f92: 687b ldr r3, [r7, #4]
|
|
8008f94: f503 728e add.w r2, r3, #284 ; 0x11c
|
|
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iProduct,
|
|
8008f98: 23ff movs r3, #255 ; 0xff
|
|
8008f9a: 6878 ldr r0, [r7, #4]
|
|
8008f9c: f000 f926 bl 80091ec <USBH_Get_StringDesc>
|
|
8008fa0: 4603 mov r3, r0
|
|
8008fa2: 73bb strb r3, [r7, #14]
|
|
if (ReqStatus == USBH_OK)
|
|
8008fa4: 7bbb ldrb r3, [r7, #14]
|
|
8008fa6: 2b00 cmp r3, #0
|
|
8008fa8: d103 bne.n 8008fb2 <USBH_HandleEnum+0x346>
|
|
{
|
|
/* User callback for Product string */
|
|
USBH_UsrLog("Product : %s", (char *)(void *)phost->device.Data);
|
|
phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC;
|
|
8008faa: 687b ldr r3, [r7, #4]
|
|
8008fac: 2207 movs r2, #7
|
|
8008fae: 705a strb r2, [r3, #1]
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
break;
|
|
8008fb0: e038 b.n 8009024 <USBH_HandleEnum+0x3b8>
|
|
else if (ReqStatus == USBH_NOT_SUPPORTED)
|
|
8008fb2: 7bbb ldrb r3, [r7, #14]
|
|
8008fb4: 2b03 cmp r3, #3
|
|
8008fb6: d135 bne.n 8009024 <USBH_HandleEnum+0x3b8>
|
|
phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC;
|
|
8008fb8: 687b ldr r3, [r7, #4]
|
|
8008fba: 2207 movs r2, #7
|
|
8008fbc: 705a strb r2, [r3, #1]
|
|
break;
|
|
8008fbe: e031 b.n 8009024 <USBH_HandleEnum+0x3b8>
|
|
phost->EnumState = ENUM_GET_SERIALNUM_STRING_DESC;
|
|
8008fc0: 687b ldr r3, [r7, #4]
|
|
8008fc2: 2207 movs r2, #7
|
|
8008fc4: 705a strb r2, [r3, #1]
|
|
break;
|
|
8008fc6: e02d b.n 8009024 <USBH_HandleEnum+0x3b8>
|
|
|
|
case ENUM_GET_SERIALNUM_STRING_DESC:
|
|
if (phost->device.DevDesc.iSerialNumber != 0U)
|
|
8008fc8: 687b ldr r3, [r7, #4]
|
|
8008fca: f893 3336 ldrb.w r3, [r3, #822] ; 0x336
|
|
8008fce: 2b00 cmp r3, #0
|
|
8008fd0: d017 beq.n 8009002 <USBH_HandleEnum+0x396>
|
|
{
|
|
/* Check that Serial number string is available */
|
|
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iSerialNumber,
|
|
8008fd2: 687b ldr r3, [r7, #4]
|
|
8008fd4: f893 1336 ldrb.w r1, [r3, #822] ; 0x336
|
|
phost->device.Data, 0xFFU);
|
|
8008fd8: 687b ldr r3, [r7, #4]
|
|
8008fda: f503 728e add.w r2, r3, #284 ; 0x11c
|
|
ReqStatus = USBH_Get_StringDesc(phost, phost->device.DevDesc.iSerialNumber,
|
|
8008fde: 23ff movs r3, #255 ; 0xff
|
|
8008fe0: 6878 ldr r0, [r7, #4]
|
|
8008fe2: f000 f903 bl 80091ec <USBH_Get_StringDesc>
|
|
8008fe6: 4603 mov r3, r0
|
|
8008fe8: 73bb strb r3, [r7, #14]
|
|
if (ReqStatus == USBH_OK)
|
|
8008fea: 7bbb ldrb r3, [r7, #14]
|
|
8008fec: 2b00 cmp r3, #0
|
|
8008fee: d102 bne.n 8008ff6 <USBH_HandleEnum+0x38a>
|
|
{
|
|
/* User callback for Serial number string */
|
|
USBH_UsrLog("Serial Number : %s", (char *)(void *)phost->device.Data);
|
|
Status = USBH_OK;
|
|
8008ff0: 2300 movs r3, #0
|
|
8008ff2: 73fb strb r3, [r7, #15]
|
|
else
|
|
{
|
|
USBH_UsrLog("Serial Number : N/A");
|
|
Status = USBH_OK;
|
|
}
|
|
break;
|
|
8008ff4: e018 b.n 8009028 <USBH_HandleEnum+0x3bc>
|
|
else if (ReqStatus == USBH_NOT_SUPPORTED)
|
|
8008ff6: 7bbb ldrb r3, [r7, #14]
|
|
8008ff8: 2b03 cmp r3, #3
|
|
8008ffa: d115 bne.n 8009028 <USBH_HandleEnum+0x3bc>
|
|
Status = USBH_OK;
|
|
8008ffc: 2300 movs r3, #0
|
|
8008ffe: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8009000: e012 b.n 8009028 <USBH_HandleEnum+0x3bc>
|
|
Status = USBH_OK;
|
|
8009002: 2300 movs r3, #0
|
|
8009004: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8009006: e00f b.n 8009028 <USBH_HandleEnum+0x3bc>
|
|
|
|
default:
|
|
break;
|
|
8009008: bf00 nop
|
|
800900a: e00e b.n 800902a <USBH_HandleEnum+0x3be>
|
|
break;
|
|
800900c: bf00 nop
|
|
800900e: e00c b.n 800902a <USBH_HandleEnum+0x3be>
|
|
break;
|
|
8009010: bf00 nop
|
|
8009012: e00a b.n 800902a <USBH_HandleEnum+0x3be>
|
|
break;
|
|
8009014: bf00 nop
|
|
8009016: e008 b.n 800902a <USBH_HandleEnum+0x3be>
|
|
break;
|
|
8009018: bf00 nop
|
|
800901a: e006 b.n 800902a <USBH_HandleEnum+0x3be>
|
|
break;
|
|
800901c: bf00 nop
|
|
800901e: e004 b.n 800902a <USBH_HandleEnum+0x3be>
|
|
break;
|
|
8009020: bf00 nop
|
|
8009022: e002 b.n 800902a <USBH_HandleEnum+0x3be>
|
|
break;
|
|
8009024: bf00 nop
|
|
8009026: e000 b.n 800902a <USBH_HandleEnum+0x3be>
|
|
break;
|
|
8009028: bf00 nop
|
|
}
|
|
return Status;
|
|
800902a: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
800902c: 4618 mov r0, r3
|
|
800902e: 3710 adds r7, #16
|
|
8009030: 46bd mov sp, r7
|
|
8009032: bd80 pop {r7, pc}
|
|
|
|
08009034 <USBH_LL_SetTimer>:
|
|
* Set the initial Host Timer tick
|
|
* @param phost: Host Handle
|
|
* @retval None
|
|
*/
|
|
void USBH_LL_SetTimer(USBH_HandleTypeDef *phost, uint32_t time)
|
|
{
|
|
8009034: b480 push {r7}
|
|
8009036: b083 sub sp, #12
|
|
8009038: af00 add r7, sp, #0
|
|
800903a: 6078 str r0, [r7, #4]
|
|
800903c: 6039 str r1, [r7, #0]
|
|
phost->Timer = time;
|
|
800903e: 687b ldr r3, [r7, #4]
|
|
8009040: 683a ldr r2, [r7, #0]
|
|
8009042: f8c3 23c4 str.w r2, [r3, #964] ; 0x3c4
|
|
}
|
|
8009046: bf00 nop
|
|
8009048: 370c adds r7, #12
|
|
800904a: 46bd mov sp, r7
|
|
800904c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8009050: 4770 bx lr
|
|
|
|
08009052 <USBH_LL_IncTimer>:
|
|
* Increment Host Timer tick
|
|
* @param phost: Host Handle
|
|
* @retval None
|
|
*/
|
|
void USBH_LL_IncTimer(USBH_HandleTypeDef *phost)
|
|
{
|
|
8009052: b580 push {r7, lr}
|
|
8009054: b082 sub sp, #8
|
|
8009056: af00 add r7, sp, #0
|
|
8009058: 6078 str r0, [r7, #4]
|
|
phost->Timer++;
|
|
800905a: 687b ldr r3, [r7, #4]
|
|
800905c: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
|
|
8009060: 1c5a adds r2, r3, #1
|
|
8009062: 687b ldr r3, [r7, #4]
|
|
8009064: f8c3 23c4 str.w r2, [r3, #964] ; 0x3c4
|
|
USBH_HandleSof(phost);
|
|
8009068: 6878 ldr r0, [r7, #4]
|
|
800906a: f000 f804 bl 8009076 <USBH_HandleSof>
|
|
}
|
|
800906e: bf00 nop
|
|
8009070: 3708 adds r7, #8
|
|
8009072: 46bd mov sp, r7
|
|
8009074: bd80 pop {r7, pc}
|
|
|
|
08009076 <USBH_HandleSof>:
|
|
* Call SOF process
|
|
* @param phost: Host Handle
|
|
* @retval None
|
|
*/
|
|
static void USBH_HandleSof(USBH_HandleTypeDef *phost)
|
|
{
|
|
8009076: b580 push {r7, lr}
|
|
8009078: b082 sub sp, #8
|
|
800907a: af00 add r7, sp, #0
|
|
800907c: 6078 str r0, [r7, #4]
|
|
if ((phost->gState == HOST_CLASS) && (phost->pActiveClass != NULL))
|
|
800907e: 687b ldr r3, [r7, #4]
|
|
8009080: 781b ldrb r3, [r3, #0]
|
|
8009082: b2db uxtb r3, r3
|
|
8009084: 2b0b cmp r3, #11
|
|
8009086: d10a bne.n 800909e <USBH_HandleSof+0x28>
|
|
8009088: 687b ldr r3, [r7, #4]
|
|
800908a: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
800908e: 2b00 cmp r3, #0
|
|
8009090: d005 beq.n 800909e <USBH_HandleSof+0x28>
|
|
{
|
|
phost->pActiveClass->SOFProcess(phost);
|
|
8009092: 687b ldr r3, [r7, #4]
|
|
8009094: f8d3 337c ldr.w r3, [r3, #892] ; 0x37c
|
|
8009098: 699b ldr r3, [r3, #24]
|
|
800909a: 6878 ldr r0, [r7, #4]
|
|
800909c: 4798 blx r3
|
|
}
|
|
}
|
|
800909e: bf00 nop
|
|
80090a0: 3708 adds r7, #8
|
|
80090a2: 46bd mov sp, r7
|
|
80090a4: bd80 pop {r7, pc}
|
|
|
|
080090a6 <USBH_LL_PortEnabled>:
|
|
* Port Enabled
|
|
* @param phost: Host Handle
|
|
* @retval None
|
|
*/
|
|
void USBH_LL_PortEnabled(USBH_HandleTypeDef *phost)
|
|
{
|
|
80090a6: b480 push {r7}
|
|
80090a8: b083 sub sp, #12
|
|
80090aa: af00 add r7, sp, #0
|
|
80090ac: 6078 str r0, [r7, #4]
|
|
phost->device.PortEnabled = 1U;
|
|
80090ae: 687b ldr r3, [r7, #4]
|
|
80090b0: 2201 movs r2, #1
|
|
80090b2: f883 2323 strb.w r2, [r3, #803] ; 0x323
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
|
|
return;
|
|
80090b6: bf00 nop
|
|
}
|
|
80090b8: 370c adds r7, #12
|
|
80090ba: 46bd mov sp, r7
|
|
80090bc: f85d 7b04 ldr.w r7, [sp], #4
|
|
80090c0: 4770 bx lr
|
|
|
|
080090c2 <USBH_LL_PortDisabled>:
|
|
* Port Disabled
|
|
* @param phost: Host Handle
|
|
* @retval None
|
|
*/
|
|
void USBH_LL_PortDisabled(USBH_HandleTypeDef *phost)
|
|
{
|
|
80090c2: b480 push {r7}
|
|
80090c4: b083 sub sp, #12
|
|
80090c6: af00 add r7, sp, #0
|
|
80090c8: 6078 str r0, [r7, #4]
|
|
phost->device.PortEnabled = 0U;
|
|
80090ca: 687b ldr r3, [r7, #4]
|
|
80090cc: 2200 movs r2, #0
|
|
80090ce: f883 2323 strb.w r2, [r3, #803] ; 0x323
|
|
|
|
return;
|
|
80090d2: bf00 nop
|
|
}
|
|
80090d4: 370c adds r7, #12
|
|
80090d6: 46bd mov sp, r7
|
|
80090d8: f85d 7b04 ldr.w r7, [sp], #4
|
|
80090dc: 4770 bx lr
|
|
|
|
080090de <USBH_LL_Connect>:
|
|
* Handle USB Host connexion event
|
|
* @param phost: Host Handle
|
|
* @retval USBH_Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_Connect(USBH_HandleTypeDef *phost)
|
|
{
|
|
80090de: b480 push {r7}
|
|
80090e0: b083 sub sp, #12
|
|
80090e2: af00 add r7, sp, #0
|
|
80090e4: 6078 str r0, [r7, #4]
|
|
phost->device.is_connected = 1U;
|
|
80090e6: 687b ldr r3, [r7, #4]
|
|
80090e8: 2201 movs r2, #1
|
|
80090ea: f883 2320 strb.w r2, [r3, #800] ; 0x320
|
|
phost->device.is_disconnected = 0U;
|
|
80090ee: 687b ldr r3, [r7, #4]
|
|
80090f0: 2200 movs r2, #0
|
|
80090f2: f883 2321 strb.w r2, [r3, #801] ; 0x321
|
|
phost->device.is_ReEnumerated = 0U;
|
|
80090f6: 687b ldr r3, [r7, #4]
|
|
80090f8: 2200 movs r2, #0
|
|
80090fa: f883 2322 strb.w r2, [r3, #802] ; 0x322
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
|
|
return USBH_OK;
|
|
80090fe: 2300 movs r3, #0
|
|
}
|
|
8009100: 4618 mov r0, r3
|
|
8009102: 370c adds r7, #12
|
|
8009104: 46bd mov sp, r7
|
|
8009106: f85d 7b04 ldr.w r7, [sp], #4
|
|
800910a: 4770 bx lr
|
|
|
|
0800910c <USBH_LL_Disconnect>:
|
|
* Handle USB Host disconnection event
|
|
* @param phost: Host Handle
|
|
* @retval USBH_Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_Disconnect(USBH_HandleTypeDef *phost)
|
|
{
|
|
800910c: b580 push {r7, lr}
|
|
800910e: b082 sub sp, #8
|
|
8009110: af00 add r7, sp, #0
|
|
8009112: 6078 str r0, [r7, #4]
|
|
/* update device connection states */
|
|
phost->device.is_disconnected = 1U;
|
|
8009114: 687b ldr r3, [r7, #4]
|
|
8009116: 2201 movs r2, #1
|
|
8009118: f883 2321 strb.w r2, [r3, #801] ; 0x321
|
|
phost->device.is_connected = 0U;
|
|
800911c: 687b ldr r3, [r7, #4]
|
|
800911e: 2200 movs r2, #0
|
|
8009120: f883 2320 strb.w r2, [r3, #800] ; 0x320
|
|
phost->device.PortEnabled = 0U;
|
|
8009124: 687b ldr r3, [r7, #4]
|
|
8009126: 2200 movs r2, #0
|
|
8009128: f883 2323 strb.w r2, [r3, #803] ; 0x323
|
|
|
|
/* Stop Host */
|
|
USBH_LL_Stop(phost);
|
|
800912c: 6878 ldr r0, [r7, #4]
|
|
800912e: f000 ff58 bl 8009fe2 <USBH_LL_Stop>
|
|
|
|
/* FRee Control Pipes */
|
|
USBH_FreePipe(phost, phost->Control.pipe_in);
|
|
8009132: 687b ldr r3, [r7, #4]
|
|
8009134: 791b ldrb r3, [r3, #4]
|
|
8009136: 4619 mov r1, r3
|
|
8009138: 6878 ldr r0, [r7, #4]
|
|
800913a: f000 fda5 bl 8009c88 <USBH_FreePipe>
|
|
USBH_FreePipe(phost, phost->Control.pipe_out);
|
|
800913e: 687b ldr r3, [r7, #4]
|
|
8009140: 795b ldrb r3, [r3, #5]
|
|
8009142: 4619 mov r1, r3
|
|
8009144: 6878 ldr r0, [r7, #4]
|
|
8009146: f000 fd9f bl 8009c88 <USBH_FreePipe>
|
|
#else
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
|
|
return USBH_OK;
|
|
800914a: 2300 movs r3, #0
|
|
}
|
|
800914c: 4618 mov r0, r3
|
|
800914e: 3708 adds r7, #8
|
|
8009150: 46bd mov sp, r7
|
|
8009152: bd80 pop {r7, pc}
|
|
|
|
08009154 <USBH_Get_DevDesc>:
|
|
* @param phost: Host Handle
|
|
* @param length: Length of the descriptor
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_Get_DevDesc(USBH_HandleTypeDef *phost, uint8_t length)
|
|
{
|
|
8009154: b580 push {r7, lr}
|
|
8009156: b086 sub sp, #24
|
|
8009158: af02 add r7, sp, #8
|
|
800915a: 6078 str r0, [r7, #4]
|
|
800915c: 460b mov r3, r1
|
|
800915e: 70fb strb r3, [r7, #3]
|
|
USBH_StatusTypeDef status;
|
|
|
|
if ((status = USBH_GetDescriptor(phost,
|
|
USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD,
|
|
USB_DESC_DEVICE, phost->device.Data,
|
|
8009160: 687b ldr r3, [r7, #4]
|
|
8009162: f503 728e add.w r2, r3, #284 ; 0x11c
|
|
if ((status = USBH_GetDescriptor(phost,
|
|
8009166: 78fb ldrb r3, [r7, #3]
|
|
8009168: b29b uxth r3, r3
|
|
800916a: 9300 str r3, [sp, #0]
|
|
800916c: 4613 mov r3, r2
|
|
800916e: f44f 7280 mov.w r2, #256 ; 0x100
|
|
8009172: 2100 movs r1, #0
|
|
8009174: 6878 ldr r0, [r7, #4]
|
|
8009176: f000 f864 bl 8009242 <USBH_GetDescriptor>
|
|
800917a: 4603 mov r3, r0
|
|
800917c: 73fb strb r3, [r7, #15]
|
|
800917e: 7bfb ldrb r3, [r7, #15]
|
|
8009180: 2b00 cmp r3, #0
|
|
8009182: d10a bne.n 800919a <USBH_Get_DevDesc+0x46>
|
|
(uint16_t)length)) == USBH_OK)
|
|
{
|
|
/* Commands successfully sent and Response Received */
|
|
USBH_ParseDevDesc(&phost->device.DevDesc, phost->device.Data,
|
|
8009184: 687b ldr r3, [r7, #4]
|
|
8009186: f203 3026 addw r0, r3, #806 ; 0x326
|
|
800918a: 687b ldr r3, [r7, #4]
|
|
800918c: f503 738e add.w r3, r3, #284 ; 0x11c
|
|
8009190: 78fa ldrb r2, [r7, #3]
|
|
8009192: b292 uxth r2, r2
|
|
8009194: 4619 mov r1, r3
|
|
8009196: f000 f918 bl 80093ca <USBH_ParseDevDesc>
|
|
(uint16_t)length);
|
|
}
|
|
|
|
return status;
|
|
800919a: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
800919c: 4618 mov r0, r3
|
|
800919e: 3710 adds r7, #16
|
|
80091a0: 46bd mov sp, r7
|
|
80091a2: bd80 pop {r7, pc}
|
|
|
|
080091a4 <USBH_Get_CfgDesc>:
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_Get_CfgDesc(USBH_HandleTypeDef *phost,
|
|
uint16_t length)
|
|
|
|
{
|
|
80091a4: b580 push {r7, lr}
|
|
80091a6: b086 sub sp, #24
|
|
80091a8: af02 add r7, sp, #8
|
|
80091aa: 6078 str r0, [r7, #4]
|
|
80091ac: 460b mov r3, r1
|
|
80091ae: 807b strh r3, [r7, #2]
|
|
USBH_StatusTypeDef status;
|
|
uint8_t *pData = phost->device.CfgDesc_Raw;;
|
|
80091b0: 687b ldr r3, [r7, #4]
|
|
80091b2: 331c adds r3, #28
|
|
80091b4: 60fb str r3, [r7, #12]
|
|
|
|
if ((status = USBH_GetDescriptor(phost, (USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD),
|
|
80091b6: 887b ldrh r3, [r7, #2]
|
|
80091b8: 9300 str r3, [sp, #0]
|
|
80091ba: 68fb ldr r3, [r7, #12]
|
|
80091bc: f44f 7200 mov.w r2, #512 ; 0x200
|
|
80091c0: 2100 movs r1, #0
|
|
80091c2: 6878 ldr r0, [r7, #4]
|
|
80091c4: f000 f83d bl 8009242 <USBH_GetDescriptor>
|
|
80091c8: 4603 mov r3, r0
|
|
80091ca: 72fb strb r3, [r7, #11]
|
|
80091cc: 7afb ldrb r3, [r7, #11]
|
|
80091ce: 2b00 cmp r3, #0
|
|
80091d0: d107 bne.n 80091e2 <USBH_Get_CfgDesc+0x3e>
|
|
USB_DESC_CONFIGURATION, pData, length)) == USBH_OK)
|
|
{
|
|
/* Commands successfully sent and Response Received */
|
|
USBH_ParseCfgDesc(&phost->device.CfgDesc, pData, length);
|
|
80091d2: 687b ldr r3, [r7, #4]
|
|
80091d4: f503 734e add.w r3, r3, #824 ; 0x338
|
|
80091d8: 887a ldrh r2, [r7, #2]
|
|
80091da: 68f9 ldr r1, [r7, #12]
|
|
80091dc: 4618 mov r0, r3
|
|
80091de: f000 f964 bl 80094aa <USBH_ParseCfgDesc>
|
|
}
|
|
|
|
return status;
|
|
80091e2: 7afb ldrb r3, [r7, #11]
|
|
}
|
|
80091e4: 4618 mov r0, r3
|
|
80091e6: 3710 adds r7, #16
|
|
80091e8: 46bd mov sp, r7
|
|
80091ea: bd80 pop {r7, pc}
|
|
|
|
080091ec <USBH_Get_StringDesc>:
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_Get_StringDesc(USBH_HandleTypeDef *phost,
|
|
uint8_t string_index, uint8_t *buff,
|
|
uint16_t length)
|
|
{
|
|
80091ec: b580 push {r7, lr}
|
|
80091ee: b088 sub sp, #32
|
|
80091f0: af02 add r7, sp, #8
|
|
80091f2: 60f8 str r0, [r7, #12]
|
|
80091f4: 607a str r2, [r7, #4]
|
|
80091f6: 461a mov r2, r3
|
|
80091f8: 460b mov r3, r1
|
|
80091fa: 72fb strb r3, [r7, #11]
|
|
80091fc: 4613 mov r3, r2
|
|
80091fe: 813b strh r3, [r7, #8]
|
|
USBH_StatusTypeDef status;
|
|
|
|
if ((status = USBH_GetDescriptor(phost,
|
|
8009200: 7afb ldrb r3, [r7, #11]
|
|
8009202: b29b uxth r3, r3
|
|
8009204: f443 7340 orr.w r3, r3, #768 ; 0x300
|
|
8009208: b29a uxth r2, r3
|
|
USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD,
|
|
USB_DESC_STRING | string_index,
|
|
phost->device.Data, length)) == USBH_OK)
|
|
800920a: 68fb ldr r3, [r7, #12]
|
|
800920c: f503 718e add.w r1, r3, #284 ; 0x11c
|
|
if ((status = USBH_GetDescriptor(phost,
|
|
8009210: 893b ldrh r3, [r7, #8]
|
|
8009212: 9300 str r3, [sp, #0]
|
|
8009214: 460b mov r3, r1
|
|
8009216: 2100 movs r1, #0
|
|
8009218: 68f8 ldr r0, [r7, #12]
|
|
800921a: f000 f812 bl 8009242 <USBH_GetDescriptor>
|
|
800921e: 4603 mov r3, r0
|
|
8009220: 75fb strb r3, [r7, #23]
|
|
8009222: 7dfb ldrb r3, [r7, #23]
|
|
8009224: 2b00 cmp r3, #0
|
|
8009226: d107 bne.n 8009238 <USBH_Get_StringDesc+0x4c>
|
|
{
|
|
/* Commands successfully sent and Response Received */
|
|
USBH_ParseStringDesc(phost->device.Data, buff, length);
|
|
8009228: 68fb ldr r3, [r7, #12]
|
|
800922a: f503 738e add.w r3, r3, #284 ; 0x11c
|
|
800922e: 893a ldrh r2, [r7, #8]
|
|
8009230: 6879 ldr r1, [r7, #4]
|
|
8009232: 4618 mov r0, r3
|
|
8009234: f000 fa37 bl 80096a6 <USBH_ParseStringDesc>
|
|
}
|
|
|
|
return status;
|
|
8009238: 7dfb ldrb r3, [r7, #23]
|
|
}
|
|
800923a: 4618 mov r0, r3
|
|
800923c: 3718 adds r7, #24
|
|
800923e: 46bd mov sp, r7
|
|
8009240: bd80 pop {r7, pc}
|
|
|
|
08009242 <USBH_GetDescriptor>:
|
|
USBH_StatusTypeDef USBH_GetDescriptor(USBH_HandleTypeDef *phost,
|
|
uint8_t req_type,
|
|
uint16_t value_idx,
|
|
uint8_t *buff,
|
|
uint16_t length)
|
|
{
|
|
8009242: b580 push {r7, lr}
|
|
8009244: b084 sub sp, #16
|
|
8009246: af00 add r7, sp, #0
|
|
8009248: 60f8 str r0, [r7, #12]
|
|
800924a: 607b str r3, [r7, #4]
|
|
800924c: 460b mov r3, r1
|
|
800924e: 72fb strb r3, [r7, #11]
|
|
8009250: 4613 mov r3, r2
|
|
8009252: 813b strh r3, [r7, #8]
|
|
if (phost->RequestState == CMD_SEND)
|
|
8009254: 68fb ldr r3, [r7, #12]
|
|
8009256: 789b ldrb r3, [r3, #2]
|
|
8009258: 2b01 cmp r3, #1
|
|
800925a: d11c bne.n 8009296 <USBH_GetDescriptor+0x54>
|
|
{
|
|
phost->Control.setup.b.bmRequestType = USB_D2H | req_type;
|
|
800925c: 7afb ldrb r3, [r7, #11]
|
|
800925e: f063 037f orn r3, r3, #127 ; 0x7f
|
|
8009262: b2da uxtb r2, r3
|
|
8009264: 68fb ldr r3, [r7, #12]
|
|
8009266: 741a strb r2, [r3, #16]
|
|
phost->Control.setup.b.bRequest = USB_REQ_GET_DESCRIPTOR;
|
|
8009268: 68fb ldr r3, [r7, #12]
|
|
800926a: 2206 movs r2, #6
|
|
800926c: 745a strb r2, [r3, #17]
|
|
phost->Control.setup.b.wValue.w = value_idx;
|
|
800926e: 68fb ldr r3, [r7, #12]
|
|
8009270: 893a ldrh r2, [r7, #8]
|
|
8009272: 825a strh r2, [r3, #18]
|
|
|
|
if ((value_idx & 0xff00U) == USB_DESC_STRING)
|
|
8009274: 893b ldrh r3, [r7, #8]
|
|
8009276: f403 437f and.w r3, r3, #65280 ; 0xff00
|
|
800927a: f5b3 7f40 cmp.w r3, #768 ; 0x300
|
|
800927e: d104 bne.n 800928a <USBH_GetDescriptor+0x48>
|
|
{
|
|
phost->Control.setup.b.wIndex.w = 0x0409U;
|
|
8009280: 68fb ldr r3, [r7, #12]
|
|
8009282: f240 4209 movw r2, #1033 ; 0x409
|
|
8009286: 829a strh r2, [r3, #20]
|
|
8009288: e002 b.n 8009290 <USBH_GetDescriptor+0x4e>
|
|
}
|
|
else
|
|
{
|
|
phost->Control.setup.b.wIndex.w = 0U;
|
|
800928a: 68fb ldr r3, [r7, #12]
|
|
800928c: 2200 movs r2, #0
|
|
800928e: 829a strh r2, [r3, #20]
|
|
}
|
|
phost->Control.setup.b.wLength.w = length;
|
|
8009290: 68fb ldr r3, [r7, #12]
|
|
8009292: 8b3a ldrh r2, [r7, #24]
|
|
8009294: 82da strh r2, [r3, #22]
|
|
}
|
|
|
|
return USBH_CtlReq(phost, buff, length);
|
|
8009296: 8b3b ldrh r3, [r7, #24]
|
|
8009298: 461a mov r2, r3
|
|
800929a: 6879 ldr r1, [r7, #4]
|
|
800929c: 68f8 ldr r0, [r7, #12]
|
|
800929e: f000 fa50 bl 8009742 <USBH_CtlReq>
|
|
80092a2: 4603 mov r3, r0
|
|
}
|
|
80092a4: 4618 mov r0, r3
|
|
80092a6: 3710 adds r7, #16
|
|
80092a8: 46bd mov sp, r7
|
|
80092aa: bd80 pop {r7, pc}
|
|
|
|
080092ac <USBH_SetAddress>:
|
|
* @param DeviceAddress: Device address to assign
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_SetAddress(USBH_HandleTypeDef *phost,
|
|
uint8_t DeviceAddress)
|
|
{
|
|
80092ac: b580 push {r7, lr}
|
|
80092ae: b082 sub sp, #8
|
|
80092b0: af00 add r7, sp, #0
|
|
80092b2: 6078 str r0, [r7, #4]
|
|
80092b4: 460b mov r3, r1
|
|
80092b6: 70fb strb r3, [r7, #3]
|
|
if (phost->RequestState == CMD_SEND)
|
|
80092b8: 687b ldr r3, [r7, #4]
|
|
80092ba: 789b ldrb r3, [r3, #2]
|
|
80092bc: 2b01 cmp r3, #1
|
|
80092be: d10f bne.n 80092e0 <USBH_SetAddress+0x34>
|
|
{
|
|
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE | \
|
|
80092c0: 687b ldr r3, [r7, #4]
|
|
80092c2: 2200 movs r2, #0
|
|
80092c4: 741a strb r2, [r3, #16]
|
|
USB_REQ_TYPE_STANDARD;
|
|
|
|
phost->Control.setup.b.bRequest = USB_REQ_SET_ADDRESS;
|
|
80092c6: 687b ldr r3, [r7, #4]
|
|
80092c8: 2205 movs r2, #5
|
|
80092ca: 745a strb r2, [r3, #17]
|
|
|
|
phost->Control.setup.b.wValue.w = (uint16_t)DeviceAddress;
|
|
80092cc: 78fb ldrb r3, [r7, #3]
|
|
80092ce: b29a uxth r2, r3
|
|
80092d0: 687b ldr r3, [r7, #4]
|
|
80092d2: 825a strh r2, [r3, #18]
|
|
phost->Control.setup.b.wIndex.w = 0U;
|
|
80092d4: 687b ldr r3, [r7, #4]
|
|
80092d6: 2200 movs r2, #0
|
|
80092d8: 829a strh r2, [r3, #20]
|
|
phost->Control.setup.b.wLength.w = 0U;
|
|
80092da: 687b ldr r3, [r7, #4]
|
|
80092dc: 2200 movs r2, #0
|
|
80092de: 82da strh r2, [r3, #22]
|
|
}
|
|
|
|
return USBH_CtlReq(phost, 0U, 0U);
|
|
80092e0: 2200 movs r2, #0
|
|
80092e2: 2100 movs r1, #0
|
|
80092e4: 6878 ldr r0, [r7, #4]
|
|
80092e6: f000 fa2c bl 8009742 <USBH_CtlReq>
|
|
80092ea: 4603 mov r3, r0
|
|
}
|
|
80092ec: 4618 mov r0, r3
|
|
80092ee: 3708 adds r7, #8
|
|
80092f0: 46bd mov sp, r7
|
|
80092f2: bd80 pop {r7, pc}
|
|
|
|
080092f4 <USBH_SetCfg>:
|
|
* @param phost: Host Handle
|
|
* @param cfg_idx: Configuration value
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_SetCfg(USBH_HandleTypeDef *phost, uint16_t cfg_idx)
|
|
{
|
|
80092f4: b580 push {r7, lr}
|
|
80092f6: b082 sub sp, #8
|
|
80092f8: af00 add r7, sp, #0
|
|
80092fa: 6078 str r0, [r7, #4]
|
|
80092fc: 460b mov r3, r1
|
|
80092fe: 807b strh r3, [r7, #2]
|
|
if (phost->RequestState == CMD_SEND)
|
|
8009300: 687b ldr r3, [r7, #4]
|
|
8009302: 789b ldrb r3, [r3, #2]
|
|
8009304: 2b01 cmp r3, #1
|
|
8009306: d10e bne.n 8009326 <USBH_SetCfg+0x32>
|
|
{
|
|
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE
|
|
8009308: 687b ldr r3, [r7, #4]
|
|
800930a: 2200 movs r2, #0
|
|
800930c: 741a strb r2, [r3, #16]
|
|
| USB_REQ_TYPE_STANDARD;
|
|
|
|
phost->Control.setup.b.bRequest = USB_REQ_SET_CONFIGURATION;
|
|
800930e: 687b ldr r3, [r7, #4]
|
|
8009310: 2209 movs r2, #9
|
|
8009312: 745a strb r2, [r3, #17]
|
|
phost->Control.setup.b.wValue.w = cfg_idx;
|
|
8009314: 687b ldr r3, [r7, #4]
|
|
8009316: 887a ldrh r2, [r7, #2]
|
|
8009318: 825a strh r2, [r3, #18]
|
|
phost->Control.setup.b.wIndex.w = 0U;
|
|
800931a: 687b ldr r3, [r7, #4]
|
|
800931c: 2200 movs r2, #0
|
|
800931e: 829a strh r2, [r3, #20]
|
|
phost->Control.setup.b.wLength.w = 0U;
|
|
8009320: 687b ldr r3, [r7, #4]
|
|
8009322: 2200 movs r2, #0
|
|
8009324: 82da strh r2, [r3, #22]
|
|
}
|
|
|
|
return USBH_CtlReq(phost, 0U, 0U);
|
|
8009326: 2200 movs r2, #0
|
|
8009328: 2100 movs r1, #0
|
|
800932a: 6878 ldr r0, [r7, #4]
|
|
800932c: f000 fa09 bl 8009742 <USBH_CtlReq>
|
|
8009330: 4603 mov r3, r0
|
|
}
|
|
8009332: 4618 mov r0, r3
|
|
8009334: 3708 adds r7, #8
|
|
8009336: 46bd mov sp, r7
|
|
8009338: bd80 pop {r7, pc}
|
|
|
|
0800933a <USBH_SetFeature>:
|
|
* @param pdev: Selected device
|
|
* @param itf_idx
|
|
* @retval Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_SetFeature(USBH_HandleTypeDef *phost, uint8_t wValue)
|
|
{
|
|
800933a: b580 push {r7, lr}
|
|
800933c: b082 sub sp, #8
|
|
800933e: af00 add r7, sp, #0
|
|
8009340: 6078 str r0, [r7, #4]
|
|
8009342: 460b mov r3, r1
|
|
8009344: 70fb strb r3, [r7, #3]
|
|
if (phost->RequestState == CMD_SEND)
|
|
8009346: 687b ldr r3, [r7, #4]
|
|
8009348: 789b ldrb r3, [r3, #2]
|
|
800934a: 2b01 cmp r3, #1
|
|
800934c: d10f bne.n 800936e <USBH_SetFeature+0x34>
|
|
{
|
|
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_DEVICE
|
|
800934e: 687b ldr r3, [r7, #4]
|
|
8009350: 2200 movs r2, #0
|
|
8009352: 741a strb r2, [r3, #16]
|
|
| USB_REQ_TYPE_STANDARD;
|
|
|
|
phost->Control.setup.b.bRequest = USB_REQ_SET_FEATURE;
|
|
8009354: 687b ldr r3, [r7, #4]
|
|
8009356: 2203 movs r2, #3
|
|
8009358: 745a strb r2, [r3, #17]
|
|
phost->Control.setup.b.wValue.w = wValue;
|
|
800935a: 78fb ldrb r3, [r7, #3]
|
|
800935c: b29a uxth r2, r3
|
|
800935e: 687b ldr r3, [r7, #4]
|
|
8009360: 825a strh r2, [r3, #18]
|
|
phost->Control.setup.b.wIndex.w = 0U;
|
|
8009362: 687b ldr r3, [r7, #4]
|
|
8009364: 2200 movs r2, #0
|
|
8009366: 829a strh r2, [r3, #20]
|
|
phost->Control.setup.b.wLength.w = 0U;
|
|
8009368: 687b ldr r3, [r7, #4]
|
|
800936a: 2200 movs r2, #0
|
|
800936c: 82da strh r2, [r3, #22]
|
|
}
|
|
|
|
return USBH_CtlReq(phost, 0U, 0U);
|
|
800936e: 2200 movs r2, #0
|
|
8009370: 2100 movs r1, #0
|
|
8009372: 6878 ldr r0, [r7, #4]
|
|
8009374: f000 f9e5 bl 8009742 <USBH_CtlReq>
|
|
8009378: 4603 mov r3, r0
|
|
}
|
|
800937a: 4618 mov r0, r3
|
|
800937c: 3708 adds r7, #8
|
|
800937e: 46bd mov sp, r7
|
|
8009380: bd80 pop {r7, pc}
|
|
|
|
08009382 <USBH_ClrFeature>:
|
|
* @param ep_num: endpoint number
|
|
* @param hc_num: Host channel number
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_ClrFeature(USBH_HandleTypeDef *phost, uint8_t ep_num)
|
|
{
|
|
8009382: b580 push {r7, lr}
|
|
8009384: b082 sub sp, #8
|
|
8009386: af00 add r7, sp, #0
|
|
8009388: 6078 str r0, [r7, #4]
|
|
800938a: 460b mov r3, r1
|
|
800938c: 70fb strb r3, [r7, #3]
|
|
if (phost->RequestState == CMD_SEND)
|
|
800938e: 687b ldr r3, [r7, #4]
|
|
8009390: 789b ldrb r3, [r3, #2]
|
|
8009392: 2b01 cmp r3, #1
|
|
8009394: d10f bne.n 80093b6 <USBH_ClrFeature+0x34>
|
|
{
|
|
phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_RECIPIENT_ENDPOINT
|
|
8009396: 687b ldr r3, [r7, #4]
|
|
8009398: 2202 movs r2, #2
|
|
800939a: 741a strb r2, [r3, #16]
|
|
| USB_REQ_TYPE_STANDARD;
|
|
|
|
phost->Control.setup.b.bRequest = USB_REQ_CLEAR_FEATURE;
|
|
800939c: 687b ldr r3, [r7, #4]
|
|
800939e: 2201 movs r2, #1
|
|
80093a0: 745a strb r2, [r3, #17]
|
|
phost->Control.setup.b.wValue.w = FEATURE_SELECTOR_ENDPOINT;
|
|
80093a2: 687b ldr r3, [r7, #4]
|
|
80093a4: 2200 movs r2, #0
|
|
80093a6: 825a strh r2, [r3, #18]
|
|
phost->Control.setup.b.wIndex.w = ep_num;
|
|
80093a8: 78fb ldrb r3, [r7, #3]
|
|
80093aa: b29a uxth r2, r3
|
|
80093ac: 687b ldr r3, [r7, #4]
|
|
80093ae: 829a strh r2, [r3, #20]
|
|
phost->Control.setup.b.wLength.w = 0U;
|
|
80093b0: 687b ldr r3, [r7, #4]
|
|
80093b2: 2200 movs r2, #0
|
|
80093b4: 82da strh r2, [r3, #22]
|
|
}
|
|
return USBH_CtlReq(phost, 0U, 0U);
|
|
80093b6: 2200 movs r2, #0
|
|
80093b8: 2100 movs r1, #0
|
|
80093ba: 6878 ldr r0, [r7, #4]
|
|
80093bc: f000 f9c1 bl 8009742 <USBH_CtlReq>
|
|
80093c0: 4603 mov r3, r0
|
|
}
|
|
80093c2: 4618 mov r0, r3
|
|
80093c4: 3708 adds r7, #8
|
|
80093c6: 46bd mov sp, r7
|
|
80093c8: bd80 pop {r7, pc}
|
|
|
|
080093ca <USBH_ParseDevDesc>:
|
|
* @param length: Length of the descriptor
|
|
* @retval None
|
|
*/
|
|
static void USBH_ParseDevDesc(USBH_DevDescTypeDef *dev_desc, uint8_t *buf,
|
|
uint16_t length)
|
|
{
|
|
80093ca: b480 push {r7}
|
|
80093cc: b085 sub sp, #20
|
|
80093ce: af00 add r7, sp, #0
|
|
80093d0: 60f8 str r0, [r7, #12]
|
|
80093d2: 60b9 str r1, [r7, #8]
|
|
80093d4: 4613 mov r3, r2
|
|
80093d6: 80fb strh r3, [r7, #6]
|
|
dev_desc->bLength = *(uint8_t *)(buf + 0);
|
|
80093d8: 68bb ldr r3, [r7, #8]
|
|
80093da: 781a ldrb r2, [r3, #0]
|
|
80093dc: 68fb ldr r3, [r7, #12]
|
|
80093de: 701a strb r2, [r3, #0]
|
|
dev_desc->bDescriptorType = *(uint8_t *)(buf + 1);
|
|
80093e0: 68bb ldr r3, [r7, #8]
|
|
80093e2: 785a ldrb r2, [r3, #1]
|
|
80093e4: 68fb ldr r3, [r7, #12]
|
|
80093e6: 705a strb r2, [r3, #1]
|
|
dev_desc->bcdUSB = LE16(buf + 2);
|
|
80093e8: 68bb ldr r3, [r7, #8]
|
|
80093ea: 3302 adds r3, #2
|
|
80093ec: 781b ldrb r3, [r3, #0]
|
|
80093ee: b29a uxth r2, r3
|
|
80093f0: 68bb ldr r3, [r7, #8]
|
|
80093f2: 3303 adds r3, #3
|
|
80093f4: 781b ldrb r3, [r3, #0]
|
|
80093f6: b29b uxth r3, r3
|
|
80093f8: 021b lsls r3, r3, #8
|
|
80093fa: b29b uxth r3, r3
|
|
80093fc: 4313 orrs r3, r2
|
|
80093fe: b29a uxth r2, r3
|
|
8009400: 68fb ldr r3, [r7, #12]
|
|
8009402: 805a strh r2, [r3, #2]
|
|
dev_desc->bDeviceClass = *(uint8_t *)(buf + 4);
|
|
8009404: 68bb ldr r3, [r7, #8]
|
|
8009406: 791a ldrb r2, [r3, #4]
|
|
8009408: 68fb ldr r3, [r7, #12]
|
|
800940a: 711a strb r2, [r3, #4]
|
|
dev_desc->bDeviceSubClass = *(uint8_t *)(buf + 5);
|
|
800940c: 68bb ldr r3, [r7, #8]
|
|
800940e: 795a ldrb r2, [r3, #5]
|
|
8009410: 68fb ldr r3, [r7, #12]
|
|
8009412: 715a strb r2, [r3, #5]
|
|
dev_desc->bDeviceProtocol = *(uint8_t *)(buf + 6);
|
|
8009414: 68bb ldr r3, [r7, #8]
|
|
8009416: 799a ldrb r2, [r3, #6]
|
|
8009418: 68fb ldr r3, [r7, #12]
|
|
800941a: 719a strb r2, [r3, #6]
|
|
dev_desc->bMaxPacketSize = *(uint8_t *)(buf + 7);
|
|
800941c: 68bb ldr r3, [r7, #8]
|
|
800941e: 79da ldrb r2, [r3, #7]
|
|
8009420: 68fb ldr r3, [r7, #12]
|
|
8009422: 71da strb r2, [r3, #7]
|
|
|
|
if (length > 8U)
|
|
8009424: 88fb ldrh r3, [r7, #6]
|
|
8009426: 2b08 cmp r3, #8
|
|
8009428: d939 bls.n 800949e <USBH_ParseDevDesc+0xd4>
|
|
{
|
|
/* For 1st time after device connection, Host may issue only 8 bytes for
|
|
Device Descriptor Length */
|
|
dev_desc->idVendor = LE16(buf + 8);
|
|
800942a: 68bb ldr r3, [r7, #8]
|
|
800942c: 3308 adds r3, #8
|
|
800942e: 781b ldrb r3, [r3, #0]
|
|
8009430: b29a uxth r2, r3
|
|
8009432: 68bb ldr r3, [r7, #8]
|
|
8009434: 3309 adds r3, #9
|
|
8009436: 781b ldrb r3, [r3, #0]
|
|
8009438: b29b uxth r3, r3
|
|
800943a: 021b lsls r3, r3, #8
|
|
800943c: b29b uxth r3, r3
|
|
800943e: 4313 orrs r3, r2
|
|
8009440: b29a uxth r2, r3
|
|
8009442: 68fb ldr r3, [r7, #12]
|
|
8009444: 811a strh r2, [r3, #8]
|
|
dev_desc->idProduct = LE16(buf + 10);
|
|
8009446: 68bb ldr r3, [r7, #8]
|
|
8009448: 330a adds r3, #10
|
|
800944a: 781b ldrb r3, [r3, #0]
|
|
800944c: b29a uxth r2, r3
|
|
800944e: 68bb ldr r3, [r7, #8]
|
|
8009450: 330b adds r3, #11
|
|
8009452: 781b ldrb r3, [r3, #0]
|
|
8009454: b29b uxth r3, r3
|
|
8009456: 021b lsls r3, r3, #8
|
|
8009458: b29b uxth r3, r3
|
|
800945a: 4313 orrs r3, r2
|
|
800945c: b29a uxth r2, r3
|
|
800945e: 68fb ldr r3, [r7, #12]
|
|
8009460: 815a strh r2, [r3, #10]
|
|
dev_desc->bcdDevice = LE16(buf + 12);
|
|
8009462: 68bb ldr r3, [r7, #8]
|
|
8009464: 330c adds r3, #12
|
|
8009466: 781b ldrb r3, [r3, #0]
|
|
8009468: b29a uxth r2, r3
|
|
800946a: 68bb ldr r3, [r7, #8]
|
|
800946c: 330d adds r3, #13
|
|
800946e: 781b ldrb r3, [r3, #0]
|
|
8009470: b29b uxth r3, r3
|
|
8009472: 021b lsls r3, r3, #8
|
|
8009474: b29b uxth r3, r3
|
|
8009476: 4313 orrs r3, r2
|
|
8009478: b29a uxth r2, r3
|
|
800947a: 68fb ldr r3, [r7, #12]
|
|
800947c: 819a strh r2, [r3, #12]
|
|
dev_desc->iManufacturer = *(uint8_t *)(buf + 14);
|
|
800947e: 68bb ldr r3, [r7, #8]
|
|
8009480: 7b9a ldrb r2, [r3, #14]
|
|
8009482: 68fb ldr r3, [r7, #12]
|
|
8009484: 739a strb r2, [r3, #14]
|
|
dev_desc->iProduct = *(uint8_t *)(buf + 15);
|
|
8009486: 68bb ldr r3, [r7, #8]
|
|
8009488: 7bda ldrb r2, [r3, #15]
|
|
800948a: 68fb ldr r3, [r7, #12]
|
|
800948c: 73da strb r2, [r3, #15]
|
|
dev_desc->iSerialNumber = *(uint8_t *)(buf + 16);
|
|
800948e: 68bb ldr r3, [r7, #8]
|
|
8009490: 7c1a ldrb r2, [r3, #16]
|
|
8009492: 68fb ldr r3, [r7, #12]
|
|
8009494: 741a strb r2, [r3, #16]
|
|
dev_desc->bNumConfigurations = *(uint8_t *)(buf + 17);
|
|
8009496: 68bb ldr r3, [r7, #8]
|
|
8009498: 7c5a ldrb r2, [r3, #17]
|
|
800949a: 68fb ldr r3, [r7, #12]
|
|
800949c: 745a strb r2, [r3, #17]
|
|
}
|
|
}
|
|
800949e: bf00 nop
|
|
80094a0: 3714 adds r7, #20
|
|
80094a2: 46bd mov sp, r7
|
|
80094a4: f85d 7b04 ldr.w r7, [sp], #4
|
|
80094a8: 4770 bx lr
|
|
|
|
080094aa <USBH_ParseCfgDesc>:
|
|
* @param length: Length of the descriptor
|
|
* @retval None
|
|
*/
|
|
static void USBH_ParseCfgDesc(USBH_CfgDescTypeDef *cfg_desc, uint8_t *buf,
|
|
uint16_t length)
|
|
{
|
|
80094aa: b580 push {r7, lr}
|
|
80094ac: b08a sub sp, #40 ; 0x28
|
|
80094ae: af00 add r7, sp, #0
|
|
80094b0: 60f8 str r0, [r7, #12]
|
|
80094b2: 60b9 str r1, [r7, #8]
|
|
80094b4: 4613 mov r3, r2
|
|
80094b6: 80fb strh r3, [r7, #6]
|
|
USBH_InterfaceDescTypeDef *pif ;
|
|
USBH_EpDescTypeDef *pep;
|
|
USBH_DescHeader_t *pdesc = (USBH_DescHeader_t *)(void *)buf;
|
|
80094b8: 68bb ldr r3, [r7, #8]
|
|
80094ba: 627b str r3, [r7, #36] ; 0x24
|
|
uint16_t ptr;
|
|
uint8_t if_ix = 0U;
|
|
80094bc: 2300 movs r3, #0
|
|
80094be: f887 3023 strb.w r3, [r7, #35] ; 0x23
|
|
uint8_t ep_ix = 0U;
|
|
80094c2: 2300 movs r3, #0
|
|
80094c4: f887 3022 strb.w r3, [r7, #34] ; 0x22
|
|
|
|
pdesc = (USBH_DescHeader_t *)(void *)buf;
|
|
80094c8: 68bb ldr r3, [r7, #8]
|
|
80094ca: 627b str r3, [r7, #36] ; 0x24
|
|
|
|
/* Parse configuration descriptor */
|
|
cfg_desc->bLength = *(uint8_t *)(buf + 0);
|
|
80094cc: 68bb ldr r3, [r7, #8]
|
|
80094ce: 781a ldrb r2, [r3, #0]
|
|
80094d0: 68fb ldr r3, [r7, #12]
|
|
80094d2: 701a strb r2, [r3, #0]
|
|
cfg_desc->bDescriptorType = *(uint8_t *)(buf + 1);
|
|
80094d4: 68bb ldr r3, [r7, #8]
|
|
80094d6: 785a ldrb r2, [r3, #1]
|
|
80094d8: 68fb ldr r3, [r7, #12]
|
|
80094da: 705a strb r2, [r3, #1]
|
|
cfg_desc->wTotalLength = LE16(buf + 2);
|
|
80094dc: 68bb ldr r3, [r7, #8]
|
|
80094de: 3302 adds r3, #2
|
|
80094e0: 781b ldrb r3, [r3, #0]
|
|
80094e2: b29a uxth r2, r3
|
|
80094e4: 68bb ldr r3, [r7, #8]
|
|
80094e6: 3303 adds r3, #3
|
|
80094e8: 781b ldrb r3, [r3, #0]
|
|
80094ea: b29b uxth r3, r3
|
|
80094ec: 021b lsls r3, r3, #8
|
|
80094ee: b29b uxth r3, r3
|
|
80094f0: 4313 orrs r3, r2
|
|
80094f2: b29a uxth r2, r3
|
|
80094f4: 68fb ldr r3, [r7, #12]
|
|
80094f6: 805a strh r2, [r3, #2]
|
|
cfg_desc->bNumInterfaces = *(uint8_t *)(buf + 4);
|
|
80094f8: 68bb ldr r3, [r7, #8]
|
|
80094fa: 791a ldrb r2, [r3, #4]
|
|
80094fc: 68fb ldr r3, [r7, #12]
|
|
80094fe: 711a strb r2, [r3, #4]
|
|
cfg_desc->bConfigurationValue = *(uint8_t *)(buf + 5);
|
|
8009500: 68bb ldr r3, [r7, #8]
|
|
8009502: 795a ldrb r2, [r3, #5]
|
|
8009504: 68fb ldr r3, [r7, #12]
|
|
8009506: 715a strb r2, [r3, #5]
|
|
cfg_desc->iConfiguration = *(uint8_t *)(buf + 6);
|
|
8009508: 68bb ldr r3, [r7, #8]
|
|
800950a: 799a ldrb r2, [r3, #6]
|
|
800950c: 68fb ldr r3, [r7, #12]
|
|
800950e: 719a strb r2, [r3, #6]
|
|
cfg_desc->bmAttributes = *(uint8_t *)(buf + 7);
|
|
8009510: 68bb ldr r3, [r7, #8]
|
|
8009512: 79da ldrb r2, [r3, #7]
|
|
8009514: 68fb ldr r3, [r7, #12]
|
|
8009516: 71da strb r2, [r3, #7]
|
|
cfg_desc->bMaxPower = *(uint8_t *)(buf + 8);
|
|
8009518: 68bb ldr r3, [r7, #8]
|
|
800951a: 7a1a ldrb r2, [r3, #8]
|
|
800951c: 68fb ldr r3, [r7, #12]
|
|
800951e: 721a strb r2, [r3, #8]
|
|
|
|
if (length > USB_CONFIGURATION_DESC_SIZE)
|
|
8009520: 88fb ldrh r3, [r7, #6]
|
|
8009522: 2b09 cmp r3, #9
|
|
8009524: d95f bls.n 80095e6 <USBH_ParseCfgDesc+0x13c>
|
|
{
|
|
ptr = USB_LEN_CFG_DESC;
|
|
8009526: 2309 movs r3, #9
|
|
8009528: 82fb strh r3, [r7, #22]
|
|
pif = (USBH_InterfaceDescTypeDef *)0;
|
|
800952a: 2300 movs r3, #0
|
|
800952c: 61fb str r3, [r7, #28]
|
|
|
|
while ((if_ix < USBH_MAX_NUM_INTERFACES) && (ptr < cfg_desc->wTotalLength))
|
|
800952e: e051 b.n 80095d4 <USBH_ParseCfgDesc+0x12a>
|
|
{
|
|
pdesc = USBH_GetNextDesc((uint8_t *)(void *)pdesc, &ptr);
|
|
8009530: f107 0316 add.w r3, r7, #22
|
|
8009534: 4619 mov r1, r3
|
|
8009536: 6a78 ldr r0, [r7, #36] ; 0x24
|
|
8009538: f000 f8e8 bl 800970c <USBH_GetNextDesc>
|
|
800953c: 6278 str r0, [r7, #36] ; 0x24
|
|
if (pdesc->bDescriptorType == USB_DESC_TYPE_INTERFACE)
|
|
800953e: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
8009540: 785b ldrb r3, [r3, #1]
|
|
8009542: 2b04 cmp r3, #4
|
|
8009544: d146 bne.n 80095d4 <USBH_ParseCfgDesc+0x12a>
|
|
{
|
|
pif = &cfg_desc->Itf_Desc[if_ix];
|
|
8009546: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
|
|
800954a: 221a movs r2, #26
|
|
800954c: fb02 f303 mul.w r3, r2, r3
|
|
8009550: 3308 adds r3, #8
|
|
8009552: 68fa ldr r2, [r7, #12]
|
|
8009554: 4413 add r3, r2
|
|
8009556: 3302 adds r3, #2
|
|
8009558: 61fb str r3, [r7, #28]
|
|
USBH_ParseInterfaceDesc(pif, (uint8_t *)(void *)pdesc);
|
|
800955a: 6a79 ldr r1, [r7, #36] ; 0x24
|
|
800955c: 69f8 ldr r0, [r7, #28]
|
|
800955e: f000 f846 bl 80095ee <USBH_ParseInterfaceDesc>
|
|
|
|
ep_ix = 0U;
|
|
8009562: 2300 movs r3, #0
|
|
8009564: f887 3022 strb.w r3, [r7, #34] ; 0x22
|
|
pep = (USBH_EpDescTypeDef *)0;
|
|
8009568: 2300 movs r3, #0
|
|
800956a: 61bb str r3, [r7, #24]
|
|
while ((ep_ix < pif->bNumEndpoints) && (ptr < cfg_desc->wTotalLength))
|
|
800956c: e022 b.n 80095b4 <USBH_ParseCfgDesc+0x10a>
|
|
{
|
|
pdesc = USBH_GetNextDesc((uint8_t *)(void *)pdesc, &ptr);
|
|
800956e: f107 0316 add.w r3, r7, #22
|
|
8009572: 4619 mov r1, r3
|
|
8009574: 6a78 ldr r0, [r7, #36] ; 0x24
|
|
8009576: f000 f8c9 bl 800970c <USBH_GetNextDesc>
|
|
800957a: 6278 str r0, [r7, #36] ; 0x24
|
|
if (pdesc->bDescriptorType == USB_DESC_TYPE_ENDPOINT)
|
|
800957c: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800957e: 785b ldrb r3, [r3, #1]
|
|
8009580: 2b05 cmp r3, #5
|
|
8009582: d117 bne.n 80095b4 <USBH_ParseCfgDesc+0x10a>
|
|
{
|
|
pep = &cfg_desc->Itf_Desc[if_ix].Ep_Desc[ep_ix];
|
|
8009584: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
|
|
8009588: f897 2022 ldrb.w r2, [r7, #34] ; 0x22
|
|
800958c: 3201 adds r2, #1
|
|
800958e: 00d2 lsls r2, r2, #3
|
|
8009590: 211a movs r1, #26
|
|
8009592: fb01 f303 mul.w r3, r1, r3
|
|
8009596: 4413 add r3, r2
|
|
8009598: 3308 adds r3, #8
|
|
800959a: 68fa ldr r2, [r7, #12]
|
|
800959c: 4413 add r3, r2
|
|
800959e: 3304 adds r3, #4
|
|
80095a0: 61bb str r3, [r7, #24]
|
|
USBH_ParseEPDesc(pep, (uint8_t *)(void *)pdesc);
|
|
80095a2: 6a79 ldr r1, [r7, #36] ; 0x24
|
|
80095a4: 69b8 ldr r0, [r7, #24]
|
|
80095a6: f000 f851 bl 800964c <USBH_ParseEPDesc>
|
|
ep_ix++;
|
|
80095aa: f897 3022 ldrb.w r3, [r7, #34] ; 0x22
|
|
80095ae: 3301 adds r3, #1
|
|
80095b0: f887 3022 strb.w r3, [r7, #34] ; 0x22
|
|
while ((ep_ix < pif->bNumEndpoints) && (ptr < cfg_desc->wTotalLength))
|
|
80095b4: 69fb ldr r3, [r7, #28]
|
|
80095b6: 791b ldrb r3, [r3, #4]
|
|
80095b8: f897 2022 ldrb.w r2, [r7, #34] ; 0x22
|
|
80095bc: 429a cmp r2, r3
|
|
80095be: d204 bcs.n 80095ca <USBH_ParseCfgDesc+0x120>
|
|
80095c0: 68fb ldr r3, [r7, #12]
|
|
80095c2: 885a ldrh r2, [r3, #2]
|
|
80095c4: 8afb ldrh r3, [r7, #22]
|
|
80095c6: 429a cmp r2, r3
|
|
80095c8: d8d1 bhi.n 800956e <USBH_ParseCfgDesc+0xc4>
|
|
}
|
|
}
|
|
if_ix++;
|
|
80095ca: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
|
|
80095ce: 3301 adds r3, #1
|
|
80095d0: f887 3023 strb.w r3, [r7, #35] ; 0x23
|
|
while ((if_ix < USBH_MAX_NUM_INTERFACES) && (ptr < cfg_desc->wTotalLength))
|
|
80095d4: f897 3023 ldrb.w r3, [r7, #35] ; 0x23
|
|
80095d8: 2b01 cmp r3, #1
|
|
80095da: d804 bhi.n 80095e6 <USBH_ParseCfgDesc+0x13c>
|
|
80095dc: 68fb ldr r3, [r7, #12]
|
|
80095de: 885a ldrh r2, [r3, #2]
|
|
80095e0: 8afb ldrh r3, [r7, #22]
|
|
80095e2: 429a cmp r2, r3
|
|
80095e4: d8a4 bhi.n 8009530 <USBH_ParseCfgDesc+0x86>
|
|
}
|
|
}
|
|
}
|
|
}
|
|
80095e6: bf00 nop
|
|
80095e8: 3728 adds r7, #40 ; 0x28
|
|
80095ea: 46bd mov sp, r7
|
|
80095ec: bd80 pop {r7, pc}
|
|
|
|
080095ee <USBH_ParseInterfaceDesc>:
|
|
* @param buf: Buffer where the descriptor data is available
|
|
* @retval None
|
|
*/
|
|
static void USBH_ParseInterfaceDesc(USBH_InterfaceDescTypeDef *if_descriptor,
|
|
uint8_t *buf)
|
|
{
|
|
80095ee: b480 push {r7}
|
|
80095f0: b083 sub sp, #12
|
|
80095f2: af00 add r7, sp, #0
|
|
80095f4: 6078 str r0, [r7, #4]
|
|
80095f6: 6039 str r1, [r7, #0]
|
|
if_descriptor->bLength = *(uint8_t *)(buf + 0);
|
|
80095f8: 683b ldr r3, [r7, #0]
|
|
80095fa: 781a ldrb r2, [r3, #0]
|
|
80095fc: 687b ldr r3, [r7, #4]
|
|
80095fe: 701a strb r2, [r3, #0]
|
|
if_descriptor->bDescriptorType = *(uint8_t *)(buf + 1);
|
|
8009600: 683b ldr r3, [r7, #0]
|
|
8009602: 785a ldrb r2, [r3, #1]
|
|
8009604: 687b ldr r3, [r7, #4]
|
|
8009606: 705a strb r2, [r3, #1]
|
|
if_descriptor->bInterfaceNumber = *(uint8_t *)(buf + 2);
|
|
8009608: 683b ldr r3, [r7, #0]
|
|
800960a: 789a ldrb r2, [r3, #2]
|
|
800960c: 687b ldr r3, [r7, #4]
|
|
800960e: 709a strb r2, [r3, #2]
|
|
if_descriptor->bAlternateSetting = *(uint8_t *)(buf + 3);
|
|
8009610: 683b ldr r3, [r7, #0]
|
|
8009612: 78da ldrb r2, [r3, #3]
|
|
8009614: 687b ldr r3, [r7, #4]
|
|
8009616: 70da strb r2, [r3, #3]
|
|
if_descriptor->bNumEndpoints = *(uint8_t *)(buf + 4);
|
|
8009618: 683b ldr r3, [r7, #0]
|
|
800961a: 791a ldrb r2, [r3, #4]
|
|
800961c: 687b ldr r3, [r7, #4]
|
|
800961e: 711a strb r2, [r3, #4]
|
|
if_descriptor->bInterfaceClass = *(uint8_t *)(buf + 5);
|
|
8009620: 683b ldr r3, [r7, #0]
|
|
8009622: 795a ldrb r2, [r3, #5]
|
|
8009624: 687b ldr r3, [r7, #4]
|
|
8009626: 715a strb r2, [r3, #5]
|
|
if_descriptor->bInterfaceSubClass = *(uint8_t *)(buf + 6);
|
|
8009628: 683b ldr r3, [r7, #0]
|
|
800962a: 799a ldrb r2, [r3, #6]
|
|
800962c: 687b ldr r3, [r7, #4]
|
|
800962e: 719a strb r2, [r3, #6]
|
|
if_descriptor->bInterfaceProtocol = *(uint8_t *)(buf + 7);
|
|
8009630: 683b ldr r3, [r7, #0]
|
|
8009632: 79da ldrb r2, [r3, #7]
|
|
8009634: 687b ldr r3, [r7, #4]
|
|
8009636: 71da strb r2, [r3, #7]
|
|
if_descriptor->iInterface = *(uint8_t *)(buf + 8);
|
|
8009638: 683b ldr r3, [r7, #0]
|
|
800963a: 7a1a ldrb r2, [r3, #8]
|
|
800963c: 687b ldr r3, [r7, #4]
|
|
800963e: 721a strb r2, [r3, #8]
|
|
}
|
|
8009640: bf00 nop
|
|
8009642: 370c adds r7, #12
|
|
8009644: 46bd mov sp, r7
|
|
8009646: f85d 7b04 ldr.w r7, [sp], #4
|
|
800964a: 4770 bx lr
|
|
|
|
0800964c <USBH_ParseEPDesc>:
|
|
* @param buf: Buffer where the parsed descriptor stored
|
|
* @retval None
|
|
*/
|
|
static void USBH_ParseEPDesc(USBH_EpDescTypeDef *ep_descriptor,
|
|
uint8_t *buf)
|
|
{
|
|
800964c: b480 push {r7}
|
|
800964e: b083 sub sp, #12
|
|
8009650: af00 add r7, sp, #0
|
|
8009652: 6078 str r0, [r7, #4]
|
|
8009654: 6039 str r1, [r7, #0]
|
|
ep_descriptor->bLength = *(uint8_t *)(buf + 0);
|
|
8009656: 683b ldr r3, [r7, #0]
|
|
8009658: 781a ldrb r2, [r3, #0]
|
|
800965a: 687b ldr r3, [r7, #4]
|
|
800965c: 701a strb r2, [r3, #0]
|
|
ep_descriptor->bDescriptorType = *(uint8_t *)(buf + 1);
|
|
800965e: 683b ldr r3, [r7, #0]
|
|
8009660: 785a ldrb r2, [r3, #1]
|
|
8009662: 687b ldr r3, [r7, #4]
|
|
8009664: 705a strb r2, [r3, #1]
|
|
ep_descriptor->bEndpointAddress = *(uint8_t *)(buf + 2);
|
|
8009666: 683b ldr r3, [r7, #0]
|
|
8009668: 789a ldrb r2, [r3, #2]
|
|
800966a: 687b ldr r3, [r7, #4]
|
|
800966c: 709a strb r2, [r3, #2]
|
|
ep_descriptor->bmAttributes = *(uint8_t *)(buf + 3);
|
|
800966e: 683b ldr r3, [r7, #0]
|
|
8009670: 78da ldrb r2, [r3, #3]
|
|
8009672: 687b ldr r3, [r7, #4]
|
|
8009674: 70da strb r2, [r3, #3]
|
|
ep_descriptor->wMaxPacketSize = LE16(buf + 4);
|
|
8009676: 683b ldr r3, [r7, #0]
|
|
8009678: 3304 adds r3, #4
|
|
800967a: 781b ldrb r3, [r3, #0]
|
|
800967c: b29a uxth r2, r3
|
|
800967e: 683b ldr r3, [r7, #0]
|
|
8009680: 3305 adds r3, #5
|
|
8009682: 781b ldrb r3, [r3, #0]
|
|
8009684: b29b uxth r3, r3
|
|
8009686: 021b lsls r3, r3, #8
|
|
8009688: b29b uxth r3, r3
|
|
800968a: 4313 orrs r3, r2
|
|
800968c: b29a uxth r2, r3
|
|
800968e: 687b ldr r3, [r7, #4]
|
|
8009690: 809a strh r2, [r3, #4]
|
|
ep_descriptor->bInterval = *(uint8_t *)(buf + 6);
|
|
8009692: 683b ldr r3, [r7, #0]
|
|
8009694: 799a ldrb r2, [r3, #6]
|
|
8009696: 687b ldr r3, [r7, #4]
|
|
8009698: 719a strb r2, [r3, #6]
|
|
}
|
|
800969a: bf00 nop
|
|
800969c: 370c adds r7, #12
|
|
800969e: 46bd mov sp, r7
|
|
80096a0: f85d 7b04 ldr.w r7, [sp], #4
|
|
80096a4: 4770 bx lr
|
|
|
|
080096a6 <USBH_ParseStringDesc>:
|
|
* @param pdest: Destination address pointer
|
|
* @param length: Length of the descriptor
|
|
* @retval None
|
|
*/
|
|
static void USBH_ParseStringDesc(uint8_t *psrc, uint8_t *pdest, uint16_t length)
|
|
{
|
|
80096a6: b480 push {r7}
|
|
80096a8: b087 sub sp, #28
|
|
80096aa: af00 add r7, sp, #0
|
|
80096ac: 60f8 str r0, [r7, #12]
|
|
80096ae: 60b9 str r1, [r7, #8]
|
|
80096b0: 4613 mov r3, r2
|
|
80096b2: 80fb strh r3, [r7, #6]
|
|
*/
|
|
|
|
/* Check which is lower size, the Size of string or the length of bytes read
|
|
from the device */
|
|
|
|
if (psrc[1] == USB_DESC_TYPE_STRING)
|
|
80096b4: 68fb ldr r3, [r7, #12]
|
|
80096b6: 3301 adds r3, #1
|
|
80096b8: 781b ldrb r3, [r3, #0]
|
|
80096ba: 2b03 cmp r3, #3
|
|
80096bc: d120 bne.n 8009700 <USBH_ParseStringDesc+0x5a>
|
|
{
|
|
/* Make sure the Descriptor is String Type */
|
|
|
|
/* psrc[0] contains Size of Descriptor, subtract 2 to get the length of string */
|
|
strlength = ((((uint16_t)psrc[0] - 2U) <= length) ? ((uint16_t)psrc[0] - 2U) : length);
|
|
80096be: 68fb ldr r3, [r7, #12]
|
|
80096c0: 781b ldrb r3, [r3, #0]
|
|
80096c2: 1e9a subs r2, r3, #2
|
|
80096c4: 88fb ldrh r3, [r7, #6]
|
|
80096c6: 4293 cmp r3, r2
|
|
80096c8: bf28 it cs
|
|
80096ca: 4613 movcs r3, r2
|
|
80096cc: 82bb strh r3, [r7, #20]
|
|
|
|
/* Adjust the offset ignoring the String Len and Descriptor type */
|
|
psrc += 2U;
|
|
80096ce: 68fb ldr r3, [r7, #12]
|
|
80096d0: 3302 adds r3, #2
|
|
80096d2: 60fb str r3, [r7, #12]
|
|
|
|
for (idx = 0U; idx < strlength; idx += 2U)
|
|
80096d4: 2300 movs r3, #0
|
|
80096d6: 82fb strh r3, [r7, #22]
|
|
80096d8: e00b b.n 80096f2 <USBH_ParseStringDesc+0x4c>
|
|
{
|
|
/* Copy Only the string and ignore the UNICODE ID, hence add the src */
|
|
*pdest = psrc[idx];
|
|
80096da: 8afb ldrh r3, [r7, #22]
|
|
80096dc: 68fa ldr r2, [r7, #12]
|
|
80096de: 4413 add r3, r2
|
|
80096e0: 781a ldrb r2, [r3, #0]
|
|
80096e2: 68bb ldr r3, [r7, #8]
|
|
80096e4: 701a strb r2, [r3, #0]
|
|
pdest++;
|
|
80096e6: 68bb ldr r3, [r7, #8]
|
|
80096e8: 3301 adds r3, #1
|
|
80096ea: 60bb str r3, [r7, #8]
|
|
for (idx = 0U; idx < strlength; idx += 2U)
|
|
80096ec: 8afb ldrh r3, [r7, #22]
|
|
80096ee: 3302 adds r3, #2
|
|
80096f0: 82fb strh r3, [r7, #22]
|
|
80096f2: 8afa ldrh r2, [r7, #22]
|
|
80096f4: 8abb ldrh r3, [r7, #20]
|
|
80096f6: 429a cmp r2, r3
|
|
80096f8: d3ef bcc.n 80096da <USBH_ParseStringDesc+0x34>
|
|
}
|
|
*pdest = 0U; /* mark end of string */
|
|
80096fa: 68bb ldr r3, [r7, #8]
|
|
80096fc: 2200 movs r2, #0
|
|
80096fe: 701a strb r2, [r3, #0]
|
|
}
|
|
}
|
|
8009700: bf00 nop
|
|
8009702: 371c adds r7, #28
|
|
8009704: 46bd mov sp, r7
|
|
8009706: f85d 7b04 ldr.w r7, [sp], #4
|
|
800970a: 4770 bx lr
|
|
|
|
0800970c <USBH_GetNextDesc>:
|
|
* @param buf: Buffer where the cfg descriptor is available
|
|
* @param ptr: data pointer inside the cfg descriptor
|
|
* @retval next header
|
|
*/
|
|
USBH_DescHeader_t *USBH_GetNextDesc(uint8_t *pbuf, uint16_t *ptr)
|
|
{
|
|
800970c: b480 push {r7}
|
|
800970e: b085 sub sp, #20
|
|
8009710: af00 add r7, sp, #0
|
|
8009712: 6078 str r0, [r7, #4]
|
|
8009714: 6039 str r1, [r7, #0]
|
|
USBH_DescHeader_t *pnext;
|
|
|
|
*ptr += ((USBH_DescHeader_t *)(void *)pbuf)->bLength;
|
|
8009716: 683b ldr r3, [r7, #0]
|
|
8009718: 881a ldrh r2, [r3, #0]
|
|
800971a: 687b ldr r3, [r7, #4]
|
|
800971c: 781b ldrb r3, [r3, #0]
|
|
800971e: b29b uxth r3, r3
|
|
8009720: 4413 add r3, r2
|
|
8009722: b29a uxth r2, r3
|
|
8009724: 683b ldr r3, [r7, #0]
|
|
8009726: 801a strh r2, [r3, #0]
|
|
pnext = (USBH_DescHeader_t *)(void *)((uint8_t *)(void *)pbuf + \
|
|
((USBH_DescHeader_t *)(void *)pbuf)->bLength);
|
|
8009728: 687b ldr r3, [r7, #4]
|
|
800972a: 781b ldrb r3, [r3, #0]
|
|
800972c: 461a mov r2, r3
|
|
pnext = (USBH_DescHeader_t *)(void *)((uint8_t *)(void *)pbuf + \
|
|
800972e: 687b ldr r3, [r7, #4]
|
|
8009730: 4413 add r3, r2
|
|
8009732: 60fb str r3, [r7, #12]
|
|
|
|
return (pnext);
|
|
8009734: 68fb ldr r3, [r7, #12]
|
|
}
|
|
8009736: 4618 mov r0, r3
|
|
8009738: 3714 adds r7, #20
|
|
800973a: 46bd mov sp, r7
|
|
800973c: f85d 7b04 ldr.w r7, [sp], #4
|
|
8009740: 4770 bx lr
|
|
|
|
08009742 <USBH_CtlReq>:
|
|
* @param length: length of the response
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_CtlReq(USBH_HandleTypeDef *phost, uint8_t *buff,
|
|
uint16_t length)
|
|
{
|
|
8009742: b580 push {r7, lr}
|
|
8009744: b086 sub sp, #24
|
|
8009746: af00 add r7, sp, #0
|
|
8009748: 60f8 str r0, [r7, #12]
|
|
800974a: 60b9 str r1, [r7, #8]
|
|
800974c: 4613 mov r3, r2
|
|
800974e: 80fb strh r3, [r7, #6]
|
|
USBH_StatusTypeDef status;
|
|
status = USBH_BUSY;
|
|
8009750: 2301 movs r3, #1
|
|
8009752: 75fb strb r3, [r7, #23]
|
|
|
|
switch (phost->RequestState)
|
|
8009754: 68fb ldr r3, [r7, #12]
|
|
8009756: 789b ldrb r3, [r3, #2]
|
|
8009758: 2b01 cmp r3, #1
|
|
800975a: d002 beq.n 8009762 <USBH_CtlReq+0x20>
|
|
800975c: 2b02 cmp r3, #2
|
|
800975e: d00f beq.n 8009780 <USBH_CtlReq+0x3e>
|
|
#endif
|
|
#endif
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
8009760: e027 b.n 80097b2 <USBH_CtlReq+0x70>
|
|
phost->Control.buff = buff;
|
|
8009762: 68fb ldr r3, [r7, #12]
|
|
8009764: 68ba ldr r2, [r7, #8]
|
|
8009766: 609a str r2, [r3, #8]
|
|
phost->Control.length = length;
|
|
8009768: 68fb ldr r3, [r7, #12]
|
|
800976a: 88fa ldrh r2, [r7, #6]
|
|
800976c: 819a strh r2, [r3, #12]
|
|
phost->Control.state = CTRL_SETUP;
|
|
800976e: 68fb ldr r3, [r7, #12]
|
|
8009770: 2201 movs r2, #1
|
|
8009772: 761a strb r2, [r3, #24]
|
|
phost->RequestState = CMD_WAIT;
|
|
8009774: 68fb ldr r3, [r7, #12]
|
|
8009776: 2202 movs r2, #2
|
|
8009778: 709a strb r2, [r3, #2]
|
|
status = USBH_BUSY;
|
|
800977a: 2301 movs r3, #1
|
|
800977c: 75fb strb r3, [r7, #23]
|
|
break;
|
|
800977e: e018 b.n 80097b2 <USBH_CtlReq+0x70>
|
|
status = USBH_HandleControl(phost);
|
|
8009780: 68f8 ldr r0, [r7, #12]
|
|
8009782: f000 f81b bl 80097bc <USBH_HandleControl>
|
|
8009786: 4603 mov r3, r0
|
|
8009788: 75fb strb r3, [r7, #23]
|
|
if ((status == USBH_OK) || (status == USBH_NOT_SUPPORTED))
|
|
800978a: 7dfb ldrb r3, [r7, #23]
|
|
800978c: 2b00 cmp r3, #0
|
|
800978e: d002 beq.n 8009796 <USBH_CtlReq+0x54>
|
|
8009790: 7dfb ldrb r3, [r7, #23]
|
|
8009792: 2b03 cmp r3, #3
|
|
8009794: d106 bne.n 80097a4 <USBH_CtlReq+0x62>
|
|
phost->RequestState = CMD_SEND;
|
|
8009796: 68fb ldr r3, [r7, #12]
|
|
8009798: 2201 movs r2, #1
|
|
800979a: 709a strb r2, [r3, #2]
|
|
phost->Control.state = CTRL_IDLE;
|
|
800979c: 68fb ldr r3, [r7, #12]
|
|
800979e: 2200 movs r2, #0
|
|
80097a0: 761a strb r2, [r3, #24]
|
|
break;
|
|
80097a2: e005 b.n 80097b0 <USBH_CtlReq+0x6e>
|
|
else if (status == USBH_FAIL)
|
|
80097a4: 7dfb ldrb r3, [r7, #23]
|
|
80097a6: 2b02 cmp r3, #2
|
|
80097a8: d102 bne.n 80097b0 <USBH_CtlReq+0x6e>
|
|
phost->RequestState = CMD_SEND;
|
|
80097aa: 68fb ldr r3, [r7, #12]
|
|
80097ac: 2201 movs r2, #1
|
|
80097ae: 709a strb r2, [r3, #2]
|
|
break;
|
|
80097b0: bf00 nop
|
|
}
|
|
return status;
|
|
80097b2: 7dfb ldrb r3, [r7, #23]
|
|
}
|
|
80097b4: 4618 mov r0, r3
|
|
80097b6: 3718 adds r7, #24
|
|
80097b8: 46bd mov sp, r7
|
|
80097ba: bd80 pop {r7, pc}
|
|
|
|
080097bc <USBH_HandleControl>:
|
|
* Handles the USB control transfer state machine
|
|
* @param phost: Host Handle
|
|
* @retval USBH Status
|
|
*/
|
|
static USBH_StatusTypeDef USBH_HandleControl(USBH_HandleTypeDef *phost)
|
|
{
|
|
80097bc: b580 push {r7, lr}
|
|
80097be: b086 sub sp, #24
|
|
80097c0: af02 add r7, sp, #8
|
|
80097c2: 6078 str r0, [r7, #4]
|
|
uint8_t direction;
|
|
USBH_StatusTypeDef status = USBH_BUSY;
|
|
80097c4: 2301 movs r3, #1
|
|
80097c6: 73fb strb r3, [r7, #15]
|
|
USBH_URBStateTypeDef URB_Status = USBH_URB_IDLE;
|
|
80097c8: 2300 movs r3, #0
|
|
80097ca: 73bb strb r3, [r7, #14]
|
|
|
|
switch (phost->Control.state)
|
|
80097cc: 687b ldr r3, [r7, #4]
|
|
80097ce: 7e1b ldrb r3, [r3, #24]
|
|
80097d0: 3b01 subs r3, #1
|
|
80097d2: 2b0a cmp r3, #10
|
|
80097d4: f200 8158 bhi.w 8009a88 <USBH_HandleControl+0x2cc>
|
|
80097d8: a201 add r2, pc, #4 ; (adr r2, 80097e0 <USBH_HandleControl+0x24>)
|
|
80097da: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
80097de: bf00 nop
|
|
80097e0: 0800980d .word 0x0800980d
|
|
80097e4: 08009827 .word 0x08009827
|
|
80097e8: 08009891 .word 0x08009891
|
|
80097ec: 080098b7 .word 0x080098b7
|
|
80097f0: 080098ef .word 0x080098ef
|
|
80097f4: 0800991b .word 0x0800991b
|
|
80097f8: 0800996d .word 0x0800996d
|
|
80097fc: 0800998f .word 0x0800998f
|
|
8009800: 080099cb .word 0x080099cb
|
|
8009804: 080099f3 .word 0x080099f3
|
|
8009808: 08009a31 .word 0x08009a31
|
|
{
|
|
case CTRL_SETUP:
|
|
/* send a SETUP packet */
|
|
USBH_CtlSendSetup(phost, (uint8_t *)(void *)phost->Control.setup.d8,
|
|
800980c: 687b ldr r3, [r7, #4]
|
|
800980e: f103 0110 add.w r1, r3, #16
|
|
8009812: 687b ldr r3, [r7, #4]
|
|
8009814: 795b ldrb r3, [r3, #5]
|
|
8009816: 461a mov r2, r3
|
|
8009818: 6878 ldr r0, [r7, #4]
|
|
800981a: f000 f945 bl 8009aa8 <USBH_CtlSendSetup>
|
|
phost->Control.pipe_out);
|
|
|
|
phost->Control.state = CTRL_SETUP_WAIT;
|
|
800981e: 687b ldr r3, [r7, #4]
|
|
8009820: 2202 movs r2, #2
|
|
8009822: 761a strb r2, [r3, #24]
|
|
break;
|
|
8009824: e13b b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
|
|
case CTRL_SETUP_WAIT:
|
|
|
|
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_out);
|
|
8009826: 687b ldr r3, [r7, #4]
|
|
8009828: 795b ldrb r3, [r3, #5]
|
|
800982a: 4619 mov r1, r3
|
|
800982c: 6878 ldr r0, [r7, #4]
|
|
800982e: f000 fcc5 bl 800a1bc <USBH_LL_GetURBState>
|
|
8009832: 4603 mov r3, r0
|
|
8009834: 73bb strb r3, [r7, #14]
|
|
/* case SETUP packet sent successfully */
|
|
if (URB_Status == USBH_URB_DONE)
|
|
8009836: 7bbb ldrb r3, [r7, #14]
|
|
8009838: 2b01 cmp r3, #1
|
|
800983a: d11e bne.n 800987a <USBH_HandleControl+0xbe>
|
|
{
|
|
direction = (phost->Control.setup.b.bmRequestType & USB_REQ_DIR_MASK);
|
|
800983c: 687b ldr r3, [r7, #4]
|
|
800983e: 7c1b ldrb r3, [r3, #16]
|
|
8009840: f023 037f bic.w r3, r3, #127 ; 0x7f
|
|
8009844: 737b strb r3, [r7, #13]
|
|
|
|
/* check if there is a data stage */
|
|
if (phost->Control.setup.b.wLength.w != 0U)
|
|
8009846: 687b ldr r3, [r7, #4]
|
|
8009848: 8adb ldrh r3, [r3, #22]
|
|
800984a: 2b00 cmp r3, #0
|
|
800984c: d00a beq.n 8009864 <USBH_HandleControl+0xa8>
|
|
{
|
|
if (direction == USB_D2H)
|
|
800984e: 7b7b ldrb r3, [r7, #13]
|
|
8009850: 2b80 cmp r3, #128 ; 0x80
|
|
8009852: d103 bne.n 800985c <USBH_HandleControl+0xa0>
|
|
{
|
|
/* Data Direction is IN */
|
|
phost->Control.state = CTRL_DATA_IN;
|
|
8009854: 687b ldr r3, [r7, #4]
|
|
8009856: 2203 movs r2, #3
|
|
8009858: 761a strb r2, [r3, #24]
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
}
|
|
break;
|
|
800985a: e117 b.n 8009a8c <USBH_HandleControl+0x2d0>
|
|
phost->Control.state = CTRL_DATA_OUT;
|
|
800985c: 687b ldr r3, [r7, #4]
|
|
800985e: 2205 movs r2, #5
|
|
8009860: 761a strb r2, [r3, #24]
|
|
break;
|
|
8009862: e113 b.n 8009a8c <USBH_HandleControl+0x2d0>
|
|
if (direction == USB_D2H)
|
|
8009864: 7b7b ldrb r3, [r7, #13]
|
|
8009866: 2b80 cmp r3, #128 ; 0x80
|
|
8009868: d103 bne.n 8009872 <USBH_HandleControl+0xb6>
|
|
phost->Control.state = CTRL_STATUS_OUT;
|
|
800986a: 687b ldr r3, [r7, #4]
|
|
800986c: 2209 movs r2, #9
|
|
800986e: 761a strb r2, [r3, #24]
|
|
break;
|
|
8009870: e10c b.n 8009a8c <USBH_HandleControl+0x2d0>
|
|
phost->Control.state = CTRL_STATUS_IN;
|
|
8009872: 687b ldr r3, [r7, #4]
|
|
8009874: 2207 movs r2, #7
|
|
8009876: 761a strb r2, [r3, #24]
|
|
break;
|
|
8009878: e108 b.n 8009a8c <USBH_HandleControl+0x2d0>
|
|
if ((URB_Status == USBH_URB_ERROR) || (URB_Status == USBH_URB_NOTREADY))
|
|
800987a: 7bbb ldrb r3, [r7, #14]
|
|
800987c: 2b04 cmp r3, #4
|
|
800987e: d003 beq.n 8009888 <USBH_HandleControl+0xcc>
|
|
8009880: 7bbb ldrb r3, [r7, #14]
|
|
8009882: 2b02 cmp r3, #2
|
|
8009884: f040 8102 bne.w 8009a8c <USBH_HandleControl+0x2d0>
|
|
phost->Control.state = CTRL_ERROR;
|
|
8009888: 687b ldr r3, [r7, #4]
|
|
800988a: 220b movs r2, #11
|
|
800988c: 761a strb r2, [r3, #24]
|
|
break;
|
|
800988e: e0fd b.n 8009a8c <USBH_HandleControl+0x2d0>
|
|
|
|
case CTRL_DATA_IN:
|
|
/* Issue an IN token */
|
|
phost->Control.timer = (uint16_t)phost->Timer;
|
|
8009890: 687b ldr r3, [r7, #4]
|
|
8009892: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
|
|
8009896: b29a uxth r2, r3
|
|
8009898: 687b ldr r3, [r7, #4]
|
|
800989a: 81da strh r2, [r3, #14]
|
|
USBH_CtlReceiveData(phost, phost->Control.buff, phost->Control.length,
|
|
800989c: 687b ldr r3, [r7, #4]
|
|
800989e: 6899 ldr r1, [r3, #8]
|
|
80098a0: 687b ldr r3, [r7, #4]
|
|
80098a2: 899a ldrh r2, [r3, #12]
|
|
80098a4: 687b ldr r3, [r7, #4]
|
|
80098a6: 791b ldrb r3, [r3, #4]
|
|
80098a8: 6878 ldr r0, [r7, #4]
|
|
80098aa: f000 f93c bl 8009b26 <USBH_CtlReceiveData>
|
|
phost->Control.pipe_in);
|
|
|
|
phost->Control.state = CTRL_DATA_IN_WAIT;
|
|
80098ae: 687b ldr r3, [r7, #4]
|
|
80098b0: 2204 movs r2, #4
|
|
80098b2: 761a strb r2, [r3, #24]
|
|
break;
|
|
80098b4: e0f3 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
|
|
case CTRL_DATA_IN_WAIT:
|
|
|
|
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_in);
|
|
80098b6: 687b ldr r3, [r7, #4]
|
|
80098b8: 791b ldrb r3, [r3, #4]
|
|
80098ba: 4619 mov r1, r3
|
|
80098bc: 6878 ldr r0, [r7, #4]
|
|
80098be: f000 fc7d bl 800a1bc <USBH_LL_GetURBState>
|
|
80098c2: 4603 mov r3, r0
|
|
80098c4: 73bb strb r3, [r7, #14]
|
|
|
|
/* check is DATA packet transferred successfully */
|
|
if (URB_Status == USBH_URB_DONE)
|
|
80098c6: 7bbb ldrb r3, [r7, #14]
|
|
80098c8: 2b01 cmp r3, #1
|
|
80098ca: d102 bne.n 80098d2 <USBH_HandleControl+0x116>
|
|
{
|
|
phost->Control.state = CTRL_STATUS_OUT;
|
|
80098cc: 687b ldr r3, [r7, #4]
|
|
80098ce: 2209 movs r2, #9
|
|
80098d0: 761a strb r2, [r3, #24]
|
|
#endif
|
|
#endif
|
|
}
|
|
|
|
/* manage error cases*/
|
|
if (URB_Status == USBH_URB_STALL)
|
|
80098d2: 7bbb ldrb r3, [r7, #14]
|
|
80098d4: 2b05 cmp r3, #5
|
|
80098d6: d102 bne.n 80098de <USBH_HandleControl+0x122>
|
|
{
|
|
/* In stall case, return to previous machine state*/
|
|
status = USBH_NOT_SUPPORTED;
|
|
80098d8: 2303 movs r3, #3
|
|
80098da: 73fb strb r3, [r7, #15]
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
}
|
|
break;
|
|
80098dc: e0d8 b.n 8009a90 <USBH_HandleControl+0x2d4>
|
|
if (URB_Status == USBH_URB_ERROR)
|
|
80098de: 7bbb ldrb r3, [r7, #14]
|
|
80098e0: 2b04 cmp r3, #4
|
|
80098e2: f040 80d5 bne.w 8009a90 <USBH_HandleControl+0x2d4>
|
|
phost->Control.state = CTRL_ERROR;
|
|
80098e6: 687b ldr r3, [r7, #4]
|
|
80098e8: 220b movs r2, #11
|
|
80098ea: 761a strb r2, [r3, #24]
|
|
break;
|
|
80098ec: e0d0 b.n 8009a90 <USBH_HandleControl+0x2d4>
|
|
|
|
case CTRL_DATA_OUT:
|
|
|
|
USBH_CtlSendData(phost, phost->Control.buff, phost->Control.length,
|
|
80098ee: 687b ldr r3, [r7, #4]
|
|
80098f0: 6899 ldr r1, [r3, #8]
|
|
80098f2: 687b ldr r3, [r7, #4]
|
|
80098f4: 899a ldrh r2, [r3, #12]
|
|
80098f6: 687b ldr r3, [r7, #4]
|
|
80098f8: 7958 ldrb r0, [r3, #5]
|
|
80098fa: 2301 movs r3, #1
|
|
80098fc: 9300 str r3, [sp, #0]
|
|
80098fe: 4603 mov r3, r0
|
|
8009900: 6878 ldr r0, [r7, #4]
|
|
8009902: f000 f8eb bl 8009adc <USBH_CtlSendData>
|
|
phost->Control.pipe_out, 1U);
|
|
|
|
phost->Control.timer = (uint16_t)phost->Timer;
|
|
8009906: 687b ldr r3, [r7, #4]
|
|
8009908: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
|
|
800990c: b29a uxth r2, r3
|
|
800990e: 687b ldr r3, [r7, #4]
|
|
8009910: 81da strh r2, [r3, #14]
|
|
phost->Control.state = CTRL_DATA_OUT_WAIT;
|
|
8009912: 687b ldr r3, [r7, #4]
|
|
8009914: 2206 movs r2, #6
|
|
8009916: 761a strb r2, [r3, #24]
|
|
break;
|
|
8009918: e0c1 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
|
|
case CTRL_DATA_OUT_WAIT:
|
|
|
|
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_out);
|
|
800991a: 687b ldr r3, [r7, #4]
|
|
800991c: 795b ldrb r3, [r3, #5]
|
|
800991e: 4619 mov r1, r3
|
|
8009920: 6878 ldr r0, [r7, #4]
|
|
8009922: f000 fc4b bl 800a1bc <USBH_LL_GetURBState>
|
|
8009926: 4603 mov r3, r0
|
|
8009928: 73bb strb r3, [r7, #14]
|
|
|
|
if (URB_Status == USBH_URB_DONE)
|
|
800992a: 7bbb ldrb r3, [r7, #14]
|
|
800992c: 2b01 cmp r3, #1
|
|
800992e: d103 bne.n 8009938 <USBH_HandleControl+0x17c>
|
|
{
|
|
/* If the Setup Pkt is sent successful, then change the state */
|
|
phost->Control.state = CTRL_STATUS_IN;
|
|
8009930: 687b ldr r3, [r7, #4]
|
|
8009932: 2207 movs r2, #7
|
|
8009934: 761a strb r2, [r3, #24]
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
}
|
|
break;
|
|
8009936: e0ad b.n 8009a94 <USBH_HandleControl+0x2d8>
|
|
else if (URB_Status == USBH_URB_STALL)
|
|
8009938: 7bbb ldrb r3, [r7, #14]
|
|
800993a: 2b05 cmp r3, #5
|
|
800993c: d105 bne.n 800994a <USBH_HandleControl+0x18e>
|
|
phost->Control.state = CTRL_STALLED;
|
|
800993e: 687b ldr r3, [r7, #4]
|
|
8009940: 220c movs r2, #12
|
|
8009942: 761a strb r2, [r3, #24]
|
|
status = USBH_NOT_SUPPORTED;
|
|
8009944: 2303 movs r3, #3
|
|
8009946: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8009948: e0a4 b.n 8009a94 <USBH_HandleControl+0x2d8>
|
|
else if (URB_Status == USBH_URB_NOTREADY)
|
|
800994a: 7bbb ldrb r3, [r7, #14]
|
|
800994c: 2b02 cmp r3, #2
|
|
800994e: d103 bne.n 8009958 <USBH_HandleControl+0x19c>
|
|
phost->Control.state = CTRL_DATA_OUT;
|
|
8009950: 687b ldr r3, [r7, #4]
|
|
8009952: 2205 movs r2, #5
|
|
8009954: 761a strb r2, [r3, #24]
|
|
break;
|
|
8009956: e09d b.n 8009a94 <USBH_HandleControl+0x2d8>
|
|
if (URB_Status == USBH_URB_ERROR)
|
|
8009958: 7bbb ldrb r3, [r7, #14]
|
|
800995a: 2b04 cmp r3, #4
|
|
800995c: f040 809a bne.w 8009a94 <USBH_HandleControl+0x2d8>
|
|
phost->Control.state = CTRL_ERROR;
|
|
8009960: 687b ldr r3, [r7, #4]
|
|
8009962: 220b movs r2, #11
|
|
8009964: 761a strb r2, [r3, #24]
|
|
status = USBH_FAIL;
|
|
8009966: 2302 movs r3, #2
|
|
8009968: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800996a: e093 b.n 8009a94 <USBH_HandleControl+0x2d8>
|
|
|
|
case CTRL_STATUS_IN:
|
|
/* Send 0 bytes out packet */
|
|
USBH_CtlReceiveData(phost, 0U, 0U, phost->Control.pipe_in);
|
|
800996c: 687b ldr r3, [r7, #4]
|
|
800996e: 791b ldrb r3, [r3, #4]
|
|
8009970: 2200 movs r2, #0
|
|
8009972: 2100 movs r1, #0
|
|
8009974: 6878 ldr r0, [r7, #4]
|
|
8009976: f000 f8d6 bl 8009b26 <USBH_CtlReceiveData>
|
|
|
|
phost->Control.timer = (uint16_t)phost->Timer;
|
|
800997a: 687b ldr r3, [r7, #4]
|
|
800997c: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
|
|
8009980: b29a uxth r2, r3
|
|
8009982: 687b ldr r3, [r7, #4]
|
|
8009984: 81da strh r2, [r3, #14]
|
|
phost->Control.state = CTRL_STATUS_IN_WAIT;
|
|
8009986: 687b ldr r3, [r7, #4]
|
|
8009988: 2208 movs r2, #8
|
|
800998a: 761a strb r2, [r3, #24]
|
|
|
|
break;
|
|
800998c: e087 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
|
|
case CTRL_STATUS_IN_WAIT:
|
|
|
|
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_in);
|
|
800998e: 687b ldr r3, [r7, #4]
|
|
8009990: 791b ldrb r3, [r3, #4]
|
|
8009992: 4619 mov r1, r3
|
|
8009994: 6878 ldr r0, [r7, #4]
|
|
8009996: f000 fc11 bl 800a1bc <USBH_LL_GetURBState>
|
|
800999a: 4603 mov r3, r0
|
|
800999c: 73bb strb r3, [r7, #14]
|
|
|
|
if (URB_Status == USBH_URB_DONE)
|
|
800999e: 7bbb ldrb r3, [r7, #14]
|
|
80099a0: 2b01 cmp r3, #1
|
|
80099a2: d105 bne.n 80099b0 <USBH_HandleControl+0x1f4>
|
|
{
|
|
/* Control transfers completed, Exit the State Machine */
|
|
phost->Control.state = CTRL_COMPLETE;
|
|
80099a4: 687b ldr r3, [r7, #4]
|
|
80099a6: 220d movs r2, #13
|
|
80099a8: 761a strb r2, [r3, #24]
|
|
status = USBH_OK;
|
|
80099aa: 2300 movs r3, #0
|
|
80099ac: 73fb strb r3, [r7, #15]
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
}
|
|
break;
|
|
80099ae: e073 b.n 8009a98 <USBH_HandleControl+0x2dc>
|
|
else if (URB_Status == USBH_URB_ERROR)
|
|
80099b0: 7bbb ldrb r3, [r7, #14]
|
|
80099b2: 2b04 cmp r3, #4
|
|
80099b4: d103 bne.n 80099be <USBH_HandleControl+0x202>
|
|
phost->Control.state = CTRL_ERROR;
|
|
80099b6: 687b ldr r3, [r7, #4]
|
|
80099b8: 220b movs r2, #11
|
|
80099ba: 761a strb r2, [r3, #24]
|
|
break;
|
|
80099bc: e06c b.n 8009a98 <USBH_HandleControl+0x2dc>
|
|
if (URB_Status == USBH_URB_STALL)
|
|
80099be: 7bbb ldrb r3, [r7, #14]
|
|
80099c0: 2b05 cmp r3, #5
|
|
80099c2: d169 bne.n 8009a98 <USBH_HandleControl+0x2dc>
|
|
status = USBH_NOT_SUPPORTED;
|
|
80099c4: 2303 movs r3, #3
|
|
80099c6: 73fb strb r3, [r7, #15]
|
|
break;
|
|
80099c8: e066 b.n 8009a98 <USBH_HandleControl+0x2dc>
|
|
|
|
case CTRL_STATUS_OUT:
|
|
USBH_CtlSendData(phost, 0U, 0U, phost->Control.pipe_out, 1U);
|
|
80099ca: 687b ldr r3, [r7, #4]
|
|
80099cc: 795a ldrb r2, [r3, #5]
|
|
80099ce: 2301 movs r3, #1
|
|
80099d0: 9300 str r3, [sp, #0]
|
|
80099d2: 4613 mov r3, r2
|
|
80099d4: 2200 movs r2, #0
|
|
80099d6: 2100 movs r1, #0
|
|
80099d8: 6878 ldr r0, [r7, #4]
|
|
80099da: f000 f87f bl 8009adc <USBH_CtlSendData>
|
|
|
|
phost->Control.timer = (uint16_t)phost->Timer;
|
|
80099de: 687b ldr r3, [r7, #4]
|
|
80099e0: f8d3 33c4 ldr.w r3, [r3, #964] ; 0x3c4
|
|
80099e4: b29a uxth r2, r3
|
|
80099e6: 687b ldr r3, [r7, #4]
|
|
80099e8: 81da strh r2, [r3, #14]
|
|
phost->Control.state = CTRL_STATUS_OUT_WAIT;
|
|
80099ea: 687b ldr r3, [r7, #4]
|
|
80099ec: 220a movs r2, #10
|
|
80099ee: 761a strb r2, [r3, #24]
|
|
break;
|
|
80099f0: e055 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
|
|
case CTRL_STATUS_OUT_WAIT:
|
|
URB_Status = USBH_LL_GetURBState(phost, phost->Control.pipe_out);
|
|
80099f2: 687b ldr r3, [r7, #4]
|
|
80099f4: 795b ldrb r3, [r3, #5]
|
|
80099f6: 4619 mov r1, r3
|
|
80099f8: 6878 ldr r0, [r7, #4]
|
|
80099fa: f000 fbdf bl 800a1bc <USBH_LL_GetURBState>
|
|
80099fe: 4603 mov r3, r0
|
|
8009a00: 73bb strb r3, [r7, #14]
|
|
if (URB_Status == USBH_URB_DONE)
|
|
8009a02: 7bbb ldrb r3, [r7, #14]
|
|
8009a04: 2b01 cmp r3, #1
|
|
8009a06: d105 bne.n 8009a14 <USBH_HandleControl+0x258>
|
|
{
|
|
status = USBH_OK;
|
|
8009a08: 2300 movs r3, #0
|
|
8009a0a: 73fb strb r3, [r7, #15]
|
|
phost->Control.state = CTRL_COMPLETE;
|
|
8009a0c: 687b ldr r3, [r7, #4]
|
|
8009a0e: 220d movs r2, #13
|
|
8009a10: 761a strb r2, [r3, #24]
|
|
(void)osMessageQueuePut(phost->os_event, &phost->os_msg, 0U, NULL);
|
|
#endif
|
|
#endif
|
|
}
|
|
}
|
|
break;
|
|
8009a12: e043 b.n 8009a9c <USBH_HandleControl+0x2e0>
|
|
else if (URB_Status == USBH_URB_NOTREADY)
|
|
8009a14: 7bbb ldrb r3, [r7, #14]
|
|
8009a16: 2b02 cmp r3, #2
|
|
8009a18: d103 bne.n 8009a22 <USBH_HandleControl+0x266>
|
|
phost->Control.state = CTRL_STATUS_OUT;
|
|
8009a1a: 687b ldr r3, [r7, #4]
|
|
8009a1c: 2209 movs r2, #9
|
|
8009a1e: 761a strb r2, [r3, #24]
|
|
break;
|
|
8009a20: e03c b.n 8009a9c <USBH_HandleControl+0x2e0>
|
|
if (URB_Status == USBH_URB_ERROR)
|
|
8009a22: 7bbb ldrb r3, [r7, #14]
|
|
8009a24: 2b04 cmp r3, #4
|
|
8009a26: d139 bne.n 8009a9c <USBH_HandleControl+0x2e0>
|
|
phost->Control.state = CTRL_ERROR;
|
|
8009a28: 687b ldr r3, [r7, #4]
|
|
8009a2a: 220b movs r2, #11
|
|
8009a2c: 761a strb r2, [r3, #24]
|
|
break;
|
|
8009a2e: e035 b.n 8009a9c <USBH_HandleControl+0x2e0>
|
|
PID; i.e., recovery actions via some other pipe are not required for control
|
|
endpoints. For the Default Control Pipe, a device reset will ultimately be
|
|
required to clear the halt or error condition if the next Setup PID is not
|
|
accepted.
|
|
*/
|
|
if (++phost->Control.errorcount <= USBH_MAX_ERROR_COUNT)
|
|
8009a30: 687b ldr r3, [r7, #4]
|
|
8009a32: 7e5b ldrb r3, [r3, #25]
|
|
8009a34: 3301 adds r3, #1
|
|
8009a36: b2da uxtb r2, r3
|
|
8009a38: 687b ldr r3, [r7, #4]
|
|
8009a3a: 765a strb r2, [r3, #25]
|
|
8009a3c: 687b ldr r3, [r7, #4]
|
|
8009a3e: 7e5b ldrb r3, [r3, #25]
|
|
8009a40: 2b02 cmp r3, #2
|
|
8009a42: d806 bhi.n 8009a52 <USBH_HandleControl+0x296>
|
|
{
|
|
/* Do the transmission again, starting from SETUP Packet */
|
|
phost->Control.state = CTRL_SETUP;
|
|
8009a44: 687b ldr r3, [r7, #4]
|
|
8009a46: 2201 movs r2, #1
|
|
8009a48: 761a strb r2, [r3, #24]
|
|
phost->RequestState = CMD_SEND;
|
|
8009a4a: 687b ldr r3, [r7, #4]
|
|
8009a4c: 2201 movs r2, #1
|
|
8009a4e: 709a strb r2, [r3, #2]
|
|
USBH_FreePipe(phost, phost->Control.pipe_in);
|
|
|
|
phost->gState = HOST_IDLE;
|
|
status = USBH_FAIL;
|
|
}
|
|
break;
|
|
8009a50: e025 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
phost->pUser(phost, HOST_USER_UNRECOVERED_ERROR);
|
|
8009a52: 687b ldr r3, [r7, #4]
|
|
8009a54: f8d3 33d4 ldr.w r3, [r3, #980] ; 0x3d4
|
|
8009a58: 2106 movs r1, #6
|
|
8009a5a: 6878 ldr r0, [r7, #4]
|
|
8009a5c: 4798 blx r3
|
|
phost->Control.errorcount = 0U;
|
|
8009a5e: 687b ldr r3, [r7, #4]
|
|
8009a60: 2200 movs r2, #0
|
|
8009a62: 765a strb r2, [r3, #25]
|
|
USBH_FreePipe(phost, phost->Control.pipe_out);
|
|
8009a64: 687b ldr r3, [r7, #4]
|
|
8009a66: 795b ldrb r3, [r3, #5]
|
|
8009a68: 4619 mov r1, r3
|
|
8009a6a: 6878 ldr r0, [r7, #4]
|
|
8009a6c: f000 f90c bl 8009c88 <USBH_FreePipe>
|
|
USBH_FreePipe(phost, phost->Control.pipe_in);
|
|
8009a70: 687b ldr r3, [r7, #4]
|
|
8009a72: 791b ldrb r3, [r3, #4]
|
|
8009a74: 4619 mov r1, r3
|
|
8009a76: 6878 ldr r0, [r7, #4]
|
|
8009a78: f000 f906 bl 8009c88 <USBH_FreePipe>
|
|
phost->gState = HOST_IDLE;
|
|
8009a7c: 687b ldr r3, [r7, #4]
|
|
8009a7e: 2200 movs r2, #0
|
|
8009a80: 701a strb r2, [r3, #0]
|
|
status = USBH_FAIL;
|
|
8009a82: 2302 movs r3, #2
|
|
8009a84: 73fb strb r3, [r7, #15]
|
|
break;
|
|
8009a86: e00a b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
|
|
default:
|
|
break;
|
|
8009a88: bf00 nop
|
|
8009a8a: e008 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
break;
|
|
8009a8c: bf00 nop
|
|
8009a8e: e006 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
break;
|
|
8009a90: bf00 nop
|
|
8009a92: e004 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
break;
|
|
8009a94: bf00 nop
|
|
8009a96: e002 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
break;
|
|
8009a98: bf00 nop
|
|
8009a9a: e000 b.n 8009a9e <USBH_HandleControl+0x2e2>
|
|
break;
|
|
8009a9c: bf00 nop
|
|
}
|
|
|
|
return status;
|
|
8009a9e: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
8009aa0: 4618 mov r0, r3
|
|
8009aa2: 3710 adds r7, #16
|
|
8009aa4: 46bd mov sp, r7
|
|
8009aa6: bd80 pop {r7, pc}
|
|
|
|
08009aa8 <USBH_CtlSendSetup>:
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_CtlSendSetup(USBH_HandleTypeDef *phost,
|
|
uint8_t *buff,
|
|
uint8_t pipe_num)
|
|
{
|
|
8009aa8: b580 push {r7, lr}
|
|
8009aaa: b088 sub sp, #32
|
|
8009aac: af04 add r7, sp, #16
|
|
8009aae: 60f8 str r0, [r7, #12]
|
|
8009ab0: 60b9 str r1, [r7, #8]
|
|
8009ab2: 4613 mov r3, r2
|
|
8009ab4: 71fb strb r3, [r7, #7]
|
|
|
|
USBH_LL_SubmitURB(phost, /* Driver handle */
|
|
8009ab6: 79f9 ldrb r1, [r7, #7]
|
|
8009ab8: 2300 movs r3, #0
|
|
8009aba: 9303 str r3, [sp, #12]
|
|
8009abc: 2308 movs r3, #8
|
|
8009abe: 9302 str r3, [sp, #8]
|
|
8009ac0: 68bb ldr r3, [r7, #8]
|
|
8009ac2: 9301 str r3, [sp, #4]
|
|
8009ac4: 2300 movs r3, #0
|
|
8009ac6: 9300 str r3, [sp, #0]
|
|
8009ac8: 2300 movs r3, #0
|
|
8009aca: 2200 movs r2, #0
|
|
8009acc: 68f8 ldr r0, [r7, #12]
|
|
8009ace: f000 fb44 bl 800a15a <USBH_LL_SubmitURB>
|
|
USBH_EP_CONTROL, /* EP type */
|
|
USBH_PID_SETUP, /* Type setup */
|
|
buff, /* data buffer */
|
|
USBH_SETUP_PKT_SIZE, /* data length */
|
|
0U);
|
|
return USBH_OK;
|
|
8009ad2: 2300 movs r3, #0
|
|
}
|
|
8009ad4: 4618 mov r0, r3
|
|
8009ad6: 3710 adds r7, #16
|
|
8009ad8: 46bd mov sp, r7
|
|
8009ada: bd80 pop {r7, pc}
|
|
|
|
08009adc <USBH_CtlSendData>:
|
|
USBH_StatusTypeDef USBH_CtlSendData(USBH_HandleTypeDef *phost,
|
|
uint8_t *buff,
|
|
uint16_t length,
|
|
uint8_t pipe_num,
|
|
uint8_t do_ping)
|
|
{
|
|
8009adc: b580 push {r7, lr}
|
|
8009ade: b088 sub sp, #32
|
|
8009ae0: af04 add r7, sp, #16
|
|
8009ae2: 60f8 str r0, [r7, #12]
|
|
8009ae4: 60b9 str r1, [r7, #8]
|
|
8009ae6: 4611 mov r1, r2
|
|
8009ae8: 461a mov r2, r3
|
|
8009aea: 460b mov r3, r1
|
|
8009aec: 80fb strh r3, [r7, #6]
|
|
8009aee: 4613 mov r3, r2
|
|
8009af0: 717b strb r3, [r7, #5]
|
|
if (phost->device.speed != USBH_SPEED_HIGH)
|
|
8009af2: 68fb ldr r3, [r7, #12]
|
|
8009af4: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
8009af8: 2b00 cmp r3, #0
|
|
8009afa: d001 beq.n 8009b00 <USBH_CtlSendData+0x24>
|
|
{
|
|
do_ping = 0U;
|
|
8009afc: 2300 movs r3, #0
|
|
8009afe: 763b strb r3, [r7, #24]
|
|
}
|
|
|
|
USBH_LL_SubmitURB(phost, /* Driver handle */
|
|
8009b00: 7979 ldrb r1, [r7, #5]
|
|
8009b02: 7e3b ldrb r3, [r7, #24]
|
|
8009b04: 9303 str r3, [sp, #12]
|
|
8009b06: 88fb ldrh r3, [r7, #6]
|
|
8009b08: 9302 str r3, [sp, #8]
|
|
8009b0a: 68bb ldr r3, [r7, #8]
|
|
8009b0c: 9301 str r3, [sp, #4]
|
|
8009b0e: 2301 movs r3, #1
|
|
8009b10: 9300 str r3, [sp, #0]
|
|
8009b12: 2300 movs r3, #0
|
|
8009b14: 2200 movs r2, #0
|
|
8009b16: 68f8 ldr r0, [r7, #12]
|
|
8009b18: f000 fb1f bl 800a15a <USBH_LL_SubmitURB>
|
|
USBH_PID_DATA, /* Type Data */
|
|
buff, /* data buffer */
|
|
length, /* data length */
|
|
do_ping); /* do ping (HS Only)*/
|
|
|
|
return USBH_OK;
|
|
8009b1c: 2300 movs r3, #0
|
|
}
|
|
8009b1e: 4618 mov r0, r3
|
|
8009b20: 3710 adds r7, #16
|
|
8009b22: 46bd mov sp, r7
|
|
8009b24: bd80 pop {r7, pc}
|
|
|
|
08009b26 <USBH_CtlReceiveData>:
|
|
*/
|
|
USBH_StatusTypeDef USBH_CtlReceiveData(USBH_HandleTypeDef *phost,
|
|
uint8_t *buff,
|
|
uint16_t length,
|
|
uint8_t pipe_num)
|
|
{
|
|
8009b26: b580 push {r7, lr}
|
|
8009b28: b088 sub sp, #32
|
|
8009b2a: af04 add r7, sp, #16
|
|
8009b2c: 60f8 str r0, [r7, #12]
|
|
8009b2e: 60b9 str r1, [r7, #8]
|
|
8009b30: 4611 mov r1, r2
|
|
8009b32: 461a mov r2, r3
|
|
8009b34: 460b mov r3, r1
|
|
8009b36: 80fb strh r3, [r7, #6]
|
|
8009b38: 4613 mov r3, r2
|
|
8009b3a: 717b strb r3, [r7, #5]
|
|
USBH_LL_SubmitURB(phost, /* Driver handle */
|
|
8009b3c: 7979 ldrb r1, [r7, #5]
|
|
8009b3e: 2300 movs r3, #0
|
|
8009b40: 9303 str r3, [sp, #12]
|
|
8009b42: 88fb ldrh r3, [r7, #6]
|
|
8009b44: 9302 str r3, [sp, #8]
|
|
8009b46: 68bb ldr r3, [r7, #8]
|
|
8009b48: 9301 str r3, [sp, #4]
|
|
8009b4a: 2301 movs r3, #1
|
|
8009b4c: 9300 str r3, [sp, #0]
|
|
8009b4e: 2300 movs r3, #0
|
|
8009b50: 2201 movs r2, #1
|
|
8009b52: 68f8 ldr r0, [r7, #12]
|
|
8009b54: f000 fb01 bl 800a15a <USBH_LL_SubmitURB>
|
|
USBH_EP_CONTROL, /* EP type */
|
|
USBH_PID_DATA, /* Type Data */
|
|
buff, /* data buffer */
|
|
length, /* data length */
|
|
0U);
|
|
return USBH_OK;
|
|
8009b58: 2300 movs r3, #0
|
|
|
|
}
|
|
8009b5a: 4618 mov r0, r3
|
|
8009b5c: 3710 adds r7, #16
|
|
8009b5e: 46bd mov sp, r7
|
|
8009b60: bd80 pop {r7, pc}
|
|
|
|
08009b62 <USBH_BulkSendData>:
|
|
USBH_StatusTypeDef USBH_BulkSendData(USBH_HandleTypeDef *phost,
|
|
uint8_t *buff,
|
|
uint16_t length,
|
|
uint8_t pipe_num,
|
|
uint8_t do_ping)
|
|
{
|
|
8009b62: b580 push {r7, lr}
|
|
8009b64: b088 sub sp, #32
|
|
8009b66: af04 add r7, sp, #16
|
|
8009b68: 60f8 str r0, [r7, #12]
|
|
8009b6a: 60b9 str r1, [r7, #8]
|
|
8009b6c: 4611 mov r1, r2
|
|
8009b6e: 461a mov r2, r3
|
|
8009b70: 460b mov r3, r1
|
|
8009b72: 80fb strh r3, [r7, #6]
|
|
8009b74: 4613 mov r3, r2
|
|
8009b76: 717b strb r3, [r7, #5]
|
|
if (phost->device.speed != USBH_SPEED_HIGH)
|
|
8009b78: 68fb ldr r3, [r7, #12]
|
|
8009b7a: f893 331d ldrb.w r3, [r3, #797] ; 0x31d
|
|
8009b7e: 2b00 cmp r3, #0
|
|
8009b80: d001 beq.n 8009b86 <USBH_BulkSendData+0x24>
|
|
{
|
|
do_ping = 0U;
|
|
8009b82: 2300 movs r3, #0
|
|
8009b84: 763b strb r3, [r7, #24]
|
|
}
|
|
|
|
USBH_LL_SubmitURB(phost, /* Driver handle */
|
|
8009b86: 7979 ldrb r1, [r7, #5]
|
|
8009b88: 7e3b ldrb r3, [r7, #24]
|
|
8009b8a: 9303 str r3, [sp, #12]
|
|
8009b8c: 88fb ldrh r3, [r7, #6]
|
|
8009b8e: 9302 str r3, [sp, #8]
|
|
8009b90: 68bb ldr r3, [r7, #8]
|
|
8009b92: 9301 str r3, [sp, #4]
|
|
8009b94: 2301 movs r3, #1
|
|
8009b96: 9300 str r3, [sp, #0]
|
|
8009b98: 2302 movs r3, #2
|
|
8009b9a: 2200 movs r2, #0
|
|
8009b9c: 68f8 ldr r0, [r7, #12]
|
|
8009b9e: f000 fadc bl 800a15a <USBH_LL_SubmitURB>
|
|
USBH_EP_BULK, /* EP type */
|
|
USBH_PID_DATA, /* Type Data */
|
|
buff, /* data buffer */
|
|
length, /* data length */
|
|
do_ping); /* do ping (HS Only)*/
|
|
return USBH_OK;
|
|
8009ba2: 2300 movs r3, #0
|
|
}
|
|
8009ba4: 4618 mov r0, r3
|
|
8009ba6: 3710 adds r7, #16
|
|
8009ba8: 46bd mov sp, r7
|
|
8009baa: bd80 pop {r7, pc}
|
|
|
|
08009bac <USBH_BulkReceiveData>:
|
|
*/
|
|
USBH_StatusTypeDef USBH_BulkReceiveData(USBH_HandleTypeDef *phost,
|
|
uint8_t *buff,
|
|
uint16_t length,
|
|
uint8_t pipe_num)
|
|
{
|
|
8009bac: b580 push {r7, lr}
|
|
8009bae: b088 sub sp, #32
|
|
8009bb0: af04 add r7, sp, #16
|
|
8009bb2: 60f8 str r0, [r7, #12]
|
|
8009bb4: 60b9 str r1, [r7, #8]
|
|
8009bb6: 4611 mov r1, r2
|
|
8009bb8: 461a mov r2, r3
|
|
8009bba: 460b mov r3, r1
|
|
8009bbc: 80fb strh r3, [r7, #6]
|
|
8009bbe: 4613 mov r3, r2
|
|
8009bc0: 717b strb r3, [r7, #5]
|
|
USBH_LL_SubmitURB(phost, /* Driver handle */
|
|
8009bc2: 7979 ldrb r1, [r7, #5]
|
|
8009bc4: 2300 movs r3, #0
|
|
8009bc6: 9303 str r3, [sp, #12]
|
|
8009bc8: 88fb ldrh r3, [r7, #6]
|
|
8009bca: 9302 str r3, [sp, #8]
|
|
8009bcc: 68bb ldr r3, [r7, #8]
|
|
8009bce: 9301 str r3, [sp, #4]
|
|
8009bd0: 2301 movs r3, #1
|
|
8009bd2: 9300 str r3, [sp, #0]
|
|
8009bd4: 2302 movs r3, #2
|
|
8009bd6: 2201 movs r2, #1
|
|
8009bd8: 68f8 ldr r0, [r7, #12]
|
|
8009bda: f000 fabe bl 800a15a <USBH_LL_SubmitURB>
|
|
USBH_EP_BULK, /* EP type */
|
|
USBH_PID_DATA, /* Type Data */
|
|
buff, /* data buffer */
|
|
length, /* data length */
|
|
0U);
|
|
return USBH_OK;
|
|
8009bde: 2300 movs r3, #0
|
|
}
|
|
8009be0: 4618 mov r0, r3
|
|
8009be2: 3710 adds r7, #16
|
|
8009be4: 46bd mov sp, r7
|
|
8009be6: bd80 pop {r7, pc}
|
|
|
|
08009be8 <USBH_OpenPipe>:
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_OpenPipe(USBH_HandleTypeDef *phost, uint8_t pipe_num,
|
|
uint8_t epnum, uint8_t dev_address,
|
|
uint8_t speed, uint8_t ep_type, uint16_t mps)
|
|
{
|
|
8009be8: b580 push {r7, lr}
|
|
8009bea: b086 sub sp, #24
|
|
8009bec: af04 add r7, sp, #16
|
|
8009bee: 6078 str r0, [r7, #4]
|
|
8009bf0: 4608 mov r0, r1
|
|
8009bf2: 4611 mov r1, r2
|
|
8009bf4: 461a mov r2, r3
|
|
8009bf6: 4603 mov r3, r0
|
|
8009bf8: 70fb strb r3, [r7, #3]
|
|
8009bfa: 460b mov r3, r1
|
|
8009bfc: 70bb strb r3, [r7, #2]
|
|
8009bfe: 4613 mov r3, r2
|
|
8009c00: 707b strb r3, [r7, #1]
|
|
USBH_LL_OpenPipe(phost, pipe_num, epnum, dev_address, speed, ep_type, mps);
|
|
8009c02: 7878 ldrb r0, [r7, #1]
|
|
8009c04: 78ba ldrb r2, [r7, #2]
|
|
8009c06: 78f9 ldrb r1, [r7, #3]
|
|
8009c08: 8b3b ldrh r3, [r7, #24]
|
|
8009c0a: 9302 str r3, [sp, #8]
|
|
8009c0c: 7d3b ldrb r3, [r7, #20]
|
|
8009c0e: 9301 str r3, [sp, #4]
|
|
8009c10: 7c3b ldrb r3, [r7, #16]
|
|
8009c12: 9300 str r3, [sp, #0]
|
|
8009c14: 4603 mov r3, r0
|
|
8009c16: 6878 ldr r0, [r7, #4]
|
|
8009c18: f000 fa51 bl 800a0be <USBH_LL_OpenPipe>
|
|
|
|
return USBH_OK;
|
|
8009c1c: 2300 movs r3, #0
|
|
}
|
|
8009c1e: 4618 mov r0, r3
|
|
8009c20: 3708 adds r7, #8
|
|
8009c22: 46bd mov sp, r7
|
|
8009c24: bd80 pop {r7, pc}
|
|
|
|
08009c26 <USBH_ClosePipe>:
|
|
* @param phost: Host Handle
|
|
* @param pipe_num: Pipe Number
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_ClosePipe(USBH_HandleTypeDef *phost, uint8_t pipe_num)
|
|
{
|
|
8009c26: b580 push {r7, lr}
|
|
8009c28: b082 sub sp, #8
|
|
8009c2a: af00 add r7, sp, #0
|
|
8009c2c: 6078 str r0, [r7, #4]
|
|
8009c2e: 460b mov r3, r1
|
|
8009c30: 70fb strb r3, [r7, #3]
|
|
USBH_LL_ClosePipe(phost, pipe_num);
|
|
8009c32: 78fb ldrb r3, [r7, #3]
|
|
8009c34: 4619 mov r1, r3
|
|
8009c36: 6878 ldr r0, [r7, #4]
|
|
8009c38: f000 fa70 bl 800a11c <USBH_LL_ClosePipe>
|
|
|
|
return USBH_OK;
|
|
8009c3c: 2300 movs r3, #0
|
|
}
|
|
8009c3e: 4618 mov r0, r3
|
|
8009c40: 3708 adds r7, #8
|
|
8009c42: 46bd mov sp, r7
|
|
8009c44: bd80 pop {r7, pc}
|
|
|
|
08009c46 <USBH_AllocPipe>:
|
|
* @param phost: Host Handle
|
|
* @param ep_addr: End point for which the Pipe to be allocated
|
|
* @retval Pipe number
|
|
*/
|
|
uint8_t USBH_AllocPipe(USBH_HandleTypeDef *phost, uint8_t ep_addr)
|
|
{
|
|
8009c46: b580 push {r7, lr}
|
|
8009c48: b084 sub sp, #16
|
|
8009c4a: af00 add r7, sp, #0
|
|
8009c4c: 6078 str r0, [r7, #4]
|
|
8009c4e: 460b mov r3, r1
|
|
8009c50: 70fb strb r3, [r7, #3]
|
|
uint16_t pipe;
|
|
|
|
pipe = USBH_GetFreePipe(phost);
|
|
8009c52: 6878 ldr r0, [r7, #4]
|
|
8009c54: f000 f836 bl 8009cc4 <USBH_GetFreePipe>
|
|
8009c58: 4603 mov r3, r0
|
|
8009c5a: 81fb strh r3, [r7, #14]
|
|
|
|
if (pipe != 0xFFFFU)
|
|
8009c5c: 89fb ldrh r3, [r7, #14]
|
|
8009c5e: f64f 72ff movw r2, #65535 ; 0xffff
|
|
8009c62: 4293 cmp r3, r2
|
|
8009c64: d00a beq.n 8009c7c <USBH_AllocPipe+0x36>
|
|
{
|
|
phost->Pipes[pipe & 0xFU] = 0x8000U | ep_addr;
|
|
8009c66: 78fa ldrb r2, [r7, #3]
|
|
8009c68: 89fb ldrh r3, [r7, #14]
|
|
8009c6a: f003 030f and.w r3, r3, #15
|
|
8009c6e: f442 4200 orr.w r2, r2, #32768 ; 0x8000
|
|
8009c72: 6879 ldr r1, [r7, #4]
|
|
8009c74: 33e0 adds r3, #224 ; 0xe0
|
|
8009c76: 009b lsls r3, r3, #2
|
|
8009c78: 440b add r3, r1
|
|
8009c7a: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
return (uint8_t)pipe;
|
|
8009c7c: 89fb ldrh r3, [r7, #14]
|
|
8009c7e: b2db uxtb r3, r3
|
|
}
|
|
8009c80: 4618 mov r0, r3
|
|
8009c82: 3710 adds r7, #16
|
|
8009c84: 46bd mov sp, r7
|
|
8009c86: bd80 pop {r7, pc}
|
|
|
|
08009c88 <USBH_FreePipe>:
|
|
* @param phost: Host Handle
|
|
* @param idx: Pipe number to be freed
|
|
* @retval USBH Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_FreePipe(USBH_HandleTypeDef *phost, uint8_t idx)
|
|
{
|
|
8009c88: b480 push {r7}
|
|
8009c8a: b083 sub sp, #12
|
|
8009c8c: af00 add r7, sp, #0
|
|
8009c8e: 6078 str r0, [r7, #4]
|
|
8009c90: 460b mov r3, r1
|
|
8009c92: 70fb strb r3, [r7, #3]
|
|
if (idx < 11U)
|
|
8009c94: 78fb ldrb r3, [r7, #3]
|
|
8009c96: 2b0a cmp r3, #10
|
|
8009c98: d80d bhi.n 8009cb6 <USBH_FreePipe+0x2e>
|
|
{
|
|
phost->Pipes[idx] &= 0x7FFFU;
|
|
8009c9a: 78fb ldrb r3, [r7, #3]
|
|
8009c9c: 687a ldr r2, [r7, #4]
|
|
8009c9e: 33e0 adds r3, #224 ; 0xe0
|
|
8009ca0: 009b lsls r3, r3, #2
|
|
8009ca2: 4413 add r3, r2
|
|
8009ca4: 685a ldr r2, [r3, #4]
|
|
8009ca6: 78fb ldrb r3, [r7, #3]
|
|
8009ca8: f3c2 020e ubfx r2, r2, #0, #15
|
|
8009cac: 6879 ldr r1, [r7, #4]
|
|
8009cae: 33e0 adds r3, #224 ; 0xe0
|
|
8009cb0: 009b lsls r3, r3, #2
|
|
8009cb2: 440b add r3, r1
|
|
8009cb4: 605a str r2, [r3, #4]
|
|
}
|
|
|
|
return USBH_OK;
|
|
8009cb6: 2300 movs r3, #0
|
|
}
|
|
8009cb8: 4618 mov r0, r3
|
|
8009cba: 370c adds r7, #12
|
|
8009cbc: 46bd mov sp, r7
|
|
8009cbe: f85d 7b04 ldr.w r7, [sp], #4
|
|
8009cc2: 4770 bx lr
|
|
|
|
08009cc4 <USBH_GetFreePipe>:
|
|
* @param phost: Host Handle
|
|
* Get a free Pipe number for allocation to a device endpoint
|
|
* @retval idx: Free Pipe number
|
|
*/
|
|
static uint16_t USBH_GetFreePipe(USBH_HandleTypeDef *phost)
|
|
{
|
|
8009cc4: b480 push {r7}
|
|
8009cc6: b085 sub sp, #20
|
|
8009cc8: af00 add r7, sp, #0
|
|
8009cca: 6078 str r0, [r7, #4]
|
|
uint8_t idx = 0U;
|
|
8009ccc: 2300 movs r3, #0
|
|
8009cce: 73fb strb r3, [r7, #15]
|
|
|
|
for (idx = 0U ; idx < 11U ; idx++)
|
|
8009cd0: 2300 movs r3, #0
|
|
8009cd2: 73fb strb r3, [r7, #15]
|
|
8009cd4: e00f b.n 8009cf6 <USBH_GetFreePipe+0x32>
|
|
{
|
|
if ((phost->Pipes[idx] & 0x8000U) == 0U)
|
|
8009cd6: 7bfb ldrb r3, [r7, #15]
|
|
8009cd8: 687a ldr r2, [r7, #4]
|
|
8009cda: 33e0 adds r3, #224 ; 0xe0
|
|
8009cdc: 009b lsls r3, r3, #2
|
|
8009cde: 4413 add r3, r2
|
|
8009ce0: 685b ldr r3, [r3, #4]
|
|
8009ce2: f403 4300 and.w r3, r3, #32768 ; 0x8000
|
|
8009ce6: 2b00 cmp r3, #0
|
|
8009ce8: d102 bne.n 8009cf0 <USBH_GetFreePipe+0x2c>
|
|
{
|
|
return (uint16_t)idx;
|
|
8009cea: 7bfb ldrb r3, [r7, #15]
|
|
8009cec: b29b uxth r3, r3
|
|
8009cee: e007 b.n 8009d00 <USBH_GetFreePipe+0x3c>
|
|
for (idx = 0U ; idx < 11U ; idx++)
|
|
8009cf0: 7bfb ldrb r3, [r7, #15]
|
|
8009cf2: 3301 adds r3, #1
|
|
8009cf4: 73fb strb r3, [r7, #15]
|
|
8009cf6: 7bfb ldrb r3, [r7, #15]
|
|
8009cf8: 2b0a cmp r3, #10
|
|
8009cfa: d9ec bls.n 8009cd6 <USBH_GetFreePipe+0x12>
|
|
}
|
|
}
|
|
|
|
return 0xFFFFU;
|
|
8009cfc: f64f 73ff movw r3, #65535 ; 0xffff
|
|
}
|
|
8009d00: 4618 mov r0, r3
|
|
8009d02: 3714 adds r7, #20
|
|
8009d04: 46bd mov sp, r7
|
|
8009d06: f85d 7b04 ldr.w r7, [sp], #4
|
|
8009d0a: 4770 bx lr
|
|
|
|
08009d0c <MX_USB_HOST_Init>:
|
|
/**
|
|
* Init USB host library, add supported class and start the library
|
|
* @retval None
|
|
*/
|
|
void MX_USB_HOST_Init(void)
|
|
{
|
|
8009d0c: b580 push {r7, lr}
|
|
8009d0e: af00 add r7, sp, #0
|
|
/* USER CODE BEGIN USB_HOST_Init_PreTreatment */
|
|
|
|
/* USER CODE END USB_HOST_Init_PreTreatment */
|
|
|
|
/* Init host Library, add supported class and start the library. */
|
|
if (USBH_Init(&hUsbHostFS, USBH_UserProcess, HOST_FS) != USBH_OK)
|
|
8009d10: 2201 movs r2, #1
|
|
8009d12: 490e ldr r1, [pc, #56] ; (8009d4c <MX_USB_HOST_Init+0x40>)
|
|
8009d14: 480e ldr r0, [pc, #56] ; (8009d50 <MX_USB_HOST_Init+0x44>)
|
|
8009d16: f7fe fc9f bl 8008658 <USBH_Init>
|
|
8009d1a: 4603 mov r3, r0
|
|
8009d1c: 2b00 cmp r3, #0
|
|
8009d1e: d001 beq.n 8009d24 <MX_USB_HOST_Init+0x18>
|
|
{
|
|
Error_Handler();
|
|
8009d20: f7f7 fcba bl 8001698 <Error_Handler>
|
|
}
|
|
if (USBH_RegisterClass(&hUsbHostFS, USBH_CDC_CLASS) != USBH_OK)
|
|
8009d24: 490b ldr r1, [pc, #44] ; (8009d54 <MX_USB_HOST_Init+0x48>)
|
|
8009d26: 480a ldr r0, [pc, #40] ; (8009d50 <MX_USB_HOST_Init+0x44>)
|
|
8009d28: f7fe fd24 bl 8008774 <USBH_RegisterClass>
|
|
8009d2c: 4603 mov r3, r0
|
|
8009d2e: 2b00 cmp r3, #0
|
|
8009d30: d001 beq.n 8009d36 <MX_USB_HOST_Init+0x2a>
|
|
{
|
|
Error_Handler();
|
|
8009d32: f7f7 fcb1 bl 8001698 <Error_Handler>
|
|
}
|
|
if (USBH_Start(&hUsbHostFS) != USBH_OK)
|
|
8009d36: 4806 ldr r0, [pc, #24] ; (8009d50 <MX_USB_HOST_Init+0x44>)
|
|
8009d38: f7fe fda8 bl 800888c <USBH_Start>
|
|
8009d3c: 4603 mov r3, r0
|
|
8009d3e: 2b00 cmp r3, #0
|
|
8009d40: d001 beq.n 8009d46 <MX_USB_HOST_Init+0x3a>
|
|
{
|
|
Error_Handler();
|
|
8009d42: f7f7 fca9 bl 8001698 <Error_Handler>
|
|
}
|
|
/* USER CODE BEGIN USB_HOST_Init_PostTreatment */
|
|
|
|
/* USER CODE END USB_HOST_Init_PostTreatment */
|
|
}
|
|
8009d46: bf00 nop
|
|
8009d48: bd80 pop {r7, pc}
|
|
8009d4a: bf00 nop
|
|
8009d4c: 08009d6d .word 0x08009d6d
|
|
8009d50: 20000414 .word 0x20000414
|
|
8009d54: 2000000c .word 0x2000000c
|
|
|
|
08009d58 <MX_USB_HOST_Process>:
|
|
|
|
/*
|
|
* Background task
|
|
*/
|
|
void MX_USB_HOST_Process(void)
|
|
{
|
|
8009d58: b580 push {r7, lr}
|
|
8009d5a: af00 add r7, sp, #0
|
|
/* USB Host Background task */
|
|
USBH_Process(&hUsbHostFS);
|
|
8009d5c: 4802 ldr r0, [pc, #8] ; (8009d68 <MX_USB_HOST_Process+0x10>)
|
|
8009d5e: f7fe fda5 bl 80088ac <USBH_Process>
|
|
}
|
|
8009d62: bf00 nop
|
|
8009d64: bd80 pop {r7, pc}
|
|
8009d66: bf00 nop
|
|
8009d68: 20000414 .word 0x20000414
|
|
|
|
08009d6c <USBH_UserProcess>:
|
|
/*
|
|
* user callback definition
|
|
*/
|
|
static void USBH_UserProcess (USBH_HandleTypeDef *phost, uint8_t id)
|
|
{
|
|
8009d6c: b480 push {r7}
|
|
8009d6e: b083 sub sp, #12
|
|
8009d70: af00 add r7, sp, #0
|
|
8009d72: 6078 str r0, [r7, #4]
|
|
8009d74: 460b mov r3, r1
|
|
8009d76: 70fb strb r3, [r7, #3]
|
|
/* USER CODE BEGIN CALL_BACK_1 */
|
|
switch(id)
|
|
8009d78: 78fb ldrb r3, [r7, #3]
|
|
8009d7a: 3b01 subs r3, #1
|
|
8009d7c: 2b04 cmp r3, #4
|
|
8009d7e: d819 bhi.n 8009db4 <USBH_UserProcess+0x48>
|
|
8009d80: a201 add r2, pc, #4 ; (adr r2, 8009d88 <USBH_UserProcess+0x1c>)
|
|
8009d82: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
8009d86: bf00 nop
|
|
8009d88: 08009db5 .word 0x08009db5
|
|
8009d8c: 08009da5 .word 0x08009da5
|
|
8009d90: 08009db5 .word 0x08009db5
|
|
8009d94: 08009dad .word 0x08009dad
|
|
8009d98: 08009d9d .word 0x08009d9d
|
|
{
|
|
case HOST_USER_SELECT_CONFIGURATION:
|
|
break;
|
|
|
|
case HOST_USER_DISCONNECTION:
|
|
Appli_state = APPLICATION_DISCONNECT;
|
|
8009d9c: 4b09 ldr r3, [pc, #36] ; (8009dc4 <USBH_UserProcess+0x58>)
|
|
8009d9e: 2203 movs r2, #3
|
|
8009da0: 701a strb r2, [r3, #0]
|
|
break;
|
|
8009da2: e008 b.n 8009db6 <USBH_UserProcess+0x4a>
|
|
|
|
case HOST_USER_CLASS_ACTIVE:
|
|
Appli_state = APPLICATION_READY;
|
|
8009da4: 4b07 ldr r3, [pc, #28] ; (8009dc4 <USBH_UserProcess+0x58>)
|
|
8009da6: 2202 movs r2, #2
|
|
8009da8: 701a strb r2, [r3, #0]
|
|
break;
|
|
8009daa: e004 b.n 8009db6 <USBH_UserProcess+0x4a>
|
|
|
|
case HOST_USER_CONNECTION:
|
|
Appli_state = APPLICATION_START;
|
|
8009dac: 4b05 ldr r3, [pc, #20] ; (8009dc4 <USBH_UserProcess+0x58>)
|
|
8009dae: 2201 movs r2, #1
|
|
8009db0: 701a strb r2, [r3, #0]
|
|
break;
|
|
8009db2: e000 b.n 8009db6 <USBH_UserProcess+0x4a>
|
|
|
|
default:
|
|
break;
|
|
8009db4: bf00 nop
|
|
}
|
|
/* USER CODE END CALL_BACK_1 */
|
|
}
|
|
8009db6: bf00 nop
|
|
8009db8: 370c adds r7, #12
|
|
8009dba: 46bd mov sp, r7
|
|
8009dbc: f85d 7b04 ldr.w r7, [sp], #4
|
|
8009dc0: 4770 bx lr
|
|
8009dc2: bf00 nop
|
|
8009dc4: 20000230 .word 0x20000230
|
|
|
|
08009dc8 <HAL_HCD_MspInit>:
|
|
LL Driver Callbacks (HCD -> USB Host Library)
|
|
*******************************************************************************/
|
|
/* MSP Init */
|
|
|
|
void HAL_HCD_MspInit(HCD_HandleTypeDef* hcdHandle)
|
|
{
|
|
8009dc8: b580 push {r7, lr}
|
|
8009dca: b08a sub sp, #40 ; 0x28
|
|
8009dcc: af00 add r7, sp, #0
|
|
8009dce: 6078 str r0, [r7, #4]
|
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
|
8009dd0: f107 0314 add.w r3, r7, #20
|
|
8009dd4: 2200 movs r2, #0
|
|
8009dd6: 601a str r2, [r3, #0]
|
|
8009dd8: 605a str r2, [r3, #4]
|
|
8009dda: 609a str r2, [r3, #8]
|
|
8009ddc: 60da str r2, [r3, #12]
|
|
8009dde: 611a str r2, [r3, #16]
|
|
if(hcdHandle->Instance==USB_OTG_FS)
|
|
8009de0: 687b ldr r3, [r7, #4]
|
|
8009de2: 681b ldr r3, [r3, #0]
|
|
8009de4: f1b3 4fa0 cmp.w r3, #1342177280 ; 0x50000000
|
|
8009de8: d147 bne.n 8009e7a <HAL_HCD_MspInit+0xb2>
|
|
{
|
|
/* USER CODE BEGIN USB_OTG_FS_MspInit 0 */
|
|
|
|
/* USER CODE END USB_OTG_FS_MspInit 0 */
|
|
|
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
|
8009dea: 2300 movs r3, #0
|
|
8009dec: 613b str r3, [r7, #16]
|
|
8009dee: 4b25 ldr r3, [pc, #148] ; (8009e84 <HAL_HCD_MspInit+0xbc>)
|
|
8009df0: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8009df2: 4a24 ldr r2, [pc, #144] ; (8009e84 <HAL_HCD_MspInit+0xbc>)
|
|
8009df4: f043 0301 orr.w r3, r3, #1
|
|
8009df8: 6313 str r3, [r2, #48] ; 0x30
|
|
8009dfa: 4b22 ldr r3, [pc, #136] ; (8009e84 <HAL_HCD_MspInit+0xbc>)
|
|
8009dfc: 6b1b ldr r3, [r3, #48] ; 0x30
|
|
8009dfe: f003 0301 and.w r3, r3, #1
|
|
8009e02: 613b str r3, [r7, #16]
|
|
8009e04: 693b ldr r3, [r7, #16]
|
|
PA9 ------> USB_OTG_FS_VBUS
|
|
PA10 ------> USB_OTG_FS_ID
|
|
PA11 ------> USB_OTG_FS_DM
|
|
PA12 ------> USB_OTG_FS_DP
|
|
*/
|
|
GPIO_InitStruct.Pin = VBUS_FS_Pin;
|
|
8009e06: f44f 7300 mov.w r3, #512 ; 0x200
|
|
8009e0a: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
|
8009e0c: 2300 movs r3, #0
|
|
8009e0e: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
8009e10: 2300 movs r3, #0
|
|
8009e12: 61fb str r3, [r7, #28]
|
|
HAL_GPIO_Init(VBUS_FS_GPIO_Port, &GPIO_InitStruct);
|
|
8009e14: f107 0314 add.w r3, r7, #20
|
|
8009e18: 4619 mov r1, r3
|
|
8009e1a: 481b ldr r0, [pc, #108] ; (8009e88 <HAL_HCD_MspInit+0xc0>)
|
|
8009e1c: f7f8 fbbe bl 800259c <HAL_GPIO_Init>
|
|
|
|
GPIO_InitStruct.Pin = OTG_FS_ID_Pin|OTG_FS_DM_Pin|OTG_FS_DP_Pin;
|
|
8009e20: f44f 53e0 mov.w r3, #7168 ; 0x1c00
|
|
8009e24: 617b str r3, [r7, #20]
|
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
|
8009e26: 2302 movs r3, #2
|
|
8009e28: 61bb str r3, [r7, #24]
|
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
|
8009e2a: 2300 movs r3, #0
|
|
8009e2c: 61fb str r3, [r7, #28]
|
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
|
8009e2e: 2303 movs r3, #3
|
|
8009e30: 623b str r3, [r7, #32]
|
|
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
|
|
8009e32: 230a movs r3, #10
|
|
8009e34: 627b str r3, [r7, #36] ; 0x24
|
|
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
|
8009e36: f107 0314 add.w r3, r7, #20
|
|
8009e3a: 4619 mov r1, r3
|
|
8009e3c: 4812 ldr r0, [pc, #72] ; (8009e88 <HAL_HCD_MspInit+0xc0>)
|
|
8009e3e: f7f8 fbad bl 800259c <HAL_GPIO_Init>
|
|
|
|
/* Peripheral clock enable */
|
|
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
|
8009e42: 4b10 ldr r3, [pc, #64] ; (8009e84 <HAL_HCD_MspInit+0xbc>)
|
|
8009e44: 6b5b ldr r3, [r3, #52] ; 0x34
|
|
8009e46: 4a0f ldr r2, [pc, #60] ; (8009e84 <HAL_HCD_MspInit+0xbc>)
|
|
8009e48: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
8009e4c: 6353 str r3, [r2, #52] ; 0x34
|
|
8009e4e: 2300 movs r3, #0
|
|
8009e50: 60fb str r3, [r7, #12]
|
|
8009e52: 4b0c ldr r3, [pc, #48] ; (8009e84 <HAL_HCD_MspInit+0xbc>)
|
|
8009e54: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8009e56: 4a0b ldr r2, [pc, #44] ; (8009e84 <HAL_HCD_MspInit+0xbc>)
|
|
8009e58: f443 4380 orr.w r3, r3, #16384 ; 0x4000
|
|
8009e5c: 6453 str r3, [r2, #68] ; 0x44
|
|
8009e5e: 4b09 ldr r3, [pc, #36] ; (8009e84 <HAL_HCD_MspInit+0xbc>)
|
|
8009e60: 6c5b ldr r3, [r3, #68] ; 0x44
|
|
8009e62: f403 4380 and.w r3, r3, #16384 ; 0x4000
|
|
8009e66: 60fb str r3, [r7, #12]
|
|
8009e68: 68fb ldr r3, [r7, #12]
|
|
|
|
/* Peripheral interrupt init */
|
|
HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0);
|
|
8009e6a: 2200 movs r2, #0
|
|
8009e6c: 2100 movs r1, #0
|
|
8009e6e: 2043 movs r0, #67 ; 0x43
|
|
8009e70: f7f8 fb5d bl 800252e <HAL_NVIC_SetPriority>
|
|
HAL_NVIC_EnableIRQ(OTG_FS_IRQn);
|
|
8009e74: 2043 movs r0, #67 ; 0x43
|
|
8009e76: f7f8 fb76 bl 8002566 <HAL_NVIC_EnableIRQ>
|
|
/* USER CODE BEGIN USB_OTG_FS_MspInit 1 */
|
|
|
|
/* USER CODE END USB_OTG_FS_MspInit 1 */
|
|
}
|
|
}
|
|
8009e7a: bf00 nop
|
|
8009e7c: 3728 adds r7, #40 ; 0x28
|
|
8009e7e: 46bd mov sp, r7
|
|
8009e80: bd80 pop {r7, pc}
|
|
8009e82: bf00 nop
|
|
8009e84: 40023800 .word 0x40023800
|
|
8009e88: 40020000 .word 0x40020000
|
|
|
|
08009e8c <HAL_HCD_SOF_Callback>:
|
|
* @brief SOF callback.
|
|
* @param hhcd: HCD handle
|
|
* @retval None
|
|
*/
|
|
void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8009e8c: b580 push {r7, lr}
|
|
8009e8e: b082 sub sp, #8
|
|
8009e90: af00 add r7, sp, #0
|
|
8009e92: 6078 str r0, [r7, #4]
|
|
USBH_LL_IncTimer(hhcd->pData);
|
|
8009e94: 687b ldr r3, [r7, #4]
|
|
8009e96: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
8009e9a: 4618 mov r0, r3
|
|
8009e9c: f7ff f8d9 bl 8009052 <USBH_LL_IncTimer>
|
|
}
|
|
8009ea0: bf00 nop
|
|
8009ea2: 3708 adds r7, #8
|
|
8009ea4: 46bd mov sp, r7
|
|
8009ea6: bd80 pop {r7, pc}
|
|
|
|
08009ea8 <HAL_HCD_Connect_Callback>:
|
|
* @brief SOF callback.
|
|
* @param hhcd: HCD handle
|
|
* @retval None
|
|
*/
|
|
void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8009ea8: b580 push {r7, lr}
|
|
8009eaa: b082 sub sp, #8
|
|
8009eac: af00 add r7, sp, #0
|
|
8009eae: 6078 str r0, [r7, #4]
|
|
USBH_LL_Connect(hhcd->pData);
|
|
8009eb0: 687b ldr r3, [r7, #4]
|
|
8009eb2: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
8009eb6: 4618 mov r0, r3
|
|
8009eb8: f7ff f911 bl 80090de <USBH_LL_Connect>
|
|
}
|
|
8009ebc: bf00 nop
|
|
8009ebe: 3708 adds r7, #8
|
|
8009ec0: 46bd mov sp, r7
|
|
8009ec2: bd80 pop {r7, pc}
|
|
|
|
08009ec4 <HAL_HCD_Disconnect_Callback>:
|
|
* @brief SOF callback.
|
|
* @param hhcd: HCD handle
|
|
* @retval None
|
|
*/
|
|
void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8009ec4: b580 push {r7, lr}
|
|
8009ec6: b082 sub sp, #8
|
|
8009ec8: af00 add r7, sp, #0
|
|
8009eca: 6078 str r0, [r7, #4]
|
|
USBH_LL_Disconnect(hhcd->pData);
|
|
8009ecc: 687b ldr r3, [r7, #4]
|
|
8009ece: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
8009ed2: 4618 mov r0, r3
|
|
8009ed4: f7ff f91a bl 800910c <USBH_LL_Disconnect>
|
|
}
|
|
8009ed8: bf00 nop
|
|
8009eda: 3708 adds r7, #8
|
|
8009edc: 46bd mov sp, r7
|
|
8009ede: bd80 pop {r7, pc}
|
|
|
|
08009ee0 <HAL_HCD_HC_NotifyURBChange_Callback>:
|
|
* @param chnum: channel number
|
|
* @param urb_state: state
|
|
* @retval None
|
|
*/
|
|
void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum, HCD_URBStateTypeDef urb_state)
|
|
{
|
|
8009ee0: b480 push {r7}
|
|
8009ee2: b083 sub sp, #12
|
|
8009ee4: af00 add r7, sp, #0
|
|
8009ee6: 6078 str r0, [r7, #4]
|
|
8009ee8: 460b mov r3, r1
|
|
8009eea: 70fb strb r3, [r7, #3]
|
|
8009eec: 4613 mov r3, r2
|
|
8009eee: 70bb strb r3, [r7, #2]
|
|
/* To be used with OS to sync URB state with the global state machine */
|
|
#if (USBH_USE_OS == 1)
|
|
USBH_LL_NotifyURBChange(hhcd->pData);
|
|
#endif
|
|
}
|
|
8009ef0: bf00 nop
|
|
8009ef2: 370c adds r7, #12
|
|
8009ef4: 46bd mov sp, r7
|
|
8009ef6: f85d 7b04 ldr.w r7, [sp], #4
|
|
8009efa: 4770 bx lr
|
|
|
|
08009efc <HAL_HCD_PortEnabled_Callback>:
|
|
* @brief Port Port Enabled callback.
|
|
* @param hhcd: HCD handle
|
|
* @retval None
|
|
*/
|
|
void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8009efc: b580 push {r7, lr}
|
|
8009efe: b082 sub sp, #8
|
|
8009f00: af00 add r7, sp, #0
|
|
8009f02: 6078 str r0, [r7, #4]
|
|
USBH_LL_PortEnabled(hhcd->pData);
|
|
8009f04: 687b ldr r3, [r7, #4]
|
|
8009f06: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
8009f0a: 4618 mov r0, r3
|
|
8009f0c: f7ff f8cb bl 80090a6 <USBH_LL_PortEnabled>
|
|
}
|
|
8009f10: bf00 nop
|
|
8009f12: 3708 adds r7, #8
|
|
8009f14: 46bd mov sp, r7
|
|
8009f16: bd80 pop {r7, pc}
|
|
|
|
08009f18 <HAL_HCD_PortDisabled_Callback>:
|
|
* @brief Port Port Disabled callback.
|
|
* @param hhcd: HCD handle
|
|
* @retval None
|
|
*/
|
|
void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd)
|
|
{
|
|
8009f18: b580 push {r7, lr}
|
|
8009f1a: b082 sub sp, #8
|
|
8009f1c: af00 add r7, sp, #0
|
|
8009f1e: 6078 str r0, [r7, #4]
|
|
USBH_LL_PortDisabled(hhcd->pData);
|
|
8009f20: 687b ldr r3, [r7, #4]
|
|
8009f22: f8d3 32c0 ldr.w r3, [r3, #704] ; 0x2c0
|
|
8009f26: 4618 mov r0, r3
|
|
8009f28: f7ff f8cb bl 80090c2 <USBH_LL_PortDisabled>
|
|
}
|
|
8009f2c: bf00 nop
|
|
8009f2e: 3708 adds r7, #8
|
|
8009f30: 46bd mov sp, r7
|
|
8009f32: bd80 pop {r7, pc}
|
|
|
|
08009f34 <USBH_LL_Init>:
|
|
* @brief Initialize the low level portion of the host driver.
|
|
* @param phost: Host handle
|
|
* @retval USBH status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_Init(USBH_HandleTypeDef *phost)
|
|
{
|
|
8009f34: b580 push {r7, lr}
|
|
8009f36: b082 sub sp, #8
|
|
8009f38: af00 add r7, sp, #0
|
|
8009f3a: 6078 str r0, [r7, #4]
|
|
/* Init USB_IP */
|
|
if (phost->id == HOST_FS) {
|
|
8009f3c: 687b ldr r3, [r7, #4]
|
|
8009f3e: f893 33cc ldrb.w r3, [r3, #972] ; 0x3cc
|
|
8009f42: 2b01 cmp r3, #1
|
|
8009f44: d12a bne.n 8009f9c <USBH_LL_Init+0x68>
|
|
/* Link the driver to the stack. */
|
|
hhcd_USB_OTG_FS.pData = phost;
|
|
8009f46: 4a18 ldr r2, [pc, #96] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f48: 687b ldr r3, [r7, #4]
|
|
8009f4a: f8c2 32c0 str.w r3, [r2, #704] ; 0x2c0
|
|
phost->pData = &hhcd_USB_OTG_FS;
|
|
8009f4e: 687b ldr r3, [r7, #4]
|
|
8009f50: 4a15 ldr r2, [pc, #84] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f52: f8c3 23d0 str.w r2, [r3, #976] ; 0x3d0
|
|
|
|
hhcd_USB_OTG_FS.Instance = USB_OTG_FS;
|
|
8009f56: 4b14 ldr r3, [pc, #80] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f58: f04f 42a0 mov.w r2, #1342177280 ; 0x50000000
|
|
8009f5c: 601a str r2, [r3, #0]
|
|
hhcd_USB_OTG_FS.Init.Host_channels = 8;
|
|
8009f5e: 4b12 ldr r3, [pc, #72] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f60: 2208 movs r2, #8
|
|
8009f62: 609a str r2, [r3, #8]
|
|
hhcd_USB_OTG_FS.Init.speed = HCD_SPEED_FULL;
|
|
8009f64: 4b10 ldr r3, [pc, #64] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f66: 2201 movs r2, #1
|
|
8009f68: 60da str r2, [r3, #12]
|
|
hhcd_USB_OTG_FS.Init.dma_enable = DISABLE;
|
|
8009f6a: 4b0f ldr r3, [pc, #60] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f6c: 2200 movs r2, #0
|
|
8009f6e: 611a str r2, [r3, #16]
|
|
hhcd_USB_OTG_FS.Init.phy_itface = HCD_PHY_EMBEDDED;
|
|
8009f70: 4b0d ldr r3, [pc, #52] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f72: 2202 movs r2, #2
|
|
8009f74: 619a str r2, [r3, #24]
|
|
hhcd_USB_OTG_FS.Init.Sof_enable = DISABLE;
|
|
8009f76: 4b0c ldr r3, [pc, #48] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f78: 2200 movs r2, #0
|
|
8009f7a: 61da str r2, [r3, #28]
|
|
if (HAL_HCD_Init(&hhcd_USB_OTG_FS) != HAL_OK)
|
|
8009f7c: 480a ldr r0, [pc, #40] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f7e: f7f8 fca8 bl 80028d2 <HAL_HCD_Init>
|
|
8009f82: 4603 mov r3, r0
|
|
8009f84: 2b00 cmp r3, #0
|
|
8009f86: d001 beq.n 8009f8c <USBH_LL_Init+0x58>
|
|
{
|
|
Error_Handler( );
|
|
8009f88: f7f7 fb86 bl 8001698 <Error_Handler>
|
|
}
|
|
|
|
USBH_LL_SetTimer(phost, HAL_HCD_GetCurrentFrame(&hhcd_USB_OTG_FS));
|
|
8009f8c: 4806 ldr r0, [pc, #24] ; (8009fa8 <USBH_LL_Init+0x74>)
|
|
8009f8e: f7f9 f8ab bl 80030e8 <HAL_HCD_GetCurrentFrame>
|
|
8009f92: 4603 mov r3, r0
|
|
8009f94: 4619 mov r1, r3
|
|
8009f96: 6878 ldr r0, [r7, #4]
|
|
8009f98: f7ff f84c bl 8009034 <USBH_LL_SetTimer>
|
|
}
|
|
return USBH_OK;
|
|
8009f9c: 2300 movs r3, #0
|
|
}
|
|
8009f9e: 4618 mov r0, r3
|
|
8009fa0: 3708 adds r7, #8
|
|
8009fa2: 46bd mov sp, r7
|
|
8009fa4: bd80 pop {r7, pc}
|
|
8009fa6: bf00 nop
|
|
8009fa8: 200007ec .word 0x200007ec
|
|
|
|
08009fac <USBH_LL_Start>:
|
|
* @brief Start the low level portion of the host driver.
|
|
* @param phost: Host handle
|
|
* @retval USBH status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_Start(USBH_HandleTypeDef *phost)
|
|
{
|
|
8009fac: b580 push {r7, lr}
|
|
8009fae: b084 sub sp, #16
|
|
8009fb0: af00 add r7, sp, #0
|
|
8009fb2: 6078 str r0, [r7, #4]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
8009fb4: 2300 movs r3, #0
|
|
8009fb6: 73fb strb r3, [r7, #15]
|
|
USBH_StatusTypeDef usb_status = USBH_OK;
|
|
8009fb8: 2300 movs r3, #0
|
|
8009fba: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_HCD_Start(phost->pData);
|
|
8009fbc: 687b ldr r3, [r7, #4]
|
|
8009fbe: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
|
|
8009fc2: 4618 mov r0, r3
|
|
8009fc4: f7f9 f818 bl 8002ff8 <HAL_HCD_Start>
|
|
8009fc8: 4603 mov r3, r0
|
|
8009fca: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBH_Get_USB_Status(hal_status);
|
|
8009fcc: 7bfb ldrb r3, [r7, #15]
|
|
8009fce: 4618 mov r0, r3
|
|
8009fd0: f000 f95c bl 800a28c <USBH_Get_USB_Status>
|
|
8009fd4: 4603 mov r3, r0
|
|
8009fd6: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
8009fd8: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
8009fda: 4618 mov r0, r3
|
|
8009fdc: 3710 adds r7, #16
|
|
8009fde: 46bd mov sp, r7
|
|
8009fe0: bd80 pop {r7, pc}
|
|
|
|
08009fe2 <USBH_LL_Stop>:
|
|
* @brief Stop the low level portion of the host driver.
|
|
* @param phost: Host handle
|
|
* @retval USBH status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_Stop(USBH_HandleTypeDef *phost)
|
|
{
|
|
8009fe2: b580 push {r7, lr}
|
|
8009fe4: b084 sub sp, #16
|
|
8009fe6: af00 add r7, sp, #0
|
|
8009fe8: 6078 str r0, [r7, #4]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
8009fea: 2300 movs r3, #0
|
|
8009fec: 73fb strb r3, [r7, #15]
|
|
USBH_StatusTypeDef usb_status = USBH_OK;
|
|
8009fee: 2300 movs r3, #0
|
|
8009ff0: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_HCD_Stop(phost->pData);
|
|
8009ff2: 687b ldr r3, [r7, #4]
|
|
8009ff4: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
|
|
8009ff8: 4618 mov r0, r3
|
|
8009ffa: f7f9 f820 bl 800303e <HAL_HCD_Stop>
|
|
8009ffe: 4603 mov r3, r0
|
|
800a000: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBH_Get_USB_Status(hal_status);
|
|
800a002: 7bfb ldrb r3, [r7, #15]
|
|
800a004: 4618 mov r0, r3
|
|
800a006: f000 f941 bl 800a28c <USBH_Get_USB_Status>
|
|
800a00a: 4603 mov r3, r0
|
|
800a00c: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a00e: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a010: 4618 mov r0, r3
|
|
800a012: 3710 adds r7, #16
|
|
800a014: 46bd mov sp, r7
|
|
800a016: bd80 pop {r7, pc}
|
|
|
|
0800a018 <USBH_LL_GetSpeed>:
|
|
* @brief Return the USB host speed from the low level driver.
|
|
* @param phost: Host handle
|
|
* @retval USBH speeds
|
|
*/
|
|
USBH_SpeedTypeDef USBH_LL_GetSpeed(USBH_HandleTypeDef *phost)
|
|
{
|
|
800a018: b580 push {r7, lr}
|
|
800a01a: b084 sub sp, #16
|
|
800a01c: af00 add r7, sp, #0
|
|
800a01e: 6078 str r0, [r7, #4]
|
|
USBH_SpeedTypeDef speed = USBH_SPEED_FULL;
|
|
800a020: 2301 movs r3, #1
|
|
800a022: 73fb strb r3, [r7, #15]
|
|
|
|
switch (HAL_HCD_GetCurrentSpeed(phost->pData))
|
|
800a024: 687b ldr r3, [r7, #4]
|
|
800a026: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
|
|
800a02a: 4618 mov r0, r3
|
|
800a02c: f7f9 f86a bl 8003104 <HAL_HCD_GetCurrentSpeed>
|
|
800a030: 4603 mov r3, r0
|
|
800a032: 2b01 cmp r3, #1
|
|
800a034: d007 beq.n 800a046 <USBH_LL_GetSpeed+0x2e>
|
|
800a036: 2b01 cmp r3, #1
|
|
800a038: d302 bcc.n 800a040 <USBH_LL_GetSpeed+0x28>
|
|
800a03a: 2b02 cmp r3, #2
|
|
800a03c: d006 beq.n 800a04c <USBH_LL_GetSpeed+0x34>
|
|
800a03e: e008 b.n 800a052 <USBH_LL_GetSpeed+0x3a>
|
|
{
|
|
case 0 :
|
|
speed = USBH_SPEED_HIGH;
|
|
800a040: 2300 movs r3, #0
|
|
800a042: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a044: e008 b.n 800a058 <USBH_LL_GetSpeed+0x40>
|
|
|
|
case 1 :
|
|
speed = USBH_SPEED_FULL;
|
|
800a046: 2301 movs r3, #1
|
|
800a048: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a04a: e005 b.n 800a058 <USBH_LL_GetSpeed+0x40>
|
|
|
|
case 2 :
|
|
speed = USBH_SPEED_LOW;
|
|
800a04c: 2302 movs r3, #2
|
|
800a04e: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a050: e002 b.n 800a058 <USBH_LL_GetSpeed+0x40>
|
|
|
|
default:
|
|
speed = USBH_SPEED_FULL;
|
|
800a052: 2301 movs r3, #1
|
|
800a054: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a056: bf00 nop
|
|
}
|
|
return speed;
|
|
800a058: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
800a05a: 4618 mov r0, r3
|
|
800a05c: 3710 adds r7, #16
|
|
800a05e: 46bd mov sp, r7
|
|
800a060: bd80 pop {r7, pc}
|
|
|
|
0800a062 <USBH_LL_ResetPort>:
|
|
* @brief Reset the Host port of the low level driver.
|
|
* @param phost: Host handle
|
|
* @retval USBH status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_ResetPort(USBH_HandleTypeDef *phost)
|
|
{
|
|
800a062: b580 push {r7, lr}
|
|
800a064: b084 sub sp, #16
|
|
800a066: af00 add r7, sp, #0
|
|
800a068: 6078 str r0, [r7, #4]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a06a: 2300 movs r3, #0
|
|
800a06c: 73fb strb r3, [r7, #15]
|
|
USBH_StatusTypeDef usb_status = USBH_OK;
|
|
800a06e: 2300 movs r3, #0
|
|
800a070: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_HCD_ResetPort(phost->pData);
|
|
800a072: 687b ldr r3, [r7, #4]
|
|
800a074: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
|
|
800a078: 4618 mov r0, r3
|
|
800a07a: f7f8 fffd bl 8003078 <HAL_HCD_ResetPort>
|
|
800a07e: 4603 mov r3, r0
|
|
800a080: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBH_Get_USB_Status(hal_status);
|
|
800a082: 7bfb ldrb r3, [r7, #15]
|
|
800a084: 4618 mov r0, r3
|
|
800a086: f000 f901 bl 800a28c <USBH_Get_USB_Status>
|
|
800a08a: 4603 mov r3, r0
|
|
800a08c: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a08e: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a090: 4618 mov r0, r3
|
|
800a092: 3710 adds r7, #16
|
|
800a094: 46bd mov sp, r7
|
|
800a096: bd80 pop {r7, pc}
|
|
|
|
0800a098 <USBH_LL_GetLastXferSize>:
|
|
* @param phost: Host handle
|
|
* @param pipe: Pipe index
|
|
* @retval Packet size
|
|
*/
|
|
uint32_t USBH_LL_GetLastXferSize(USBH_HandleTypeDef *phost, uint8_t pipe)
|
|
{
|
|
800a098: b580 push {r7, lr}
|
|
800a09a: b082 sub sp, #8
|
|
800a09c: af00 add r7, sp, #0
|
|
800a09e: 6078 str r0, [r7, #4]
|
|
800a0a0: 460b mov r3, r1
|
|
800a0a2: 70fb strb r3, [r7, #3]
|
|
return HAL_HCD_HC_GetXferCount(phost->pData, pipe);
|
|
800a0a4: 687b ldr r3, [r7, #4]
|
|
800a0a6: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
|
|
800a0aa: 78fa ldrb r2, [r7, #3]
|
|
800a0ac: 4611 mov r1, r2
|
|
800a0ae: 4618 mov r0, r3
|
|
800a0b0: f7f9 f805 bl 80030be <HAL_HCD_HC_GetXferCount>
|
|
800a0b4: 4603 mov r3, r0
|
|
}
|
|
800a0b6: 4618 mov r0, r3
|
|
800a0b8: 3708 adds r7, #8
|
|
800a0ba: 46bd mov sp, r7
|
|
800a0bc: bd80 pop {r7, pc}
|
|
|
|
0800a0be <USBH_LL_OpenPipe>:
|
|
* @param mps: Endpoint max packet size
|
|
* @retval USBH status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_OpenPipe(USBH_HandleTypeDef *phost, uint8_t pipe_num, uint8_t epnum,
|
|
uint8_t dev_address, uint8_t speed, uint8_t ep_type, uint16_t mps)
|
|
{
|
|
800a0be: b590 push {r4, r7, lr}
|
|
800a0c0: b089 sub sp, #36 ; 0x24
|
|
800a0c2: af04 add r7, sp, #16
|
|
800a0c4: 6078 str r0, [r7, #4]
|
|
800a0c6: 4608 mov r0, r1
|
|
800a0c8: 4611 mov r1, r2
|
|
800a0ca: 461a mov r2, r3
|
|
800a0cc: 4603 mov r3, r0
|
|
800a0ce: 70fb strb r3, [r7, #3]
|
|
800a0d0: 460b mov r3, r1
|
|
800a0d2: 70bb strb r3, [r7, #2]
|
|
800a0d4: 4613 mov r3, r2
|
|
800a0d6: 707b strb r3, [r7, #1]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a0d8: 2300 movs r3, #0
|
|
800a0da: 73fb strb r3, [r7, #15]
|
|
USBH_StatusTypeDef usb_status = USBH_OK;
|
|
800a0dc: 2300 movs r3, #0
|
|
800a0de: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_HCD_HC_Init(phost->pData, pipe_num, epnum,
|
|
800a0e0: 687b ldr r3, [r7, #4]
|
|
800a0e2: f8d3 03d0 ldr.w r0, [r3, #976] ; 0x3d0
|
|
800a0e6: 787c ldrb r4, [r7, #1]
|
|
800a0e8: 78ba ldrb r2, [r7, #2]
|
|
800a0ea: 78f9 ldrb r1, [r7, #3]
|
|
800a0ec: 8d3b ldrh r3, [r7, #40] ; 0x28
|
|
800a0ee: 9302 str r3, [sp, #8]
|
|
800a0f0: f897 3024 ldrb.w r3, [r7, #36] ; 0x24
|
|
800a0f4: 9301 str r3, [sp, #4]
|
|
800a0f6: f897 3020 ldrb.w r3, [r7, #32]
|
|
800a0fa: 9300 str r3, [sp, #0]
|
|
800a0fc: 4623 mov r3, r4
|
|
800a0fe: f7f8 fc4a bl 8002996 <HAL_HCD_HC_Init>
|
|
800a102: 4603 mov r3, r0
|
|
800a104: 73fb strb r3, [r7, #15]
|
|
dev_address, speed, ep_type, mps);
|
|
|
|
usb_status = USBH_Get_USB_Status(hal_status);
|
|
800a106: 7bfb ldrb r3, [r7, #15]
|
|
800a108: 4618 mov r0, r3
|
|
800a10a: f000 f8bf bl 800a28c <USBH_Get_USB_Status>
|
|
800a10e: 4603 mov r3, r0
|
|
800a110: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a112: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a114: 4618 mov r0, r3
|
|
800a116: 3714 adds r7, #20
|
|
800a118: 46bd mov sp, r7
|
|
800a11a: bd90 pop {r4, r7, pc}
|
|
|
|
0800a11c <USBH_LL_ClosePipe>:
|
|
* @param phost: Host handle
|
|
* @param pipe: Pipe index
|
|
* @retval USBH status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_ClosePipe(USBH_HandleTypeDef *phost, uint8_t pipe)
|
|
{
|
|
800a11c: b580 push {r7, lr}
|
|
800a11e: b084 sub sp, #16
|
|
800a120: af00 add r7, sp, #0
|
|
800a122: 6078 str r0, [r7, #4]
|
|
800a124: 460b mov r3, r1
|
|
800a126: 70fb strb r3, [r7, #3]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a128: 2300 movs r3, #0
|
|
800a12a: 73fb strb r3, [r7, #15]
|
|
USBH_StatusTypeDef usb_status = USBH_OK;
|
|
800a12c: 2300 movs r3, #0
|
|
800a12e: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_HCD_HC_Halt(phost->pData, pipe);
|
|
800a130: 687b ldr r3, [r7, #4]
|
|
800a132: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
|
|
800a136: 78fa ldrb r2, [r7, #3]
|
|
800a138: 4611 mov r1, r2
|
|
800a13a: 4618 mov r0, r3
|
|
800a13c: f7f8 fcc3 bl 8002ac6 <HAL_HCD_HC_Halt>
|
|
800a140: 4603 mov r3, r0
|
|
800a142: 73fb strb r3, [r7, #15]
|
|
|
|
usb_status = USBH_Get_USB_Status(hal_status);
|
|
800a144: 7bfb ldrb r3, [r7, #15]
|
|
800a146: 4618 mov r0, r3
|
|
800a148: f000 f8a0 bl 800a28c <USBH_Get_USB_Status>
|
|
800a14c: 4603 mov r3, r0
|
|
800a14e: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a150: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a152: 4618 mov r0, r3
|
|
800a154: 3710 adds r7, #16
|
|
800a156: 46bd mov sp, r7
|
|
800a158: bd80 pop {r7, pc}
|
|
|
|
0800a15a <USBH_LL_SubmitURB>:
|
|
* @retval Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_SubmitURB(USBH_HandleTypeDef *phost, uint8_t pipe, uint8_t direction,
|
|
uint8_t ep_type, uint8_t token, uint8_t *pbuff, uint16_t length,
|
|
uint8_t do_ping)
|
|
{
|
|
800a15a: b590 push {r4, r7, lr}
|
|
800a15c: b089 sub sp, #36 ; 0x24
|
|
800a15e: af04 add r7, sp, #16
|
|
800a160: 6078 str r0, [r7, #4]
|
|
800a162: 4608 mov r0, r1
|
|
800a164: 4611 mov r1, r2
|
|
800a166: 461a mov r2, r3
|
|
800a168: 4603 mov r3, r0
|
|
800a16a: 70fb strb r3, [r7, #3]
|
|
800a16c: 460b mov r3, r1
|
|
800a16e: 70bb strb r3, [r7, #2]
|
|
800a170: 4613 mov r3, r2
|
|
800a172: 707b strb r3, [r7, #1]
|
|
HAL_StatusTypeDef hal_status = HAL_OK;
|
|
800a174: 2300 movs r3, #0
|
|
800a176: 73fb strb r3, [r7, #15]
|
|
USBH_StatusTypeDef usb_status = USBH_OK;
|
|
800a178: 2300 movs r3, #0
|
|
800a17a: 73bb strb r3, [r7, #14]
|
|
|
|
hal_status = HAL_HCD_HC_SubmitRequest(phost->pData, pipe, direction ,
|
|
800a17c: 687b ldr r3, [r7, #4]
|
|
800a17e: f8d3 03d0 ldr.w r0, [r3, #976] ; 0x3d0
|
|
800a182: 787c ldrb r4, [r7, #1]
|
|
800a184: 78ba ldrb r2, [r7, #2]
|
|
800a186: 78f9 ldrb r1, [r7, #3]
|
|
800a188: f897 302c ldrb.w r3, [r7, #44] ; 0x2c
|
|
800a18c: 9303 str r3, [sp, #12]
|
|
800a18e: 8d3b ldrh r3, [r7, #40] ; 0x28
|
|
800a190: 9302 str r3, [sp, #8]
|
|
800a192: 6a7b ldr r3, [r7, #36] ; 0x24
|
|
800a194: 9301 str r3, [sp, #4]
|
|
800a196: f897 3020 ldrb.w r3, [r7, #32]
|
|
800a19a: 9300 str r3, [sp, #0]
|
|
800a19c: 4623 mov r3, r4
|
|
800a19e: f7f8 fcb5 bl 8002b0c <HAL_HCD_HC_SubmitRequest>
|
|
800a1a2: 4603 mov r3, r0
|
|
800a1a4: 73fb strb r3, [r7, #15]
|
|
ep_type, token, pbuff, length,
|
|
do_ping);
|
|
usb_status = USBH_Get_USB_Status(hal_status);
|
|
800a1a6: 7bfb ldrb r3, [r7, #15]
|
|
800a1a8: 4618 mov r0, r3
|
|
800a1aa: f000 f86f bl 800a28c <USBH_Get_USB_Status>
|
|
800a1ae: 4603 mov r3, r0
|
|
800a1b0: 73bb strb r3, [r7, #14]
|
|
|
|
return usb_status;
|
|
800a1b2: 7bbb ldrb r3, [r7, #14]
|
|
}
|
|
800a1b4: 4618 mov r0, r3
|
|
800a1b6: 3714 adds r7, #20
|
|
800a1b8: 46bd mov sp, r7
|
|
800a1ba: bd90 pop {r4, r7, pc}
|
|
|
|
0800a1bc <USBH_LL_GetURBState>:
|
|
* @arg URB_NYET
|
|
* @arg URB_ERROR
|
|
* @arg URB_STALL
|
|
*/
|
|
USBH_URBStateTypeDef USBH_LL_GetURBState(USBH_HandleTypeDef *phost, uint8_t pipe)
|
|
{
|
|
800a1bc: b580 push {r7, lr}
|
|
800a1be: b082 sub sp, #8
|
|
800a1c0: af00 add r7, sp, #0
|
|
800a1c2: 6078 str r0, [r7, #4]
|
|
800a1c4: 460b mov r3, r1
|
|
800a1c6: 70fb strb r3, [r7, #3]
|
|
return (USBH_URBStateTypeDef)HAL_HCD_HC_GetURBState (phost->pData, pipe);
|
|
800a1c8: 687b ldr r3, [r7, #4]
|
|
800a1ca: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
|
|
800a1ce: 78fa ldrb r2, [r7, #3]
|
|
800a1d0: 4611 mov r1, r2
|
|
800a1d2: 4618 mov r0, r3
|
|
800a1d4: f7f8 ff5e bl 8003094 <HAL_HCD_HC_GetURBState>
|
|
800a1d8: 4603 mov r3, r0
|
|
}
|
|
800a1da: 4618 mov r0, r3
|
|
800a1dc: 3708 adds r7, #8
|
|
800a1de: 46bd mov sp, r7
|
|
800a1e0: bd80 pop {r7, pc}
|
|
|
|
0800a1e2 <USBH_LL_DriverVBUS>:
|
|
* 0 : VBUS Inactive
|
|
* 1 : VBUS Active
|
|
* @retval Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_DriverVBUS(USBH_HandleTypeDef *phost, uint8_t state)
|
|
{
|
|
800a1e2: b580 push {r7, lr}
|
|
800a1e4: b082 sub sp, #8
|
|
800a1e6: af00 add r7, sp, #0
|
|
800a1e8: 6078 str r0, [r7, #4]
|
|
800a1ea: 460b mov r3, r1
|
|
800a1ec: 70fb strb r3, [r7, #3]
|
|
if (phost->id == HOST_FS) {
|
|
800a1ee: 687b ldr r3, [r7, #4]
|
|
800a1f0: f893 33cc ldrb.w r3, [r3, #972] ; 0x3cc
|
|
800a1f4: 2b01 cmp r3, #1
|
|
800a1f6: d103 bne.n 800a200 <USBH_LL_DriverVBUS+0x1e>
|
|
MX_DriverVbusFS(state);
|
|
800a1f8: 78fb ldrb r3, [r7, #3]
|
|
800a1fa: 4618 mov r0, r3
|
|
800a1fc: f000 f872 bl 800a2e4 <MX_DriverVbusFS>
|
|
|
|
/* USER CODE BEGIN 0 */
|
|
|
|
/* USER CODE END 0*/
|
|
|
|
HAL_Delay(200);
|
|
800a200: 20c8 movs r0, #200 ; 0xc8
|
|
800a202: f7f8 f897 bl 8002334 <HAL_Delay>
|
|
return USBH_OK;
|
|
800a206: 2300 movs r3, #0
|
|
}
|
|
800a208: 4618 mov r0, r3
|
|
800a20a: 3708 adds r7, #8
|
|
800a20c: 46bd mov sp, r7
|
|
800a20e: bd80 pop {r7, pc}
|
|
|
|
0800a210 <USBH_LL_SetToggle>:
|
|
* @param pipe: Pipe index
|
|
* @param toggle: toggle (0/1)
|
|
* @retval Status
|
|
*/
|
|
USBH_StatusTypeDef USBH_LL_SetToggle(USBH_HandleTypeDef *phost, uint8_t pipe, uint8_t toggle)
|
|
{
|
|
800a210: b480 push {r7}
|
|
800a212: b085 sub sp, #20
|
|
800a214: af00 add r7, sp, #0
|
|
800a216: 6078 str r0, [r7, #4]
|
|
800a218: 460b mov r3, r1
|
|
800a21a: 70fb strb r3, [r7, #3]
|
|
800a21c: 4613 mov r3, r2
|
|
800a21e: 70bb strb r3, [r7, #2]
|
|
HCD_HandleTypeDef *pHandle;
|
|
pHandle = phost->pData;
|
|
800a220: 687b ldr r3, [r7, #4]
|
|
800a222: f8d3 33d0 ldr.w r3, [r3, #976] ; 0x3d0
|
|
800a226: 60fb str r3, [r7, #12]
|
|
|
|
if(pHandle->hc[pipe].ep_is_in)
|
|
800a228: 78fa ldrb r2, [r7, #3]
|
|
800a22a: 68f9 ldr r1, [r7, #12]
|
|
800a22c: 4613 mov r3, r2
|
|
800a22e: 009b lsls r3, r3, #2
|
|
800a230: 4413 add r3, r2
|
|
800a232: 00db lsls r3, r3, #3
|
|
800a234: 440b add r3, r1
|
|
800a236: 333b adds r3, #59 ; 0x3b
|
|
800a238: 781b ldrb r3, [r3, #0]
|
|
800a23a: 2b00 cmp r3, #0
|
|
800a23c: d00a beq.n 800a254 <USBH_LL_SetToggle+0x44>
|
|
{
|
|
pHandle->hc[pipe].toggle_in = toggle;
|
|
800a23e: 78fa ldrb r2, [r7, #3]
|
|
800a240: 68f9 ldr r1, [r7, #12]
|
|
800a242: 4613 mov r3, r2
|
|
800a244: 009b lsls r3, r3, #2
|
|
800a246: 4413 add r3, r2
|
|
800a248: 00db lsls r3, r3, #3
|
|
800a24a: 440b add r3, r1
|
|
800a24c: 3350 adds r3, #80 ; 0x50
|
|
800a24e: 78ba ldrb r2, [r7, #2]
|
|
800a250: 701a strb r2, [r3, #0]
|
|
800a252: e009 b.n 800a268 <USBH_LL_SetToggle+0x58>
|
|
}
|
|
else
|
|
{
|
|
pHandle->hc[pipe].toggle_out = toggle;
|
|
800a254: 78fa ldrb r2, [r7, #3]
|
|
800a256: 68f9 ldr r1, [r7, #12]
|
|
800a258: 4613 mov r3, r2
|
|
800a25a: 009b lsls r3, r3, #2
|
|
800a25c: 4413 add r3, r2
|
|
800a25e: 00db lsls r3, r3, #3
|
|
800a260: 440b add r3, r1
|
|
800a262: 3351 adds r3, #81 ; 0x51
|
|
800a264: 78ba ldrb r2, [r7, #2]
|
|
800a266: 701a strb r2, [r3, #0]
|
|
}
|
|
|
|
return USBH_OK;
|
|
800a268: 2300 movs r3, #0
|
|
}
|
|
800a26a: 4618 mov r0, r3
|
|
800a26c: 3714 adds r7, #20
|
|
800a26e: 46bd mov sp, r7
|
|
800a270: f85d 7b04 ldr.w r7, [sp], #4
|
|
800a274: 4770 bx lr
|
|
|
|
0800a276 <USBH_Delay>:
|
|
* @brief Delay routine for the USB Host Library
|
|
* @param Delay: Delay in ms
|
|
* @retval None
|
|
*/
|
|
void USBH_Delay(uint32_t Delay)
|
|
{
|
|
800a276: b580 push {r7, lr}
|
|
800a278: b082 sub sp, #8
|
|
800a27a: af00 add r7, sp, #0
|
|
800a27c: 6078 str r0, [r7, #4]
|
|
HAL_Delay(Delay);
|
|
800a27e: 6878 ldr r0, [r7, #4]
|
|
800a280: f7f8 f858 bl 8002334 <HAL_Delay>
|
|
}
|
|
800a284: bf00 nop
|
|
800a286: 3708 adds r7, #8
|
|
800a288: 46bd mov sp, r7
|
|
800a28a: bd80 pop {r7, pc}
|
|
|
|
0800a28c <USBH_Get_USB_Status>:
|
|
* @brief Retuns the USB status depending on the HAL status:
|
|
* @param hal_status: HAL status
|
|
* @retval USB status
|
|
*/
|
|
USBH_StatusTypeDef USBH_Get_USB_Status(HAL_StatusTypeDef hal_status)
|
|
{
|
|
800a28c: b480 push {r7}
|
|
800a28e: b085 sub sp, #20
|
|
800a290: af00 add r7, sp, #0
|
|
800a292: 4603 mov r3, r0
|
|
800a294: 71fb strb r3, [r7, #7]
|
|
USBH_StatusTypeDef usb_status = USBH_OK;
|
|
800a296: 2300 movs r3, #0
|
|
800a298: 73fb strb r3, [r7, #15]
|
|
|
|
switch (hal_status)
|
|
800a29a: 79fb ldrb r3, [r7, #7]
|
|
800a29c: 2b03 cmp r3, #3
|
|
800a29e: d817 bhi.n 800a2d0 <USBH_Get_USB_Status+0x44>
|
|
800a2a0: a201 add r2, pc, #4 ; (adr r2, 800a2a8 <USBH_Get_USB_Status+0x1c>)
|
|
800a2a2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
|
|
800a2a6: bf00 nop
|
|
800a2a8: 0800a2b9 .word 0x0800a2b9
|
|
800a2ac: 0800a2bf .word 0x0800a2bf
|
|
800a2b0: 0800a2c5 .word 0x0800a2c5
|
|
800a2b4: 0800a2cb .word 0x0800a2cb
|
|
{
|
|
case HAL_OK :
|
|
usb_status = USBH_OK;
|
|
800a2b8: 2300 movs r3, #0
|
|
800a2ba: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a2bc: e00b b.n 800a2d6 <USBH_Get_USB_Status+0x4a>
|
|
case HAL_ERROR :
|
|
usb_status = USBH_FAIL;
|
|
800a2be: 2302 movs r3, #2
|
|
800a2c0: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a2c2: e008 b.n 800a2d6 <USBH_Get_USB_Status+0x4a>
|
|
case HAL_BUSY :
|
|
usb_status = USBH_BUSY;
|
|
800a2c4: 2301 movs r3, #1
|
|
800a2c6: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a2c8: e005 b.n 800a2d6 <USBH_Get_USB_Status+0x4a>
|
|
case HAL_TIMEOUT :
|
|
usb_status = USBH_FAIL;
|
|
800a2ca: 2302 movs r3, #2
|
|
800a2cc: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a2ce: e002 b.n 800a2d6 <USBH_Get_USB_Status+0x4a>
|
|
default :
|
|
usb_status = USBH_FAIL;
|
|
800a2d0: 2302 movs r3, #2
|
|
800a2d2: 73fb strb r3, [r7, #15]
|
|
break;
|
|
800a2d4: bf00 nop
|
|
}
|
|
return usb_status;
|
|
800a2d6: 7bfb ldrb r3, [r7, #15]
|
|
}
|
|
800a2d8: 4618 mov r0, r3
|
|
800a2da: 3714 adds r7, #20
|
|
800a2dc: 46bd mov sp, r7
|
|
800a2de: f85d 7b04 ldr.w r7, [sp], #4
|
|
800a2e2: 4770 bx lr
|
|
|
|
0800a2e4 <MX_DriverVbusFS>:
|
|
* This parameter can be one of the these values:
|
|
* - 1 : VBUS Active
|
|
* - 0 : VBUS Inactive
|
|
*/
|
|
void MX_DriverVbusFS(uint8_t state)
|
|
{
|
|
800a2e4: b580 push {r7, lr}
|
|
800a2e6: b084 sub sp, #16
|
|
800a2e8: af00 add r7, sp, #0
|
|
800a2ea: 4603 mov r3, r0
|
|
800a2ec: 71fb strb r3, [r7, #7]
|
|
uint8_t data = state;
|
|
800a2ee: 79fb ldrb r3, [r7, #7]
|
|
800a2f0: 73fb strb r3, [r7, #15]
|
|
/* USER CODE BEGIN PREPARE_GPIO_DATA_VBUS_FS */
|
|
if(state == 0)
|
|
800a2f2: 79fb ldrb r3, [r7, #7]
|
|
800a2f4: 2b00 cmp r3, #0
|
|
800a2f6: d102 bne.n 800a2fe <MX_DriverVbusFS+0x1a>
|
|
{
|
|
/* Drive high Charge pump */
|
|
data = GPIO_PIN_SET;
|
|
800a2f8: 2301 movs r3, #1
|
|
800a2fa: 73fb strb r3, [r7, #15]
|
|
800a2fc: e001 b.n 800a302 <MX_DriverVbusFS+0x1e>
|
|
}
|
|
else
|
|
{
|
|
/* Drive low Charge pump */
|
|
data = GPIO_PIN_RESET;
|
|
800a2fe: 2300 movs r3, #0
|
|
800a300: 73fb strb r3, [r7, #15]
|
|
}
|
|
/* USER CODE END PREPARE_GPIO_DATA_VBUS_FS */
|
|
HAL_GPIO_WritePin(GPIOC,GPIO_PIN_0,(GPIO_PinState)data);
|
|
800a302: 7bfb ldrb r3, [r7, #15]
|
|
800a304: 461a mov r2, r3
|
|
800a306: 2101 movs r1, #1
|
|
800a308: 4803 ldr r0, [pc, #12] ; (800a318 <MX_DriverVbusFS+0x34>)
|
|
800a30a: f7f8 fac9 bl 80028a0 <HAL_GPIO_WritePin>
|
|
}
|
|
800a30e: bf00 nop
|
|
800a310: 3710 adds r7, #16
|
|
800a312: 46bd mov sp, r7
|
|
800a314: bd80 pop {r7, pc}
|
|
800a316: bf00 nop
|
|
800a318: 40020800 .word 0x40020800
|
|
|
|
0800a31c <__errno>:
|
|
800a31c: 4b01 ldr r3, [pc, #4] ; (800a324 <__errno+0x8>)
|
|
800a31e: 6818 ldr r0, [r3, #0]
|
|
800a320: 4770 bx lr
|
|
800a322: bf00 nop
|
|
800a324: 2000002c .word 0x2000002c
|
|
|
|
0800a328 <__libc_init_array>:
|
|
800a328: b570 push {r4, r5, r6, lr}
|
|
800a32a: 4e0d ldr r6, [pc, #52] ; (800a360 <__libc_init_array+0x38>)
|
|
800a32c: 4c0d ldr r4, [pc, #52] ; (800a364 <__libc_init_array+0x3c>)
|
|
800a32e: 1ba4 subs r4, r4, r6
|
|
800a330: 10a4 asrs r4, r4, #2
|
|
800a332: 2500 movs r5, #0
|
|
800a334: 42a5 cmp r5, r4
|
|
800a336: d109 bne.n 800a34c <__libc_init_array+0x24>
|
|
800a338: 4e0b ldr r6, [pc, #44] ; (800a368 <__libc_init_array+0x40>)
|
|
800a33a: 4c0c ldr r4, [pc, #48] ; (800a36c <__libc_init_array+0x44>)
|
|
800a33c: f004 fa64 bl 800e808 <_init>
|
|
800a340: 1ba4 subs r4, r4, r6
|
|
800a342: 10a4 asrs r4, r4, #2
|
|
800a344: 2500 movs r5, #0
|
|
800a346: 42a5 cmp r5, r4
|
|
800a348: d105 bne.n 800a356 <__libc_init_array+0x2e>
|
|
800a34a: bd70 pop {r4, r5, r6, pc}
|
|
800a34c: f856 3025 ldr.w r3, [r6, r5, lsl #2]
|
|
800a350: 4798 blx r3
|
|
800a352: 3501 adds r5, #1
|
|
800a354: e7ee b.n 800a334 <__libc_init_array+0xc>
|
|
800a356: f856 3025 ldr.w r3, [r6, r5, lsl #2]
|
|
800a35a: 4798 blx r3
|
|
800a35c: 3501 adds r5, #1
|
|
800a35e: e7f2 b.n 800a346 <__libc_init_array+0x1e>
|
|
800a360: 0800ec60 .word 0x0800ec60
|
|
800a364: 0800ec60 .word 0x0800ec60
|
|
800a368: 0800ec60 .word 0x0800ec60
|
|
800a36c: 0800ec64 .word 0x0800ec64
|
|
|
|
0800a370 <malloc>:
|
|
800a370: 4b02 ldr r3, [pc, #8] ; (800a37c <malloc+0xc>)
|
|
800a372: 4601 mov r1, r0
|
|
800a374: 6818 ldr r0, [r3, #0]
|
|
800a376: f000 b861 b.w 800a43c <_malloc_r>
|
|
800a37a: bf00 nop
|
|
800a37c: 2000002c .word 0x2000002c
|
|
|
|
0800a380 <free>:
|
|
800a380: 4b02 ldr r3, [pc, #8] ; (800a38c <free+0xc>)
|
|
800a382: 4601 mov r1, r0
|
|
800a384: 6818 ldr r0, [r3, #0]
|
|
800a386: f000 b80b b.w 800a3a0 <_free_r>
|
|
800a38a: bf00 nop
|
|
800a38c: 2000002c .word 0x2000002c
|
|
|
|
0800a390 <memset>:
|
|
800a390: 4402 add r2, r0
|
|
800a392: 4603 mov r3, r0
|
|
800a394: 4293 cmp r3, r2
|
|
800a396: d100 bne.n 800a39a <memset+0xa>
|
|
800a398: 4770 bx lr
|
|
800a39a: f803 1b01 strb.w r1, [r3], #1
|
|
800a39e: e7f9 b.n 800a394 <memset+0x4>
|
|
|
|
0800a3a0 <_free_r>:
|
|
800a3a0: b538 push {r3, r4, r5, lr}
|
|
800a3a2: 4605 mov r5, r0
|
|
800a3a4: 2900 cmp r1, #0
|
|
800a3a6: d045 beq.n 800a434 <_free_r+0x94>
|
|
800a3a8: f851 3c04 ldr.w r3, [r1, #-4]
|
|
800a3ac: 1f0c subs r4, r1, #4
|
|
800a3ae: 2b00 cmp r3, #0
|
|
800a3b0: bfb8 it lt
|
|
800a3b2: 18e4 addlt r4, r4, r3
|
|
800a3b4: f003 fa75 bl 800d8a2 <__malloc_lock>
|
|
800a3b8: 4a1f ldr r2, [pc, #124] ; (800a438 <_free_r+0x98>)
|
|
800a3ba: 6813 ldr r3, [r2, #0]
|
|
800a3bc: 4610 mov r0, r2
|
|
800a3be: b933 cbnz r3, 800a3ce <_free_r+0x2e>
|
|
800a3c0: 6063 str r3, [r4, #4]
|
|
800a3c2: 6014 str r4, [r2, #0]
|
|
800a3c4: 4628 mov r0, r5
|
|
800a3c6: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
|
800a3ca: f003 ba6b b.w 800d8a4 <__malloc_unlock>
|
|
800a3ce: 42a3 cmp r3, r4
|
|
800a3d0: d90c bls.n 800a3ec <_free_r+0x4c>
|
|
800a3d2: 6821 ldr r1, [r4, #0]
|
|
800a3d4: 1862 adds r2, r4, r1
|
|
800a3d6: 4293 cmp r3, r2
|
|
800a3d8: bf04 itt eq
|
|
800a3da: 681a ldreq r2, [r3, #0]
|
|
800a3dc: 685b ldreq r3, [r3, #4]
|
|
800a3de: 6063 str r3, [r4, #4]
|
|
800a3e0: bf04 itt eq
|
|
800a3e2: 1852 addeq r2, r2, r1
|
|
800a3e4: 6022 streq r2, [r4, #0]
|
|
800a3e6: 6004 str r4, [r0, #0]
|
|
800a3e8: e7ec b.n 800a3c4 <_free_r+0x24>
|
|
800a3ea: 4613 mov r3, r2
|
|
800a3ec: 685a ldr r2, [r3, #4]
|
|
800a3ee: b10a cbz r2, 800a3f4 <_free_r+0x54>
|
|
800a3f0: 42a2 cmp r2, r4
|
|
800a3f2: d9fa bls.n 800a3ea <_free_r+0x4a>
|
|
800a3f4: 6819 ldr r1, [r3, #0]
|
|
800a3f6: 1858 adds r0, r3, r1
|
|
800a3f8: 42a0 cmp r0, r4
|
|
800a3fa: d10b bne.n 800a414 <_free_r+0x74>
|
|
800a3fc: 6820 ldr r0, [r4, #0]
|
|
800a3fe: 4401 add r1, r0
|
|
800a400: 1858 adds r0, r3, r1
|
|
800a402: 4282 cmp r2, r0
|
|
800a404: 6019 str r1, [r3, #0]
|
|
800a406: d1dd bne.n 800a3c4 <_free_r+0x24>
|
|
800a408: 6810 ldr r0, [r2, #0]
|
|
800a40a: 6852 ldr r2, [r2, #4]
|
|
800a40c: 605a str r2, [r3, #4]
|
|
800a40e: 4401 add r1, r0
|
|
800a410: 6019 str r1, [r3, #0]
|
|
800a412: e7d7 b.n 800a3c4 <_free_r+0x24>
|
|
800a414: d902 bls.n 800a41c <_free_r+0x7c>
|
|
800a416: 230c movs r3, #12
|
|
800a418: 602b str r3, [r5, #0]
|
|
800a41a: e7d3 b.n 800a3c4 <_free_r+0x24>
|
|
800a41c: 6820 ldr r0, [r4, #0]
|
|
800a41e: 1821 adds r1, r4, r0
|
|
800a420: 428a cmp r2, r1
|
|
800a422: bf04 itt eq
|
|
800a424: 6811 ldreq r1, [r2, #0]
|
|
800a426: 6852 ldreq r2, [r2, #4]
|
|
800a428: 6062 str r2, [r4, #4]
|
|
800a42a: bf04 itt eq
|
|
800a42c: 1809 addeq r1, r1, r0
|
|
800a42e: 6021 streq r1, [r4, #0]
|
|
800a430: 605c str r4, [r3, #4]
|
|
800a432: e7c7 b.n 800a3c4 <_free_r+0x24>
|
|
800a434: bd38 pop {r3, r4, r5, pc}
|
|
800a436: bf00 nop
|
|
800a438: 20000234 .word 0x20000234
|
|
|
|
0800a43c <_malloc_r>:
|
|
800a43c: b570 push {r4, r5, r6, lr}
|
|
800a43e: 1ccd adds r5, r1, #3
|
|
800a440: f025 0503 bic.w r5, r5, #3
|
|
800a444: 3508 adds r5, #8
|
|
800a446: 2d0c cmp r5, #12
|
|
800a448: bf38 it cc
|
|
800a44a: 250c movcc r5, #12
|
|
800a44c: 2d00 cmp r5, #0
|
|
800a44e: 4606 mov r6, r0
|
|
800a450: db01 blt.n 800a456 <_malloc_r+0x1a>
|
|
800a452: 42a9 cmp r1, r5
|
|
800a454: d903 bls.n 800a45e <_malloc_r+0x22>
|
|
800a456: 230c movs r3, #12
|
|
800a458: 6033 str r3, [r6, #0]
|
|
800a45a: 2000 movs r0, #0
|
|
800a45c: bd70 pop {r4, r5, r6, pc}
|
|
800a45e: f003 fa20 bl 800d8a2 <__malloc_lock>
|
|
800a462: 4a21 ldr r2, [pc, #132] ; (800a4e8 <_malloc_r+0xac>)
|
|
800a464: 6814 ldr r4, [r2, #0]
|
|
800a466: 4621 mov r1, r4
|
|
800a468: b991 cbnz r1, 800a490 <_malloc_r+0x54>
|
|
800a46a: 4c20 ldr r4, [pc, #128] ; (800a4ec <_malloc_r+0xb0>)
|
|
800a46c: 6823 ldr r3, [r4, #0]
|
|
800a46e: b91b cbnz r3, 800a478 <_malloc_r+0x3c>
|
|
800a470: 4630 mov r0, r6
|
|
800a472: f000 fef7 bl 800b264 <_sbrk_r>
|
|
800a476: 6020 str r0, [r4, #0]
|
|
800a478: 4629 mov r1, r5
|
|
800a47a: 4630 mov r0, r6
|
|
800a47c: f000 fef2 bl 800b264 <_sbrk_r>
|
|
800a480: 1c43 adds r3, r0, #1
|
|
800a482: d124 bne.n 800a4ce <_malloc_r+0x92>
|
|
800a484: 230c movs r3, #12
|
|
800a486: 6033 str r3, [r6, #0]
|
|
800a488: 4630 mov r0, r6
|
|
800a48a: f003 fa0b bl 800d8a4 <__malloc_unlock>
|
|
800a48e: e7e4 b.n 800a45a <_malloc_r+0x1e>
|
|
800a490: 680b ldr r3, [r1, #0]
|
|
800a492: 1b5b subs r3, r3, r5
|
|
800a494: d418 bmi.n 800a4c8 <_malloc_r+0x8c>
|
|
800a496: 2b0b cmp r3, #11
|
|
800a498: d90f bls.n 800a4ba <_malloc_r+0x7e>
|
|
800a49a: 600b str r3, [r1, #0]
|
|
800a49c: 50cd str r5, [r1, r3]
|
|
800a49e: 18cc adds r4, r1, r3
|
|
800a4a0: 4630 mov r0, r6
|
|
800a4a2: f003 f9ff bl 800d8a4 <__malloc_unlock>
|
|
800a4a6: f104 000b add.w r0, r4, #11
|
|
800a4aa: 1d23 adds r3, r4, #4
|
|
800a4ac: f020 0007 bic.w r0, r0, #7
|
|
800a4b0: 1ac3 subs r3, r0, r3
|
|
800a4b2: d0d3 beq.n 800a45c <_malloc_r+0x20>
|
|
800a4b4: 425a negs r2, r3
|
|
800a4b6: 50e2 str r2, [r4, r3]
|
|
800a4b8: e7d0 b.n 800a45c <_malloc_r+0x20>
|
|
800a4ba: 428c cmp r4, r1
|
|
800a4bc: 684b ldr r3, [r1, #4]
|
|
800a4be: bf16 itet ne
|
|
800a4c0: 6063 strne r3, [r4, #4]
|
|
800a4c2: 6013 streq r3, [r2, #0]
|
|
800a4c4: 460c movne r4, r1
|
|
800a4c6: e7eb b.n 800a4a0 <_malloc_r+0x64>
|
|
800a4c8: 460c mov r4, r1
|
|
800a4ca: 6849 ldr r1, [r1, #4]
|
|
800a4cc: e7cc b.n 800a468 <_malloc_r+0x2c>
|
|
800a4ce: 1cc4 adds r4, r0, #3
|
|
800a4d0: f024 0403 bic.w r4, r4, #3
|
|
800a4d4: 42a0 cmp r0, r4
|
|
800a4d6: d005 beq.n 800a4e4 <_malloc_r+0xa8>
|
|
800a4d8: 1a21 subs r1, r4, r0
|
|
800a4da: 4630 mov r0, r6
|
|
800a4dc: f000 fec2 bl 800b264 <_sbrk_r>
|
|
800a4e0: 3001 adds r0, #1
|
|
800a4e2: d0cf beq.n 800a484 <_malloc_r+0x48>
|
|
800a4e4: 6025 str r5, [r4, #0]
|
|
800a4e6: e7db b.n 800a4a0 <_malloc_r+0x64>
|
|
800a4e8: 20000234 .word 0x20000234
|
|
800a4ec: 20000238 .word 0x20000238
|
|
|
|
0800a4f0 <__cvt>:
|
|
800a4f0: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800a4f4: ec55 4b10 vmov r4, r5, d0
|
|
800a4f8: 9f0d ldr r7, [sp, #52] ; 0x34
|
|
800a4fa: f8dd a030 ldr.w sl, [sp, #48] ; 0x30
|
|
800a4fe: 2d00 cmp r5, #0
|
|
800a500: 460e mov r6, r1
|
|
800a502: 4691 mov r9, r2
|
|
800a504: 4619 mov r1, r3
|
|
800a506: bfb8 it lt
|
|
800a508: 4622 movlt r2, r4
|
|
800a50a: 462b mov r3, r5
|
|
800a50c: f027 0720 bic.w r7, r7, #32
|
|
800a510: bfbb ittet lt
|
|
800a512: f105 4300 addlt.w r3, r5, #2147483648 ; 0x80000000
|
|
800a516: 461d movlt r5, r3
|
|
800a518: 2300 movge r3, #0
|
|
800a51a: 232d movlt r3, #45 ; 0x2d
|
|
800a51c: bfb8 it lt
|
|
800a51e: 4614 movlt r4, r2
|
|
800a520: 2f46 cmp r7, #70 ; 0x46
|
|
800a522: 700b strb r3, [r1, #0]
|
|
800a524: d004 beq.n 800a530 <__cvt+0x40>
|
|
800a526: 2f45 cmp r7, #69 ; 0x45
|
|
800a528: d100 bne.n 800a52c <__cvt+0x3c>
|
|
800a52a: 3601 adds r6, #1
|
|
800a52c: 2102 movs r1, #2
|
|
800a52e: e000 b.n 800a532 <__cvt+0x42>
|
|
800a530: 2103 movs r1, #3
|
|
800a532: ab03 add r3, sp, #12
|
|
800a534: 9301 str r3, [sp, #4]
|
|
800a536: ab02 add r3, sp, #8
|
|
800a538: 9300 str r3, [sp, #0]
|
|
800a53a: 4632 mov r2, r6
|
|
800a53c: 4653 mov r3, sl
|
|
800a53e: ec45 4b10 vmov d0, r4, r5
|
|
800a542: f001 fec1 bl 800c2c8 <_dtoa_r>
|
|
800a546: 2f47 cmp r7, #71 ; 0x47
|
|
800a548: 4680 mov r8, r0
|
|
800a54a: d102 bne.n 800a552 <__cvt+0x62>
|
|
800a54c: f019 0f01 tst.w r9, #1
|
|
800a550: d026 beq.n 800a5a0 <__cvt+0xb0>
|
|
800a552: 2f46 cmp r7, #70 ; 0x46
|
|
800a554: eb08 0906 add.w r9, r8, r6
|
|
800a558: d111 bne.n 800a57e <__cvt+0x8e>
|
|
800a55a: f898 3000 ldrb.w r3, [r8]
|
|
800a55e: 2b30 cmp r3, #48 ; 0x30
|
|
800a560: d10a bne.n 800a578 <__cvt+0x88>
|
|
800a562: 2200 movs r2, #0
|
|
800a564: 2300 movs r3, #0
|
|
800a566: 4620 mov r0, r4
|
|
800a568: 4629 mov r1, r5
|
|
800a56a: f7f6 fab5 bl 8000ad8 <__aeabi_dcmpeq>
|
|
800a56e: b918 cbnz r0, 800a578 <__cvt+0x88>
|
|
800a570: f1c6 0601 rsb r6, r6, #1
|
|
800a574: f8ca 6000 str.w r6, [sl]
|
|
800a578: f8da 3000 ldr.w r3, [sl]
|
|
800a57c: 4499 add r9, r3
|
|
800a57e: 2200 movs r2, #0
|
|
800a580: 2300 movs r3, #0
|
|
800a582: 4620 mov r0, r4
|
|
800a584: 4629 mov r1, r5
|
|
800a586: f7f6 faa7 bl 8000ad8 <__aeabi_dcmpeq>
|
|
800a58a: b938 cbnz r0, 800a59c <__cvt+0xac>
|
|
800a58c: 2230 movs r2, #48 ; 0x30
|
|
800a58e: 9b03 ldr r3, [sp, #12]
|
|
800a590: 454b cmp r3, r9
|
|
800a592: d205 bcs.n 800a5a0 <__cvt+0xb0>
|
|
800a594: 1c59 adds r1, r3, #1
|
|
800a596: 9103 str r1, [sp, #12]
|
|
800a598: 701a strb r2, [r3, #0]
|
|
800a59a: e7f8 b.n 800a58e <__cvt+0x9e>
|
|
800a59c: f8cd 900c str.w r9, [sp, #12]
|
|
800a5a0: 9b03 ldr r3, [sp, #12]
|
|
800a5a2: 9a0e ldr r2, [sp, #56] ; 0x38
|
|
800a5a4: eba3 0308 sub.w r3, r3, r8
|
|
800a5a8: 4640 mov r0, r8
|
|
800a5aa: 6013 str r3, [r2, #0]
|
|
800a5ac: b004 add sp, #16
|
|
800a5ae: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
|
|
0800a5b2 <__exponent>:
|
|
800a5b2: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr}
|
|
800a5b4: 2900 cmp r1, #0
|
|
800a5b6: 4604 mov r4, r0
|
|
800a5b8: bfba itte lt
|
|
800a5ba: 4249 neglt r1, r1
|
|
800a5bc: 232d movlt r3, #45 ; 0x2d
|
|
800a5be: 232b movge r3, #43 ; 0x2b
|
|
800a5c0: 2909 cmp r1, #9
|
|
800a5c2: f804 2b02 strb.w r2, [r4], #2
|
|
800a5c6: 7043 strb r3, [r0, #1]
|
|
800a5c8: dd20 ble.n 800a60c <__exponent+0x5a>
|
|
800a5ca: f10d 0307 add.w r3, sp, #7
|
|
800a5ce: 461f mov r7, r3
|
|
800a5d0: 260a movs r6, #10
|
|
800a5d2: fb91 f5f6 sdiv r5, r1, r6
|
|
800a5d6: fb06 1115 mls r1, r6, r5, r1
|
|
800a5da: 3130 adds r1, #48 ; 0x30
|
|
800a5dc: 2d09 cmp r5, #9
|
|
800a5de: f803 1c01 strb.w r1, [r3, #-1]
|
|
800a5e2: f103 32ff add.w r2, r3, #4294967295
|
|
800a5e6: 4629 mov r1, r5
|
|
800a5e8: dc09 bgt.n 800a5fe <__exponent+0x4c>
|
|
800a5ea: 3130 adds r1, #48 ; 0x30
|
|
800a5ec: 3b02 subs r3, #2
|
|
800a5ee: f802 1c01 strb.w r1, [r2, #-1]
|
|
800a5f2: 42bb cmp r3, r7
|
|
800a5f4: 4622 mov r2, r4
|
|
800a5f6: d304 bcc.n 800a602 <__exponent+0x50>
|
|
800a5f8: 1a10 subs r0, r2, r0
|
|
800a5fa: b003 add sp, #12
|
|
800a5fc: bdf0 pop {r4, r5, r6, r7, pc}
|
|
800a5fe: 4613 mov r3, r2
|
|
800a600: e7e7 b.n 800a5d2 <__exponent+0x20>
|
|
800a602: f813 2b01 ldrb.w r2, [r3], #1
|
|
800a606: f804 2b01 strb.w r2, [r4], #1
|
|
800a60a: e7f2 b.n 800a5f2 <__exponent+0x40>
|
|
800a60c: 2330 movs r3, #48 ; 0x30
|
|
800a60e: 4419 add r1, r3
|
|
800a610: 7083 strb r3, [r0, #2]
|
|
800a612: 1d02 adds r2, r0, #4
|
|
800a614: 70c1 strb r1, [r0, #3]
|
|
800a616: e7ef b.n 800a5f8 <__exponent+0x46>
|
|
|
|
0800a618 <_printf_float>:
|
|
800a618: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800a61c: b08d sub sp, #52 ; 0x34
|
|
800a61e: 460c mov r4, r1
|
|
800a620: f8dd 8058 ldr.w r8, [sp, #88] ; 0x58
|
|
800a624: 4616 mov r6, r2
|
|
800a626: 461f mov r7, r3
|
|
800a628: 4605 mov r5, r0
|
|
800a62a: f003 f8ab bl 800d784 <_localeconv_r>
|
|
800a62e: 6803 ldr r3, [r0, #0]
|
|
800a630: 9304 str r3, [sp, #16]
|
|
800a632: 4618 mov r0, r3
|
|
800a634: f7f5 fdd4 bl 80001e0 <strlen>
|
|
800a638: 2300 movs r3, #0
|
|
800a63a: 930a str r3, [sp, #40] ; 0x28
|
|
800a63c: f8d8 3000 ldr.w r3, [r8]
|
|
800a640: 9005 str r0, [sp, #20]
|
|
800a642: 3307 adds r3, #7
|
|
800a644: f023 0307 bic.w r3, r3, #7
|
|
800a648: f103 0208 add.w r2, r3, #8
|
|
800a64c: f894 a018 ldrb.w sl, [r4, #24]
|
|
800a650: f8d4 b000 ldr.w fp, [r4]
|
|
800a654: f8c8 2000 str.w r2, [r8]
|
|
800a658: e9d3 2300 ldrd r2, r3, [r3]
|
|
800a65c: e9c4 2312 strd r2, r3, [r4, #72] ; 0x48
|
|
800a660: e9d4 8912 ldrd r8, r9, [r4, #72] ; 0x48
|
|
800a664: f029 4300 bic.w r3, r9, #2147483648 ; 0x80000000
|
|
800a668: 9307 str r3, [sp, #28]
|
|
800a66a: f8cd 8018 str.w r8, [sp, #24]
|
|
800a66e: f04f 32ff mov.w r2, #4294967295
|
|
800a672: 4ba7 ldr r3, [pc, #668] ; (800a910 <_printf_float+0x2f8>)
|
|
800a674: e9dd 0106 ldrd r0, r1, [sp, #24]
|
|
800a678: f7f6 fa60 bl 8000b3c <__aeabi_dcmpun>
|
|
800a67c: bb70 cbnz r0, 800a6dc <_printf_float+0xc4>
|
|
800a67e: f04f 32ff mov.w r2, #4294967295
|
|
800a682: 4ba3 ldr r3, [pc, #652] ; (800a910 <_printf_float+0x2f8>)
|
|
800a684: e9dd 0106 ldrd r0, r1, [sp, #24]
|
|
800a688: f7f6 fa3a bl 8000b00 <__aeabi_dcmple>
|
|
800a68c: bb30 cbnz r0, 800a6dc <_printf_float+0xc4>
|
|
800a68e: 2200 movs r2, #0
|
|
800a690: 2300 movs r3, #0
|
|
800a692: 4640 mov r0, r8
|
|
800a694: 4649 mov r1, r9
|
|
800a696: f7f6 fa29 bl 8000aec <__aeabi_dcmplt>
|
|
800a69a: b110 cbz r0, 800a6a2 <_printf_float+0x8a>
|
|
800a69c: 232d movs r3, #45 ; 0x2d
|
|
800a69e: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
|
800a6a2: 4a9c ldr r2, [pc, #624] ; (800a914 <_printf_float+0x2fc>)
|
|
800a6a4: 4b9c ldr r3, [pc, #624] ; (800a918 <_printf_float+0x300>)
|
|
800a6a6: f1ba 0f47 cmp.w sl, #71 ; 0x47
|
|
800a6aa: bf8c ite hi
|
|
800a6ac: 4690 movhi r8, r2
|
|
800a6ae: 4698 movls r8, r3
|
|
800a6b0: 2303 movs r3, #3
|
|
800a6b2: f02b 0204 bic.w r2, fp, #4
|
|
800a6b6: 6123 str r3, [r4, #16]
|
|
800a6b8: 6022 str r2, [r4, #0]
|
|
800a6ba: f04f 0900 mov.w r9, #0
|
|
800a6be: 9700 str r7, [sp, #0]
|
|
800a6c0: 4633 mov r3, r6
|
|
800a6c2: aa0b add r2, sp, #44 ; 0x2c
|
|
800a6c4: 4621 mov r1, r4
|
|
800a6c6: 4628 mov r0, r5
|
|
800a6c8: f000 f9e6 bl 800aa98 <_printf_common>
|
|
800a6cc: 3001 adds r0, #1
|
|
800a6ce: f040 808d bne.w 800a7ec <_printf_float+0x1d4>
|
|
800a6d2: f04f 30ff mov.w r0, #4294967295
|
|
800a6d6: b00d add sp, #52 ; 0x34
|
|
800a6d8: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800a6dc: 4642 mov r2, r8
|
|
800a6de: 464b mov r3, r9
|
|
800a6e0: 4640 mov r0, r8
|
|
800a6e2: 4649 mov r1, r9
|
|
800a6e4: f7f6 fa2a bl 8000b3c <__aeabi_dcmpun>
|
|
800a6e8: b110 cbz r0, 800a6f0 <_printf_float+0xd8>
|
|
800a6ea: 4a8c ldr r2, [pc, #560] ; (800a91c <_printf_float+0x304>)
|
|
800a6ec: 4b8c ldr r3, [pc, #560] ; (800a920 <_printf_float+0x308>)
|
|
800a6ee: e7da b.n 800a6a6 <_printf_float+0x8e>
|
|
800a6f0: 6861 ldr r1, [r4, #4]
|
|
800a6f2: 1c4b adds r3, r1, #1
|
|
800a6f4: f44b 6280 orr.w r2, fp, #1024 ; 0x400
|
|
800a6f8: a80a add r0, sp, #40 ; 0x28
|
|
800a6fa: d13e bne.n 800a77a <_printf_float+0x162>
|
|
800a6fc: 2306 movs r3, #6
|
|
800a6fe: 6063 str r3, [r4, #4]
|
|
800a700: 2300 movs r3, #0
|
|
800a702: e9cd 0302 strd r0, r3, [sp, #8]
|
|
800a706: ab09 add r3, sp, #36 ; 0x24
|
|
800a708: 9300 str r3, [sp, #0]
|
|
800a70a: ec49 8b10 vmov d0, r8, r9
|
|
800a70e: f10d 0323 add.w r3, sp, #35 ; 0x23
|
|
800a712: 6022 str r2, [r4, #0]
|
|
800a714: f8cd a004 str.w sl, [sp, #4]
|
|
800a718: 6861 ldr r1, [r4, #4]
|
|
800a71a: 4628 mov r0, r5
|
|
800a71c: f7ff fee8 bl 800a4f0 <__cvt>
|
|
800a720: f00a 03df and.w r3, sl, #223 ; 0xdf
|
|
800a724: 2b47 cmp r3, #71 ; 0x47
|
|
800a726: 4680 mov r8, r0
|
|
800a728: d109 bne.n 800a73e <_printf_float+0x126>
|
|
800a72a: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800a72c: 1cd8 adds r0, r3, #3
|
|
800a72e: db02 blt.n 800a736 <_printf_float+0x11e>
|
|
800a730: 6862 ldr r2, [r4, #4]
|
|
800a732: 4293 cmp r3, r2
|
|
800a734: dd47 ble.n 800a7c6 <_printf_float+0x1ae>
|
|
800a736: f1aa 0a02 sub.w sl, sl, #2
|
|
800a73a: fa5f fa8a uxtb.w sl, sl
|
|
800a73e: f1ba 0f65 cmp.w sl, #101 ; 0x65
|
|
800a742: 9909 ldr r1, [sp, #36] ; 0x24
|
|
800a744: d824 bhi.n 800a790 <_printf_float+0x178>
|
|
800a746: 3901 subs r1, #1
|
|
800a748: 4652 mov r2, sl
|
|
800a74a: f104 0050 add.w r0, r4, #80 ; 0x50
|
|
800a74e: 9109 str r1, [sp, #36] ; 0x24
|
|
800a750: f7ff ff2f bl 800a5b2 <__exponent>
|
|
800a754: 9a0a ldr r2, [sp, #40] ; 0x28
|
|
800a756: 1813 adds r3, r2, r0
|
|
800a758: 2a01 cmp r2, #1
|
|
800a75a: 4681 mov r9, r0
|
|
800a75c: 6123 str r3, [r4, #16]
|
|
800a75e: dc02 bgt.n 800a766 <_printf_float+0x14e>
|
|
800a760: 6822 ldr r2, [r4, #0]
|
|
800a762: 07d1 lsls r1, r2, #31
|
|
800a764: d501 bpl.n 800a76a <_printf_float+0x152>
|
|
800a766: 3301 adds r3, #1
|
|
800a768: 6123 str r3, [r4, #16]
|
|
800a76a: f89d 3023 ldrb.w r3, [sp, #35] ; 0x23
|
|
800a76e: 2b00 cmp r3, #0
|
|
800a770: d0a5 beq.n 800a6be <_printf_float+0xa6>
|
|
800a772: 232d movs r3, #45 ; 0x2d
|
|
800a774: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
|
800a778: e7a1 b.n 800a6be <_printf_float+0xa6>
|
|
800a77a: f1ba 0f67 cmp.w sl, #103 ; 0x67
|
|
800a77e: f000 8177 beq.w 800aa70 <_printf_float+0x458>
|
|
800a782: f1ba 0f47 cmp.w sl, #71 ; 0x47
|
|
800a786: d1bb bne.n 800a700 <_printf_float+0xe8>
|
|
800a788: 2900 cmp r1, #0
|
|
800a78a: d1b9 bne.n 800a700 <_printf_float+0xe8>
|
|
800a78c: 2301 movs r3, #1
|
|
800a78e: e7b6 b.n 800a6fe <_printf_float+0xe6>
|
|
800a790: f1ba 0f66 cmp.w sl, #102 ; 0x66
|
|
800a794: d119 bne.n 800a7ca <_printf_float+0x1b2>
|
|
800a796: 2900 cmp r1, #0
|
|
800a798: 6863 ldr r3, [r4, #4]
|
|
800a79a: dd0c ble.n 800a7b6 <_printf_float+0x19e>
|
|
800a79c: 6121 str r1, [r4, #16]
|
|
800a79e: b913 cbnz r3, 800a7a6 <_printf_float+0x18e>
|
|
800a7a0: 6822 ldr r2, [r4, #0]
|
|
800a7a2: 07d2 lsls r2, r2, #31
|
|
800a7a4: d502 bpl.n 800a7ac <_printf_float+0x194>
|
|
800a7a6: 3301 adds r3, #1
|
|
800a7a8: 440b add r3, r1
|
|
800a7aa: 6123 str r3, [r4, #16]
|
|
800a7ac: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800a7ae: 65a3 str r3, [r4, #88] ; 0x58
|
|
800a7b0: f04f 0900 mov.w r9, #0
|
|
800a7b4: e7d9 b.n 800a76a <_printf_float+0x152>
|
|
800a7b6: b913 cbnz r3, 800a7be <_printf_float+0x1a6>
|
|
800a7b8: 6822 ldr r2, [r4, #0]
|
|
800a7ba: 07d0 lsls r0, r2, #31
|
|
800a7bc: d501 bpl.n 800a7c2 <_printf_float+0x1aa>
|
|
800a7be: 3302 adds r3, #2
|
|
800a7c0: e7f3 b.n 800a7aa <_printf_float+0x192>
|
|
800a7c2: 2301 movs r3, #1
|
|
800a7c4: e7f1 b.n 800a7aa <_printf_float+0x192>
|
|
800a7c6: f04f 0a67 mov.w sl, #103 ; 0x67
|
|
800a7ca: e9dd 3209 ldrd r3, r2, [sp, #36] ; 0x24
|
|
800a7ce: 4293 cmp r3, r2
|
|
800a7d0: db05 blt.n 800a7de <_printf_float+0x1c6>
|
|
800a7d2: 6822 ldr r2, [r4, #0]
|
|
800a7d4: 6123 str r3, [r4, #16]
|
|
800a7d6: 07d1 lsls r1, r2, #31
|
|
800a7d8: d5e8 bpl.n 800a7ac <_printf_float+0x194>
|
|
800a7da: 3301 adds r3, #1
|
|
800a7dc: e7e5 b.n 800a7aa <_printf_float+0x192>
|
|
800a7de: 2b00 cmp r3, #0
|
|
800a7e0: bfd4 ite le
|
|
800a7e2: f1c3 0302 rsble r3, r3, #2
|
|
800a7e6: 2301 movgt r3, #1
|
|
800a7e8: 4413 add r3, r2
|
|
800a7ea: e7de b.n 800a7aa <_printf_float+0x192>
|
|
800a7ec: 6823 ldr r3, [r4, #0]
|
|
800a7ee: 055a lsls r2, r3, #21
|
|
800a7f0: d407 bmi.n 800a802 <_printf_float+0x1ea>
|
|
800a7f2: 6923 ldr r3, [r4, #16]
|
|
800a7f4: 4642 mov r2, r8
|
|
800a7f6: 4631 mov r1, r6
|
|
800a7f8: 4628 mov r0, r5
|
|
800a7fa: 47b8 blx r7
|
|
800a7fc: 3001 adds r0, #1
|
|
800a7fe: d12b bne.n 800a858 <_printf_float+0x240>
|
|
800a800: e767 b.n 800a6d2 <_printf_float+0xba>
|
|
800a802: f1ba 0f65 cmp.w sl, #101 ; 0x65
|
|
800a806: f240 80dc bls.w 800a9c2 <_printf_float+0x3aa>
|
|
800a80a: 2200 movs r2, #0
|
|
800a80c: 2300 movs r3, #0
|
|
800a80e: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
|
800a812: f7f6 f961 bl 8000ad8 <__aeabi_dcmpeq>
|
|
800a816: 2800 cmp r0, #0
|
|
800a818: d033 beq.n 800a882 <_printf_float+0x26a>
|
|
800a81a: 2301 movs r3, #1
|
|
800a81c: 4a41 ldr r2, [pc, #260] ; (800a924 <_printf_float+0x30c>)
|
|
800a81e: 4631 mov r1, r6
|
|
800a820: 4628 mov r0, r5
|
|
800a822: 47b8 blx r7
|
|
800a824: 3001 adds r0, #1
|
|
800a826: f43f af54 beq.w 800a6d2 <_printf_float+0xba>
|
|
800a82a: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
|
800a82e: 429a cmp r2, r3
|
|
800a830: db02 blt.n 800a838 <_printf_float+0x220>
|
|
800a832: 6823 ldr r3, [r4, #0]
|
|
800a834: 07d8 lsls r0, r3, #31
|
|
800a836: d50f bpl.n 800a858 <_printf_float+0x240>
|
|
800a838: e9dd 2304 ldrd r2, r3, [sp, #16]
|
|
800a83c: 4631 mov r1, r6
|
|
800a83e: 4628 mov r0, r5
|
|
800a840: 47b8 blx r7
|
|
800a842: 3001 adds r0, #1
|
|
800a844: f43f af45 beq.w 800a6d2 <_printf_float+0xba>
|
|
800a848: f04f 0800 mov.w r8, #0
|
|
800a84c: f104 091a add.w r9, r4, #26
|
|
800a850: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800a852: 3b01 subs r3, #1
|
|
800a854: 4543 cmp r3, r8
|
|
800a856: dc09 bgt.n 800a86c <_printf_float+0x254>
|
|
800a858: 6823 ldr r3, [r4, #0]
|
|
800a85a: 079b lsls r3, r3, #30
|
|
800a85c: f100 8103 bmi.w 800aa66 <_printf_float+0x44e>
|
|
800a860: 68e0 ldr r0, [r4, #12]
|
|
800a862: 9b0b ldr r3, [sp, #44] ; 0x2c
|
|
800a864: 4298 cmp r0, r3
|
|
800a866: bfb8 it lt
|
|
800a868: 4618 movlt r0, r3
|
|
800a86a: e734 b.n 800a6d6 <_printf_float+0xbe>
|
|
800a86c: 2301 movs r3, #1
|
|
800a86e: 464a mov r2, r9
|
|
800a870: 4631 mov r1, r6
|
|
800a872: 4628 mov r0, r5
|
|
800a874: 47b8 blx r7
|
|
800a876: 3001 adds r0, #1
|
|
800a878: f43f af2b beq.w 800a6d2 <_printf_float+0xba>
|
|
800a87c: f108 0801 add.w r8, r8, #1
|
|
800a880: e7e6 b.n 800a850 <_printf_float+0x238>
|
|
800a882: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800a884: 2b00 cmp r3, #0
|
|
800a886: dc2b bgt.n 800a8e0 <_printf_float+0x2c8>
|
|
800a888: 2301 movs r3, #1
|
|
800a88a: 4a26 ldr r2, [pc, #152] ; (800a924 <_printf_float+0x30c>)
|
|
800a88c: 4631 mov r1, r6
|
|
800a88e: 4628 mov r0, r5
|
|
800a890: 47b8 blx r7
|
|
800a892: 3001 adds r0, #1
|
|
800a894: f43f af1d beq.w 800a6d2 <_printf_float+0xba>
|
|
800a898: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800a89a: b923 cbnz r3, 800a8a6 <_printf_float+0x28e>
|
|
800a89c: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800a89e: b913 cbnz r3, 800a8a6 <_printf_float+0x28e>
|
|
800a8a0: 6823 ldr r3, [r4, #0]
|
|
800a8a2: 07d9 lsls r1, r3, #31
|
|
800a8a4: d5d8 bpl.n 800a858 <_printf_float+0x240>
|
|
800a8a6: e9dd 2304 ldrd r2, r3, [sp, #16]
|
|
800a8aa: 4631 mov r1, r6
|
|
800a8ac: 4628 mov r0, r5
|
|
800a8ae: 47b8 blx r7
|
|
800a8b0: 3001 adds r0, #1
|
|
800a8b2: f43f af0e beq.w 800a6d2 <_printf_float+0xba>
|
|
800a8b6: f04f 0900 mov.w r9, #0
|
|
800a8ba: f104 0a1a add.w sl, r4, #26
|
|
800a8be: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800a8c0: 425b negs r3, r3
|
|
800a8c2: 454b cmp r3, r9
|
|
800a8c4: dc01 bgt.n 800a8ca <_printf_float+0x2b2>
|
|
800a8c6: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800a8c8: e794 b.n 800a7f4 <_printf_float+0x1dc>
|
|
800a8ca: 2301 movs r3, #1
|
|
800a8cc: 4652 mov r2, sl
|
|
800a8ce: 4631 mov r1, r6
|
|
800a8d0: 4628 mov r0, r5
|
|
800a8d2: 47b8 blx r7
|
|
800a8d4: 3001 adds r0, #1
|
|
800a8d6: f43f aefc beq.w 800a6d2 <_printf_float+0xba>
|
|
800a8da: f109 0901 add.w r9, r9, #1
|
|
800a8de: e7ee b.n 800a8be <_printf_float+0x2a6>
|
|
800a8e0: 9a0a ldr r2, [sp, #40] ; 0x28
|
|
800a8e2: 6da3 ldr r3, [r4, #88] ; 0x58
|
|
800a8e4: 429a cmp r2, r3
|
|
800a8e6: bfa8 it ge
|
|
800a8e8: 461a movge r2, r3
|
|
800a8ea: 2a00 cmp r2, #0
|
|
800a8ec: 4691 mov r9, r2
|
|
800a8ee: dd07 ble.n 800a900 <_printf_float+0x2e8>
|
|
800a8f0: 4613 mov r3, r2
|
|
800a8f2: 4631 mov r1, r6
|
|
800a8f4: 4642 mov r2, r8
|
|
800a8f6: 4628 mov r0, r5
|
|
800a8f8: 47b8 blx r7
|
|
800a8fa: 3001 adds r0, #1
|
|
800a8fc: f43f aee9 beq.w 800a6d2 <_printf_float+0xba>
|
|
800a900: f104 031a add.w r3, r4, #26
|
|
800a904: f04f 0b00 mov.w fp, #0
|
|
800a908: ea29 79e9 bic.w r9, r9, r9, asr #31
|
|
800a90c: 9306 str r3, [sp, #24]
|
|
800a90e: e015 b.n 800a93c <_printf_float+0x324>
|
|
800a910: 7fefffff .word 0x7fefffff
|
|
800a914: 0800e93c .word 0x0800e93c
|
|
800a918: 0800e938 .word 0x0800e938
|
|
800a91c: 0800e944 .word 0x0800e944
|
|
800a920: 0800e940 .word 0x0800e940
|
|
800a924: 0800e948 .word 0x0800e948
|
|
800a928: 2301 movs r3, #1
|
|
800a92a: 9a06 ldr r2, [sp, #24]
|
|
800a92c: 4631 mov r1, r6
|
|
800a92e: 4628 mov r0, r5
|
|
800a930: 47b8 blx r7
|
|
800a932: 3001 adds r0, #1
|
|
800a934: f43f aecd beq.w 800a6d2 <_printf_float+0xba>
|
|
800a938: f10b 0b01 add.w fp, fp, #1
|
|
800a93c: f8d4 a058 ldr.w sl, [r4, #88] ; 0x58
|
|
800a940: ebaa 0309 sub.w r3, sl, r9
|
|
800a944: 455b cmp r3, fp
|
|
800a946: dcef bgt.n 800a928 <_printf_float+0x310>
|
|
800a948: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
|
800a94c: 429a cmp r2, r3
|
|
800a94e: 44d0 add r8, sl
|
|
800a950: db15 blt.n 800a97e <_printf_float+0x366>
|
|
800a952: 6823 ldr r3, [r4, #0]
|
|
800a954: 07da lsls r2, r3, #31
|
|
800a956: d412 bmi.n 800a97e <_printf_float+0x366>
|
|
800a958: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800a95a: 9909 ldr r1, [sp, #36] ; 0x24
|
|
800a95c: eba3 020a sub.w r2, r3, sl
|
|
800a960: eba3 0a01 sub.w sl, r3, r1
|
|
800a964: 4592 cmp sl, r2
|
|
800a966: bfa8 it ge
|
|
800a968: 4692 movge sl, r2
|
|
800a96a: f1ba 0f00 cmp.w sl, #0
|
|
800a96e: dc0e bgt.n 800a98e <_printf_float+0x376>
|
|
800a970: f04f 0800 mov.w r8, #0
|
|
800a974: ea2a 7aea bic.w sl, sl, sl, asr #31
|
|
800a978: f104 091a add.w r9, r4, #26
|
|
800a97c: e019 b.n 800a9b2 <_printf_float+0x39a>
|
|
800a97e: e9dd 2304 ldrd r2, r3, [sp, #16]
|
|
800a982: 4631 mov r1, r6
|
|
800a984: 4628 mov r0, r5
|
|
800a986: 47b8 blx r7
|
|
800a988: 3001 adds r0, #1
|
|
800a98a: d1e5 bne.n 800a958 <_printf_float+0x340>
|
|
800a98c: e6a1 b.n 800a6d2 <_printf_float+0xba>
|
|
800a98e: 4653 mov r3, sl
|
|
800a990: 4642 mov r2, r8
|
|
800a992: 4631 mov r1, r6
|
|
800a994: 4628 mov r0, r5
|
|
800a996: 47b8 blx r7
|
|
800a998: 3001 adds r0, #1
|
|
800a99a: d1e9 bne.n 800a970 <_printf_float+0x358>
|
|
800a99c: e699 b.n 800a6d2 <_printf_float+0xba>
|
|
800a99e: 2301 movs r3, #1
|
|
800a9a0: 464a mov r2, r9
|
|
800a9a2: 4631 mov r1, r6
|
|
800a9a4: 4628 mov r0, r5
|
|
800a9a6: 47b8 blx r7
|
|
800a9a8: 3001 adds r0, #1
|
|
800a9aa: f43f ae92 beq.w 800a6d2 <_printf_float+0xba>
|
|
800a9ae: f108 0801 add.w r8, r8, #1
|
|
800a9b2: e9dd 2309 ldrd r2, r3, [sp, #36] ; 0x24
|
|
800a9b6: 1a9b subs r3, r3, r2
|
|
800a9b8: eba3 030a sub.w r3, r3, sl
|
|
800a9bc: 4543 cmp r3, r8
|
|
800a9be: dcee bgt.n 800a99e <_printf_float+0x386>
|
|
800a9c0: e74a b.n 800a858 <_printf_float+0x240>
|
|
800a9c2: 9a0a ldr r2, [sp, #40] ; 0x28
|
|
800a9c4: 2a01 cmp r2, #1
|
|
800a9c6: dc01 bgt.n 800a9cc <_printf_float+0x3b4>
|
|
800a9c8: 07db lsls r3, r3, #31
|
|
800a9ca: d53a bpl.n 800aa42 <_printf_float+0x42a>
|
|
800a9cc: 2301 movs r3, #1
|
|
800a9ce: 4642 mov r2, r8
|
|
800a9d0: 4631 mov r1, r6
|
|
800a9d2: 4628 mov r0, r5
|
|
800a9d4: 47b8 blx r7
|
|
800a9d6: 3001 adds r0, #1
|
|
800a9d8: f43f ae7b beq.w 800a6d2 <_printf_float+0xba>
|
|
800a9dc: e9dd 2304 ldrd r2, r3, [sp, #16]
|
|
800a9e0: 4631 mov r1, r6
|
|
800a9e2: 4628 mov r0, r5
|
|
800a9e4: 47b8 blx r7
|
|
800a9e6: 3001 adds r0, #1
|
|
800a9e8: f108 0801 add.w r8, r8, #1
|
|
800a9ec: f43f ae71 beq.w 800a6d2 <_printf_float+0xba>
|
|
800a9f0: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800a9f2: 2200 movs r2, #0
|
|
800a9f4: f103 3aff add.w sl, r3, #4294967295
|
|
800a9f8: e9d4 0112 ldrd r0, r1, [r4, #72] ; 0x48
|
|
800a9fc: 2300 movs r3, #0
|
|
800a9fe: f7f6 f86b bl 8000ad8 <__aeabi_dcmpeq>
|
|
800aa02: b9c8 cbnz r0, 800aa38 <_printf_float+0x420>
|
|
800aa04: 4653 mov r3, sl
|
|
800aa06: 4642 mov r2, r8
|
|
800aa08: 4631 mov r1, r6
|
|
800aa0a: 4628 mov r0, r5
|
|
800aa0c: 47b8 blx r7
|
|
800aa0e: 3001 adds r0, #1
|
|
800aa10: d10e bne.n 800aa30 <_printf_float+0x418>
|
|
800aa12: e65e b.n 800a6d2 <_printf_float+0xba>
|
|
800aa14: 2301 movs r3, #1
|
|
800aa16: 4652 mov r2, sl
|
|
800aa18: 4631 mov r1, r6
|
|
800aa1a: 4628 mov r0, r5
|
|
800aa1c: 47b8 blx r7
|
|
800aa1e: 3001 adds r0, #1
|
|
800aa20: f43f ae57 beq.w 800a6d2 <_printf_float+0xba>
|
|
800aa24: f108 0801 add.w r8, r8, #1
|
|
800aa28: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800aa2a: 3b01 subs r3, #1
|
|
800aa2c: 4543 cmp r3, r8
|
|
800aa2e: dcf1 bgt.n 800aa14 <_printf_float+0x3fc>
|
|
800aa30: 464b mov r3, r9
|
|
800aa32: f104 0250 add.w r2, r4, #80 ; 0x50
|
|
800aa36: e6de b.n 800a7f6 <_printf_float+0x1de>
|
|
800aa38: f04f 0800 mov.w r8, #0
|
|
800aa3c: f104 0a1a add.w sl, r4, #26
|
|
800aa40: e7f2 b.n 800aa28 <_printf_float+0x410>
|
|
800aa42: 2301 movs r3, #1
|
|
800aa44: e7df b.n 800aa06 <_printf_float+0x3ee>
|
|
800aa46: 2301 movs r3, #1
|
|
800aa48: 464a mov r2, r9
|
|
800aa4a: 4631 mov r1, r6
|
|
800aa4c: 4628 mov r0, r5
|
|
800aa4e: 47b8 blx r7
|
|
800aa50: 3001 adds r0, #1
|
|
800aa52: f43f ae3e beq.w 800a6d2 <_printf_float+0xba>
|
|
800aa56: f108 0801 add.w r8, r8, #1
|
|
800aa5a: 68e3 ldr r3, [r4, #12]
|
|
800aa5c: 9a0b ldr r2, [sp, #44] ; 0x2c
|
|
800aa5e: 1a9b subs r3, r3, r2
|
|
800aa60: 4543 cmp r3, r8
|
|
800aa62: dcf0 bgt.n 800aa46 <_printf_float+0x42e>
|
|
800aa64: e6fc b.n 800a860 <_printf_float+0x248>
|
|
800aa66: f04f 0800 mov.w r8, #0
|
|
800aa6a: f104 0919 add.w r9, r4, #25
|
|
800aa6e: e7f4 b.n 800aa5a <_printf_float+0x442>
|
|
800aa70: 2900 cmp r1, #0
|
|
800aa72: f43f ae8b beq.w 800a78c <_printf_float+0x174>
|
|
800aa76: 2300 movs r3, #0
|
|
800aa78: e9cd 0302 strd r0, r3, [sp, #8]
|
|
800aa7c: ab09 add r3, sp, #36 ; 0x24
|
|
800aa7e: 9300 str r3, [sp, #0]
|
|
800aa80: ec49 8b10 vmov d0, r8, r9
|
|
800aa84: 6022 str r2, [r4, #0]
|
|
800aa86: f8cd a004 str.w sl, [sp, #4]
|
|
800aa8a: f10d 0323 add.w r3, sp, #35 ; 0x23
|
|
800aa8e: 4628 mov r0, r5
|
|
800aa90: f7ff fd2e bl 800a4f0 <__cvt>
|
|
800aa94: 4680 mov r8, r0
|
|
800aa96: e648 b.n 800a72a <_printf_float+0x112>
|
|
|
|
0800aa98 <_printf_common>:
|
|
800aa98: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800aa9c: 4691 mov r9, r2
|
|
800aa9e: 461f mov r7, r3
|
|
800aaa0: 688a ldr r2, [r1, #8]
|
|
800aaa2: 690b ldr r3, [r1, #16]
|
|
800aaa4: f8dd 8020 ldr.w r8, [sp, #32]
|
|
800aaa8: 4293 cmp r3, r2
|
|
800aaaa: bfb8 it lt
|
|
800aaac: 4613 movlt r3, r2
|
|
800aaae: f8c9 3000 str.w r3, [r9]
|
|
800aab2: f891 2043 ldrb.w r2, [r1, #67] ; 0x43
|
|
800aab6: 4606 mov r6, r0
|
|
800aab8: 460c mov r4, r1
|
|
800aaba: b112 cbz r2, 800aac2 <_printf_common+0x2a>
|
|
800aabc: 3301 adds r3, #1
|
|
800aabe: f8c9 3000 str.w r3, [r9]
|
|
800aac2: 6823 ldr r3, [r4, #0]
|
|
800aac4: 0699 lsls r1, r3, #26
|
|
800aac6: bf42 ittt mi
|
|
800aac8: f8d9 3000 ldrmi.w r3, [r9]
|
|
800aacc: 3302 addmi r3, #2
|
|
800aace: f8c9 3000 strmi.w r3, [r9]
|
|
800aad2: 6825 ldr r5, [r4, #0]
|
|
800aad4: f015 0506 ands.w r5, r5, #6
|
|
800aad8: d107 bne.n 800aaea <_printf_common+0x52>
|
|
800aada: f104 0a19 add.w sl, r4, #25
|
|
800aade: 68e3 ldr r3, [r4, #12]
|
|
800aae0: f8d9 2000 ldr.w r2, [r9]
|
|
800aae4: 1a9b subs r3, r3, r2
|
|
800aae6: 42ab cmp r3, r5
|
|
800aae8: dc28 bgt.n 800ab3c <_printf_common+0xa4>
|
|
800aaea: f894 3043 ldrb.w r3, [r4, #67] ; 0x43
|
|
800aaee: 6822 ldr r2, [r4, #0]
|
|
800aaf0: 3300 adds r3, #0
|
|
800aaf2: bf18 it ne
|
|
800aaf4: 2301 movne r3, #1
|
|
800aaf6: 0692 lsls r2, r2, #26
|
|
800aaf8: d42d bmi.n 800ab56 <_printf_common+0xbe>
|
|
800aafa: f104 0243 add.w r2, r4, #67 ; 0x43
|
|
800aafe: 4639 mov r1, r7
|
|
800ab00: 4630 mov r0, r6
|
|
800ab02: 47c0 blx r8
|
|
800ab04: 3001 adds r0, #1
|
|
800ab06: d020 beq.n 800ab4a <_printf_common+0xb2>
|
|
800ab08: 6823 ldr r3, [r4, #0]
|
|
800ab0a: 68e5 ldr r5, [r4, #12]
|
|
800ab0c: f8d9 2000 ldr.w r2, [r9]
|
|
800ab10: f003 0306 and.w r3, r3, #6
|
|
800ab14: 2b04 cmp r3, #4
|
|
800ab16: bf08 it eq
|
|
800ab18: 1aad subeq r5, r5, r2
|
|
800ab1a: 68a3 ldr r3, [r4, #8]
|
|
800ab1c: 6922 ldr r2, [r4, #16]
|
|
800ab1e: bf0c ite eq
|
|
800ab20: ea25 75e5 biceq.w r5, r5, r5, asr #31
|
|
800ab24: 2500 movne r5, #0
|
|
800ab26: 4293 cmp r3, r2
|
|
800ab28: bfc4 itt gt
|
|
800ab2a: 1a9b subgt r3, r3, r2
|
|
800ab2c: 18ed addgt r5, r5, r3
|
|
800ab2e: f04f 0900 mov.w r9, #0
|
|
800ab32: 341a adds r4, #26
|
|
800ab34: 454d cmp r5, r9
|
|
800ab36: d11a bne.n 800ab6e <_printf_common+0xd6>
|
|
800ab38: 2000 movs r0, #0
|
|
800ab3a: e008 b.n 800ab4e <_printf_common+0xb6>
|
|
800ab3c: 2301 movs r3, #1
|
|
800ab3e: 4652 mov r2, sl
|
|
800ab40: 4639 mov r1, r7
|
|
800ab42: 4630 mov r0, r6
|
|
800ab44: 47c0 blx r8
|
|
800ab46: 3001 adds r0, #1
|
|
800ab48: d103 bne.n 800ab52 <_printf_common+0xba>
|
|
800ab4a: f04f 30ff mov.w r0, #4294967295
|
|
800ab4e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
800ab52: 3501 adds r5, #1
|
|
800ab54: e7c3 b.n 800aade <_printf_common+0x46>
|
|
800ab56: 18e1 adds r1, r4, r3
|
|
800ab58: 1c5a adds r2, r3, #1
|
|
800ab5a: 2030 movs r0, #48 ; 0x30
|
|
800ab5c: f881 0043 strb.w r0, [r1, #67] ; 0x43
|
|
800ab60: 4422 add r2, r4
|
|
800ab62: f894 1045 ldrb.w r1, [r4, #69] ; 0x45
|
|
800ab66: f882 1043 strb.w r1, [r2, #67] ; 0x43
|
|
800ab6a: 3302 adds r3, #2
|
|
800ab6c: e7c5 b.n 800aafa <_printf_common+0x62>
|
|
800ab6e: 2301 movs r3, #1
|
|
800ab70: 4622 mov r2, r4
|
|
800ab72: 4639 mov r1, r7
|
|
800ab74: 4630 mov r0, r6
|
|
800ab76: 47c0 blx r8
|
|
800ab78: 3001 adds r0, #1
|
|
800ab7a: d0e6 beq.n 800ab4a <_printf_common+0xb2>
|
|
800ab7c: f109 0901 add.w r9, r9, #1
|
|
800ab80: e7d8 b.n 800ab34 <_printf_common+0x9c>
|
|
...
|
|
|
|
0800ab84 <_printf_i>:
|
|
800ab84: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
|
|
800ab88: f101 0c43 add.w ip, r1, #67 ; 0x43
|
|
800ab8c: 460c mov r4, r1
|
|
800ab8e: 7e09 ldrb r1, [r1, #24]
|
|
800ab90: b085 sub sp, #20
|
|
800ab92: 296e cmp r1, #110 ; 0x6e
|
|
800ab94: 4617 mov r7, r2
|
|
800ab96: 4606 mov r6, r0
|
|
800ab98: 4698 mov r8, r3
|
|
800ab9a: 9a0c ldr r2, [sp, #48] ; 0x30
|
|
800ab9c: f000 80b3 beq.w 800ad06 <_printf_i+0x182>
|
|
800aba0: d822 bhi.n 800abe8 <_printf_i+0x64>
|
|
800aba2: 2963 cmp r1, #99 ; 0x63
|
|
800aba4: d036 beq.n 800ac14 <_printf_i+0x90>
|
|
800aba6: d80a bhi.n 800abbe <_printf_i+0x3a>
|
|
800aba8: 2900 cmp r1, #0
|
|
800abaa: f000 80b9 beq.w 800ad20 <_printf_i+0x19c>
|
|
800abae: 2958 cmp r1, #88 ; 0x58
|
|
800abb0: f000 8083 beq.w 800acba <_printf_i+0x136>
|
|
800abb4: f104 0542 add.w r5, r4, #66 ; 0x42
|
|
800abb8: f884 1042 strb.w r1, [r4, #66] ; 0x42
|
|
800abbc: e032 b.n 800ac24 <_printf_i+0xa0>
|
|
800abbe: 2964 cmp r1, #100 ; 0x64
|
|
800abc0: d001 beq.n 800abc6 <_printf_i+0x42>
|
|
800abc2: 2969 cmp r1, #105 ; 0x69
|
|
800abc4: d1f6 bne.n 800abb4 <_printf_i+0x30>
|
|
800abc6: 6820 ldr r0, [r4, #0]
|
|
800abc8: 6813 ldr r3, [r2, #0]
|
|
800abca: 0605 lsls r5, r0, #24
|
|
800abcc: f103 0104 add.w r1, r3, #4
|
|
800abd0: d52a bpl.n 800ac28 <_printf_i+0xa4>
|
|
800abd2: 681b ldr r3, [r3, #0]
|
|
800abd4: 6011 str r1, [r2, #0]
|
|
800abd6: 2b00 cmp r3, #0
|
|
800abd8: da03 bge.n 800abe2 <_printf_i+0x5e>
|
|
800abda: 222d movs r2, #45 ; 0x2d
|
|
800abdc: 425b negs r3, r3
|
|
800abde: f884 2043 strb.w r2, [r4, #67] ; 0x43
|
|
800abe2: 486f ldr r0, [pc, #444] ; (800ada0 <_printf_i+0x21c>)
|
|
800abe4: 220a movs r2, #10
|
|
800abe6: e039 b.n 800ac5c <_printf_i+0xd8>
|
|
800abe8: 2973 cmp r1, #115 ; 0x73
|
|
800abea: f000 809d beq.w 800ad28 <_printf_i+0x1a4>
|
|
800abee: d808 bhi.n 800ac02 <_printf_i+0x7e>
|
|
800abf0: 296f cmp r1, #111 ; 0x6f
|
|
800abf2: d020 beq.n 800ac36 <_printf_i+0xb2>
|
|
800abf4: 2970 cmp r1, #112 ; 0x70
|
|
800abf6: d1dd bne.n 800abb4 <_printf_i+0x30>
|
|
800abf8: 6823 ldr r3, [r4, #0]
|
|
800abfa: f043 0320 orr.w r3, r3, #32
|
|
800abfe: 6023 str r3, [r4, #0]
|
|
800ac00: e003 b.n 800ac0a <_printf_i+0x86>
|
|
800ac02: 2975 cmp r1, #117 ; 0x75
|
|
800ac04: d017 beq.n 800ac36 <_printf_i+0xb2>
|
|
800ac06: 2978 cmp r1, #120 ; 0x78
|
|
800ac08: d1d4 bne.n 800abb4 <_printf_i+0x30>
|
|
800ac0a: 2378 movs r3, #120 ; 0x78
|
|
800ac0c: f884 3045 strb.w r3, [r4, #69] ; 0x45
|
|
800ac10: 4864 ldr r0, [pc, #400] ; (800ada4 <_printf_i+0x220>)
|
|
800ac12: e055 b.n 800acc0 <_printf_i+0x13c>
|
|
800ac14: 6813 ldr r3, [r2, #0]
|
|
800ac16: 1d19 adds r1, r3, #4
|
|
800ac18: 681b ldr r3, [r3, #0]
|
|
800ac1a: 6011 str r1, [r2, #0]
|
|
800ac1c: f104 0542 add.w r5, r4, #66 ; 0x42
|
|
800ac20: f884 3042 strb.w r3, [r4, #66] ; 0x42
|
|
800ac24: 2301 movs r3, #1
|
|
800ac26: e08c b.n 800ad42 <_printf_i+0x1be>
|
|
800ac28: 681b ldr r3, [r3, #0]
|
|
800ac2a: 6011 str r1, [r2, #0]
|
|
800ac2c: f010 0f40 tst.w r0, #64 ; 0x40
|
|
800ac30: bf18 it ne
|
|
800ac32: b21b sxthne r3, r3
|
|
800ac34: e7cf b.n 800abd6 <_printf_i+0x52>
|
|
800ac36: 6813 ldr r3, [r2, #0]
|
|
800ac38: 6825 ldr r5, [r4, #0]
|
|
800ac3a: 1d18 adds r0, r3, #4
|
|
800ac3c: 6010 str r0, [r2, #0]
|
|
800ac3e: 0628 lsls r0, r5, #24
|
|
800ac40: d501 bpl.n 800ac46 <_printf_i+0xc2>
|
|
800ac42: 681b ldr r3, [r3, #0]
|
|
800ac44: e002 b.n 800ac4c <_printf_i+0xc8>
|
|
800ac46: 0668 lsls r0, r5, #25
|
|
800ac48: d5fb bpl.n 800ac42 <_printf_i+0xbe>
|
|
800ac4a: 881b ldrh r3, [r3, #0]
|
|
800ac4c: 4854 ldr r0, [pc, #336] ; (800ada0 <_printf_i+0x21c>)
|
|
800ac4e: 296f cmp r1, #111 ; 0x6f
|
|
800ac50: bf14 ite ne
|
|
800ac52: 220a movne r2, #10
|
|
800ac54: 2208 moveq r2, #8
|
|
800ac56: 2100 movs r1, #0
|
|
800ac58: f884 1043 strb.w r1, [r4, #67] ; 0x43
|
|
800ac5c: 6865 ldr r5, [r4, #4]
|
|
800ac5e: 60a5 str r5, [r4, #8]
|
|
800ac60: 2d00 cmp r5, #0
|
|
800ac62: f2c0 8095 blt.w 800ad90 <_printf_i+0x20c>
|
|
800ac66: 6821 ldr r1, [r4, #0]
|
|
800ac68: f021 0104 bic.w r1, r1, #4
|
|
800ac6c: 6021 str r1, [r4, #0]
|
|
800ac6e: 2b00 cmp r3, #0
|
|
800ac70: d13d bne.n 800acee <_printf_i+0x16a>
|
|
800ac72: 2d00 cmp r5, #0
|
|
800ac74: f040 808e bne.w 800ad94 <_printf_i+0x210>
|
|
800ac78: 4665 mov r5, ip
|
|
800ac7a: 2a08 cmp r2, #8
|
|
800ac7c: d10b bne.n 800ac96 <_printf_i+0x112>
|
|
800ac7e: 6823 ldr r3, [r4, #0]
|
|
800ac80: 07db lsls r3, r3, #31
|
|
800ac82: d508 bpl.n 800ac96 <_printf_i+0x112>
|
|
800ac84: 6923 ldr r3, [r4, #16]
|
|
800ac86: 6862 ldr r2, [r4, #4]
|
|
800ac88: 429a cmp r2, r3
|
|
800ac8a: bfde ittt le
|
|
800ac8c: 2330 movle r3, #48 ; 0x30
|
|
800ac8e: f805 3c01 strble.w r3, [r5, #-1]
|
|
800ac92: f105 35ff addle.w r5, r5, #4294967295
|
|
800ac96: ebac 0305 sub.w r3, ip, r5
|
|
800ac9a: 6123 str r3, [r4, #16]
|
|
800ac9c: f8cd 8000 str.w r8, [sp]
|
|
800aca0: 463b mov r3, r7
|
|
800aca2: aa03 add r2, sp, #12
|
|
800aca4: 4621 mov r1, r4
|
|
800aca6: 4630 mov r0, r6
|
|
800aca8: f7ff fef6 bl 800aa98 <_printf_common>
|
|
800acac: 3001 adds r0, #1
|
|
800acae: d14d bne.n 800ad4c <_printf_i+0x1c8>
|
|
800acb0: f04f 30ff mov.w r0, #4294967295
|
|
800acb4: b005 add sp, #20
|
|
800acb6: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
800acba: 4839 ldr r0, [pc, #228] ; (800ada0 <_printf_i+0x21c>)
|
|
800acbc: f884 1045 strb.w r1, [r4, #69] ; 0x45
|
|
800acc0: 6813 ldr r3, [r2, #0]
|
|
800acc2: 6821 ldr r1, [r4, #0]
|
|
800acc4: 1d1d adds r5, r3, #4
|
|
800acc6: 681b ldr r3, [r3, #0]
|
|
800acc8: 6015 str r5, [r2, #0]
|
|
800acca: 060a lsls r2, r1, #24
|
|
800accc: d50b bpl.n 800ace6 <_printf_i+0x162>
|
|
800acce: 07ca lsls r2, r1, #31
|
|
800acd0: bf44 itt mi
|
|
800acd2: f041 0120 orrmi.w r1, r1, #32
|
|
800acd6: 6021 strmi r1, [r4, #0]
|
|
800acd8: b91b cbnz r3, 800ace2 <_printf_i+0x15e>
|
|
800acda: 6822 ldr r2, [r4, #0]
|
|
800acdc: f022 0220 bic.w r2, r2, #32
|
|
800ace0: 6022 str r2, [r4, #0]
|
|
800ace2: 2210 movs r2, #16
|
|
800ace4: e7b7 b.n 800ac56 <_printf_i+0xd2>
|
|
800ace6: 064d lsls r5, r1, #25
|
|
800ace8: bf48 it mi
|
|
800acea: b29b uxthmi r3, r3
|
|
800acec: e7ef b.n 800acce <_printf_i+0x14a>
|
|
800acee: 4665 mov r5, ip
|
|
800acf0: fbb3 f1f2 udiv r1, r3, r2
|
|
800acf4: fb02 3311 mls r3, r2, r1, r3
|
|
800acf8: 5cc3 ldrb r3, [r0, r3]
|
|
800acfa: f805 3d01 strb.w r3, [r5, #-1]!
|
|
800acfe: 460b mov r3, r1
|
|
800ad00: 2900 cmp r1, #0
|
|
800ad02: d1f5 bne.n 800acf0 <_printf_i+0x16c>
|
|
800ad04: e7b9 b.n 800ac7a <_printf_i+0xf6>
|
|
800ad06: 6813 ldr r3, [r2, #0]
|
|
800ad08: 6825 ldr r5, [r4, #0]
|
|
800ad0a: 6961 ldr r1, [r4, #20]
|
|
800ad0c: 1d18 adds r0, r3, #4
|
|
800ad0e: 6010 str r0, [r2, #0]
|
|
800ad10: 0628 lsls r0, r5, #24
|
|
800ad12: 681b ldr r3, [r3, #0]
|
|
800ad14: d501 bpl.n 800ad1a <_printf_i+0x196>
|
|
800ad16: 6019 str r1, [r3, #0]
|
|
800ad18: e002 b.n 800ad20 <_printf_i+0x19c>
|
|
800ad1a: 066a lsls r2, r5, #25
|
|
800ad1c: d5fb bpl.n 800ad16 <_printf_i+0x192>
|
|
800ad1e: 8019 strh r1, [r3, #0]
|
|
800ad20: 2300 movs r3, #0
|
|
800ad22: 6123 str r3, [r4, #16]
|
|
800ad24: 4665 mov r5, ip
|
|
800ad26: e7b9 b.n 800ac9c <_printf_i+0x118>
|
|
800ad28: 6813 ldr r3, [r2, #0]
|
|
800ad2a: 1d19 adds r1, r3, #4
|
|
800ad2c: 6011 str r1, [r2, #0]
|
|
800ad2e: 681d ldr r5, [r3, #0]
|
|
800ad30: 6862 ldr r2, [r4, #4]
|
|
800ad32: 2100 movs r1, #0
|
|
800ad34: 4628 mov r0, r5
|
|
800ad36: f7f5 fa5b bl 80001f0 <memchr>
|
|
800ad3a: b108 cbz r0, 800ad40 <_printf_i+0x1bc>
|
|
800ad3c: 1b40 subs r0, r0, r5
|
|
800ad3e: 6060 str r0, [r4, #4]
|
|
800ad40: 6863 ldr r3, [r4, #4]
|
|
800ad42: 6123 str r3, [r4, #16]
|
|
800ad44: 2300 movs r3, #0
|
|
800ad46: f884 3043 strb.w r3, [r4, #67] ; 0x43
|
|
800ad4a: e7a7 b.n 800ac9c <_printf_i+0x118>
|
|
800ad4c: 6923 ldr r3, [r4, #16]
|
|
800ad4e: 462a mov r2, r5
|
|
800ad50: 4639 mov r1, r7
|
|
800ad52: 4630 mov r0, r6
|
|
800ad54: 47c0 blx r8
|
|
800ad56: 3001 adds r0, #1
|
|
800ad58: d0aa beq.n 800acb0 <_printf_i+0x12c>
|
|
800ad5a: 6823 ldr r3, [r4, #0]
|
|
800ad5c: 079b lsls r3, r3, #30
|
|
800ad5e: d413 bmi.n 800ad88 <_printf_i+0x204>
|
|
800ad60: 68e0 ldr r0, [r4, #12]
|
|
800ad62: 9b03 ldr r3, [sp, #12]
|
|
800ad64: 4298 cmp r0, r3
|
|
800ad66: bfb8 it lt
|
|
800ad68: 4618 movlt r0, r3
|
|
800ad6a: e7a3 b.n 800acb4 <_printf_i+0x130>
|
|
800ad6c: 2301 movs r3, #1
|
|
800ad6e: 464a mov r2, r9
|
|
800ad70: 4639 mov r1, r7
|
|
800ad72: 4630 mov r0, r6
|
|
800ad74: 47c0 blx r8
|
|
800ad76: 3001 adds r0, #1
|
|
800ad78: d09a beq.n 800acb0 <_printf_i+0x12c>
|
|
800ad7a: 3501 adds r5, #1
|
|
800ad7c: 68e3 ldr r3, [r4, #12]
|
|
800ad7e: 9a03 ldr r2, [sp, #12]
|
|
800ad80: 1a9b subs r3, r3, r2
|
|
800ad82: 42ab cmp r3, r5
|
|
800ad84: dcf2 bgt.n 800ad6c <_printf_i+0x1e8>
|
|
800ad86: e7eb b.n 800ad60 <_printf_i+0x1dc>
|
|
800ad88: 2500 movs r5, #0
|
|
800ad8a: f104 0919 add.w r9, r4, #25
|
|
800ad8e: e7f5 b.n 800ad7c <_printf_i+0x1f8>
|
|
800ad90: 2b00 cmp r3, #0
|
|
800ad92: d1ac bne.n 800acee <_printf_i+0x16a>
|
|
800ad94: 7803 ldrb r3, [r0, #0]
|
|
800ad96: f884 3042 strb.w r3, [r4, #66] ; 0x42
|
|
800ad9a: f104 0542 add.w r5, r4, #66 ; 0x42
|
|
800ad9e: e76c b.n 800ac7a <_printf_i+0xf6>
|
|
800ada0: 0800e94a .word 0x0800e94a
|
|
800ada4: 0800e95b .word 0x0800e95b
|
|
|
|
0800ada8 <_scanf_float>:
|
|
800ada8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800adac: 469a mov sl, r3
|
|
800adae: 688b ldr r3, [r1, #8]
|
|
800adb0: 4616 mov r6, r2
|
|
800adb2: 1e5a subs r2, r3, #1
|
|
800adb4: f5b2 7fae cmp.w r2, #348 ; 0x15c
|
|
800adb8: b087 sub sp, #28
|
|
800adba: bf83 ittte hi
|
|
800adbc: f46f 72ae mvnhi.w r2, #348 ; 0x15c
|
|
800adc0: 189b addhi r3, r3, r2
|
|
800adc2: 9301 strhi r3, [sp, #4]
|
|
800adc4: 2300 movls r3, #0
|
|
800adc6: bf86 itte hi
|
|
800adc8: f240 135d movwhi r3, #349 ; 0x15d
|
|
800adcc: 608b strhi r3, [r1, #8]
|
|
800adce: 9301 strls r3, [sp, #4]
|
|
800add0: 680b ldr r3, [r1, #0]
|
|
800add2: 4688 mov r8, r1
|
|
800add4: f04f 0b00 mov.w fp, #0
|
|
800add8: f443 63f0 orr.w r3, r3, #1920 ; 0x780
|
|
800addc: f848 3b1c str.w r3, [r8], #28
|
|
800ade0: e9cd bb03 strd fp, fp, [sp, #12]
|
|
800ade4: 4607 mov r7, r0
|
|
800ade6: 460c mov r4, r1
|
|
800ade8: 4645 mov r5, r8
|
|
800adea: 465a mov r2, fp
|
|
800adec: 46d9 mov r9, fp
|
|
800adee: f8cd b008 str.w fp, [sp, #8]
|
|
800adf2: 68a1 ldr r1, [r4, #8]
|
|
800adf4: b181 cbz r1, 800ae18 <_scanf_float+0x70>
|
|
800adf6: 6833 ldr r3, [r6, #0]
|
|
800adf8: 781b ldrb r3, [r3, #0]
|
|
800adfa: 2b49 cmp r3, #73 ; 0x49
|
|
800adfc: d071 beq.n 800aee2 <_scanf_float+0x13a>
|
|
800adfe: d84d bhi.n 800ae9c <_scanf_float+0xf4>
|
|
800ae00: 2b39 cmp r3, #57 ; 0x39
|
|
800ae02: d840 bhi.n 800ae86 <_scanf_float+0xde>
|
|
800ae04: 2b31 cmp r3, #49 ; 0x31
|
|
800ae06: f080 8088 bcs.w 800af1a <_scanf_float+0x172>
|
|
800ae0a: 2b2d cmp r3, #45 ; 0x2d
|
|
800ae0c: f000 8090 beq.w 800af30 <_scanf_float+0x188>
|
|
800ae10: d815 bhi.n 800ae3e <_scanf_float+0x96>
|
|
800ae12: 2b2b cmp r3, #43 ; 0x2b
|
|
800ae14: f000 808c beq.w 800af30 <_scanf_float+0x188>
|
|
800ae18: f1b9 0f00 cmp.w r9, #0
|
|
800ae1c: d003 beq.n 800ae26 <_scanf_float+0x7e>
|
|
800ae1e: 6823 ldr r3, [r4, #0]
|
|
800ae20: f423 7380 bic.w r3, r3, #256 ; 0x100
|
|
800ae24: 6023 str r3, [r4, #0]
|
|
800ae26: 3a01 subs r2, #1
|
|
800ae28: 2a01 cmp r2, #1
|
|
800ae2a: f200 80ea bhi.w 800b002 <_scanf_float+0x25a>
|
|
800ae2e: 4545 cmp r5, r8
|
|
800ae30: f200 80dc bhi.w 800afec <_scanf_float+0x244>
|
|
800ae34: 2601 movs r6, #1
|
|
800ae36: 4630 mov r0, r6
|
|
800ae38: b007 add sp, #28
|
|
800ae3a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800ae3e: 2b2e cmp r3, #46 ; 0x2e
|
|
800ae40: f000 809f beq.w 800af82 <_scanf_float+0x1da>
|
|
800ae44: 2b30 cmp r3, #48 ; 0x30
|
|
800ae46: d1e7 bne.n 800ae18 <_scanf_float+0x70>
|
|
800ae48: 6820 ldr r0, [r4, #0]
|
|
800ae4a: f410 7f80 tst.w r0, #256 ; 0x100
|
|
800ae4e: d064 beq.n 800af1a <_scanf_float+0x172>
|
|
800ae50: 9b01 ldr r3, [sp, #4]
|
|
800ae52: f020 0080 bic.w r0, r0, #128 ; 0x80
|
|
800ae56: 6020 str r0, [r4, #0]
|
|
800ae58: f109 0901 add.w r9, r9, #1
|
|
800ae5c: b11b cbz r3, 800ae66 <_scanf_float+0xbe>
|
|
800ae5e: 3b01 subs r3, #1
|
|
800ae60: 3101 adds r1, #1
|
|
800ae62: 9301 str r3, [sp, #4]
|
|
800ae64: 60a1 str r1, [r4, #8]
|
|
800ae66: 68a3 ldr r3, [r4, #8]
|
|
800ae68: 3b01 subs r3, #1
|
|
800ae6a: 60a3 str r3, [r4, #8]
|
|
800ae6c: 6923 ldr r3, [r4, #16]
|
|
800ae6e: 3301 adds r3, #1
|
|
800ae70: 6123 str r3, [r4, #16]
|
|
800ae72: 6873 ldr r3, [r6, #4]
|
|
800ae74: 3b01 subs r3, #1
|
|
800ae76: 2b00 cmp r3, #0
|
|
800ae78: 6073 str r3, [r6, #4]
|
|
800ae7a: f340 80ac ble.w 800afd6 <_scanf_float+0x22e>
|
|
800ae7e: 6833 ldr r3, [r6, #0]
|
|
800ae80: 3301 adds r3, #1
|
|
800ae82: 6033 str r3, [r6, #0]
|
|
800ae84: e7b5 b.n 800adf2 <_scanf_float+0x4a>
|
|
800ae86: 2b45 cmp r3, #69 ; 0x45
|
|
800ae88: f000 8085 beq.w 800af96 <_scanf_float+0x1ee>
|
|
800ae8c: 2b46 cmp r3, #70 ; 0x46
|
|
800ae8e: d06a beq.n 800af66 <_scanf_float+0x1be>
|
|
800ae90: 2b41 cmp r3, #65 ; 0x41
|
|
800ae92: d1c1 bne.n 800ae18 <_scanf_float+0x70>
|
|
800ae94: 2a01 cmp r2, #1
|
|
800ae96: d1bf bne.n 800ae18 <_scanf_float+0x70>
|
|
800ae98: 2202 movs r2, #2
|
|
800ae9a: e046 b.n 800af2a <_scanf_float+0x182>
|
|
800ae9c: 2b65 cmp r3, #101 ; 0x65
|
|
800ae9e: d07a beq.n 800af96 <_scanf_float+0x1ee>
|
|
800aea0: d818 bhi.n 800aed4 <_scanf_float+0x12c>
|
|
800aea2: 2b54 cmp r3, #84 ; 0x54
|
|
800aea4: d066 beq.n 800af74 <_scanf_float+0x1cc>
|
|
800aea6: d811 bhi.n 800aecc <_scanf_float+0x124>
|
|
800aea8: 2b4e cmp r3, #78 ; 0x4e
|
|
800aeaa: d1b5 bne.n 800ae18 <_scanf_float+0x70>
|
|
800aeac: 2a00 cmp r2, #0
|
|
800aeae: d146 bne.n 800af3e <_scanf_float+0x196>
|
|
800aeb0: f1b9 0f00 cmp.w r9, #0
|
|
800aeb4: d145 bne.n 800af42 <_scanf_float+0x19a>
|
|
800aeb6: 6821 ldr r1, [r4, #0]
|
|
800aeb8: f401 60e0 and.w r0, r1, #1792 ; 0x700
|
|
800aebc: f5b0 6fe0 cmp.w r0, #1792 ; 0x700
|
|
800aec0: d13f bne.n 800af42 <_scanf_float+0x19a>
|
|
800aec2: f421 61f0 bic.w r1, r1, #1920 ; 0x780
|
|
800aec6: 6021 str r1, [r4, #0]
|
|
800aec8: 2201 movs r2, #1
|
|
800aeca: e02e b.n 800af2a <_scanf_float+0x182>
|
|
800aecc: 2b59 cmp r3, #89 ; 0x59
|
|
800aece: d01e beq.n 800af0e <_scanf_float+0x166>
|
|
800aed0: 2b61 cmp r3, #97 ; 0x61
|
|
800aed2: e7de b.n 800ae92 <_scanf_float+0xea>
|
|
800aed4: 2b6e cmp r3, #110 ; 0x6e
|
|
800aed6: d0e9 beq.n 800aeac <_scanf_float+0x104>
|
|
800aed8: d815 bhi.n 800af06 <_scanf_float+0x15e>
|
|
800aeda: 2b66 cmp r3, #102 ; 0x66
|
|
800aedc: d043 beq.n 800af66 <_scanf_float+0x1be>
|
|
800aede: 2b69 cmp r3, #105 ; 0x69
|
|
800aee0: d19a bne.n 800ae18 <_scanf_float+0x70>
|
|
800aee2: f1bb 0f00 cmp.w fp, #0
|
|
800aee6: d138 bne.n 800af5a <_scanf_float+0x1b2>
|
|
800aee8: f1b9 0f00 cmp.w r9, #0
|
|
800aeec: d197 bne.n 800ae1e <_scanf_float+0x76>
|
|
800aeee: 6821 ldr r1, [r4, #0]
|
|
800aef0: f401 60e0 and.w r0, r1, #1792 ; 0x700
|
|
800aef4: f5b0 6fe0 cmp.w r0, #1792 ; 0x700
|
|
800aef8: d195 bne.n 800ae26 <_scanf_float+0x7e>
|
|
800aefa: f421 61f0 bic.w r1, r1, #1920 ; 0x780
|
|
800aefe: 6021 str r1, [r4, #0]
|
|
800af00: f04f 0b01 mov.w fp, #1
|
|
800af04: e011 b.n 800af2a <_scanf_float+0x182>
|
|
800af06: 2b74 cmp r3, #116 ; 0x74
|
|
800af08: d034 beq.n 800af74 <_scanf_float+0x1cc>
|
|
800af0a: 2b79 cmp r3, #121 ; 0x79
|
|
800af0c: d184 bne.n 800ae18 <_scanf_float+0x70>
|
|
800af0e: f1bb 0f07 cmp.w fp, #7
|
|
800af12: d181 bne.n 800ae18 <_scanf_float+0x70>
|
|
800af14: f04f 0b08 mov.w fp, #8
|
|
800af18: e007 b.n 800af2a <_scanf_float+0x182>
|
|
800af1a: eb12 0f0b cmn.w r2, fp
|
|
800af1e: f47f af7b bne.w 800ae18 <_scanf_float+0x70>
|
|
800af22: 6821 ldr r1, [r4, #0]
|
|
800af24: f421 71c0 bic.w r1, r1, #384 ; 0x180
|
|
800af28: 6021 str r1, [r4, #0]
|
|
800af2a: 702b strb r3, [r5, #0]
|
|
800af2c: 3501 adds r5, #1
|
|
800af2e: e79a b.n 800ae66 <_scanf_float+0xbe>
|
|
800af30: 6821 ldr r1, [r4, #0]
|
|
800af32: 0608 lsls r0, r1, #24
|
|
800af34: f57f af70 bpl.w 800ae18 <_scanf_float+0x70>
|
|
800af38: f021 0180 bic.w r1, r1, #128 ; 0x80
|
|
800af3c: e7f4 b.n 800af28 <_scanf_float+0x180>
|
|
800af3e: 2a02 cmp r2, #2
|
|
800af40: d047 beq.n 800afd2 <_scanf_float+0x22a>
|
|
800af42: f1bb 0f01 cmp.w fp, #1
|
|
800af46: d003 beq.n 800af50 <_scanf_float+0x1a8>
|
|
800af48: f1bb 0f04 cmp.w fp, #4
|
|
800af4c: f47f af64 bne.w 800ae18 <_scanf_float+0x70>
|
|
800af50: f10b 0b01 add.w fp, fp, #1
|
|
800af54: fa5f fb8b uxtb.w fp, fp
|
|
800af58: e7e7 b.n 800af2a <_scanf_float+0x182>
|
|
800af5a: f1bb 0f03 cmp.w fp, #3
|
|
800af5e: d0f7 beq.n 800af50 <_scanf_float+0x1a8>
|
|
800af60: f1bb 0f05 cmp.w fp, #5
|
|
800af64: e7f2 b.n 800af4c <_scanf_float+0x1a4>
|
|
800af66: f1bb 0f02 cmp.w fp, #2
|
|
800af6a: f47f af55 bne.w 800ae18 <_scanf_float+0x70>
|
|
800af6e: f04f 0b03 mov.w fp, #3
|
|
800af72: e7da b.n 800af2a <_scanf_float+0x182>
|
|
800af74: f1bb 0f06 cmp.w fp, #6
|
|
800af78: f47f af4e bne.w 800ae18 <_scanf_float+0x70>
|
|
800af7c: f04f 0b07 mov.w fp, #7
|
|
800af80: e7d3 b.n 800af2a <_scanf_float+0x182>
|
|
800af82: 6821 ldr r1, [r4, #0]
|
|
800af84: 0588 lsls r0, r1, #22
|
|
800af86: f57f af47 bpl.w 800ae18 <_scanf_float+0x70>
|
|
800af8a: f421 7120 bic.w r1, r1, #640 ; 0x280
|
|
800af8e: 6021 str r1, [r4, #0]
|
|
800af90: f8cd 9008 str.w r9, [sp, #8]
|
|
800af94: e7c9 b.n 800af2a <_scanf_float+0x182>
|
|
800af96: 6821 ldr r1, [r4, #0]
|
|
800af98: f401 60a0 and.w r0, r1, #1280 ; 0x500
|
|
800af9c: f5b0 6f80 cmp.w r0, #1024 ; 0x400
|
|
800afa0: d006 beq.n 800afb0 <_scanf_float+0x208>
|
|
800afa2: 0548 lsls r0, r1, #21
|
|
800afa4: f57f af38 bpl.w 800ae18 <_scanf_float+0x70>
|
|
800afa8: f1b9 0f00 cmp.w r9, #0
|
|
800afac: f43f af3b beq.w 800ae26 <_scanf_float+0x7e>
|
|
800afb0: 0588 lsls r0, r1, #22
|
|
800afb2: bf58 it pl
|
|
800afb4: 9802 ldrpl r0, [sp, #8]
|
|
800afb6: f421 61f0 bic.w r1, r1, #1920 ; 0x780
|
|
800afba: bf58 it pl
|
|
800afbc: eba9 0000 subpl.w r0, r9, r0
|
|
800afc0: f441 71c0 orr.w r1, r1, #384 ; 0x180
|
|
800afc4: bf58 it pl
|
|
800afc6: e9cd 0503 strdpl r0, r5, [sp, #12]
|
|
800afca: 6021 str r1, [r4, #0]
|
|
800afcc: f04f 0900 mov.w r9, #0
|
|
800afd0: e7ab b.n 800af2a <_scanf_float+0x182>
|
|
800afd2: 2203 movs r2, #3
|
|
800afd4: e7a9 b.n 800af2a <_scanf_float+0x182>
|
|
800afd6: f8d4 3180 ldr.w r3, [r4, #384] ; 0x180
|
|
800afda: 9205 str r2, [sp, #20]
|
|
800afdc: 4631 mov r1, r6
|
|
800afde: 4638 mov r0, r7
|
|
800afe0: 4798 blx r3
|
|
800afe2: 9a05 ldr r2, [sp, #20]
|
|
800afe4: 2800 cmp r0, #0
|
|
800afe6: f43f af04 beq.w 800adf2 <_scanf_float+0x4a>
|
|
800afea: e715 b.n 800ae18 <_scanf_float+0x70>
|
|
800afec: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c
|
|
800aff0: f815 1d01 ldrb.w r1, [r5, #-1]!
|
|
800aff4: 4632 mov r2, r6
|
|
800aff6: 4638 mov r0, r7
|
|
800aff8: 4798 blx r3
|
|
800affa: 6923 ldr r3, [r4, #16]
|
|
800affc: 3b01 subs r3, #1
|
|
800affe: 6123 str r3, [r4, #16]
|
|
800b000: e715 b.n 800ae2e <_scanf_float+0x86>
|
|
800b002: f10b 33ff add.w r3, fp, #4294967295
|
|
800b006: 2b06 cmp r3, #6
|
|
800b008: d80a bhi.n 800b020 <_scanf_float+0x278>
|
|
800b00a: f1bb 0f02 cmp.w fp, #2
|
|
800b00e: d968 bls.n 800b0e2 <_scanf_float+0x33a>
|
|
800b010: f1ab 0b03 sub.w fp, fp, #3
|
|
800b014: fa5f fb8b uxtb.w fp, fp
|
|
800b018: eba5 0b0b sub.w fp, r5, fp
|
|
800b01c: 455d cmp r5, fp
|
|
800b01e: d14b bne.n 800b0b8 <_scanf_float+0x310>
|
|
800b020: 6823 ldr r3, [r4, #0]
|
|
800b022: 05da lsls r2, r3, #23
|
|
800b024: d51f bpl.n 800b066 <_scanf_float+0x2be>
|
|
800b026: 055b lsls r3, r3, #21
|
|
800b028: d468 bmi.n 800b0fc <_scanf_float+0x354>
|
|
800b02a: f815 1c01 ldrb.w r1, [r5, #-1]
|
|
800b02e: 6923 ldr r3, [r4, #16]
|
|
800b030: 2965 cmp r1, #101 ; 0x65
|
|
800b032: f103 33ff add.w r3, r3, #4294967295
|
|
800b036: f105 3bff add.w fp, r5, #4294967295
|
|
800b03a: 6123 str r3, [r4, #16]
|
|
800b03c: d00d beq.n 800b05a <_scanf_float+0x2b2>
|
|
800b03e: 2945 cmp r1, #69 ; 0x45
|
|
800b040: d00b beq.n 800b05a <_scanf_float+0x2b2>
|
|
800b042: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c
|
|
800b046: 4632 mov r2, r6
|
|
800b048: 4638 mov r0, r7
|
|
800b04a: 4798 blx r3
|
|
800b04c: 6923 ldr r3, [r4, #16]
|
|
800b04e: f815 1c02 ldrb.w r1, [r5, #-2]
|
|
800b052: 3b01 subs r3, #1
|
|
800b054: f1a5 0b02 sub.w fp, r5, #2
|
|
800b058: 6123 str r3, [r4, #16]
|
|
800b05a: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c
|
|
800b05e: 4632 mov r2, r6
|
|
800b060: 4638 mov r0, r7
|
|
800b062: 4798 blx r3
|
|
800b064: 465d mov r5, fp
|
|
800b066: 6826 ldr r6, [r4, #0]
|
|
800b068: f016 0610 ands.w r6, r6, #16
|
|
800b06c: d17a bne.n 800b164 <_scanf_float+0x3bc>
|
|
800b06e: 702e strb r6, [r5, #0]
|
|
800b070: 6823 ldr r3, [r4, #0]
|
|
800b072: f403 63c0 and.w r3, r3, #1536 ; 0x600
|
|
800b076: f5b3 6f80 cmp.w r3, #1024 ; 0x400
|
|
800b07a: d142 bne.n 800b102 <_scanf_float+0x35a>
|
|
800b07c: 9b02 ldr r3, [sp, #8]
|
|
800b07e: eba9 0303 sub.w r3, r9, r3
|
|
800b082: 425a negs r2, r3
|
|
800b084: 2b00 cmp r3, #0
|
|
800b086: d149 bne.n 800b11c <_scanf_float+0x374>
|
|
800b088: 2200 movs r2, #0
|
|
800b08a: 4641 mov r1, r8
|
|
800b08c: 4638 mov r0, r7
|
|
800b08e: f000 ff2f bl 800bef0 <_strtod_r>
|
|
800b092: 6825 ldr r5, [r4, #0]
|
|
800b094: f8da 3000 ldr.w r3, [sl]
|
|
800b098: f015 0f02 tst.w r5, #2
|
|
800b09c: f103 0204 add.w r2, r3, #4
|
|
800b0a0: ec59 8b10 vmov r8, r9, d0
|
|
800b0a4: f8ca 2000 str.w r2, [sl]
|
|
800b0a8: d043 beq.n 800b132 <_scanf_float+0x38a>
|
|
800b0aa: 681b ldr r3, [r3, #0]
|
|
800b0ac: e9c3 8900 strd r8, r9, [r3]
|
|
800b0b0: 68e3 ldr r3, [r4, #12]
|
|
800b0b2: 3301 adds r3, #1
|
|
800b0b4: 60e3 str r3, [r4, #12]
|
|
800b0b6: e6be b.n 800ae36 <_scanf_float+0x8e>
|
|
800b0b8: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c
|
|
800b0bc: f815 1d01 ldrb.w r1, [r5, #-1]!
|
|
800b0c0: 4632 mov r2, r6
|
|
800b0c2: 4638 mov r0, r7
|
|
800b0c4: 4798 blx r3
|
|
800b0c6: 6923 ldr r3, [r4, #16]
|
|
800b0c8: 3b01 subs r3, #1
|
|
800b0ca: 6123 str r3, [r4, #16]
|
|
800b0cc: e7a6 b.n 800b01c <_scanf_float+0x274>
|
|
800b0ce: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c
|
|
800b0d2: f815 1d01 ldrb.w r1, [r5, #-1]!
|
|
800b0d6: 4632 mov r2, r6
|
|
800b0d8: 4638 mov r0, r7
|
|
800b0da: 4798 blx r3
|
|
800b0dc: 6923 ldr r3, [r4, #16]
|
|
800b0de: 3b01 subs r3, #1
|
|
800b0e0: 6123 str r3, [r4, #16]
|
|
800b0e2: 4545 cmp r5, r8
|
|
800b0e4: d8f3 bhi.n 800b0ce <_scanf_float+0x326>
|
|
800b0e6: e6a5 b.n 800ae34 <_scanf_float+0x8c>
|
|
800b0e8: f8d4 317c ldr.w r3, [r4, #380] ; 0x17c
|
|
800b0ec: f815 1d01 ldrb.w r1, [r5, #-1]!
|
|
800b0f0: 4632 mov r2, r6
|
|
800b0f2: 4638 mov r0, r7
|
|
800b0f4: 4798 blx r3
|
|
800b0f6: 6923 ldr r3, [r4, #16]
|
|
800b0f8: 3b01 subs r3, #1
|
|
800b0fa: 6123 str r3, [r4, #16]
|
|
800b0fc: 4545 cmp r5, r8
|
|
800b0fe: d8f3 bhi.n 800b0e8 <_scanf_float+0x340>
|
|
800b100: e698 b.n 800ae34 <_scanf_float+0x8c>
|
|
800b102: 9b03 ldr r3, [sp, #12]
|
|
800b104: 2b00 cmp r3, #0
|
|
800b106: d0bf beq.n 800b088 <_scanf_float+0x2e0>
|
|
800b108: 9904 ldr r1, [sp, #16]
|
|
800b10a: 230a movs r3, #10
|
|
800b10c: 4632 mov r2, r6
|
|
800b10e: 3101 adds r1, #1
|
|
800b110: 4638 mov r0, r7
|
|
800b112: f000 ff79 bl 800c008 <_strtol_r>
|
|
800b116: 9b03 ldr r3, [sp, #12]
|
|
800b118: 9d04 ldr r5, [sp, #16]
|
|
800b11a: 1ac2 subs r2, r0, r3
|
|
800b11c: f204 136f addw r3, r4, #367 ; 0x16f
|
|
800b120: 429d cmp r5, r3
|
|
800b122: bf28 it cs
|
|
800b124: f504 75b7 addcs.w r5, r4, #366 ; 0x16e
|
|
800b128: 490f ldr r1, [pc, #60] ; (800b168 <_scanf_float+0x3c0>)
|
|
800b12a: 4628 mov r0, r5
|
|
800b12c: f000 f8b0 bl 800b290 <siprintf>
|
|
800b130: e7aa b.n 800b088 <_scanf_float+0x2e0>
|
|
800b132: f015 0504 ands.w r5, r5, #4
|
|
800b136: d1b8 bne.n 800b0aa <_scanf_float+0x302>
|
|
800b138: 681f ldr r7, [r3, #0]
|
|
800b13a: ee10 2a10 vmov r2, s0
|
|
800b13e: 464b mov r3, r9
|
|
800b140: ee10 0a10 vmov r0, s0
|
|
800b144: 4649 mov r1, r9
|
|
800b146: f7f5 fcf9 bl 8000b3c <__aeabi_dcmpun>
|
|
800b14a: b128 cbz r0, 800b158 <_scanf_float+0x3b0>
|
|
800b14c: 4628 mov r0, r5
|
|
800b14e: f000 f899 bl 800b284 <nanf>
|
|
800b152: ed87 0a00 vstr s0, [r7]
|
|
800b156: e7ab b.n 800b0b0 <_scanf_float+0x308>
|
|
800b158: 4640 mov r0, r8
|
|
800b15a: 4649 mov r1, r9
|
|
800b15c: f7f5 fd4c bl 8000bf8 <__aeabi_d2f>
|
|
800b160: 6038 str r0, [r7, #0]
|
|
800b162: e7a5 b.n 800b0b0 <_scanf_float+0x308>
|
|
800b164: 2600 movs r6, #0
|
|
800b166: e666 b.n 800ae36 <_scanf_float+0x8e>
|
|
800b168: 0800e96c .word 0x0800e96c
|
|
|
|
0800b16c <iprintf>:
|
|
800b16c: b40f push {r0, r1, r2, r3}
|
|
800b16e: 4b0a ldr r3, [pc, #40] ; (800b198 <iprintf+0x2c>)
|
|
800b170: b513 push {r0, r1, r4, lr}
|
|
800b172: 681c ldr r4, [r3, #0]
|
|
800b174: b124 cbz r4, 800b180 <iprintf+0x14>
|
|
800b176: 69a3 ldr r3, [r4, #24]
|
|
800b178: b913 cbnz r3, 800b180 <iprintf+0x14>
|
|
800b17a: 4620 mov r0, r4
|
|
800b17c: f001 ff4c bl 800d018 <__sinit>
|
|
800b180: ab05 add r3, sp, #20
|
|
800b182: 9a04 ldr r2, [sp, #16]
|
|
800b184: 68a1 ldr r1, [r4, #8]
|
|
800b186: 9301 str r3, [sp, #4]
|
|
800b188: 4620 mov r0, r4
|
|
800b18a: f003 f915 bl 800e3b8 <_vfiprintf_r>
|
|
800b18e: b002 add sp, #8
|
|
800b190: e8bd 4010 ldmia.w sp!, {r4, lr}
|
|
800b194: b004 add sp, #16
|
|
800b196: 4770 bx lr
|
|
800b198: 2000002c .word 0x2000002c
|
|
|
|
0800b19c <_puts_r>:
|
|
800b19c: b570 push {r4, r5, r6, lr}
|
|
800b19e: 460e mov r6, r1
|
|
800b1a0: 4605 mov r5, r0
|
|
800b1a2: b118 cbz r0, 800b1ac <_puts_r+0x10>
|
|
800b1a4: 6983 ldr r3, [r0, #24]
|
|
800b1a6: b90b cbnz r3, 800b1ac <_puts_r+0x10>
|
|
800b1a8: f001 ff36 bl 800d018 <__sinit>
|
|
800b1ac: 69ab ldr r3, [r5, #24]
|
|
800b1ae: 68ac ldr r4, [r5, #8]
|
|
800b1b0: b913 cbnz r3, 800b1b8 <_puts_r+0x1c>
|
|
800b1b2: 4628 mov r0, r5
|
|
800b1b4: f001 ff30 bl 800d018 <__sinit>
|
|
800b1b8: 4b23 ldr r3, [pc, #140] ; (800b248 <_puts_r+0xac>)
|
|
800b1ba: 429c cmp r4, r3
|
|
800b1bc: d117 bne.n 800b1ee <_puts_r+0x52>
|
|
800b1be: 686c ldr r4, [r5, #4]
|
|
800b1c0: 89a3 ldrh r3, [r4, #12]
|
|
800b1c2: 071b lsls r3, r3, #28
|
|
800b1c4: d51d bpl.n 800b202 <_puts_r+0x66>
|
|
800b1c6: 6923 ldr r3, [r4, #16]
|
|
800b1c8: b1db cbz r3, 800b202 <_puts_r+0x66>
|
|
800b1ca: 3e01 subs r6, #1
|
|
800b1cc: 68a3 ldr r3, [r4, #8]
|
|
800b1ce: f816 1f01 ldrb.w r1, [r6, #1]!
|
|
800b1d2: 3b01 subs r3, #1
|
|
800b1d4: 60a3 str r3, [r4, #8]
|
|
800b1d6: b9e9 cbnz r1, 800b214 <_puts_r+0x78>
|
|
800b1d8: 2b00 cmp r3, #0
|
|
800b1da: da2e bge.n 800b23a <_puts_r+0x9e>
|
|
800b1dc: 4622 mov r2, r4
|
|
800b1de: 210a movs r1, #10
|
|
800b1e0: 4628 mov r0, r5
|
|
800b1e2: f000 ff23 bl 800c02c <__swbuf_r>
|
|
800b1e6: 3001 adds r0, #1
|
|
800b1e8: d011 beq.n 800b20e <_puts_r+0x72>
|
|
800b1ea: 200a movs r0, #10
|
|
800b1ec: e011 b.n 800b212 <_puts_r+0x76>
|
|
800b1ee: 4b17 ldr r3, [pc, #92] ; (800b24c <_puts_r+0xb0>)
|
|
800b1f0: 429c cmp r4, r3
|
|
800b1f2: d101 bne.n 800b1f8 <_puts_r+0x5c>
|
|
800b1f4: 68ac ldr r4, [r5, #8]
|
|
800b1f6: e7e3 b.n 800b1c0 <_puts_r+0x24>
|
|
800b1f8: 4b15 ldr r3, [pc, #84] ; (800b250 <_puts_r+0xb4>)
|
|
800b1fa: 429c cmp r4, r3
|
|
800b1fc: bf08 it eq
|
|
800b1fe: 68ec ldreq r4, [r5, #12]
|
|
800b200: e7de b.n 800b1c0 <_puts_r+0x24>
|
|
800b202: 4621 mov r1, r4
|
|
800b204: 4628 mov r0, r5
|
|
800b206: f000 ff63 bl 800c0d0 <__swsetup_r>
|
|
800b20a: 2800 cmp r0, #0
|
|
800b20c: d0dd beq.n 800b1ca <_puts_r+0x2e>
|
|
800b20e: f04f 30ff mov.w r0, #4294967295
|
|
800b212: bd70 pop {r4, r5, r6, pc}
|
|
800b214: 2b00 cmp r3, #0
|
|
800b216: da04 bge.n 800b222 <_puts_r+0x86>
|
|
800b218: 69a2 ldr r2, [r4, #24]
|
|
800b21a: 429a cmp r2, r3
|
|
800b21c: dc06 bgt.n 800b22c <_puts_r+0x90>
|
|
800b21e: 290a cmp r1, #10
|
|
800b220: d004 beq.n 800b22c <_puts_r+0x90>
|
|
800b222: 6823 ldr r3, [r4, #0]
|
|
800b224: 1c5a adds r2, r3, #1
|
|
800b226: 6022 str r2, [r4, #0]
|
|
800b228: 7019 strb r1, [r3, #0]
|
|
800b22a: e7cf b.n 800b1cc <_puts_r+0x30>
|
|
800b22c: 4622 mov r2, r4
|
|
800b22e: 4628 mov r0, r5
|
|
800b230: f000 fefc bl 800c02c <__swbuf_r>
|
|
800b234: 3001 adds r0, #1
|
|
800b236: d1c9 bne.n 800b1cc <_puts_r+0x30>
|
|
800b238: e7e9 b.n 800b20e <_puts_r+0x72>
|
|
800b23a: 6823 ldr r3, [r4, #0]
|
|
800b23c: 200a movs r0, #10
|
|
800b23e: 1c5a adds r2, r3, #1
|
|
800b240: 6022 str r2, [r4, #0]
|
|
800b242: 7018 strb r0, [r3, #0]
|
|
800b244: e7e5 b.n 800b212 <_puts_r+0x76>
|
|
800b246: bf00 nop
|
|
800b248: 0800e9f8 .word 0x0800e9f8
|
|
800b24c: 0800ea18 .word 0x0800ea18
|
|
800b250: 0800e9d8 .word 0x0800e9d8
|
|
|
|
0800b254 <puts>:
|
|
800b254: 4b02 ldr r3, [pc, #8] ; (800b260 <puts+0xc>)
|
|
800b256: 4601 mov r1, r0
|
|
800b258: 6818 ldr r0, [r3, #0]
|
|
800b25a: f7ff bf9f b.w 800b19c <_puts_r>
|
|
800b25e: bf00 nop
|
|
800b260: 2000002c .word 0x2000002c
|
|
|
|
0800b264 <_sbrk_r>:
|
|
800b264: b538 push {r3, r4, r5, lr}
|
|
800b266: 4c06 ldr r4, [pc, #24] ; (800b280 <_sbrk_r+0x1c>)
|
|
800b268: 2300 movs r3, #0
|
|
800b26a: 4605 mov r5, r0
|
|
800b26c: 4608 mov r0, r1
|
|
800b26e: 6023 str r3, [r4, #0]
|
|
800b270: f7f6 fc76 bl 8001b60 <_sbrk>
|
|
800b274: 1c43 adds r3, r0, #1
|
|
800b276: d102 bne.n 800b27e <_sbrk_r+0x1a>
|
|
800b278: 6823 ldr r3, [r4, #0]
|
|
800b27a: b103 cbz r3, 800b27e <_sbrk_r+0x1a>
|
|
800b27c: 602b str r3, [r5, #0]
|
|
800b27e: bd38 pop {r3, r4, r5, pc}
|
|
800b280: 20000ab0 .word 0x20000ab0
|
|
|
|
0800b284 <nanf>:
|
|
800b284: ed9f 0a01 vldr s0, [pc, #4] ; 800b28c <nanf+0x8>
|
|
800b288: 4770 bx lr
|
|
800b28a: bf00 nop
|
|
800b28c: 7fc00000 .word 0x7fc00000
|
|
|
|
0800b290 <siprintf>:
|
|
800b290: b40e push {r1, r2, r3}
|
|
800b292: b500 push {lr}
|
|
800b294: b09c sub sp, #112 ; 0x70
|
|
800b296: ab1d add r3, sp, #116 ; 0x74
|
|
800b298: 9002 str r0, [sp, #8]
|
|
800b29a: 9006 str r0, [sp, #24]
|
|
800b29c: f06f 4100 mvn.w r1, #2147483648 ; 0x80000000
|
|
800b2a0: 4809 ldr r0, [pc, #36] ; (800b2c8 <siprintf+0x38>)
|
|
800b2a2: 9107 str r1, [sp, #28]
|
|
800b2a4: 9104 str r1, [sp, #16]
|
|
800b2a6: 4909 ldr r1, [pc, #36] ; (800b2cc <siprintf+0x3c>)
|
|
800b2a8: f853 2b04 ldr.w r2, [r3], #4
|
|
800b2ac: 9105 str r1, [sp, #20]
|
|
800b2ae: 6800 ldr r0, [r0, #0]
|
|
800b2b0: 9301 str r3, [sp, #4]
|
|
800b2b2: a902 add r1, sp, #8
|
|
800b2b4: f002 ff5e bl 800e174 <_svfiprintf_r>
|
|
800b2b8: 9b02 ldr r3, [sp, #8]
|
|
800b2ba: 2200 movs r2, #0
|
|
800b2bc: 701a strb r2, [r3, #0]
|
|
800b2be: b01c add sp, #112 ; 0x70
|
|
800b2c0: f85d eb04 ldr.w lr, [sp], #4
|
|
800b2c4: b003 add sp, #12
|
|
800b2c6: 4770 bx lr
|
|
800b2c8: 2000002c .word 0x2000002c
|
|
800b2cc: ffff0208 .word 0xffff0208
|
|
|
|
0800b2d0 <sulp>:
|
|
800b2d0: b570 push {r4, r5, r6, lr}
|
|
800b2d2: 4604 mov r4, r0
|
|
800b2d4: 460d mov r5, r1
|
|
800b2d6: ec45 4b10 vmov d0, r4, r5
|
|
800b2da: 4616 mov r6, r2
|
|
800b2dc: f002 fdae bl 800de3c <__ulp>
|
|
800b2e0: ec51 0b10 vmov r0, r1, d0
|
|
800b2e4: b17e cbz r6, 800b306 <sulp+0x36>
|
|
800b2e6: f3c5 530a ubfx r3, r5, #20, #11
|
|
800b2ea: f1c3 036b rsb r3, r3, #107 ; 0x6b
|
|
800b2ee: 2b00 cmp r3, #0
|
|
800b2f0: dd09 ble.n 800b306 <sulp+0x36>
|
|
800b2f2: 051b lsls r3, r3, #20
|
|
800b2f4: f103 557f add.w r5, r3, #1069547520 ; 0x3fc00000
|
|
800b2f8: 2400 movs r4, #0
|
|
800b2fa: f505 1540 add.w r5, r5, #3145728 ; 0x300000
|
|
800b2fe: 4622 mov r2, r4
|
|
800b300: 462b mov r3, r5
|
|
800b302: f7f5 f981 bl 8000608 <__aeabi_dmul>
|
|
800b306: bd70 pop {r4, r5, r6, pc}
|
|
|
|
0800b308 <_strtod_l>:
|
|
800b308: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800b30c: 461f mov r7, r3
|
|
800b30e: b0a1 sub sp, #132 ; 0x84
|
|
800b310: 2300 movs r3, #0
|
|
800b312: 4681 mov r9, r0
|
|
800b314: 4638 mov r0, r7
|
|
800b316: 460e mov r6, r1
|
|
800b318: 9217 str r2, [sp, #92] ; 0x5c
|
|
800b31a: 931c str r3, [sp, #112] ; 0x70
|
|
800b31c: f002 fa2f bl 800d77e <__localeconv_l>
|
|
800b320: 4680 mov r8, r0
|
|
800b322: 6800 ldr r0, [r0, #0]
|
|
800b324: f7f4 ff5c bl 80001e0 <strlen>
|
|
800b328: f04f 0a00 mov.w sl, #0
|
|
800b32c: 4604 mov r4, r0
|
|
800b32e: f04f 0b00 mov.w fp, #0
|
|
800b332: 961b str r6, [sp, #108] ; 0x6c
|
|
800b334: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b336: 781a ldrb r2, [r3, #0]
|
|
800b338: 2a0d cmp r2, #13
|
|
800b33a: d832 bhi.n 800b3a2 <_strtod_l+0x9a>
|
|
800b33c: 2a09 cmp r2, #9
|
|
800b33e: d236 bcs.n 800b3ae <_strtod_l+0xa6>
|
|
800b340: 2a00 cmp r2, #0
|
|
800b342: d03e beq.n 800b3c2 <_strtod_l+0xba>
|
|
800b344: 2300 movs r3, #0
|
|
800b346: 930d str r3, [sp, #52] ; 0x34
|
|
800b348: 9d1b ldr r5, [sp, #108] ; 0x6c
|
|
800b34a: 782b ldrb r3, [r5, #0]
|
|
800b34c: 2b30 cmp r3, #48 ; 0x30
|
|
800b34e: f040 80ac bne.w 800b4aa <_strtod_l+0x1a2>
|
|
800b352: 786b ldrb r3, [r5, #1]
|
|
800b354: 2b58 cmp r3, #88 ; 0x58
|
|
800b356: d001 beq.n 800b35c <_strtod_l+0x54>
|
|
800b358: 2b78 cmp r3, #120 ; 0x78
|
|
800b35a: d167 bne.n 800b42c <_strtod_l+0x124>
|
|
800b35c: 9b0d ldr r3, [sp, #52] ; 0x34
|
|
800b35e: 9301 str r3, [sp, #4]
|
|
800b360: ab1c add r3, sp, #112 ; 0x70
|
|
800b362: 9300 str r3, [sp, #0]
|
|
800b364: 9702 str r7, [sp, #8]
|
|
800b366: ab1d add r3, sp, #116 ; 0x74
|
|
800b368: 4a88 ldr r2, [pc, #544] ; (800b58c <_strtod_l+0x284>)
|
|
800b36a: a91b add r1, sp, #108 ; 0x6c
|
|
800b36c: 4648 mov r0, r9
|
|
800b36e: f001 ff2c bl 800d1ca <__gethex>
|
|
800b372: f010 0407 ands.w r4, r0, #7
|
|
800b376: 4606 mov r6, r0
|
|
800b378: d005 beq.n 800b386 <_strtod_l+0x7e>
|
|
800b37a: 2c06 cmp r4, #6
|
|
800b37c: d12b bne.n 800b3d6 <_strtod_l+0xce>
|
|
800b37e: 3501 adds r5, #1
|
|
800b380: 2300 movs r3, #0
|
|
800b382: 951b str r5, [sp, #108] ; 0x6c
|
|
800b384: 930d str r3, [sp, #52] ; 0x34
|
|
800b386: 9b17 ldr r3, [sp, #92] ; 0x5c
|
|
800b388: 2b00 cmp r3, #0
|
|
800b38a: f040 859a bne.w 800bec2 <_strtod_l+0xbba>
|
|
800b38e: 9b0d ldr r3, [sp, #52] ; 0x34
|
|
800b390: b1e3 cbz r3, 800b3cc <_strtod_l+0xc4>
|
|
800b392: 4652 mov r2, sl
|
|
800b394: f10b 4300 add.w r3, fp, #2147483648 ; 0x80000000
|
|
800b398: ec43 2b10 vmov d0, r2, r3
|
|
800b39c: b021 add sp, #132 ; 0x84
|
|
800b39e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800b3a2: 2a2b cmp r2, #43 ; 0x2b
|
|
800b3a4: d015 beq.n 800b3d2 <_strtod_l+0xca>
|
|
800b3a6: 2a2d cmp r2, #45 ; 0x2d
|
|
800b3a8: d004 beq.n 800b3b4 <_strtod_l+0xac>
|
|
800b3aa: 2a20 cmp r2, #32
|
|
800b3ac: d1ca bne.n 800b344 <_strtod_l+0x3c>
|
|
800b3ae: 3301 adds r3, #1
|
|
800b3b0: 931b str r3, [sp, #108] ; 0x6c
|
|
800b3b2: e7bf b.n 800b334 <_strtod_l+0x2c>
|
|
800b3b4: 2201 movs r2, #1
|
|
800b3b6: 920d str r2, [sp, #52] ; 0x34
|
|
800b3b8: 1c5a adds r2, r3, #1
|
|
800b3ba: 921b str r2, [sp, #108] ; 0x6c
|
|
800b3bc: 785b ldrb r3, [r3, #1]
|
|
800b3be: 2b00 cmp r3, #0
|
|
800b3c0: d1c2 bne.n 800b348 <_strtod_l+0x40>
|
|
800b3c2: 9b17 ldr r3, [sp, #92] ; 0x5c
|
|
800b3c4: 961b str r6, [sp, #108] ; 0x6c
|
|
800b3c6: 2b00 cmp r3, #0
|
|
800b3c8: f040 8579 bne.w 800bebe <_strtod_l+0xbb6>
|
|
800b3cc: 4652 mov r2, sl
|
|
800b3ce: 465b mov r3, fp
|
|
800b3d0: e7e2 b.n 800b398 <_strtod_l+0x90>
|
|
800b3d2: 2200 movs r2, #0
|
|
800b3d4: e7ef b.n 800b3b6 <_strtod_l+0xae>
|
|
800b3d6: 9a1c ldr r2, [sp, #112] ; 0x70
|
|
800b3d8: b13a cbz r2, 800b3ea <_strtod_l+0xe2>
|
|
800b3da: 2135 movs r1, #53 ; 0x35
|
|
800b3dc: a81e add r0, sp, #120 ; 0x78
|
|
800b3de: f002 fe25 bl 800e02c <__copybits>
|
|
800b3e2: 991c ldr r1, [sp, #112] ; 0x70
|
|
800b3e4: 4648 mov r0, r9
|
|
800b3e6: f002 fa92 bl 800d90e <_Bfree>
|
|
800b3ea: 3c01 subs r4, #1
|
|
800b3ec: 2c04 cmp r4, #4
|
|
800b3ee: d806 bhi.n 800b3fe <_strtod_l+0xf6>
|
|
800b3f0: e8df f004 tbb [pc, r4]
|
|
800b3f4: 1714030a .word 0x1714030a
|
|
800b3f8: 0a .byte 0x0a
|
|
800b3f9: 00 .byte 0x00
|
|
800b3fa: e9dd ab1e ldrd sl, fp, [sp, #120] ; 0x78
|
|
800b3fe: 0730 lsls r0, r6, #28
|
|
800b400: d5c1 bpl.n 800b386 <_strtod_l+0x7e>
|
|
800b402: f04b 4b00 orr.w fp, fp, #2147483648 ; 0x80000000
|
|
800b406: e7be b.n 800b386 <_strtod_l+0x7e>
|
|
800b408: e9dd a31e ldrd sl, r3, [sp, #120] ; 0x78
|
|
800b40c: 9a1d ldr r2, [sp, #116] ; 0x74
|
|
800b40e: f423 1380 bic.w r3, r3, #1048576 ; 0x100000
|
|
800b412: f202 4233 addw r2, r2, #1075 ; 0x433
|
|
800b416: ea43 5b02 orr.w fp, r3, r2, lsl #20
|
|
800b41a: e7f0 b.n 800b3fe <_strtod_l+0xf6>
|
|
800b41c: f8df b170 ldr.w fp, [pc, #368] ; 800b590 <_strtod_l+0x288>
|
|
800b420: e7ed b.n 800b3fe <_strtod_l+0xf6>
|
|
800b422: f06f 4b00 mvn.w fp, #2147483648 ; 0x80000000
|
|
800b426: f04f 3aff mov.w sl, #4294967295
|
|
800b42a: e7e8 b.n 800b3fe <_strtod_l+0xf6>
|
|
800b42c: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b42e: 1c5a adds r2, r3, #1
|
|
800b430: 921b str r2, [sp, #108] ; 0x6c
|
|
800b432: 785b ldrb r3, [r3, #1]
|
|
800b434: 2b30 cmp r3, #48 ; 0x30
|
|
800b436: d0f9 beq.n 800b42c <_strtod_l+0x124>
|
|
800b438: 2b00 cmp r3, #0
|
|
800b43a: d0a4 beq.n 800b386 <_strtod_l+0x7e>
|
|
800b43c: 2301 movs r3, #1
|
|
800b43e: 2500 movs r5, #0
|
|
800b440: 9306 str r3, [sp, #24]
|
|
800b442: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b444: 9308 str r3, [sp, #32]
|
|
800b446: 9507 str r5, [sp, #28]
|
|
800b448: 9505 str r5, [sp, #20]
|
|
800b44a: 220a movs r2, #10
|
|
800b44c: 981b ldr r0, [sp, #108] ; 0x6c
|
|
800b44e: 7807 ldrb r7, [r0, #0]
|
|
800b450: f1a7 0330 sub.w r3, r7, #48 ; 0x30
|
|
800b454: b2d9 uxtb r1, r3
|
|
800b456: 2909 cmp r1, #9
|
|
800b458: d929 bls.n 800b4ae <_strtod_l+0x1a6>
|
|
800b45a: 4622 mov r2, r4
|
|
800b45c: f8d8 1000 ldr.w r1, [r8]
|
|
800b460: f003 f903 bl 800e66a <strncmp>
|
|
800b464: 2800 cmp r0, #0
|
|
800b466: d031 beq.n 800b4cc <_strtod_l+0x1c4>
|
|
800b468: 2000 movs r0, #0
|
|
800b46a: 9c05 ldr r4, [sp, #20]
|
|
800b46c: 9004 str r0, [sp, #16]
|
|
800b46e: 463b mov r3, r7
|
|
800b470: 4602 mov r2, r0
|
|
800b472: 2b65 cmp r3, #101 ; 0x65
|
|
800b474: d001 beq.n 800b47a <_strtod_l+0x172>
|
|
800b476: 2b45 cmp r3, #69 ; 0x45
|
|
800b478: d114 bne.n 800b4a4 <_strtod_l+0x19c>
|
|
800b47a: b924 cbnz r4, 800b486 <_strtod_l+0x17e>
|
|
800b47c: b910 cbnz r0, 800b484 <_strtod_l+0x17c>
|
|
800b47e: 9b06 ldr r3, [sp, #24]
|
|
800b480: 2b00 cmp r3, #0
|
|
800b482: d09e beq.n 800b3c2 <_strtod_l+0xba>
|
|
800b484: 2400 movs r4, #0
|
|
800b486: 9e1b ldr r6, [sp, #108] ; 0x6c
|
|
800b488: 1c73 adds r3, r6, #1
|
|
800b48a: 931b str r3, [sp, #108] ; 0x6c
|
|
800b48c: 7873 ldrb r3, [r6, #1]
|
|
800b48e: 2b2b cmp r3, #43 ; 0x2b
|
|
800b490: d078 beq.n 800b584 <_strtod_l+0x27c>
|
|
800b492: 2b2d cmp r3, #45 ; 0x2d
|
|
800b494: d070 beq.n 800b578 <_strtod_l+0x270>
|
|
800b496: f04f 0c00 mov.w ip, #0
|
|
800b49a: f1a3 0730 sub.w r7, r3, #48 ; 0x30
|
|
800b49e: 2f09 cmp r7, #9
|
|
800b4a0: d97c bls.n 800b59c <_strtod_l+0x294>
|
|
800b4a2: 961b str r6, [sp, #108] ; 0x6c
|
|
800b4a4: f04f 0e00 mov.w lr, #0
|
|
800b4a8: e09a b.n 800b5e0 <_strtod_l+0x2d8>
|
|
800b4aa: 2300 movs r3, #0
|
|
800b4ac: e7c7 b.n 800b43e <_strtod_l+0x136>
|
|
800b4ae: 9905 ldr r1, [sp, #20]
|
|
800b4b0: 2908 cmp r1, #8
|
|
800b4b2: bfdd ittte le
|
|
800b4b4: 9907 ldrle r1, [sp, #28]
|
|
800b4b6: fb02 3301 mlale r3, r2, r1, r3
|
|
800b4ba: 9307 strle r3, [sp, #28]
|
|
800b4bc: fb02 3505 mlagt r5, r2, r5, r3
|
|
800b4c0: 9b05 ldr r3, [sp, #20]
|
|
800b4c2: 3001 adds r0, #1
|
|
800b4c4: 3301 adds r3, #1
|
|
800b4c6: 9305 str r3, [sp, #20]
|
|
800b4c8: 901b str r0, [sp, #108] ; 0x6c
|
|
800b4ca: e7bf b.n 800b44c <_strtod_l+0x144>
|
|
800b4cc: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b4ce: 191a adds r2, r3, r4
|
|
800b4d0: 921b str r2, [sp, #108] ; 0x6c
|
|
800b4d2: 9a05 ldr r2, [sp, #20]
|
|
800b4d4: 5d1b ldrb r3, [r3, r4]
|
|
800b4d6: 2a00 cmp r2, #0
|
|
800b4d8: d037 beq.n 800b54a <_strtod_l+0x242>
|
|
800b4da: 9c05 ldr r4, [sp, #20]
|
|
800b4dc: 4602 mov r2, r0
|
|
800b4de: f1a3 0130 sub.w r1, r3, #48 ; 0x30
|
|
800b4e2: 2909 cmp r1, #9
|
|
800b4e4: d913 bls.n 800b50e <_strtod_l+0x206>
|
|
800b4e6: 2101 movs r1, #1
|
|
800b4e8: 9104 str r1, [sp, #16]
|
|
800b4ea: e7c2 b.n 800b472 <_strtod_l+0x16a>
|
|
800b4ec: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b4ee: 1c5a adds r2, r3, #1
|
|
800b4f0: 921b str r2, [sp, #108] ; 0x6c
|
|
800b4f2: 785b ldrb r3, [r3, #1]
|
|
800b4f4: 3001 adds r0, #1
|
|
800b4f6: 2b30 cmp r3, #48 ; 0x30
|
|
800b4f8: d0f8 beq.n 800b4ec <_strtod_l+0x1e4>
|
|
800b4fa: f1a3 0231 sub.w r2, r3, #49 ; 0x31
|
|
800b4fe: 2a08 cmp r2, #8
|
|
800b500: f200 84e4 bhi.w 800becc <_strtod_l+0xbc4>
|
|
800b504: 9a1b ldr r2, [sp, #108] ; 0x6c
|
|
800b506: 9208 str r2, [sp, #32]
|
|
800b508: 4602 mov r2, r0
|
|
800b50a: 2000 movs r0, #0
|
|
800b50c: 4604 mov r4, r0
|
|
800b50e: f1b3 0e30 subs.w lr, r3, #48 ; 0x30
|
|
800b512: f100 0101 add.w r1, r0, #1
|
|
800b516: d012 beq.n 800b53e <_strtod_l+0x236>
|
|
800b518: 440a add r2, r1
|
|
800b51a: eb00 0c04 add.w ip, r0, r4
|
|
800b51e: 4621 mov r1, r4
|
|
800b520: 270a movs r7, #10
|
|
800b522: 458c cmp ip, r1
|
|
800b524: d113 bne.n 800b54e <_strtod_l+0x246>
|
|
800b526: 1821 adds r1, r4, r0
|
|
800b528: 2908 cmp r1, #8
|
|
800b52a: f104 0401 add.w r4, r4, #1
|
|
800b52e: 4404 add r4, r0
|
|
800b530: dc19 bgt.n 800b566 <_strtod_l+0x25e>
|
|
800b532: 9b07 ldr r3, [sp, #28]
|
|
800b534: 210a movs r1, #10
|
|
800b536: fb01 e303 mla r3, r1, r3, lr
|
|
800b53a: 9307 str r3, [sp, #28]
|
|
800b53c: 2100 movs r1, #0
|
|
800b53e: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b540: 1c58 adds r0, r3, #1
|
|
800b542: 901b str r0, [sp, #108] ; 0x6c
|
|
800b544: 785b ldrb r3, [r3, #1]
|
|
800b546: 4608 mov r0, r1
|
|
800b548: e7c9 b.n 800b4de <_strtod_l+0x1d6>
|
|
800b54a: 9805 ldr r0, [sp, #20]
|
|
800b54c: e7d3 b.n 800b4f6 <_strtod_l+0x1ee>
|
|
800b54e: 2908 cmp r1, #8
|
|
800b550: f101 0101 add.w r1, r1, #1
|
|
800b554: dc03 bgt.n 800b55e <_strtod_l+0x256>
|
|
800b556: 9b07 ldr r3, [sp, #28]
|
|
800b558: 437b muls r3, r7
|
|
800b55a: 9307 str r3, [sp, #28]
|
|
800b55c: e7e1 b.n 800b522 <_strtod_l+0x21a>
|
|
800b55e: 2910 cmp r1, #16
|
|
800b560: bfd8 it le
|
|
800b562: 437d mulle r5, r7
|
|
800b564: e7dd b.n 800b522 <_strtod_l+0x21a>
|
|
800b566: 2c10 cmp r4, #16
|
|
800b568: bfdc itt le
|
|
800b56a: 210a movle r1, #10
|
|
800b56c: fb01 e505 mlale r5, r1, r5, lr
|
|
800b570: e7e4 b.n 800b53c <_strtod_l+0x234>
|
|
800b572: 2301 movs r3, #1
|
|
800b574: 9304 str r3, [sp, #16]
|
|
800b576: e781 b.n 800b47c <_strtod_l+0x174>
|
|
800b578: f04f 0c01 mov.w ip, #1
|
|
800b57c: 1cb3 adds r3, r6, #2
|
|
800b57e: 931b str r3, [sp, #108] ; 0x6c
|
|
800b580: 78b3 ldrb r3, [r6, #2]
|
|
800b582: e78a b.n 800b49a <_strtod_l+0x192>
|
|
800b584: f04f 0c00 mov.w ip, #0
|
|
800b588: e7f8 b.n 800b57c <_strtod_l+0x274>
|
|
800b58a: bf00 nop
|
|
800b58c: 0800e974 .word 0x0800e974
|
|
800b590: 7ff00000 .word 0x7ff00000
|
|
800b594: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b596: 1c5f adds r7, r3, #1
|
|
800b598: 971b str r7, [sp, #108] ; 0x6c
|
|
800b59a: 785b ldrb r3, [r3, #1]
|
|
800b59c: 2b30 cmp r3, #48 ; 0x30
|
|
800b59e: d0f9 beq.n 800b594 <_strtod_l+0x28c>
|
|
800b5a0: f1a3 0731 sub.w r7, r3, #49 ; 0x31
|
|
800b5a4: 2f08 cmp r7, #8
|
|
800b5a6: f63f af7d bhi.w 800b4a4 <_strtod_l+0x19c>
|
|
800b5aa: f1a3 0e30 sub.w lr, r3, #48 ; 0x30
|
|
800b5ae: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b5b0: 930a str r3, [sp, #40] ; 0x28
|
|
800b5b2: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b5b4: 1c5f adds r7, r3, #1
|
|
800b5b6: 971b str r7, [sp, #108] ; 0x6c
|
|
800b5b8: 785b ldrb r3, [r3, #1]
|
|
800b5ba: f1a3 0830 sub.w r8, r3, #48 ; 0x30
|
|
800b5be: f1b8 0f09 cmp.w r8, #9
|
|
800b5c2: d937 bls.n 800b634 <_strtod_l+0x32c>
|
|
800b5c4: 990a ldr r1, [sp, #40] ; 0x28
|
|
800b5c6: 1a7f subs r7, r7, r1
|
|
800b5c8: 2f08 cmp r7, #8
|
|
800b5ca: f644 671f movw r7, #19999 ; 0x4e1f
|
|
800b5ce: dc37 bgt.n 800b640 <_strtod_l+0x338>
|
|
800b5d0: 45be cmp lr, r7
|
|
800b5d2: bfa8 it ge
|
|
800b5d4: 46be movge lr, r7
|
|
800b5d6: f1bc 0f00 cmp.w ip, #0
|
|
800b5da: d001 beq.n 800b5e0 <_strtod_l+0x2d8>
|
|
800b5dc: f1ce 0e00 rsb lr, lr, #0
|
|
800b5e0: 2c00 cmp r4, #0
|
|
800b5e2: d151 bne.n 800b688 <_strtod_l+0x380>
|
|
800b5e4: 2800 cmp r0, #0
|
|
800b5e6: f47f aece bne.w 800b386 <_strtod_l+0x7e>
|
|
800b5ea: 9a06 ldr r2, [sp, #24]
|
|
800b5ec: 2a00 cmp r2, #0
|
|
800b5ee: f47f aeca bne.w 800b386 <_strtod_l+0x7e>
|
|
800b5f2: 9a04 ldr r2, [sp, #16]
|
|
800b5f4: 2a00 cmp r2, #0
|
|
800b5f6: f47f aee4 bne.w 800b3c2 <_strtod_l+0xba>
|
|
800b5fa: 2b4e cmp r3, #78 ; 0x4e
|
|
800b5fc: d027 beq.n 800b64e <_strtod_l+0x346>
|
|
800b5fe: dc21 bgt.n 800b644 <_strtod_l+0x33c>
|
|
800b600: 2b49 cmp r3, #73 ; 0x49
|
|
800b602: f47f aede bne.w 800b3c2 <_strtod_l+0xba>
|
|
800b606: 49a0 ldr r1, [pc, #640] ; (800b888 <_strtod_l+0x580>)
|
|
800b608: a81b add r0, sp, #108 ; 0x6c
|
|
800b60a: f002 f811 bl 800d630 <__match>
|
|
800b60e: 2800 cmp r0, #0
|
|
800b610: f43f aed7 beq.w 800b3c2 <_strtod_l+0xba>
|
|
800b614: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b616: 499d ldr r1, [pc, #628] ; (800b88c <_strtod_l+0x584>)
|
|
800b618: 3b01 subs r3, #1
|
|
800b61a: a81b add r0, sp, #108 ; 0x6c
|
|
800b61c: 931b str r3, [sp, #108] ; 0x6c
|
|
800b61e: f002 f807 bl 800d630 <__match>
|
|
800b622: b910 cbnz r0, 800b62a <_strtod_l+0x322>
|
|
800b624: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b626: 3301 adds r3, #1
|
|
800b628: 931b str r3, [sp, #108] ; 0x6c
|
|
800b62a: f8df b274 ldr.w fp, [pc, #628] ; 800b8a0 <_strtod_l+0x598>
|
|
800b62e: f04f 0a00 mov.w sl, #0
|
|
800b632: e6a8 b.n 800b386 <_strtod_l+0x7e>
|
|
800b634: 210a movs r1, #10
|
|
800b636: fb01 3e0e mla lr, r1, lr, r3
|
|
800b63a: f1ae 0e30 sub.w lr, lr, #48 ; 0x30
|
|
800b63e: e7b8 b.n 800b5b2 <_strtod_l+0x2aa>
|
|
800b640: 46be mov lr, r7
|
|
800b642: e7c8 b.n 800b5d6 <_strtod_l+0x2ce>
|
|
800b644: 2b69 cmp r3, #105 ; 0x69
|
|
800b646: d0de beq.n 800b606 <_strtod_l+0x2fe>
|
|
800b648: 2b6e cmp r3, #110 ; 0x6e
|
|
800b64a: f47f aeba bne.w 800b3c2 <_strtod_l+0xba>
|
|
800b64e: 4990 ldr r1, [pc, #576] ; (800b890 <_strtod_l+0x588>)
|
|
800b650: a81b add r0, sp, #108 ; 0x6c
|
|
800b652: f001 ffed bl 800d630 <__match>
|
|
800b656: 2800 cmp r0, #0
|
|
800b658: f43f aeb3 beq.w 800b3c2 <_strtod_l+0xba>
|
|
800b65c: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800b65e: 781b ldrb r3, [r3, #0]
|
|
800b660: 2b28 cmp r3, #40 ; 0x28
|
|
800b662: d10e bne.n 800b682 <_strtod_l+0x37a>
|
|
800b664: aa1e add r2, sp, #120 ; 0x78
|
|
800b666: 498b ldr r1, [pc, #556] ; (800b894 <_strtod_l+0x58c>)
|
|
800b668: a81b add r0, sp, #108 ; 0x6c
|
|
800b66a: f001 fff5 bl 800d658 <__hexnan>
|
|
800b66e: 2805 cmp r0, #5
|
|
800b670: d107 bne.n 800b682 <_strtod_l+0x37a>
|
|
800b672: 9b1f ldr r3, [sp, #124] ; 0x7c
|
|
800b674: f8dd a078 ldr.w sl, [sp, #120] ; 0x78
|
|
800b678: f043 4bff orr.w fp, r3, #2139095040 ; 0x7f800000
|
|
800b67c: f44b 0be0 orr.w fp, fp, #7340032 ; 0x700000
|
|
800b680: e681 b.n 800b386 <_strtod_l+0x7e>
|
|
800b682: f8df b224 ldr.w fp, [pc, #548] ; 800b8a8 <_strtod_l+0x5a0>
|
|
800b686: e7d2 b.n 800b62e <_strtod_l+0x326>
|
|
800b688: ebae 0302 sub.w r3, lr, r2
|
|
800b68c: 9306 str r3, [sp, #24]
|
|
800b68e: 9b05 ldr r3, [sp, #20]
|
|
800b690: 9807 ldr r0, [sp, #28]
|
|
800b692: 2b00 cmp r3, #0
|
|
800b694: bf08 it eq
|
|
800b696: 4623 moveq r3, r4
|
|
800b698: 2c10 cmp r4, #16
|
|
800b69a: 9305 str r3, [sp, #20]
|
|
800b69c: 46a0 mov r8, r4
|
|
800b69e: bfa8 it ge
|
|
800b6a0: f04f 0810 movge.w r8, #16
|
|
800b6a4: f7f4 ff36 bl 8000514 <__aeabi_ui2d>
|
|
800b6a8: 2c09 cmp r4, #9
|
|
800b6aa: 4682 mov sl, r0
|
|
800b6ac: 468b mov fp, r1
|
|
800b6ae: dc13 bgt.n 800b6d8 <_strtod_l+0x3d0>
|
|
800b6b0: 9b06 ldr r3, [sp, #24]
|
|
800b6b2: 2b00 cmp r3, #0
|
|
800b6b4: f43f ae67 beq.w 800b386 <_strtod_l+0x7e>
|
|
800b6b8: 9b06 ldr r3, [sp, #24]
|
|
800b6ba: dd7a ble.n 800b7b2 <_strtod_l+0x4aa>
|
|
800b6bc: 2b16 cmp r3, #22
|
|
800b6be: dc61 bgt.n 800b784 <_strtod_l+0x47c>
|
|
800b6c0: 4a75 ldr r2, [pc, #468] ; (800b898 <_strtod_l+0x590>)
|
|
800b6c2: eb02 0ec3 add.w lr, r2, r3, lsl #3
|
|
800b6c6: e9de 0100 ldrd r0, r1, [lr]
|
|
800b6ca: 4652 mov r2, sl
|
|
800b6cc: 465b mov r3, fp
|
|
800b6ce: f7f4 ff9b bl 8000608 <__aeabi_dmul>
|
|
800b6d2: 4682 mov sl, r0
|
|
800b6d4: 468b mov fp, r1
|
|
800b6d6: e656 b.n 800b386 <_strtod_l+0x7e>
|
|
800b6d8: 4b6f ldr r3, [pc, #444] ; (800b898 <_strtod_l+0x590>)
|
|
800b6da: eb03 03c8 add.w r3, r3, r8, lsl #3
|
|
800b6de: e953 2312 ldrd r2, r3, [r3, #-72] ; 0x48
|
|
800b6e2: f7f4 ff91 bl 8000608 <__aeabi_dmul>
|
|
800b6e6: 4606 mov r6, r0
|
|
800b6e8: 4628 mov r0, r5
|
|
800b6ea: 460f mov r7, r1
|
|
800b6ec: f7f4 ff12 bl 8000514 <__aeabi_ui2d>
|
|
800b6f0: 4602 mov r2, r0
|
|
800b6f2: 460b mov r3, r1
|
|
800b6f4: 4630 mov r0, r6
|
|
800b6f6: 4639 mov r1, r7
|
|
800b6f8: f7f4 fdd0 bl 800029c <__adddf3>
|
|
800b6fc: 2c0f cmp r4, #15
|
|
800b6fe: 4682 mov sl, r0
|
|
800b700: 468b mov fp, r1
|
|
800b702: ddd5 ble.n 800b6b0 <_strtod_l+0x3a8>
|
|
800b704: 9b06 ldr r3, [sp, #24]
|
|
800b706: eba4 0808 sub.w r8, r4, r8
|
|
800b70a: 4498 add r8, r3
|
|
800b70c: f1b8 0f00 cmp.w r8, #0
|
|
800b710: f340 8096 ble.w 800b840 <_strtod_l+0x538>
|
|
800b714: f018 030f ands.w r3, r8, #15
|
|
800b718: d00a beq.n 800b730 <_strtod_l+0x428>
|
|
800b71a: 495f ldr r1, [pc, #380] ; (800b898 <_strtod_l+0x590>)
|
|
800b71c: eb01 01c3 add.w r1, r1, r3, lsl #3
|
|
800b720: 4652 mov r2, sl
|
|
800b722: 465b mov r3, fp
|
|
800b724: e9d1 0100 ldrd r0, r1, [r1]
|
|
800b728: f7f4 ff6e bl 8000608 <__aeabi_dmul>
|
|
800b72c: 4682 mov sl, r0
|
|
800b72e: 468b mov fp, r1
|
|
800b730: f038 080f bics.w r8, r8, #15
|
|
800b734: d073 beq.n 800b81e <_strtod_l+0x516>
|
|
800b736: f5b8 7f9a cmp.w r8, #308 ; 0x134
|
|
800b73a: dd47 ble.n 800b7cc <_strtod_l+0x4c4>
|
|
800b73c: 2400 movs r4, #0
|
|
800b73e: 46a0 mov r8, r4
|
|
800b740: 9407 str r4, [sp, #28]
|
|
800b742: 9405 str r4, [sp, #20]
|
|
800b744: 2322 movs r3, #34 ; 0x22
|
|
800b746: f8df b158 ldr.w fp, [pc, #344] ; 800b8a0 <_strtod_l+0x598>
|
|
800b74a: f8c9 3000 str.w r3, [r9]
|
|
800b74e: f04f 0a00 mov.w sl, #0
|
|
800b752: 9b07 ldr r3, [sp, #28]
|
|
800b754: 2b00 cmp r3, #0
|
|
800b756: f43f ae16 beq.w 800b386 <_strtod_l+0x7e>
|
|
800b75a: 991c ldr r1, [sp, #112] ; 0x70
|
|
800b75c: 4648 mov r0, r9
|
|
800b75e: f002 f8d6 bl 800d90e <_Bfree>
|
|
800b762: 9905 ldr r1, [sp, #20]
|
|
800b764: 4648 mov r0, r9
|
|
800b766: f002 f8d2 bl 800d90e <_Bfree>
|
|
800b76a: 4641 mov r1, r8
|
|
800b76c: 4648 mov r0, r9
|
|
800b76e: f002 f8ce bl 800d90e <_Bfree>
|
|
800b772: 9907 ldr r1, [sp, #28]
|
|
800b774: 4648 mov r0, r9
|
|
800b776: f002 f8ca bl 800d90e <_Bfree>
|
|
800b77a: 4621 mov r1, r4
|
|
800b77c: 4648 mov r0, r9
|
|
800b77e: f002 f8c6 bl 800d90e <_Bfree>
|
|
800b782: e600 b.n 800b386 <_strtod_l+0x7e>
|
|
800b784: 9a06 ldr r2, [sp, #24]
|
|
800b786: f1c4 0325 rsb r3, r4, #37 ; 0x25
|
|
800b78a: 4293 cmp r3, r2
|
|
800b78c: dbba blt.n 800b704 <_strtod_l+0x3fc>
|
|
800b78e: 4d42 ldr r5, [pc, #264] ; (800b898 <_strtod_l+0x590>)
|
|
800b790: f1c4 040f rsb r4, r4, #15
|
|
800b794: eb05 01c4 add.w r1, r5, r4, lsl #3
|
|
800b798: 4652 mov r2, sl
|
|
800b79a: 465b mov r3, fp
|
|
800b79c: e9d1 0100 ldrd r0, r1, [r1]
|
|
800b7a0: f7f4 ff32 bl 8000608 <__aeabi_dmul>
|
|
800b7a4: 9b06 ldr r3, [sp, #24]
|
|
800b7a6: 1b1c subs r4, r3, r4
|
|
800b7a8: eb05 05c4 add.w r5, r5, r4, lsl #3
|
|
800b7ac: e9d5 2300 ldrd r2, r3, [r5]
|
|
800b7b0: e78d b.n 800b6ce <_strtod_l+0x3c6>
|
|
800b7b2: f113 0f16 cmn.w r3, #22
|
|
800b7b6: dba5 blt.n 800b704 <_strtod_l+0x3fc>
|
|
800b7b8: 4a37 ldr r2, [pc, #220] ; (800b898 <_strtod_l+0x590>)
|
|
800b7ba: eba2 02c3 sub.w r2, r2, r3, lsl #3
|
|
800b7be: e9d2 2300 ldrd r2, r3, [r2]
|
|
800b7c2: 4650 mov r0, sl
|
|
800b7c4: 4659 mov r1, fp
|
|
800b7c6: f7f5 f849 bl 800085c <__aeabi_ddiv>
|
|
800b7ca: e782 b.n 800b6d2 <_strtod_l+0x3ca>
|
|
800b7cc: 2300 movs r3, #0
|
|
800b7ce: 4e33 ldr r6, [pc, #204] ; (800b89c <_strtod_l+0x594>)
|
|
800b7d0: ea4f 1828 mov.w r8, r8, asr #4
|
|
800b7d4: 4650 mov r0, sl
|
|
800b7d6: 4659 mov r1, fp
|
|
800b7d8: 461d mov r5, r3
|
|
800b7da: f1b8 0f01 cmp.w r8, #1
|
|
800b7de: dc21 bgt.n 800b824 <_strtod_l+0x51c>
|
|
800b7e0: b10b cbz r3, 800b7e6 <_strtod_l+0x4de>
|
|
800b7e2: 4682 mov sl, r0
|
|
800b7e4: 468b mov fp, r1
|
|
800b7e6: 4b2d ldr r3, [pc, #180] ; (800b89c <_strtod_l+0x594>)
|
|
800b7e8: f1ab 7b54 sub.w fp, fp, #55574528 ; 0x3500000
|
|
800b7ec: eb03 05c5 add.w r5, r3, r5, lsl #3
|
|
800b7f0: 4652 mov r2, sl
|
|
800b7f2: 465b mov r3, fp
|
|
800b7f4: e9d5 0100 ldrd r0, r1, [r5]
|
|
800b7f8: f7f4 ff06 bl 8000608 <__aeabi_dmul>
|
|
800b7fc: 4b28 ldr r3, [pc, #160] ; (800b8a0 <_strtod_l+0x598>)
|
|
800b7fe: 460a mov r2, r1
|
|
800b800: 400b ands r3, r1
|
|
800b802: 4928 ldr r1, [pc, #160] ; (800b8a4 <_strtod_l+0x59c>)
|
|
800b804: 428b cmp r3, r1
|
|
800b806: 4682 mov sl, r0
|
|
800b808: d898 bhi.n 800b73c <_strtod_l+0x434>
|
|
800b80a: f5a1 1180 sub.w r1, r1, #1048576 ; 0x100000
|
|
800b80e: 428b cmp r3, r1
|
|
800b810: bf86 itte hi
|
|
800b812: f8df b098 ldrhi.w fp, [pc, #152] ; 800b8ac <_strtod_l+0x5a4>
|
|
800b816: f04f 3aff movhi.w sl, #4294967295
|
|
800b81a: f102 7b54 addls.w fp, r2, #55574528 ; 0x3500000
|
|
800b81e: 2300 movs r3, #0
|
|
800b820: 9304 str r3, [sp, #16]
|
|
800b822: e077 b.n 800b914 <_strtod_l+0x60c>
|
|
800b824: f018 0f01 tst.w r8, #1
|
|
800b828: d006 beq.n 800b838 <_strtod_l+0x530>
|
|
800b82a: eb06 03c5 add.w r3, r6, r5, lsl #3
|
|
800b82e: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b832: f7f4 fee9 bl 8000608 <__aeabi_dmul>
|
|
800b836: 2301 movs r3, #1
|
|
800b838: 3501 adds r5, #1
|
|
800b83a: ea4f 0868 mov.w r8, r8, asr #1
|
|
800b83e: e7cc b.n 800b7da <_strtod_l+0x4d2>
|
|
800b840: d0ed beq.n 800b81e <_strtod_l+0x516>
|
|
800b842: f1c8 0800 rsb r8, r8, #0
|
|
800b846: f018 020f ands.w r2, r8, #15
|
|
800b84a: d00a beq.n 800b862 <_strtod_l+0x55a>
|
|
800b84c: 4b12 ldr r3, [pc, #72] ; (800b898 <_strtod_l+0x590>)
|
|
800b84e: eb03 03c2 add.w r3, r3, r2, lsl #3
|
|
800b852: 4650 mov r0, sl
|
|
800b854: 4659 mov r1, fp
|
|
800b856: e9d3 2300 ldrd r2, r3, [r3]
|
|
800b85a: f7f4 ffff bl 800085c <__aeabi_ddiv>
|
|
800b85e: 4682 mov sl, r0
|
|
800b860: 468b mov fp, r1
|
|
800b862: ea5f 1828 movs.w r8, r8, asr #4
|
|
800b866: d0da beq.n 800b81e <_strtod_l+0x516>
|
|
800b868: f1b8 0f1f cmp.w r8, #31
|
|
800b86c: dd20 ble.n 800b8b0 <_strtod_l+0x5a8>
|
|
800b86e: 2400 movs r4, #0
|
|
800b870: 46a0 mov r8, r4
|
|
800b872: 9407 str r4, [sp, #28]
|
|
800b874: 9405 str r4, [sp, #20]
|
|
800b876: 2322 movs r3, #34 ; 0x22
|
|
800b878: f04f 0a00 mov.w sl, #0
|
|
800b87c: f04f 0b00 mov.w fp, #0
|
|
800b880: f8c9 3000 str.w r3, [r9]
|
|
800b884: e765 b.n 800b752 <_strtod_l+0x44a>
|
|
800b886: bf00 nop
|
|
800b888: 0800e93d .word 0x0800e93d
|
|
800b88c: 0800e9cb .word 0x0800e9cb
|
|
800b890: 0800e945 .word 0x0800e945
|
|
800b894: 0800e988 .word 0x0800e988
|
|
800b898: 0800ea70 .word 0x0800ea70
|
|
800b89c: 0800ea48 .word 0x0800ea48
|
|
800b8a0: 7ff00000 .word 0x7ff00000
|
|
800b8a4: 7ca00000 .word 0x7ca00000
|
|
800b8a8: fff80000 .word 0xfff80000
|
|
800b8ac: 7fefffff .word 0x7fefffff
|
|
800b8b0: f018 0310 ands.w r3, r8, #16
|
|
800b8b4: bf18 it ne
|
|
800b8b6: 236a movne r3, #106 ; 0x6a
|
|
800b8b8: 4da0 ldr r5, [pc, #640] ; (800bb3c <_strtod_l+0x834>)
|
|
800b8ba: 9304 str r3, [sp, #16]
|
|
800b8bc: 4650 mov r0, sl
|
|
800b8be: 4659 mov r1, fp
|
|
800b8c0: 2300 movs r3, #0
|
|
800b8c2: f1b8 0f00 cmp.w r8, #0
|
|
800b8c6: f300 810a bgt.w 800bade <_strtod_l+0x7d6>
|
|
800b8ca: b10b cbz r3, 800b8d0 <_strtod_l+0x5c8>
|
|
800b8cc: 4682 mov sl, r0
|
|
800b8ce: 468b mov fp, r1
|
|
800b8d0: 9b04 ldr r3, [sp, #16]
|
|
800b8d2: b1bb cbz r3, 800b904 <_strtod_l+0x5fc>
|
|
800b8d4: f3cb 530a ubfx r3, fp, #20, #11
|
|
800b8d8: f1c3 036b rsb r3, r3, #107 ; 0x6b
|
|
800b8dc: 2b00 cmp r3, #0
|
|
800b8de: 4659 mov r1, fp
|
|
800b8e0: dd10 ble.n 800b904 <_strtod_l+0x5fc>
|
|
800b8e2: 2b1f cmp r3, #31
|
|
800b8e4: f340 8107 ble.w 800baf6 <_strtod_l+0x7ee>
|
|
800b8e8: 2b34 cmp r3, #52 ; 0x34
|
|
800b8ea: bfde ittt le
|
|
800b8ec: 3b20 suble r3, #32
|
|
800b8ee: f04f 32ff movle.w r2, #4294967295
|
|
800b8f2: fa02 f303 lslle.w r3, r2, r3
|
|
800b8f6: f04f 0a00 mov.w sl, #0
|
|
800b8fa: bfcc ite gt
|
|
800b8fc: f04f 7b5c movgt.w fp, #57671680 ; 0x3700000
|
|
800b900: ea03 0b01 andle.w fp, r3, r1
|
|
800b904: 2200 movs r2, #0
|
|
800b906: 2300 movs r3, #0
|
|
800b908: 4650 mov r0, sl
|
|
800b90a: 4659 mov r1, fp
|
|
800b90c: f7f5 f8e4 bl 8000ad8 <__aeabi_dcmpeq>
|
|
800b910: 2800 cmp r0, #0
|
|
800b912: d1ac bne.n 800b86e <_strtod_l+0x566>
|
|
800b914: 9b07 ldr r3, [sp, #28]
|
|
800b916: 9300 str r3, [sp, #0]
|
|
800b918: 9a05 ldr r2, [sp, #20]
|
|
800b91a: 9908 ldr r1, [sp, #32]
|
|
800b91c: 4623 mov r3, r4
|
|
800b91e: 4648 mov r0, r9
|
|
800b920: f002 f847 bl 800d9b2 <__s2b>
|
|
800b924: 9007 str r0, [sp, #28]
|
|
800b926: 2800 cmp r0, #0
|
|
800b928: f43f af08 beq.w 800b73c <_strtod_l+0x434>
|
|
800b92c: 9a06 ldr r2, [sp, #24]
|
|
800b92e: 9b06 ldr r3, [sp, #24]
|
|
800b930: 2a00 cmp r2, #0
|
|
800b932: f1c3 0300 rsb r3, r3, #0
|
|
800b936: bfa8 it ge
|
|
800b938: 2300 movge r3, #0
|
|
800b93a: 930e str r3, [sp, #56] ; 0x38
|
|
800b93c: 2400 movs r4, #0
|
|
800b93e: ea22 73e2 bic.w r3, r2, r2, asr #31
|
|
800b942: 9316 str r3, [sp, #88] ; 0x58
|
|
800b944: 46a0 mov r8, r4
|
|
800b946: 9b07 ldr r3, [sp, #28]
|
|
800b948: 4648 mov r0, r9
|
|
800b94a: 6859 ldr r1, [r3, #4]
|
|
800b94c: f001 ffab bl 800d8a6 <_Balloc>
|
|
800b950: 9005 str r0, [sp, #20]
|
|
800b952: 2800 cmp r0, #0
|
|
800b954: f43f aef6 beq.w 800b744 <_strtod_l+0x43c>
|
|
800b958: 9b07 ldr r3, [sp, #28]
|
|
800b95a: 691a ldr r2, [r3, #16]
|
|
800b95c: 3202 adds r2, #2
|
|
800b95e: f103 010c add.w r1, r3, #12
|
|
800b962: 0092 lsls r2, r2, #2
|
|
800b964: 300c adds r0, #12
|
|
800b966: f001 ff91 bl 800d88c <memcpy>
|
|
800b96a: aa1e add r2, sp, #120 ; 0x78
|
|
800b96c: a91d add r1, sp, #116 ; 0x74
|
|
800b96e: ec4b ab10 vmov d0, sl, fp
|
|
800b972: 4648 mov r0, r9
|
|
800b974: e9cd ab08 strd sl, fp, [sp, #32]
|
|
800b978: f002 fad6 bl 800df28 <__d2b>
|
|
800b97c: 901c str r0, [sp, #112] ; 0x70
|
|
800b97e: 2800 cmp r0, #0
|
|
800b980: f43f aee0 beq.w 800b744 <_strtod_l+0x43c>
|
|
800b984: 2101 movs r1, #1
|
|
800b986: 4648 mov r0, r9
|
|
800b988: f002 f89f bl 800daca <__i2b>
|
|
800b98c: 4680 mov r8, r0
|
|
800b98e: 2800 cmp r0, #0
|
|
800b990: f43f aed8 beq.w 800b744 <_strtod_l+0x43c>
|
|
800b994: 9e1d ldr r6, [sp, #116] ; 0x74
|
|
800b996: 9a1e ldr r2, [sp, #120] ; 0x78
|
|
800b998: 2e00 cmp r6, #0
|
|
800b99a: bfab itete ge
|
|
800b99c: 9b0e ldrge r3, [sp, #56] ; 0x38
|
|
800b99e: 9b16 ldrlt r3, [sp, #88] ; 0x58
|
|
800b9a0: 9d16 ldrge r5, [sp, #88] ; 0x58
|
|
800b9a2: 9f0e ldrlt r7, [sp, #56] ; 0x38
|
|
800b9a4: bfac ite ge
|
|
800b9a6: 18f7 addge r7, r6, r3
|
|
800b9a8: 1b9d sublt r5, r3, r6
|
|
800b9aa: 9b04 ldr r3, [sp, #16]
|
|
800b9ac: 1af6 subs r6, r6, r3
|
|
800b9ae: 4416 add r6, r2
|
|
800b9b0: 4b63 ldr r3, [pc, #396] ; (800bb40 <_strtod_l+0x838>)
|
|
800b9b2: 3e01 subs r6, #1
|
|
800b9b4: 429e cmp r6, r3
|
|
800b9b6: f1c2 0236 rsb r2, r2, #54 ; 0x36
|
|
800b9ba: f280 80af bge.w 800bb1c <_strtod_l+0x814>
|
|
800b9be: 1b9b subs r3, r3, r6
|
|
800b9c0: 2b1f cmp r3, #31
|
|
800b9c2: eba2 0203 sub.w r2, r2, r3
|
|
800b9c6: f04f 0101 mov.w r1, #1
|
|
800b9ca: f300 809b bgt.w 800bb04 <_strtod_l+0x7fc>
|
|
800b9ce: fa01 f303 lsl.w r3, r1, r3
|
|
800b9d2: 930f str r3, [sp, #60] ; 0x3c
|
|
800b9d4: 2300 movs r3, #0
|
|
800b9d6: 930a str r3, [sp, #40] ; 0x28
|
|
800b9d8: 18be adds r6, r7, r2
|
|
800b9da: 9b04 ldr r3, [sp, #16]
|
|
800b9dc: 42b7 cmp r7, r6
|
|
800b9de: 4415 add r5, r2
|
|
800b9e0: 441d add r5, r3
|
|
800b9e2: 463b mov r3, r7
|
|
800b9e4: bfa8 it ge
|
|
800b9e6: 4633 movge r3, r6
|
|
800b9e8: 42ab cmp r3, r5
|
|
800b9ea: bfa8 it ge
|
|
800b9ec: 462b movge r3, r5
|
|
800b9ee: 2b00 cmp r3, #0
|
|
800b9f0: bfc2 ittt gt
|
|
800b9f2: 1af6 subgt r6, r6, r3
|
|
800b9f4: 1aed subgt r5, r5, r3
|
|
800b9f6: 1aff subgt r7, r7, r3
|
|
800b9f8: 9b0e ldr r3, [sp, #56] ; 0x38
|
|
800b9fa: b1bb cbz r3, 800ba2c <_strtod_l+0x724>
|
|
800b9fc: 4641 mov r1, r8
|
|
800b9fe: 461a mov r2, r3
|
|
800ba00: 4648 mov r0, r9
|
|
800ba02: f002 f901 bl 800dc08 <__pow5mult>
|
|
800ba06: 4680 mov r8, r0
|
|
800ba08: 2800 cmp r0, #0
|
|
800ba0a: f43f ae9b beq.w 800b744 <_strtod_l+0x43c>
|
|
800ba0e: 4601 mov r1, r0
|
|
800ba10: 9a1c ldr r2, [sp, #112] ; 0x70
|
|
800ba12: 4648 mov r0, r9
|
|
800ba14: f002 f862 bl 800dadc <__multiply>
|
|
800ba18: 900c str r0, [sp, #48] ; 0x30
|
|
800ba1a: 2800 cmp r0, #0
|
|
800ba1c: f43f ae92 beq.w 800b744 <_strtod_l+0x43c>
|
|
800ba20: 991c ldr r1, [sp, #112] ; 0x70
|
|
800ba22: 4648 mov r0, r9
|
|
800ba24: f001 ff73 bl 800d90e <_Bfree>
|
|
800ba28: 9b0c ldr r3, [sp, #48] ; 0x30
|
|
800ba2a: 931c str r3, [sp, #112] ; 0x70
|
|
800ba2c: 2e00 cmp r6, #0
|
|
800ba2e: dc7a bgt.n 800bb26 <_strtod_l+0x81e>
|
|
800ba30: 9b06 ldr r3, [sp, #24]
|
|
800ba32: 2b00 cmp r3, #0
|
|
800ba34: dd08 ble.n 800ba48 <_strtod_l+0x740>
|
|
800ba36: 9a16 ldr r2, [sp, #88] ; 0x58
|
|
800ba38: 9905 ldr r1, [sp, #20]
|
|
800ba3a: 4648 mov r0, r9
|
|
800ba3c: f002 f8e4 bl 800dc08 <__pow5mult>
|
|
800ba40: 9005 str r0, [sp, #20]
|
|
800ba42: 2800 cmp r0, #0
|
|
800ba44: f43f ae7e beq.w 800b744 <_strtod_l+0x43c>
|
|
800ba48: 2d00 cmp r5, #0
|
|
800ba4a: dd08 ble.n 800ba5e <_strtod_l+0x756>
|
|
800ba4c: 462a mov r2, r5
|
|
800ba4e: 9905 ldr r1, [sp, #20]
|
|
800ba50: 4648 mov r0, r9
|
|
800ba52: f002 f927 bl 800dca4 <__lshift>
|
|
800ba56: 9005 str r0, [sp, #20]
|
|
800ba58: 2800 cmp r0, #0
|
|
800ba5a: f43f ae73 beq.w 800b744 <_strtod_l+0x43c>
|
|
800ba5e: 2f00 cmp r7, #0
|
|
800ba60: dd08 ble.n 800ba74 <_strtod_l+0x76c>
|
|
800ba62: 4641 mov r1, r8
|
|
800ba64: 463a mov r2, r7
|
|
800ba66: 4648 mov r0, r9
|
|
800ba68: f002 f91c bl 800dca4 <__lshift>
|
|
800ba6c: 4680 mov r8, r0
|
|
800ba6e: 2800 cmp r0, #0
|
|
800ba70: f43f ae68 beq.w 800b744 <_strtod_l+0x43c>
|
|
800ba74: 9a05 ldr r2, [sp, #20]
|
|
800ba76: 991c ldr r1, [sp, #112] ; 0x70
|
|
800ba78: 4648 mov r0, r9
|
|
800ba7a: f002 f981 bl 800dd80 <__mdiff>
|
|
800ba7e: 4604 mov r4, r0
|
|
800ba80: 2800 cmp r0, #0
|
|
800ba82: f43f ae5f beq.w 800b744 <_strtod_l+0x43c>
|
|
800ba86: 68c3 ldr r3, [r0, #12]
|
|
800ba88: 930c str r3, [sp, #48] ; 0x30
|
|
800ba8a: 2300 movs r3, #0
|
|
800ba8c: 60c3 str r3, [r0, #12]
|
|
800ba8e: 4641 mov r1, r8
|
|
800ba90: f002 f95c bl 800dd4c <__mcmp>
|
|
800ba94: 2800 cmp r0, #0
|
|
800ba96: da55 bge.n 800bb44 <_strtod_l+0x83c>
|
|
800ba98: 9b0c ldr r3, [sp, #48] ; 0x30
|
|
800ba9a: b9e3 cbnz r3, 800bad6 <_strtod_l+0x7ce>
|
|
800ba9c: f1ba 0f00 cmp.w sl, #0
|
|
800baa0: d119 bne.n 800bad6 <_strtod_l+0x7ce>
|
|
800baa2: f3cb 0313 ubfx r3, fp, #0, #20
|
|
800baa6: b9b3 cbnz r3, 800bad6 <_strtod_l+0x7ce>
|
|
800baa8: f02b 4300 bic.w r3, fp, #2147483648 ; 0x80000000
|
|
800baac: 0d1b lsrs r3, r3, #20
|
|
800baae: 051b lsls r3, r3, #20
|
|
800bab0: f1b3 6fd6 cmp.w r3, #112197632 ; 0x6b00000
|
|
800bab4: d90f bls.n 800bad6 <_strtod_l+0x7ce>
|
|
800bab6: 6963 ldr r3, [r4, #20]
|
|
800bab8: b913 cbnz r3, 800bac0 <_strtod_l+0x7b8>
|
|
800baba: 6923 ldr r3, [r4, #16]
|
|
800babc: 2b01 cmp r3, #1
|
|
800babe: dd0a ble.n 800bad6 <_strtod_l+0x7ce>
|
|
800bac0: 4621 mov r1, r4
|
|
800bac2: 2201 movs r2, #1
|
|
800bac4: 4648 mov r0, r9
|
|
800bac6: f002 f8ed bl 800dca4 <__lshift>
|
|
800baca: 4641 mov r1, r8
|
|
800bacc: 4604 mov r4, r0
|
|
800bace: f002 f93d bl 800dd4c <__mcmp>
|
|
800bad2: 2800 cmp r0, #0
|
|
800bad4: dc67 bgt.n 800bba6 <_strtod_l+0x89e>
|
|
800bad6: 9b04 ldr r3, [sp, #16]
|
|
800bad8: 2b00 cmp r3, #0
|
|
800bada: d171 bne.n 800bbc0 <_strtod_l+0x8b8>
|
|
800badc: e63d b.n 800b75a <_strtod_l+0x452>
|
|
800bade: f018 0f01 tst.w r8, #1
|
|
800bae2: d004 beq.n 800baee <_strtod_l+0x7e6>
|
|
800bae4: e9d5 2300 ldrd r2, r3, [r5]
|
|
800bae8: f7f4 fd8e bl 8000608 <__aeabi_dmul>
|
|
800baec: 2301 movs r3, #1
|
|
800baee: ea4f 0868 mov.w r8, r8, asr #1
|
|
800baf2: 3508 adds r5, #8
|
|
800baf4: e6e5 b.n 800b8c2 <_strtod_l+0x5ba>
|
|
800baf6: f04f 32ff mov.w r2, #4294967295
|
|
800bafa: fa02 f303 lsl.w r3, r2, r3
|
|
800bafe: ea03 0a0a and.w sl, r3, sl
|
|
800bb02: e6ff b.n 800b904 <_strtod_l+0x5fc>
|
|
800bb04: f1c6 467f rsb r6, r6, #4278190080 ; 0xff000000
|
|
800bb08: f506 067f add.w r6, r6, #16711680 ; 0xff0000
|
|
800bb0c: f506 467b add.w r6, r6, #64256 ; 0xfb00
|
|
800bb10: 36e2 adds r6, #226 ; 0xe2
|
|
800bb12: fa01 f306 lsl.w r3, r1, r6
|
|
800bb16: 930a str r3, [sp, #40] ; 0x28
|
|
800bb18: 910f str r1, [sp, #60] ; 0x3c
|
|
800bb1a: e75d b.n 800b9d8 <_strtod_l+0x6d0>
|
|
800bb1c: 2300 movs r3, #0
|
|
800bb1e: 930a str r3, [sp, #40] ; 0x28
|
|
800bb20: 2301 movs r3, #1
|
|
800bb22: 930f str r3, [sp, #60] ; 0x3c
|
|
800bb24: e758 b.n 800b9d8 <_strtod_l+0x6d0>
|
|
800bb26: 4632 mov r2, r6
|
|
800bb28: 991c ldr r1, [sp, #112] ; 0x70
|
|
800bb2a: 4648 mov r0, r9
|
|
800bb2c: f002 f8ba bl 800dca4 <__lshift>
|
|
800bb30: 901c str r0, [sp, #112] ; 0x70
|
|
800bb32: 2800 cmp r0, #0
|
|
800bb34: f47f af7c bne.w 800ba30 <_strtod_l+0x728>
|
|
800bb38: e604 b.n 800b744 <_strtod_l+0x43c>
|
|
800bb3a: bf00 nop
|
|
800bb3c: 0800e9a0 .word 0x0800e9a0
|
|
800bb40: fffffc02 .word 0xfffffc02
|
|
800bb44: 465d mov r5, fp
|
|
800bb46: f040 8086 bne.w 800bc56 <_strtod_l+0x94e>
|
|
800bb4a: 9a0c ldr r2, [sp, #48] ; 0x30
|
|
800bb4c: f3cb 0313 ubfx r3, fp, #0, #20
|
|
800bb50: b32a cbz r2, 800bb9e <_strtod_l+0x896>
|
|
800bb52: 4aaf ldr r2, [pc, #700] ; (800be10 <_strtod_l+0xb08>)
|
|
800bb54: 4293 cmp r3, r2
|
|
800bb56: d153 bne.n 800bc00 <_strtod_l+0x8f8>
|
|
800bb58: 9b04 ldr r3, [sp, #16]
|
|
800bb5a: 4650 mov r0, sl
|
|
800bb5c: b1d3 cbz r3, 800bb94 <_strtod_l+0x88c>
|
|
800bb5e: 4aad ldr r2, [pc, #692] ; (800be14 <_strtod_l+0xb0c>)
|
|
800bb60: 402a ands r2, r5
|
|
800bb62: f1b2 6fd4 cmp.w r2, #111149056 ; 0x6a00000
|
|
800bb66: f04f 31ff mov.w r1, #4294967295
|
|
800bb6a: d816 bhi.n 800bb9a <_strtod_l+0x892>
|
|
800bb6c: 0d12 lsrs r2, r2, #20
|
|
800bb6e: f1c2 036b rsb r3, r2, #107 ; 0x6b
|
|
800bb72: fa01 f303 lsl.w r3, r1, r3
|
|
800bb76: 4298 cmp r0, r3
|
|
800bb78: d142 bne.n 800bc00 <_strtod_l+0x8f8>
|
|
800bb7a: 4ba7 ldr r3, [pc, #668] ; (800be18 <_strtod_l+0xb10>)
|
|
800bb7c: 429d cmp r5, r3
|
|
800bb7e: d102 bne.n 800bb86 <_strtod_l+0x87e>
|
|
800bb80: 3001 adds r0, #1
|
|
800bb82: f43f addf beq.w 800b744 <_strtod_l+0x43c>
|
|
800bb86: 4ba3 ldr r3, [pc, #652] ; (800be14 <_strtod_l+0xb0c>)
|
|
800bb88: 402b ands r3, r5
|
|
800bb8a: f503 1b80 add.w fp, r3, #1048576 ; 0x100000
|
|
800bb8e: f04f 0a00 mov.w sl, #0
|
|
800bb92: e7a0 b.n 800bad6 <_strtod_l+0x7ce>
|
|
800bb94: f04f 33ff mov.w r3, #4294967295
|
|
800bb98: e7ed b.n 800bb76 <_strtod_l+0x86e>
|
|
800bb9a: 460b mov r3, r1
|
|
800bb9c: e7eb b.n 800bb76 <_strtod_l+0x86e>
|
|
800bb9e: bb7b cbnz r3, 800bc00 <_strtod_l+0x8f8>
|
|
800bba0: f1ba 0f00 cmp.w sl, #0
|
|
800bba4: d12c bne.n 800bc00 <_strtod_l+0x8f8>
|
|
800bba6: 9904 ldr r1, [sp, #16]
|
|
800bba8: 4a9a ldr r2, [pc, #616] ; (800be14 <_strtod_l+0xb0c>)
|
|
800bbaa: 465b mov r3, fp
|
|
800bbac: b1f1 cbz r1, 800bbec <_strtod_l+0x8e4>
|
|
800bbae: ea02 010b and.w r1, r2, fp
|
|
800bbb2: f1b1 6fd6 cmp.w r1, #112197632 ; 0x6b00000
|
|
800bbb6: dc19 bgt.n 800bbec <_strtod_l+0x8e4>
|
|
800bbb8: f1b1 7f5c cmp.w r1, #57671680 ; 0x3700000
|
|
800bbbc: f77f ae5b ble.w 800b876 <_strtod_l+0x56e>
|
|
800bbc0: 4a96 ldr r2, [pc, #600] ; (800be1c <_strtod_l+0xb14>)
|
|
800bbc2: 2300 movs r3, #0
|
|
800bbc4: e9cd 3214 strd r3, r2, [sp, #80] ; 0x50
|
|
800bbc8: 4650 mov r0, sl
|
|
800bbca: 4659 mov r1, fp
|
|
800bbcc: e9dd 2314 ldrd r2, r3, [sp, #80] ; 0x50
|
|
800bbd0: f7f4 fd1a bl 8000608 <__aeabi_dmul>
|
|
800bbd4: 4682 mov sl, r0
|
|
800bbd6: 468b mov fp, r1
|
|
800bbd8: 2900 cmp r1, #0
|
|
800bbda: f47f adbe bne.w 800b75a <_strtod_l+0x452>
|
|
800bbde: 2800 cmp r0, #0
|
|
800bbe0: f47f adbb bne.w 800b75a <_strtod_l+0x452>
|
|
800bbe4: 2322 movs r3, #34 ; 0x22
|
|
800bbe6: f8c9 3000 str.w r3, [r9]
|
|
800bbea: e5b6 b.n 800b75a <_strtod_l+0x452>
|
|
800bbec: 4013 ands r3, r2
|
|
800bbee: f5a3 1380 sub.w r3, r3, #1048576 ; 0x100000
|
|
800bbf2: ea6f 5b13 mvn.w fp, r3, lsr #20
|
|
800bbf6: ea6f 5b0b mvn.w fp, fp, lsl #20
|
|
800bbfa: f04f 3aff mov.w sl, #4294967295
|
|
800bbfe: e76a b.n 800bad6 <_strtod_l+0x7ce>
|
|
800bc00: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800bc02: b193 cbz r3, 800bc2a <_strtod_l+0x922>
|
|
800bc04: 422b tst r3, r5
|
|
800bc06: f43f af66 beq.w 800bad6 <_strtod_l+0x7ce>
|
|
800bc0a: 9b0c ldr r3, [sp, #48] ; 0x30
|
|
800bc0c: 9a04 ldr r2, [sp, #16]
|
|
800bc0e: 4650 mov r0, sl
|
|
800bc10: 4659 mov r1, fp
|
|
800bc12: b173 cbz r3, 800bc32 <_strtod_l+0x92a>
|
|
800bc14: f7ff fb5c bl 800b2d0 <sulp>
|
|
800bc18: 4602 mov r2, r0
|
|
800bc1a: 460b mov r3, r1
|
|
800bc1c: e9dd 0108 ldrd r0, r1, [sp, #32]
|
|
800bc20: f7f4 fb3c bl 800029c <__adddf3>
|
|
800bc24: 4682 mov sl, r0
|
|
800bc26: 468b mov fp, r1
|
|
800bc28: e755 b.n 800bad6 <_strtod_l+0x7ce>
|
|
800bc2a: 9b0f ldr r3, [sp, #60] ; 0x3c
|
|
800bc2c: ea13 0f0a tst.w r3, sl
|
|
800bc30: e7e9 b.n 800bc06 <_strtod_l+0x8fe>
|
|
800bc32: f7ff fb4d bl 800b2d0 <sulp>
|
|
800bc36: 4602 mov r2, r0
|
|
800bc38: 460b mov r3, r1
|
|
800bc3a: e9dd 0108 ldrd r0, r1, [sp, #32]
|
|
800bc3e: f7f4 fb2b bl 8000298 <__aeabi_dsub>
|
|
800bc42: 2200 movs r2, #0
|
|
800bc44: 2300 movs r3, #0
|
|
800bc46: 4682 mov sl, r0
|
|
800bc48: 468b mov fp, r1
|
|
800bc4a: f7f4 ff45 bl 8000ad8 <__aeabi_dcmpeq>
|
|
800bc4e: 2800 cmp r0, #0
|
|
800bc50: f47f ae11 bne.w 800b876 <_strtod_l+0x56e>
|
|
800bc54: e73f b.n 800bad6 <_strtod_l+0x7ce>
|
|
800bc56: 4641 mov r1, r8
|
|
800bc58: 4620 mov r0, r4
|
|
800bc5a: f002 f9b4 bl 800dfc6 <__ratio>
|
|
800bc5e: ec57 6b10 vmov r6, r7, d0
|
|
800bc62: 2200 movs r2, #0
|
|
800bc64: f04f 4380 mov.w r3, #1073741824 ; 0x40000000
|
|
800bc68: ee10 0a10 vmov r0, s0
|
|
800bc6c: 4639 mov r1, r7
|
|
800bc6e: f7f4 ff47 bl 8000b00 <__aeabi_dcmple>
|
|
800bc72: 2800 cmp r0, #0
|
|
800bc74: d077 beq.n 800bd66 <_strtod_l+0xa5e>
|
|
800bc76: 9b0c ldr r3, [sp, #48] ; 0x30
|
|
800bc78: 2b00 cmp r3, #0
|
|
800bc7a: d04a beq.n 800bd12 <_strtod_l+0xa0a>
|
|
800bc7c: 4b68 ldr r3, [pc, #416] ; (800be20 <_strtod_l+0xb18>)
|
|
800bc7e: 2200 movs r2, #0
|
|
800bc80: e9cd 230a strd r2, r3, [sp, #40] ; 0x28
|
|
800bc84: 4f66 ldr r7, [pc, #408] ; (800be20 <_strtod_l+0xb18>)
|
|
800bc86: 2600 movs r6, #0
|
|
800bc88: 4b62 ldr r3, [pc, #392] ; (800be14 <_strtod_l+0xb0c>)
|
|
800bc8a: 402b ands r3, r5
|
|
800bc8c: 930f str r3, [sp, #60] ; 0x3c
|
|
800bc8e: 9a0f ldr r2, [sp, #60] ; 0x3c
|
|
800bc90: 4b64 ldr r3, [pc, #400] ; (800be24 <_strtod_l+0xb1c>)
|
|
800bc92: 429a cmp r2, r3
|
|
800bc94: f040 80ce bne.w 800be34 <_strtod_l+0xb2c>
|
|
800bc98: e9dd 2308 ldrd r2, r3, [sp, #32]
|
|
800bc9c: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28
|
|
800bca0: f1a5 7b54 sub.w fp, r5, #55574528 ; 0x3500000
|
|
800bca4: ec4b ab10 vmov d0, sl, fp
|
|
800bca8: e9cd 2314 strd r2, r3, [sp, #80] ; 0x50
|
|
800bcac: e9cd 010a strd r0, r1, [sp, #40] ; 0x28
|
|
800bcb0: f002 f8c4 bl 800de3c <__ulp>
|
|
800bcb4: e9dd 010a ldrd r0, r1, [sp, #40] ; 0x28
|
|
800bcb8: ec53 2b10 vmov r2, r3, d0
|
|
800bcbc: f7f4 fca4 bl 8000608 <__aeabi_dmul>
|
|
800bcc0: 4652 mov r2, sl
|
|
800bcc2: 465b mov r3, fp
|
|
800bcc4: f7f4 faea bl 800029c <__adddf3>
|
|
800bcc8: 460b mov r3, r1
|
|
800bcca: 4952 ldr r1, [pc, #328] ; (800be14 <_strtod_l+0xb0c>)
|
|
800bccc: 4a56 ldr r2, [pc, #344] ; (800be28 <_strtod_l+0xb20>)
|
|
800bcce: 4019 ands r1, r3
|
|
800bcd0: 4291 cmp r1, r2
|
|
800bcd2: 4682 mov sl, r0
|
|
800bcd4: d95b bls.n 800bd8e <_strtod_l+0xa86>
|
|
800bcd6: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800bcd8: f102 7254 add.w r2, r2, #55574528 ; 0x3500000
|
|
800bcdc: 4293 cmp r3, r2
|
|
800bcde: d103 bne.n 800bce8 <_strtod_l+0x9e0>
|
|
800bce0: 9b08 ldr r3, [sp, #32]
|
|
800bce2: 3301 adds r3, #1
|
|
800bce4: f43f ad2e beq.w 800b744 <_strtod_l+0x43c>
|
|
800bce8: f8df b12c ldr.w fp, [pc, #300] ; 800be18 <_strtod_l+0xb10>
|
|
800bcec: f04f 3aff mov.w sl, #4294967295
|
|
800bcf0: 991c ldr r1, [sp, #112] ; 0x70
|
|
800bcf2: 4648 mov r0, r9
|
|
800bcf4: f001 fe0b bl 800d90e <_Bfree>
|
|
800bcf8: 9905 ldr r1, [sp, #20]
|
|
800bcfa: 4648 mov r0, r9
|
|
800bcfc: f001 fe07 bl 800d90e <_Bfree>
|
|
800bd00: 4641 mov r1, r8
|
|
800bd02: 4648 mov r0, r9
|
|
800bd04: f001 fe03 bl 800d90e <_Bfree>
|
|
800bd08: 4621 mov r1, r4
|
|
800bd0a: 4648 mov r0, r9
|
|
800bd0c: f001 fdff bl 800d90e <_Bfree>
|
|
800bd10: e619 b.n 800b946 <_strtod_l+0x63e>
|
|
800bd12: f1ba 0f00 cmp.w sl, #0
|
|
800bd16: d11a bne.n 800bd4e <_strtod_l+0xa46>
|
|
800bd18: f3cb 0313 ubfx r3, fp, #0, #20
|
|
800bd1c: b9eb cbnz r3, 800bd5a <_strtod_l+0xa52>
|
|
800bd1e: 2200 movs r2, #0
|
|
800bd20: 4b3f ldr r3, [pc, #252] ; (800be20 <_strtod_l+0xb18>)
|
|
800bd22: 4630 mov r0, r6
|
|
800bd24: 4639 mov r1, r7
|
|
800bd26: f7f4 fee1 bl 8000aec <__aeabi_dcmplt>
|
|
800bd2a: b9c8 cbnz r0, 800bd60 <_strtod_l+0xa58>
|
|
800bd2c: 4630 mov r0, r6
|
|
800bd2e: 4639 mov r1, r7
|
|
800bd30: 2200 movs r2, #0
|
|
800bd32: 4b3e ldr r3, [pc, #248] ; (800be2c <_strtod_l+0xb24>)
|
|
800bd34: f7f4 fc68 bl 8000608 <__aeabi_dmul>
|
|
800bd38: 4606 mov r6, r0
|
|
800bd3a: 460f mov r7, r1
|
|
800bd3c: f107 4300 add.w r3, r7, #2147483648 ; 0x80000000
|
|
800bd40: 9618 str r6, [sp, #96] ; 0x60
|
|
800bd42: 9319 str r3, [sp, #100] ; 0x64
|
|
800bd44: e9dd 2318 ldrd r2, r3, [sp, #96] ; 0x60
|
|
800bd48: e9cd 230a strd r2, r3, [sp, #40] ; 0x28
|
|
800bd4c: e79c b.n 800bc88 <_strtod_l+0x980>
|
|
800bd4e: f1ba 0f01 cmp.w sl, #1
|
|
800bd52: d102 bne.n 800bd5a <_strtod_l+0xa52>
|
|
800bd54: 2d00 cmp r5, #0
|
|
800bd56: f43f ad8e beq.w 800b876 <_strtod_l+0x56e>
|
|
800bd5a: 2200 movs r2, #0
|
|
800bd5c: 4b34 ldr r3, [pc, #208] ; (800be30 <_strtod_l+0xb28>)
|
|
800bd5e: e78f b.n 800bc80 <_strtod_l+0x978>
|
|
800bd60: 2600 movs r6, #0
|
|
800bd62: 4f32 ldr r7, [pc, #200] ; (800be2c <_strtod_l+0xb24>)
|
|
800bd64: e7ea b.n 800bd3c <_strtod_l+0xa34>
|
|
800bd66: 4b31 ldr r3, [pc, #196] ; (800be2c <_strtod_l+0xb24>)
|
|
800bd68: 4630 mov r0, r6
|
|
800bd6a: 4639 mov r1, r7
|
|
800bd6c: 2200 movs r2, #0
|
|
800bd6e: f7f4 fc4b bl 8000608 <__aeabi_dmul>
|
|
800bd72: 9b0c ldr r3, [sp, #48] ; 0x30
|
|
800bd74: 4606 mov r6, r0
|
|
800bd76: 460f mov r7, r1
|
|
800bd78: b933 cbnz r3, 800bd88 <_strtod_l+0xa80>
|
|
800bd7a: f101 4300 add.w r3, r1, #2147483648 ; 0x80000000
|
|
800bd7e: 9010 str r0, [sp, #64] ; 0x40
|
|
800bd80: 9311 str r3, [sp, #68] ; 0x44
|
|
800bd82: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
|
800bd86: e7df b.n 800bd48 <_strtod_l+0xa40>
|
|
800bd88: e9cd 6710 strd r6, r7, [sp, #64] ; 0x40
|
|
800bd8c: e7f9 b.n 800bd82 <_strtod_l+0xa7a>
|
|
800bd8e: f103 7b54 add.w fp, r3, #55574528 ; 0x3500000
|
|
800bd92: 9b04 ldr r3, [sp, #16]
|
|
800bd94: 2b00 cmp r3, #0
|
|
800bd96: d1ab bne.n 800bcf0 <_strtod_l+0x9e8>
|
|
800bd98: f02b 4300 bic.w r3, fp, #2147483648 ; 0x80000000
|
|
800bd9c: 0d1b lsrs r3, r3, #20
|
|
800bd9e: 9a0f ldr r2, [sp, #60] ; 0x3c
|
|
800bda0: 051b lsls r3, r3, #20
|
|
800bda2: 429a cmp r2, r3
|
|
800bda4: 465d mov r5, fp
|
|
800bda6: d1a3 bne.n 800bcf0 <_strtod_l+0x9e8>
|
|
800bda8: 4639 mov r1, r7
|
|
800bdaa: 4630 mov r0, r6
|
|
800bdac: f7f4 fedc bl 8000b68 <__aeabi_d2iz>
|
|
800bdb0: f7f4 fbc0 bl 8000534 <__aeabi_i2d>
|
|
800bdb4: 460b mov r3, r1
|
|
800bdb6: 4602 mov r2, r0
|
|
800bdb8: 4639 mov r1, r7
|
|
800bdba: 4630 mov r0, r6
|
|
800bdbc: f7f4 fa6c bl 8000298 <__aeabi_dsub>
|
|
800bdc0: 9b0c ldr r3, [sp, #48] ; 0x30
|
|
800bdc2: 4606 mov r6, r0
|
|
800bdc4: 460f mov r7, r1
|
|
800bdc6: b933 cbnz r3, 800bdd6 <_strtod_l+0xace>
|
|
800bdc8: f1ba 0f00 cmp.w sl, #0
|
|
800bdcc: d103 bne.n 800bdd6 <_strtod_l+0xace>
|
|
800bdce: f3cb 0513 ubfx r5, fp, #0, #20
|
|
800bdd2: 2d00 cmp r5, #0
|
|
800bdd4: d06d beq.n 800beb2 <_strtod_l+0xbaa>
|
|
800bdd6: a30a add r3, pc, #40 ; (adr r3, 800be00 <_strtod_l+0xaf8>)
|
|
800bdd8: e9d3 2300 ldrd r2, r3, [r3]
|
|
800bddc: 4630 mov r0, r6
|
|
800bdde: 4639 mov r1, r7
|
|
800bde0: f7f4 fe84 bl 8000aec <__aeabi_dcmplt>
|
|
800bde4: 2800 cmp r0, #0
|
|
800bde6: f47f acb8 bne.w 800b75a <_strtod_l+0x452>
|
|
800bdea: a307 add r3, pc, #28 ; (adr r3, 800be08 <_strtod_l+0xb00>)
|
|
800bdec: e9d3 2300 ldrd r2, r3, [r3]
|
|
800bdf0: 4630 mov r0, r6
|
|
800bdf2: 4639 mov r1, r7
|
|
800bdf4: f7f4 fe98 bl 8000b28 <__aeabi_dcmpgt>
|
|
800bdf8: 2800 cmp r0, #0
|
|
800bdfa: f43f af79 beq.w 800bcf0 <_strtod_l+0x9e8>
|
|
800bdfe: e4ac b.n 800b75a <_strtod_l+0x452>
|
|
800be00: 94a03595 .word 0x94a03595
|
|
800be04: 3fdfffff .word 0x3fdfffff
|
|
800be08: 35afe535 .word 0x35afe535
|
|
800be0c: 3fe00000 .word 0x3fe00000
|
|
800be10: 000fffff .word 0x000fffff
|
|
800be14: 7ff00000 .word 0x7ff00000
|
|
800be18: 7fefffff .word 0x7fefffff
|
|
800be1c: 39500000 .word 0x39500000
|
|
800be20: 3ff00000 .word 0x3ff00000
|
|
800be24: 7fe00000 .word 0x7fe00000
|
|
800be28: 7c9fffff .word 0x7c9fffff
|
|
800be2c: 3fe00000 .word 0x3fe00000
|
|
800be30: bff00000 .word 0xbff00000
|
|
800be34: 9b04 ldr r3, [sp, #16]
|
|
800be36: b333 cbz r3, 800be86 <_strtod_l+0xb7e>
|
|
800be38: 9b0f ldr r3, [sp, #60] ; 0x3c
|
|
800be3a: f1b3 6fd4 cmp.w r3, #111149056 ; 0x6a00000
|
|
800be3e: d822 bhi.n 800be86 <_strtod_l+0xb7e>
|
|
800be40: a327 add r3, pc, #156 ; (adr r3, 800bee0 <_strtod_l+0xbd8>)
|
|
800be42: e9d3 2300 ldrd r2, r3, [r3]
|
|
800be46: 4630 mov r0, r6
|
|
800be48: 4639 mov r1, r7
|
|
800be4a: f7f4 fe59 bl 8000b00 <__aeabi_dcmple>
|
|
800be4e: b1a0 cbz r0, 800be7a <_strtod_l+0xb72>
|
|
800be50: 4639 mov r1, r7
|
|
800be52: 4630 mov r0, r6
|
|
800be54: f7f4 feb0 bl 8000bb8 <__aeabi_d2uiz>
|
|
800be58: 2800 cmp r0, #0
|
|
800be5a: bf08 it eq
|
|
800be5c: 2001 moveq r0, #1
|
|
800be5e: f7f4 fb59 bl 8000514 <__aeabi_ui2d>
|
|
800be62: 9b0c ldr r3, [sp, #48] ; 0x30
|
|
800be64: 4606 mov r6, r0
|
|
800be66: 460f mov r7, r1
|
|
800be68: bb03 cbnz r3, 800beac <_strtod_l+0xba4>
|
|
800be6a: f101 4300 add.w r3, r1, #2147483648 ; 0x80000000
|
|
800be6e: 9012 str r0, [sp, #72] ; 0x48
|
|
800be70: 9313 str r3, [sp, #76] ; 0x4c
|
|
800be72: e9dd 2312 ldrd r2, r3, [sp, #72] ; 0x48
|
|
800be76: e9cd 230a strd r2, r3, [sp, #40] ; 0x28
|
|
800be7a: 9b0b ldr r3, [sp, #44] ; 0x2c
|
|
800be7c: 9a0f ldr r2, [sp, #60] ; 0x3c
|
|
800be7e: f103 63d6 add.w r3, r3, #112197632 ; 0x6b00000
|
|
800be82: 1a9b subs r3, r3, r2
|
|
800be84: 930b str r3, [sp, #44] ; 0x2c
|
|
800be86: ed9d 0b08 vldr d0, [sp, #32]
|
|
800be8a: e9dd ab0a ldrd sl, fp, [sp, #40] ; 0x28
|
|
800be8e: f001 ffd5 bl 800de3c <__ulp>
|
|
800be92: 4650 mov r0, sl
|
|
800be94: ec53 2b10 vmov r2, r3, d0
|
|
800be98: 4659 mov r1, fp
|
|
800be9a: f7f4 fbb5 bl 8000608 <__aeabi_dmul>
|
|
800be9e: e9dd 2308 ldrd r2, r3, [sp, #32]
|
|
800bea2: f7f4 f9fb bl 800029c <__adddf3>
|
|
800bea6: 4682 mov sl, r0
|
|
800bea8: 468b mov fp, r1
|
|
800beaa: e772 b.n 800bd92 <_strtod_l+0xa8a>
|
|
800beac: e9cd 6712 strd r6, r7, [sp, #72] ; 0x48
|
|
800beb0: e7df b.n 800be72 <_strtod_l+0xb6a>
|
|
800beb2: a30d add r3, pc, #52 ; (adr r3, 800bee8 <_strtod_l+0xbe0>)
|
|
800beb4: e9d3 2300 ldrd r2, r3, [r3]
|
|
800beb8: f7f4 fe18 bl 8000aec <__aeabi_dcmplt>
|
|
800bebc: e79c b.n 800bdf8 <_strtod_l+0xaf0>
|
|
800bebe: 2300 movs r3, #0
|
|
800bec0: 930d str r3, [sp, #52] ; 0x34
|
|
800bec2: 9a17 ldr r2, [sp, #92] ; 0x5c
|
|
800bec4: 9b1b ldr r3, [sp, #108] ; 0x6c
|
|
800bec6: 6013 str r3, [r2, #0]
|
|
800bec8: f7ff ba61 b.w 800b38e <_strtod_l+0x86>
|
|
800becc: 2b65 cmp r3, #101 ; 0x65
|
|
800bece: f04f 0200 mov.w r2, #0
|
|
800bed2: f43f ab4e beq.w 800b572 <_strtod_l+0x26a>
|
|
800bed6: 2101 movs r1, #1
|
|
800bed8: 4614 mov r4, r2
|
|
800beda: 9104 str r1, [sp, #16]
|
|
800bedc: f7ff bacb b.w 800b476 <_strtod_l+0x16e>
|
|
800bee0: ffc00000 .word 0xffc00000
|
|
800bee4: 41dfffff .word 0x41dfffff
|
|
800bee8: 94a03595 .word 0x94a03595
|
|
800beec: 3fcfffff .word 0x3fcfffff
|
|
|
|
0800bef0 <_strtod_r>:
|
|
800bef0: 4b05 ldr r3, [pc, #20] ; (800bf08 <_strtod_r+0x18>)
|
|
800bef2: 681b ldr r3, [r3, #0]
|
|
800bef4: b410 push {r4}
|
|
800bef6: 6a1b ldr r3, [r3, #32]
|
|
800bef8: 4c04 ldr r4, [pc, #16] ; (800bf0c <_strtod_r+0x1c>)
|
|
800befa: 2b00 cmp r3, #0
|
|
800befc: bf08 it eq
|
|
800befe: 4623 moveq r3, r4
|
|
800bf00: f85d 4b04 ldr.w r4, [sp], #4
|
|
800bf04: f7ff ba00 b.w 800b308 <_strtod_l>
|
|
800bf08: 2000002c .word 0x2000002c
|
|
800bf0c: 20000090 .word 0x20000090
|
|
|
|
0800bf10 <_strtol_l.isra.0>:
|
|
800bf10: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800bf14: 4680 mov r8, r0
|
|
800bf16: 4689 mov r9, r1
|
|
800bf18: 4692 mov sl, r2
|
|
800bf1a: 461e mov r6, r3
|
|
800bf1c: 460f mov r7, r1
|
|
800bf1e: 463d mov r5, r7
|
|
800bf20: 9808 ldr r0, [sp, #32]
|
|
800bf22: f815 4b01 ldrb.w r4, [r5], #1
|
|
800bf26: f001 fc27 bl 800d778 <__locale_ctype_ptr_l>
|
|
800bf2a: 4420 add r0, r4
|
|
800bf2c: 7843 ldrb r3, [r0, #1]
|
|
800bf2e: f013 0308 ands.w r3, r3, #8
|
|
800bf32: d132 bne.n 800bf9a <_strtol_l.isra.0+0x8a>
|
|
800bf34: 2c2d cmp r4, #45 ; 0x2d
|
|
800bf36: d132 bne.n 800bf9e <_strtol_l.isra.0+0x8e>
|
|
800bf38: 787c ldrb r4, [r7, #1]
|
|
800bf3a: 1cbd adds r5, r7, #2
|
|
800bf3c: 2201 movs r2, #1
|
|
800bf3e: 2e00 cmp r6, #0
|
|
800bf40: d05d beq.n 800bffe <_strtol_l.isra.0+0xee>
|
|
800bf42: 2e10 cmp r6, #16
|
|
800bf44: d109 bne.n 800bf5a <_strtol_l.isra.0+0x4a>
|
|
800bf46: 2c30 cmp r4, #48 ; 0x30
|
|
800bf48: d107 bne.n 800bf5a <_strtol_l.isra.0+0x4a>
|
|
800bf4a: 782b ldrb r3, [r5, #0]
|
|
800bf4c: f003 03df and.w r3, r3, #223 ; 0xdf
|
|
800bf50: 2b58 cmp r3, #88 ; 0x58
|
|
800bf52: d14f bne.n 800bff4 <_strtol_l.isra.0+0xe4>
|
|
800bf54: 786c ldrb r4, [r5, #1]
|
|
800bf56: 2610 movs r6, #16
|
|
800bf58: 3502 adds r5, #2
|
|
800bf5a: 2a00 cmp r2, #0
|
|
800bf5c: bf14 ite ne
|
|
800bf5e: f04f 4100 movne.w r1, #2147483648 ; 0x80000000
|
|
800bf62: f06f 4100 mvneq.w r1, #2147483648 ; 0x80000000
|
|
800bf66: 2700 movs r7, #0
|
|
800bf68: fbb1 fcf6 udiv ip, r1, r6
|
|
800bf6c: 4638 mov r0, r7
|
|
800bf6e: fb06 1e1c mls lr, r6, ip, r1
|
|
800bf72: f1a4 0330 sub.w r3, r4, #48 ; 0x30
|
|
800bf76: 2b09 cmp r3, #9
|
|
800bf78: d817 bhi.n 800bfaa <_strtol_l.isra.0+0x9a>
|
|
800bf7a: 461c mov r4, r3
|
|
800bf7c: 42a6 cmp r6, r4
|
|
800bf7e: dd23 ble.n 800bfc8 <_strtol_l.isra.0+0xb8>
|
|
800bf80: 1c7b adds r3, r7, #1
|
|
800bf82: d007 beq.n 800bf94 <_strtol_l.isra.0+0x84>
|
|
800bf84: 4584 cmp ip, r0
|
|
800bf86: d31c bcc.n 800bfc2 <_strtol_l.isra.0+0xb2>
|
|
800bf88: d101 bne.n 800bf8e <_strtol_l.isra.0+0x7e>
|
|
800bf8a: 45a6 cmp lr, r4
|
|
800bf8c: db19 blt.n 800bfc2 <_strtol_l.isra.0+0xb2>
|
|
800bf8e: fb00 4006 mla r0, r0, r6, r4
|
|
800bf92: 2701 movs r7, #1
|
|
800bf94: f815 4b01 ldrb.w r4, [r5], #1
|
|
800bf98: e7eb b.n 800bf72 <_strtol_l.isra.0+0x62>
|
|
800bf9a: 462f mov r7, r5
|
|
800bf9c: e7bf b.n 800bf1e <_strtol_l.isra.0+0xe>
|
|
800bf9e: 2c2b cmp r4, #43 ; 0x2b
|
|
800bfa0: bf04 itt eq
|
|
800bfa2: 1cbd addeq r5, r7, #2
|
|
800bfa4: 787c ldrbeq r4, [r7, #1]
|
|
800bfa6: 461a mov r2, r3
|
|
800bfa8: e7c9 b.n 800bf3e <_strtol_l.isra.0+0x2e>
|
|
800bfaa: f1a4 0341 sub.w r3, r4, #65 ; 0x41
|
|
800bfae: 2b19 cmp r3, #25
|
|
800bfb0: d801 bhi.n 800bfb6 <_strtol_l.isra.0+0xa6>
|
|
800bfb2: 3c37 subs r4, #55 ; 0x37
|
|
800bfb4: e7e2 b.n 800bf7c <_strtol_l.isra.0+0x6c>
|
|
800bfb6: f1a4 0361 sub.w r3, r4, #97 ; 0x61
|
|
800bfba: 2b19 cmp r3, #25
|
|
800bfbc: d804 bhi.n 800bfc8 <_strtol_l.isra.0+0xb8>
|
|
800bfbe: 3c57 subs r4, #87 ; 0x57
|
|
800bfc0: e7dc b.n 800bf7c <_strtol_l.isra.0+0x6c>
|
|
800bfc2: f04f 37ff mov.w r7, #4294967295
|
|
800bfc6: e7e5 b.n 800bf94 <_strtol_l.isra.0+0x84>
|
|
800bfc8: 1c7b adds r3, r7, #1
|
|
800bfca: d108 bne.n 800bfde <_strtol_l.isra.0+0xce>
|
|
800bfcc: 2322 movs r3, #34 ; 0x22
|
|
800bfce: f8c8 3000 str.w r3, [r8]
|
|
800bfd2: 4608 mov r0, r1
|
|
800bfd4: f1ba 0f00 cmp.w sl, #0
|
|
800bfd8: d107 bne.n 800bfea <_strtol_l.isra.0+0xda>
|
|
800bfda: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
800bfde: b102 cbz r2, 800bfe2 <_strtol_l.isra.0+0xd2>
|
|
800bfe0: 4240 negs r0, r0
|
|
800bfe2: f1ba 0f00 cmp.w sl, #0
|
|
800bfe6: d0f8 beq.n 800bfda <_strtol_l.isra.0+0xca>
|
|
800bfe8: b10f cbz r7, 800bfee <_strtol_l.isra.0+0xde>
|
|
800bfea: f105 39ff add.w r9, r5, #4294967295
|
|
800bfee: f8ca 9000 str.w r9, [sl]
|
|
800bff2: e7f2 b.n 800bfda <_strtol_l.isra.0+0xca>
|
|
800bff4: 2430 movs r4, #48 ; 0x30
|
|
800bff6: 2e00 cmp r6, #0
|
|
800bff8: d1af bne.n 800bf5a <_strtol_l.isra.0+0x4a>
|
|
800bffa: 2608 movs r6, #8
|
|
800bffc: e7ad b.n 800bf5a <_strtol_l.isra.0+0x4a>
|
|
800bffe: 2c30 cmp r4, #48 ; 0x30
|
|
800c000: d0a3 beq.n 800bf4a <_strtol_l.isra.0+0x3a>
|
|
800c002: 260a movs r6, #10
|
|
800c004: e7a9 b.n 800bf5a <_strtol_l.isra.0+0x4a>
|
|
...
|
|
|
|
0800c008 <_strtol_r>:
|
|
800c008: b537 push {r0, r1, r2, r4, r5, lr}
|
|
800c00a: 4c06 ldr r4, [pc, #24] ; (800c024 <_strtol_r+0x1c>)
|
|
800c00c: 4d06 ldr r5, [pc, #24] ; (800c028 <_strtol_r+0x20>)
|
|
800c00e: 6824 ldr r4, [r4, #0]
|
|
800c010: 6a24 ldr r4, [r4, #32]
|
|
800c012: 2c00 cmp r4, #0
|
|
800c014: bf08 it eq
|
|
800c016: 462c moveq r4, r5
|
|
800c018: 9400 str r4, [sp, #0]
|
|
800c01a: f7ff ff79 bl 800bf10 <_strtol_l.isra.0>
|
|
800c01e: b003 add sp, #12
|
|
800c020: bd30 pop {r4, r5, pc}
|
|
800c022: bf00 nop
|
|
800c024: 2000002c .word 0x2000002c
|
|
800c028: 20000090 .word 0x20000090
|
|
|
|
0800c02c <__swbuf_r>:
|
|
800c02c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800c02e: 460e mov r6, r1
|
|
800c030: 4614 mov r4, r2
|
|
800c032: 4605 mov r5, r0
|
|
800c034: b118 cbz r0, 800c03e <__swbuf_r+0x12>
|
|
800c036: 6983 ldr r3, [r0, #24]
|
|
800c038: b90b cbnz r3, 800c03e <__swbuf_r+0x12>
|
|
800c03a: f000 ffed bl 800d018 <__sinit>
|
|
800c03e: 4b21 ldr r3, [pc, #132] ; (800c0c4 <__swbuf_r+0x98>)
|
|
800c040: 429c cmp r4, r3
|
|
800c042: d12a bne.n 800c09a <__swbuf_r+0x6e>
|
|
800c044: 686c ldr r4, [r5, #4]
|
|
800c046: 69a3 ldr r3, [r4, #24]
|
|
800c048: 60a3 str r3, [r4, #8]
|
|
800c04a: 89a3 ldrh r3, [r4, #12]
|
|
800c04c: 071a lsls r2, r3, #28
|
|
800c04e: d52e bpl.n 800c0ae <__swbuf_r+0x82>
|
|
800c050: 6923 ldr r3, [r4, #16]
|
|
800c052: b363 cbz r3, 800c0ae <__swbuf_r+0x82>
|
|
800c054: 6923 ldr r3, [r4, #16]
|
|
800c056: 6820 ldr r0, [r4, #0]
|
|
800c058: 1ac0 subs r0, r0, r3
|
|
800c05a: 6963 ldr r3, [r4, #20]
|
|
800c05c: b2f6 uxtb r6, r6
|
|
800c05e: 4283 cmp r3, r0
|
|
800c060: 4637 mov r7, r6
|
|
800c062: dc04 bgt.n 800c06e <__swbuf_r+0x42>
|
|
800c064: 4621 mov r1, r4
|
|
800c066: 4628 mov r0, r5
|
|
800c068: f000 ff6c bl 800cf44 <_fflush_r>
|
|
800c06c: bb28 cbnz r0, 800c0ba <__swbuf_r+0x8e>
|
|
800c06e: 68a3 ldr r3, [r4, #8]
|
|
800c070: 3b01 subs r3, #1
|
|
800c072: 60a3 str r3, [r4, #8]
|
|
800c074: 6823 ldr r3, [r4, #0]
|
|
800c076: 1c5a adds r2, r3, #1
|
|
800c078: 6022 str r2, [r4, #0]
|
|
800c07a: 701e strb r6, [r3, #0]
|
|
800c07c: 6963 ldr r3, [r4, #20]
|
|
800c07e: 3001 adds r0, #1
|
|
800c080: 4283 cmp r3, r0
|
|
800c082: d004 beq.n 800c08e <__swbuf_r+0x62>
|
|
800c084: 89a3 ldrh r3, [r4, #12]
|
|
800c086: 07db lsls r3, r3, #31
|
|
800c088: d519 bpl.n 800c0be <__swbuf_r+0x92>
|
|
800c08a: 2e0a cmp r6, #10
|
|
800c08c: d117 bne.n 800c0be <__swbuf_r+0x92>
|
|
800c08e: 4621 mov r1, r4
|
|
800c090: 4628 mov r0, r5
|
|
800c092: f000 ff57 bl 800cf44 <_fflush_r>
|
|
800c096: b190 cbz r0, 800c0be <__swbuf_r+0x92>
|
|
800c098: e00f b.n 800c0ba <__swbuf_r+0x8e>
|
|
800c09a: 4b0b ldr r3, [pc, #44] ; (800c0c8 <__swbuf_r+0x9c>)
|
|
800c09c: 429c cmp r4, r3
|
|
800c09e: d101 bne.n 800c0a4 <__swbuf_r+0x78>
|
|
800c0a0: 68ac ldr r4, [r5, #8]
|
|
800c0a2: e7d0 b.n 800c046 <__swbuf_r+0x1a>
|
|
800c0a4: 4b09 ldr r3, [pc, #36] ; (800c0cc <__swbuf_r+0xa0>)
|
|
800c0a6: 429c cmp r4, r3
|
|
800c0a8: bf08 it eq
|
|
800c0aa: 68ec ldreq r4, [r5, #12]
|
|
800c0ac: e7cb b.n 800c046 <__swbuf_r+0x1a>
|
|
800c0ae: 4621 mov r1, r4
|
|
800c0b0: 4628 mov r0, r5
|
|
800c0b2: f000 f80d bl 800c0d0 <__swsetup_r>
|
|
800c0b6: 2800 cmp r0, #0
|
|
800c0b8: d0cc beq.n 800c054 <__swbuf_r+0x28>
|
|
800c0ba: f04f 37ff mov.w r7, #4294967295
|
|
800c0be: 4638 mov r0, r7
|
|
800c0c0: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
800c0c2: bf00 nop
|
|
800c0c4: 0800e9f8 .word 0x0800e9f8
|
|
800c0c8: 0800ea18 .word 0x0800ea18
|
|
800c0cc: 0800e9d8 .word 0x0800e9d8
|
|
|
|
0800c0d0 <__swsetup_r>:
|
|
800c0d0: 4b32 ldr r3, [pc, #200] ; (800c19c <__swsetup_r+0xcc>)
|
|
800c0d2: b570 push {r4, r5, r6, lr}
|
|
800c0d4: 681d ldr r5, [r3, #0]
|
|
800c0d6: 4606 mov r6, r0
|
|
800c0d8: 460c mov r4, r1
|
|
800c0da: b125 cbz r5, 800c0e6 <__swsetup_r+0x16>
|
|
800c0dc: 69ab ldr r3, [r5, #24]
|
|
800c0de: b913 cbnz r3, 800c0e6 <__swsetup_r+0x16>
|
|
800c0e0: 4628 mov r0, r5
|
|
800c0e2: f000 ff99 bl 800d018 <__sinit>
|
|
800c0e6: 4b2e ldr r3, [pc, #184] ; (800c1a0 <__swsetup_r+0xd0>)
|
|
800c0e8: 429c cmp r4, r3
|
|
800c0ea: d10f bne.n 800c10c <__swsetup_r+0x3c>
|
|
800c0ec: 686c ldr r4, [r5, #4]
|
|
800c0ee: f9b4 300c ldrsh.w r3, [r4, #12]
|
|
800c0f2: b29a uxth r2, r3
|
|
800c0f4: 0715 lsls r5, r2, #28
|
|
800c0f6: d42c bmi.n 800c152 <__swsetup_r+0x82>
|
|
800c0f8: 06d0 lsls r0, r2, #27
|
|
800c0fa: d411 bmi.n 800c120 <__swsetup_r+0x50>
|
|
800c0fc: 2209 movs r2, #9
|
|
800c0fe: 6032 str r2, [r6, #0]
|
|
800c100: f043 0340 orr.w r3, r3, #64 ; 0x40
|
|
800c104: 81a3 strh r3, [r4, #12]
|
|
800c106: f04f 30ff mov.w r0, #4294967295
|
|
800c10a: e03e b.n 800c18a <__swsetup_r+0xba>
|
|
800c10c: 4b25 ldr r3, [pc, #148] ; (800c1a4 <__swsetup_r+0xd4>)
|
|
800c10e: 429c cmp r4, r3
|
|
800c110: d101 bne.n 800c116 <__swsetup_r+0x46>
|
|
800c112: 68ac ldr r4, [r5, #8]
|
|
800c114: e7eb b.n 800c0ee <__swsetup_r+0x1e>
|
|
800c116: 4b24 ldr r3, [pc, #144] ; (800c1a8 <__swsetup_r+0xd8>)
|
|
800c118: 429c cmp r4, r3
|
|
800c11a: bf08 it eq
|
|
800c11c: 68ec ldreq r4, [r5, #12]
|
|
800c11e: e7e6 b.n 800c0ee <__swsetup_r+0x1e>
|
|
800c120: 0751 lsls r1, r2, #29
|
|
800c122: d512 bpl.n 800c14a <__swsetup_r+0x7a>
|
|
800c124: 6b61 ldr r1, [r4, #52] ; 0x34
|
|
800c126: b141 cbz r1, 800c13a <__swsetup_r+0x6a>
|
|
800c128: f104 0344 add.w r3, r4, #68 ; 0x44
|
|
800c12c: 4299 cmp r1, r3
|
|
800c12e: d002 beq.n 800c136 <__swsetup_r+0x66>
|
|
800c130: 4630 mov r0, r6
|
|
800c132: f7fe f935 bl 800a3a0 <_free_r>
|
|
800c136: 2300 movs r3, #0
|
|
800c138: 6363 str r3, [r4, #52] ; 0x34
|
|
800c13a: 89a3 ldrh r3, [r4, #12]
|
|
800c13c: f023 0324 bic.w r3, r3, #36 ; 0x24
|
|
800c140: 81a3 strh r3, [r4, #12]
|
|
800c142: 2300 movs r3, #0
|
|
800c144: 6063 str r3, [r4, #4]
|
|
800c146: 6923 ldr r3, [r4, #16]
|
|
800c148: 6023 str r3, [r4, #0]
|
|
800c14a: 89a3 ldrh r3, [r4, #12]
|
|
800c14c: f043 0308 orr.w r3, r3, #8
|
|
800c150: 81a3 strh r3, [r4, #12]
|
|
800c152: 6923 ldr r3, [r4, #16]
|
|
800c154: b94b cbnz r3, 800c16a <__swsetup_r+0x9a>
|
|
800c156: 89a3 ldrh r3, [r4, #12]
|
|
800c158: f403 7320 and.w r3, r3, #640 ; 0x280
|
|
800c15c: f5b3 7f00 cmp.w r3, #512 ; 0x200
|
|
800c160: d003 beq.n 800c16a <__swsetup_r+0x9a>
|
|
800c162: 4621 mov r1, r4
|
|
800c164: 4630 mov r0, r6
|
|
800c166: f001 fb3f bl 800d7e8 <__smakebuf_r>
|
|
800c16a: 89a2 ldrh r2, [r4, #12]
|
|
800c16c: f012 0301 ands.w r3, r2, #1
|
|
800c170: d00c beq.n 800c18c <__swsetup_r+0xbc>
|
|
800c172: 2300 movs r3, #0
|
|
800c174: 60a3 str r3, [r4, #8]
|
|
800c176: 6963 ldr r3, [r4, #20]
|
|
800c178: 425b negs r3, r3
|
|
800c17a: 61a3 str r3, [r4, #24]
|
|
800c17c: 6923 ldr r3, [r4, #16]
|
|
800c17e: b953 cbnz r3, 800c196 <__swsetup_r+0xc6>
|
|
800c180: f9b4 300c ldrsh.w r3, [r4, #12]
|
|
800c184: f013 0080 ands.w r0, r3, #128 ; 0x80
|
|
800c188: d1ba bne.n 800c100 <__swsetup_r+0x30>
|
|
800c18a: bd70 pop {r4, r5, r6, pc}
|
|
800c18c: 0792 lsls r2, r2, #30
|
|
800c18e: bf58 it pl
|
|
800c190: 6963 ldrpl r3, [r4, #20]
|
|
800c192: 60a3 str r3, [r4, #8]
|
|
800c194: e7f2 b.n 800c17c <__swsetup_r+0xac>
|
|
800c196: 2000 movs r0, #0
|
|
800c198: e7f7 b.n 800c18a <__swsetup_r+0xba>
|
|
800c19a: bf00 nop
|
|
800c19c: 2000002c .word 0x2000002c
|
|
800c1a0: 0800e9f8 .word 0x0800e9f8
|
|
800c1a4: 0800ea18 .word 0x0800ea18
|
|
800c1a8: 0800e9d8 .word 0x0800e9d8
|
|
|
|
0800c1ac <quorem>:
|
|
800c1ac: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800c1b0: 6903 ldr r3, [r0, #16]
|
|
800c1b2: 690c ldr r4, [r1, #16]
|
|
800c1b4: 42a3 cmp r3, r4
|
|
800c1b6: 4680 mov r8, r0
|
|
800c1b8: f2c0 8082 blt.w 800c2c0 <quorem+0x114>
|
|
800c1bc: 3c01 subs r4, #1
|
|
800c1be: f101 0714 add.w r7, r1, #20
|
|
800c1c2: ea4f 0c84 mov.w ip, r4, lsl #2
|
|
800c1c6: f100 0614 add.w r6, r0, #20
|
|
800c1ca: f857 5024 ldr.w r5, [r7, r4, lsl #2]
|
|
800c1ce: f856 0024 ldr.w r0, [r6, r4, lsl #2]
|
|
800c1d2: eb06 030c add.w r3, r6, ip
|
|
800c1d6: 3501 adds r5, #1
|
|
800c1d8: eb07 090c add.w r9, r7, ip
|
|
800c1dc: 9301 str r3, [sp, #4]
|
|
800c1de: fbb0 f5f5 udiv r5, r0, r5
|
|
800c1e2: b395 cbz r5, 800c24a <quorem+0x9e>
|
|
800c1e4: f04f 0a00 mov.w sl, #0
|
|
800c1e8: 4638 mov r0, r7
|
|
800c1ea: 46b6 mov lr, r6
|
|
800c1ec: 46d3 mov fp, sl
|
|
800c1ee: f850 2b04 ldr.w r2, [r0], #4
|
|
800c1f2: b293 uxth r3, r2
|
|
800c1f4: fb05 a303 mla r3, r5, r3, sl
|
|
800c1f8: ea4f 4a13 mov.w sl, r3, lsr #16
|
|
800c1fc: b29b uxth r3, r3
|
|
800c1fe: ebab 0303 sub.w r3, fp, r3
|
|
800c202: 0c12 lsrs r2, r2, #16
|
|
800c204: f8de b000 ldr.w fp, [lr]
|
|
800c208: fb05 a202 mla r2, r5, r2, sl
|
|
800c20c: fa13 f38b uxtah r3, r3, fp
|
|
800c210: ea4f 4a12 mov.w sl, r2, lsr #16
|
|
800c214: fa1f fb82 uxth.w fp, r2
|
|
800c218: f8de 2000 ldr.w r2, [lr]
|
|
800c21c: ebcb 4212 rsb r2, fp, r2, lsr #16
|
|
800c220: eb02 4223 add.w r2, r2, r3, asr #16
|
|
800c224: b29b uxth r3, r3
|
|
800c226: ea43 4302 orr.w r3, r3, r2, lsl #16
|
|
800c22a: 4581 cmp r9, r0
|
|
800c22c: ea4f 4b22 mov.w fp, r2, asr #16
|
|
800c230: f84e 3b04 str.w r3, [lr], #4
|
|
800c234: d2db bcs.n 800c1ee <quorem+0x42>
|
|
800c236: f856 300c ldr.w r3, [r6, ip]
|
|
800c23a: b933 cbnz r3, 800c24a <quorem+0x9e>
|
|
800c23c: 9b01 ldr r3, [sp, #4]
|
|
800c23e: 3b04 subs r3, #4
|
|
800c240: 429e cmp r6, r3
|
|
800c242: 461a mov r2, r3
|
|
800c244: d330 bcc.n 800c2a8 <quorem+0xfc>
|
|
800c246: f8c8 4010 str.w r4, [r8, #16]
|
|
800c24a: 4640 mov r0, r8
|
|
800c24c: f001 fd7e bl 800dd4c <__mcmp>
|
|
800c250: 2800 cmp r0, #0
|
|
800c252: db25 blt.n 800c2a0 <quorem+0xf4>
|
|
800c254: 3501 adds r5, #1
|
|
800c256: 4630 mov r0, r6
|
|
800c258: f04f 0c00 mov.w ip, #0
|
|
800c25c: f857 2b04 ldr.w r2, [r7], #4
|
|
800c260: f8d0 e000 ldr.w lr, [r0]
|
|
800c264: b293 uxth r3, r2
|
|
800c266: ebac 0303 sub.w r3, ip, r3
|
|
800c26a: 0c12 lsrs r2, r2, #16
|
|
800c26c: fa13 f38e uxtah r3, r3, lr
|
|
800c270: ebc2 421e rsb r2, r2, lr, lsr #16
|
|
800c274: eb02 4223 add.w r2, r2, r3, asr #16
|
|
800c278: b29b uxth r3, r3
|
|
800c27a: ea43 4302 orr.w r3, r3, r2, lsl #16
|
|
800c27e: 45b9 cmp r9, r7
|
|
800c280: ea4f 4c22 mov.w ip, r2, asr #16
|
|
800c284: f840 3b04 str.w r3, [r0], #4
|
|
800c288: d2e8 bcs.n 800c25c <quorem+0xb0>
|
|
800c28a: f856 2024 ldr.w r2, [r6, r4, lsl #2]
|
|
800c28e: eb06 0384 add.w r3, r6, r4, lsl #2
|
|
800c292: b92a cbnz r2, 800c2a0 <quorem+0xf4>
|
|
800c294: 3b04 subs r3, #4
|
|
800c296: 429e cmp r6, r3
|
|
800c298: 461a mov r2, r3
|
|
800c29a: d30b bcc.n 800c2b4 <quorem+0x108>
|
|
800c29c: f8c8 4010 str.w r4, [r8, #16]
|
|
800c2a0: 4628 mov r0, r5
|
|
800c2a2: b003 add sp, #12
|
|
800c2a4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800c2a8: 6812 ldr r2, [r2, #0]
|
|
800c2aa: 3b04 subs r3, #4
|
|
800c2ac: 2a00 cmp r2, #0
|
|
800c2ae: d1ca bne.n 800c246 <quorem+0x9a>
|
|
800c2b0: 3c01 subs r4, #1
|
|
800c2b2: e7c5 b.n 800c240 <quorem+0x94>
|
|
800c2b4: 6812 ldr r2, [r2, #0]
|
|
800c2b6: 3b04 subs r3, #4
|
|
800c2b8: 2a00 cmp r2, #0
|
|
800c2ba: d1ef bne.n 800c29c <quorem+0xf0>
|
|
800c2bc: 3c01 subs r4, #1
|
|
800c2be: e7ea b.n 800c296 <quorem+0xea>
|
|
800c2c0: 2000 movs r0, #0
|
|
800c2c2: e7ee b.n 800c2a2 <quorem+0xf6>
|
|
800c2c4: 0000 movs r0, r0
|
|
...
|
|
|
|
0800c2c8 <_dtoa_r>:
|
|
800c2c8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800c2cc: ec57 6b10 vmov r6, r7, d0
|
|
800c2d0: b097 sub sp, #92 ; 0x5c
|
|
800c2d2: 6a45 ldr r5, [r0, #36] ; 0x24
|
|
800c2d4: 9106 str r1, [sp, #24]
|
|
800c2d6: 4604 mov r4, r0
|
|
800c2d8: 920b str r2, [sp, #44] ; 0x2c
|
|
800c2da: 9312 str r3, [sp, #72] ; 0x48
|
|
800c2dc: f8dd 8080 ldr.w r8, [sp, #128] ; 0x80
|
|
800c2e0: e9cd 6700 strd r6, r7, [sp]
|
|
800c2e4: b93d cbnz r5, 800c2f6 <_dtoa_r+0x2e>
|
|
800c2e6: 2010 movs r0, #16
|
|
800c2e8: f7fe f842 bl 800a370 <malloc>
|
|
800c2ec: 6260 str r0, [r4, #36] ; 0x24
|
|
800c2ee: e9c0 5501 strd r5, r5, [r0, #4]
|
|
800c2f2: 6005 str r5, [r0, #0]
|
|
800c2f4: 60c5 str r5, [r0, #12]
|
|
800c2f6: 6a63 ldr r3, [r4, #36] ; 0x24
|
|
800c2f8: 6819 ldr r1, [r3, #0]
|
|
800c2fa: b151 cbz r1, 800c312 <_dtoa_r+0x4a>
|
|
800c2fc: 685a ldr r2, [r3, #4]
|
|
800c2fe: 604a str r2, [r1, #4]
|
|
800c300: 2301 movs r3, #1
|
|
800c302: 4093 lsls r3, r2
|
|
800c304: 608b str r3, [r1, #8]
|
|
800c306: 4620 mov r0, r4
|
|
800c308: f001 fb01 bl 800d90e <_Bfree>
|
|
800c30c: 6a63 ldr r3, [r4, #36] ; 0x24
|
|
800c30e: 2200 movs r2, #0
|
|
800c310: 601a str r2, [r3, #0]
|
|
800c312: 1e3b subs r3, r7, #0
|
|
800c314: bfbb ittet lt
|
|
800c316: f023 4300 biclt.w r3, r3, #2147483648 ; 0x80000000
|
|
800c31a: 9301 strlt r3, [sp, #4]
|
|
800c31c: 2300 movge r3, #0
|
|
800c31e: 2201 movlt r2, #1
|
|
800c320: bfac ite ge
|
|
800c322: f8c8 3000 strge.w r3, [r8]
|
|
800c326: f8c8 2000 strlt.w r2, [r8]
|
|
800c32a: 4baf ldr r3, [pc, #700] ; (800c5e8 <_dtoa_r+0x320>)
|
|
800c32c: f8dd 8004 ldr.w r8, [sp, #4]
|
|
800c330: ea33 0308 bics.w r3, r3, r8
|
|
800c334: d114 bne.n 800c360 <_dtoa_r+0x98>
|
|
800c336: 9a12 ldr r2, [sp, #72] ; 0x48
|
|
800c338: f242 730f movw r3, #9999 ; 0x270f
|
|
800c33c: 6013 str r3, [r2, #0]
|
|
800c33e: 9b00 ldr r3, [sp, #0]
|
|
800c340: b923 cbnz r3, 800c34c <_dtoa_r+0x84>
|
|
800c342: f3c8 0013 ubfx r0, r8, #0, #20
|
|
800c346: 2800 cmp r0, #0
|
|
800c348: f000 8542 beq.w 800cdd0 <_dtoa_r+0xb08>
|
|
800c34c: 9b21 ldr r3, [sp, #132] ; 0x84
|
|
800c34e: f8df b2ac ldr.w fp, [pc, #684] ; 800c5fc <_dtoa_r+0x334>
|
|
800c352: 2b00 cmp r3, #0
|
|
800c354: f000 8544 beq.w 800cde0 <_dtoa_r+0xb18>
|
|
800c358: f10b 0303 add.w r3, fp, #3
|
|
800c35c: f000 bd3e b.w 800cddc <_dtoa_r+0xb14>
|
|
800c360: e9dd 6700 ldrd r6, r7, [sp]
|
|
800c364: 2200 movs r2, #0
|
|
800c366: 2300 movs r3, #0
|
|
800c368: 4630 mov r0, r6
|
|
800c36a: 4639 mov r1, r7
|
|
800c36c: f7f4 fbb4 bl 8000ad8 <__aeabi_dcmpeq>
|
|
800c370: 4681 mov r9, r0
|
|
800c372: b168 cbz r0, 800c390 <_dtoa_r+0xc8>
|
|
800c374: 9a12 ldr r2, [sp, #72] ; 0x48
|
|
800c376: 2301 movs r3, #1
|
|
800c378: 6013 str r3, [r2, #0]
|
|
800c37a: 9b21 ldr r3, [sp, #132] ; 0x84
|
|
800c37c: 2b00 cmp r3, #0
|
|
800c37e: f000 8524 beq.w 800cdca <_dtoa_r+0xb02>
|
|
800c382: 4b9a ldr r3, [pc, #616] ; (800c5ec <_dtoa_r+0x324>)
|
|
800c384: 9a21 ldr r2, [sp, #132] ; 0x84
|
|
800c386: f103 3bff add.w fp, r3, #4294967295
|
|
800c38a: 6013 str r3, [r2, #0]
|
|
800c38c: f000 bd28 b.w 800cde0 <_dtoa_r+0xb18>
|
|
800c390: aa14 add r2, sp, #80 ; 0x50
|
|
800c392: a915 add r1, sp, #84 ; 0x54
|
|
800c394: ec47 6b10 vmov d0, r6, r7
|
|
800c398: 4620 mov r0, r4
|
|
800c39a: f001 fdc5 bl 800df28 <__d2b>
|
|
800c39e: f3c8 550a ubfx r5, r8, #20, #11
|
|
800c3a2: 9004 str r0, [sp, #16]
|
|
800c3a4: 2d00 cmp r5, #0
|
|
800c3a6: d07c beq.n 800c4a2 <_dtoa_r+0x1da>
|
|
800c3a8: f3c7 0313 ubfx r3, r7, #0, #20
|
|
800c3ac: f043 5b7f orr.w fp, r3, #1069547520 ; 0x3fc00000
|
|
800c3b0: 46b2 mov sl, r6
|
|
800c3b2: f44b 1b40 orr.w fp, fp, #3145728 ; 0x300000
|
|
800c3b6: f2a5 35ff subw r5, r5, #1023 ; 0x3ff
|
|
800c3ba: f8cd 904c str.w r9, [sp, #76] ; 0x4c
|
|
800c3be: 2200 movs r2, #0
|
|
800c3c0: 4b8b ldr r3, [pc, #556] ; (800c5f0 <_dtoa_r+0x328>)
|
|
800c3c2: 4650 mov r0, sl
|
|
800c3c4: 4659 mov r1, fp
|
|
800c3c6: f7f3 ff67 bl 8000298 <__aeabi_dsub>
|
|
800c3ca: a381 add r3, pc, #516 ; (adr r3, 800c5d0 <_dtoa_r+0x308>)
|
|
800c3cc: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c3d0: f7f4 f91a bl 8000608 <__aeabi_dmul>
|
|
800c3d4: a380 add r3, pc, #512 ; (adr r3, 800c5d8 <_dtoa_r+0x310>)
|
|
800c3d6: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c3da: f7f3 ff5f bl 800029c <__adddf3>
|
|
800c3de: 4606 mov r6, r0
|
|
800c3e0: 4628 mov r0, r5
|
|
800c3e2: 460f mov r7, r1
|
|
800c3e4: f7f4 f8a6 bl 8000534 <__aeabi_i2d>
|
|
800c3e8: a37d add r3, pc, #500 ; (adr r3, 800c5e0 <_dtoa_r+0x318>)
|
|
800c3ea: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c3ee: f7f4 f90b bl 8000608 <__aeabi_dmul>
|
|
800c3f2: 4602 mov r2, r0
|
|
800c3f4: 460b mov r3, r1
|
|
800c3f6: 4630 mov r0, r6
|
|
800c3f8: 4639 mov r1, r7
|
|
800c3fa: f7f3 ff4f bl 800029c <__adddf3>
|
|
800c3fe: 4606 mov r6, r0
|
|
800c400: 460f mov r7, r1
|
|
800c402: f7f4 fbb1 bl 8000b68 <__aeabi_d2iz>
|
|
800c406: 2200 movs r2, #0
|
|
800c408: 4682 mov sl, r0
|
|
800c40a: 2300 movs r3, #0
|
|
800c40c: 4630 mov r0, r6
|
|
800c40e: 4639 mov r1, r7
|
|
800c410: f7f4 fb6c bl 8000aec <__aeabi_dcmplt>
|
|
800c414: b148 cbz r0, 800c42a <_dtoa_r+0x162>
|
|
800c416: 4650 mov r0, sl
|
|
800c418: f7f4 f88c bl 8000534 <__aeabi_i2d>
|
|
800c41c: 4632 mov r2, r6
|
|
800c41e: 463b mov r3, r7
|
|
800c420: f7f4 fb5a bl 8000ad8 <__aeabi_dcmpeq>
|
|
800c424: b908 cbnz r0, 800c42a <_dtoa_r+0x162>
|
|
800c426: f10a 3aff add.w sl, sl, #4294967295
|
|
800c42a: f1ba 0f16 cmp.w sl, #22
|
|
800c42e: d859 bhi.n 800c4e4 <_dtoa_r+0x21c>
|
|
800c430: 4970 ldr r1, [pc, #448] ; (800c5f4 <_dtoa_r+0x32c>)
|
|
800c432: eb01 01ca add.w r1, r1, sl, lsl #3
|
|
800c436: e9dd 2300 ldrd r2, r3, [sp]
|
|
800c43a: e9d1 0100 ldrd r0, r1, [r1]
|
|
800c43e: f7f4 fb73 bl 8000b28 <__aeabi_dcmpgt>
|
|
800c442: 2800 cmp r0, #0
|
|
800c444: d050 beq.n 800c4e8 <_dtoa_r+0x220>
|
|
800c446: f10a 3aff add.w sl, sl, #4294967295
|
|
800c44a: 2300 movs r3, #0
|
|
800c44c: 930f str r3, [sp, #60] ; 0x3c
|
|
800c44e: 9b14 ldr r3, [sp, #80] ; 0x50
|
|
800c450: 1b5d subs r5, r3, r5
|
|
800c452: f1b5 0801 subs.w r8, r5, #1
|
|
800c456: bf49 itett mi
|
|
800c458: f1c5 0301 rsbmi r3, r5, #1
|
|
800c45c: 2300 movpl r3, #0
|
|
800c45e: 9305 strmi r3, [sp, #20]
|
|
800c460: f04f 0800 movmi.w r8, #0
|
|
800c464: bf58 it pl
|
|
800c466: 9305 strpl r3, [sp, #20]
|
|
800c468: f1ba 0f00 cmp.w sl, #0
|
|
800c46c: db3e blt.n 800c4ec <_dtoa_r+0x224>
|
|
800c46e: 2300 movs r3, #0
|
|
800c470: 44d0 add r8, sl
|
|
800c472: f8cd a038 str.w sl, [sp, #56] ; 0x38
|
|
800c476: 9307 str r3, [sp, #28]
|
|
800c478: 9b06 ldr r3, [sp, #24]
|
|
800c47a: 2b09 cmp r3, #9
|
|
800c47c: f200 8090 bhi.w 800c5a0 <_dtoa_r+0x2d8>
|
|
800c480: 2b05 cmp r3, #5
|
|
800c482: bfc4 itt gt
|
|
800c484: 3b04 subgt r3, #4
|
|
800c486: 9306 strgt r3, [sp, #24]
|
|
800c488: 9b06 ldr r3, [sp, #24]
|
|
800c48a: f1a3 0302 sub.w r3, r3, #2
|
|
800c48e: bfcc ite gt
|
|
800c490: 2500 movgt r5, #0
|
|
800c492: 2501 movle r5, #1
|
|
800c494: 2b03 cmp r3, #3
|
|
800c496: f200 808f bhi.w 800c5b8 <_dtoa_r+0x2f0>
|
|
800c49a: e8df f003 tbb [pc, r3]
|
|
800c49e: 7f7d .short 0x7f7d
|
|
800c4a0: 7131 .short 0x7131
|
|
800c4a2: e9dd 5314 ldrd r5, r3, [sp, #80] ; 0x50
|
|
800c4a6: 441d add r5, r3
|
|
800c4a8: f205 4032 addw r0, r5, #1074 ; 0x432
|
|
800c4ac: 2820 cmp r0, #32
|
|
800c4ae: dd13 ble.n 800c4d8 <_dtoa_r+0x210>
|
|
800c4b0: f1c0 0040 rsb r0, r0, #64 ; 0x40
|
|
800c4b4: 9b00 ldr r3, [sp, #0]
|
|
800c4b6: fa08 f800 lsl.w r8, r8, r0
|
|
800c4ba: f205 4012 addw r0, r5, #1042 ; 0x412
|
|
800c4be: fa23 f000 lsr.w r0, r3, r0
|
|
800c4c2: ea48 0000 orr.w r0, r8, r0
|
|
800c4c6: f7f4 f825 bl 8000514 <__aeabi_ui2d>
|
|
800c4ca: 2301 movs r3, #1
|
|
800c4cc: 4682 mov sl, r0
|
|
800c4ce: f1a1 7bf8 sub.w fp, r1, #32505856 ; 0x1f00000
|
|
800c4d2: 3d01 subs r5, #1
|
|
800c4d4: 9313 str r3, [sp, #76] ; 0x4c
|
|
800c4d6: e772 b.n 800c3be <_dtoa_r+0xf6>
|
|
800c4d8: 9b00 ldr r3, [sp, #0]
|
|
800c4da: f1c0 0020 rsb r0, r0, #32
|
|
800c4de: fa03 f000 lsl.w r0, r3, r0
|
|
800c4e2: e7f0 b.n 800c4c6 <_dtoa_r+0x1fe>
|
|
800c4e4: 2301 movs r3, #1
|
|
800c4e6: e7b1 b.n 800c44c <_dtoa_r+0x184>
|
|
800c4e8: 900f str r0, [sp, #60] ; 0x3c
|
|
800c4ea: e7b0 b.n 800c44e <_dtoa_r+0x186>
|
|
800c4ec: 9b05 ldr r3, [sp, #20]
|
|
800c4ee: eba3 030a sub.w r3, r3, sl
|
|
800c4f2: 9305 str r3, [sp, #20]
|
|
800c4f4: f1ca 0300 rsb r3, sl, #0
|
|
800c4f8: 9307 str r3, [sp, #28]
|
|
800c4fa: 2300 movs r3, #0
|
|
800c4fc: 930e str r3, [sp, #56] ; 0x38
|
|
800c4fe: e7bb b.n 800c478 <_dtoa_r+0x1b0>
|
|
800c500: 2301 movs r3, #1
|
|
800c502: 930a str r3, [sp, #40] ; 0x28
|
|
800c504: 9b0b ldr r3, [sp, #44] ; 0x2c
|
|
800c506: 2b00 cmp r3, #0
|
|
800c508: dd59 ble.n 800c5be <_dtoa_r+0x2f6>
|
|
800c50a: 9302 str r3, [sp, #8]
|
|
800c50c: 4699 mov r9, r3
|
|
800c50e: 6a66 ldr r6, [r4, #36] ; 0x24
|
|
800c510: 2200 movs r2, #0
|
|
800c512: 6072 str r2, [r6, #4]
|
|
800c514: 2204 movs r2, #4
|
|
800c516: f102 0014 add.w r0, r2, #20
|
|
800c51a: 4298 cmp r0, r3
|
|
800c51c: 6871 ldr r1, [r6, #4]
|
|
800c51e: d953 bls.n 800c5c8 <_dtoa_r+0x300>
|
|
800c520: 4620 mov r0, r4
|
|
800c522: f001 f9c0 bl 800d8a6 <_Balloc>
|
|
800c526: 6a63 ldr r3, [r4, #36] ; 0x24
|
|
800c528: 6030 str r0, [r6, #0]
|
|
800c52a: f1b9 0f0e cmp.w r9, #14
|
|
800c52e: f8d3 b000 ldr.w fp, [r3]
|
|
800c532: f200 80e6 bhi.w 800c702 <_dtoa_r+0x43a>
|
|
800c536: 2d00 cmp r5, #0
|
|
800c538: f000 80e3 beq.w 800c702 <_dtoa_r+0x43a>
|
|
800c53c: ed9d 7b00 vldr d7, [sp]
|
|
800c540: f1ba 0f00 cmp.w sl, #0
|
|
800c544: ed8d 7b10 vstr d7, [sp, #64] ; 0x40
|
|
800c548: dd74 ble.n 800c634 <_dtoa_r+0x36c>
|
|
800c54a: 4a2a ldr r2, [pc, #168] ; (800c5f4 <_dtoa_r+0x32c>)
|
|
800c54c: f00a 030f and.w r3, sl, #15
|
|
800c550: eb02 03c3 add.w r3, r2, r3, lsl #3
|
|
800c554: ed93 7b00 vldr d7, [r3]
|
|
800c558: ea4f 162a mov.w r6, sl, asr #4
|
|
800c55c: 06f0 lsls r0, r6, #27
|
|
800c55e: ed8d 7b08 vstr d7, [sp, #32]
|
|
800c562: d565 bpl.n 800c630 <_dtoa_r+0x368>
|
|
800c564: 4b24 ldr r3, [pc, #144] ; (800c5f8 <_dtoa_r+0x330>)
|
|
800c566: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
|
800c56a: e9d3 2308 ldrd r2, r3, [r3, #32]
|
|
800c56e: f7f4 f975 bl 800085c <__aeabi_ddiv>
|
|
800c572: e9cd 0100 strd r0, r1, [sp]
|
|
800c576: f006 060f and.w r6, r6, #15
|
|
800c57a: 2503 movs r5, #3
|
|
800c57c: 4f1e ldr r7, [pc, #120] ; (800c5f8 <_dtoa_r+0x330>)
|
|
800c57e: e04c b.n 800c61a <_dtoa_r+0x352>
|
|
800c580: 2301 movs r3, #1
|
|
800c582: 930a str r3, [sp, #40] ; 0x28
|
|
800c584: 9b0b ldr r3, [sp, #44] ; 0x2c
|
|
800c586: 4453 add r3, sl
|
|
800c588: f103 0901 add.w r9, r3, #1
|
|
800c58c: 9302 str r3, [sp, #8]
|
|
800c58e: 464b mov r3, r9
|
|
800c590: 2b01 cmp r3, #1
|
|
800c592: bfb8 it lt
|
|
800c594: 2301 movlt r3, #1
|
|
800c596: e7ba b.n 800c50e <_dtoa_r+0x246>
|
|
800c598: 2300 movs r3, #0
|
|
800c59a: e7b2 b.n 800c502 <_dtoa_r+0x23a>
|
|
800c59c: 2300 movs r3, #0
|
|
800c59e: e7f0 b.n 800c582 <_dtoa_r+0x2ba>
|
|
800c5a0: 2501 movs r5, #1
|
|
800c5a2: 2300 movs r3, #0
|
|
800c5a4: 9306 str r3, [sp, #24]
|
|
800c5a6: 950a str r5, [sp, #40] ; 0x28
|
|
800c5a8: f04f 33ff mov.w r3, #4294967295
|
|
800c5ac: 9302 str r3, [sp, #8]
|
|
800c5ae: 4699 mov r9, r3
|
|
800c5b0: 2200 movs r2, #0
|
|
800c5b2: 2312 movs r3, #18
|
|
800c5b4: 920b str r2, [sp, #44] ; 0x2c
|
|
800c5b6: e7aa b.n 800c50e <_dtoa_r+0x246>
|
|
800c5b8: 2301 movs r3, #1
|
|
800c5ba: 930a str r3, [sp, #40] ; 0x28
|
|
800c5bc: e7f4 b.n 800c5a8 <_dtoa_r+0x2e0>
|
|
800c5be: 2301 movs r3, #1
|
|
800c5c0: 9302 str r3, [sp, #8]
|
|
800c5c2: 4699 mov r9, r3
|
|
800c5c4: 461a mov r2, r3
|
|
800c5c6: e7f5 b.n 800c5b4 <_dtoa_r+0x2ec>
|
|
800c5c8: 3101 adds r1, #1
|
|
800c5ca: 6071 str r1, [r6, #4]
|
|
800c5cc: 0052 lsls r2, r2, #1
|
|
800c5ce: e7a2 b.n 800c516 <_dtoa_r+0x24e>
|
|
800c5d0: 636f4361 .word 0x636f4361
|
|
800c5d4: 3fd287a7 .word 0x3fd287a7
|
|
800c5d8: 8b60c8b3 .word 0x8b60c8b3
|
|
800c5dc: 3fc68a28 .word 0x3fc68a28
|
|
800c5e0: 509f79fb .word 0x509f79fb
|
|
800c5e4: 3fd34413 .word 0x3fd34413
|
|
800c5e8: 7ff00000 .word 0x7ff00000
|
|
800c5ec: 0800e949 .word 0x0800e949
|
|
800c5f0: 3ff80000 .word 0x3ff80000
|
|
800c5f4: 0800ea70 .word 0x0800ea70
|
|
800c5f8: 0800ea48 .word 0x0800ea48
|
|
800c5fc: 0800e9d1 .word 0x0800e9d1
|
|
800c600: 07f1 lsls r1, r6, #31
|
|
800c602: d508 bpl.n 800c616 <_dtoa_r+0x34e>
|
|
800c604: e9dd 0108 ldrd r0, r1, [sp, #32]
|
|
800c608: e9d7 2300 ldrd r2, r3, [r7]
|
|
800c60c: f7f3 fffc bl 8000608 <__aeabi_dmul>
|
|
800c610: e9cd 0108 strd r0, r1, [sp, #32]
|
|
800c614: 3501 adds r5, #1
|
|
800c616: 1076 asrs r6, r6, #1
|
|
800c618: 3708 adds r7, #8
|
|
800c61a: 2e00 cmp r6, #0
|
|
800c61c: d1f0 bne.n 800c600 <_dtoa_r+0x338>
|
|
800c61e: e9dd 2308 ldrd r2, r3, [sp, #32]
|
|
800c622: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c626: f7f4 f919 bl 800085c <__aeabi_ddiv>
|
|
800c62a: e9cd 0100 strd r0, r1, [sp]
|
|
800c62e: e01a b.n 800c666 <_dtoa_r+0x39e>
|
|
800c630: 2502 movs r5, #2
|
|
800c632: e7a3 b.n 800c57c <_dtoa_r+0x2b4>
|
|
800c634: f000 80a0 beq.w 800c778 <_dtoa_r+0x4b0>
|
|
800c638: f1ca 0600 rsb r6, sl, #0
|
|
800c63c: 4b9f ldr r3, [pc, #636] ; (800c8bc <_dtoa_r+0x5f4>)
|
|
800c63e: 4fa0 ldr r7, [pc, #640] ; (800c8c0 <_dtoa_r+0x5f8>)
|
|
800c640: f006 020f and.w r2, r6, #15
|
|
800c644: eb03 03c2 add.w r3, r3, r2, lsl #3
|
|
800c648: e9d3 2300 ldrd r2, r3, [r3]
|
|
800c64c: e9dd 0110 ldrd r0, r1, [sp, #64] ; 0x40
|
|
800c650: f7f3 ffda bl 8000608 <__aeabi_dmul>
|
|
800c654: e9cd 0100 strd r0, r1, [sp]
|
|
800c658: 1136 asrs r6, r6, #4
|
|
800c65a: 2300 movs r3, #0
|
|
800c65c: 2502 movs r5, #2
|
|
800c65e: 2e00 cmp r6, #0
|
|
800c660: d17f bne.n 800c762 <_dtoa_r+0x49a>
|
|
800c662: 2b00 cmp r3, #0
|
|
800c664: d1e1 bne.n 800c62a <_dtoa_r+0x362>
|
|
800c666: 9b0f ldr r3, [sp, #60] ; 0x3c
|
|
800c668: 2b00 cmp r3, #0
|
|
800c66a: f000 8087 beq.w 800c77c <_dtoa_r+0x4b4>
|
|
800c66e: e9dd 6700 ldrd r6, r7, [sp]
|
|
800c672: 2200 movs r2, #0
|
|
800c674: 4b93 ldr r3, [pc, #588] ; (800c8c4 <_dtoa_r+0x5fc>)
|
|
800c676: 4630 mov r0, r6
|
|
800c678: 4639 mov r1, r7
|
|
800c67a: f7f4 fa37 bl 8000aec <__aeabi_dcmplt>
|
|
800c67e: 2800 cmp r0, #0
|
|
800c680: d07c beq.n 800c77c <_dtoa_r+0x4b4>
|
|
800c682: f1b9 0f00 cmp.w r9, #0
|
|
800c686: d079 beq.n 800c77c <_dtoa_r+0x4b4>
|
|
800c688: 9b02 ldr r3, [sp, #8]
|
|
800c68a: 2b00 cmp r3, #0
|
|
800c68c: dd35 ble.n 800c6fa <_dtoa_r+0x432>
|
|
800c68e: f10a 33ff add.w r3, sl, #4294967295
|
|
800c692: 9308 str r3, [sp, #32]
|
|
800c694: 4639 mov r1, r7
|
|
800c696: 2200 movs r2, #0
|
|
800c698: 4b8b ldr r3, [pc, #556] ; (800c8c8 <_dtoa_r+0x600>)
|
|
800c69a: 4630 mov r0, r6
|
|
800c69c: f7f3 ffb4 bl 8000608 <__aeabi_dmul>
|
|
800c6a0: e9cd 0100 strd r0, r1, [sp]
|
|
800c6a4: 9f02 ldr r7, [sp, #8]
|
|
800c6a6: 3501 adds r5, #1
|
|
800c6a8: 4628 mov r0, r5
|
|
800c6aa: f7f3 ff43 bl 8000534 <__aeabi_i2d>
|
|
800c6ae: e9dd 2300 ldrd r2, r3, [sp]
|
|
800c6b2: f7f3 ffa9 bl 8000608 <__aeabi_dmul>
|
|
800c6b6: 2200 movs r2, #0
|
|
800c6b8: 4b84 ldr r3, [pc, #528] ; (800c8cc <_dtoa_r+0x604>)
|
|
800c6ba: f7f3 fdef bl 800029c <__adddf3>
|
|
800c6be: 4605 mov r5, r0
|
|
800c6c0: f1a1 7650 sub.w r6, r1, #54525952 ; 0x3400000
|
|
800c6c4: 2f00 cmp r7, #0
|
|
800c6c6: d15d bne.n 800c784 <_dtoa_r+0x4bc>
|
|
800c6c8: 2200 movs r2, #0
|
|
800c6ca: 4b81 ldr r3, [pc, #516] ; (800c8d0 <_dtoa_r+0x608>)
|
|
800c6cc: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c6d0: f7f3 fde2 bl 8000298 <__aeabi_dsub>
|
|
800c6d4: 462a mov r2, r5
|
|
800c6d6: 4633 mov r3, r6
|
|
800c6d8: e9cd 0100 strd r0, r1, [sp]
|
|
800c6dc: f7f4 fa24 bl 8000b28 <__aeabi_dcmpgt>
|
|
800c6e0: 2800 cmp r0, #0
|
|
800c6e2: f040 8288 bne.w 800cbf6 <_dtoa_r+0x92e>
|
|
800c6e6: 462a mov r2, r5
|
|
800c6e8: f106 4300 add.w r3, r6, #2147483648 ; 0x80000000
|
|
800c6ec: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c6f0: f7f4 f9fc bl 8000aec <__aeabi_dcmplt>
|
|
800c6f4: 2800 cmp r0, #0
|
|
800c6f6: f040 827c bne.w 800cbf2 <_dtoa_r+0x92a>
|
|
800c6fa: e9dd 2310 ldrd r2, r3, [sp, #64] ; 0x40
|
|
800c6fe: e9cd 2300 strd r2, r3, [sp]
|
|
800c702: 9b15 ldr r3, [sp, #84] ; 0x54
|
|
800c704: 2b00 cmp r3, #0
|
|
800c706: f2c0 8150 blt.w 800c9aa <_dtoa_r+0x6e2>
|
|
800c70a: f1ba 0f0e cmp.w sl, #14
|
|
800c70e: f300 814c bgt.w 800c9aa <_dtoa_r+0x6e2>
|
|
800c712: 4b6a ldr r3, [pc, #424] ; (800c8bc <_dtoa_r+0x5f4>)
|
|
800c714: eb03 03ca add.w r3, r3, sl, lsl #3
|
|
800c718: ed93 7b00 vldr d7, [r3]
|
|
800c71c: 9b0b ldr r3, [sp, #44] ; 0x2c
|
|
800c71e: 2b00 cmp r3, #0
|
|
800c720: ed8d 7b02 vstr d7, [sp, #8]
|
|
800c724: f280 80d8 bge.w 800c8d8 <_dtoa_r+0x610>
|
|
800c728: f1b9 0f00 cmp.w r9, #0
|
|
800c72c: f300 80d4 bgt.w 800c8d8 <_dtoa_r+0x610>
|
|
800c730: f040 825e bne.w 800cbf0 <_dtoa_r+0x928>
|
|
800c734: 2200 movs r2, #0
|
|
800c736: 4b66 ldr r3, [pc, #408] ; (800c8d0 <_dtoa_r+0x608>)
|
|
800c738: ec51 0b17 vmov r0, r1, d7
|
|
800c73c: f7f3 ff64 bl 8000608 <__aeabi_dmul>
|
|
800c740: e9dd 2300 ldrd r2, r3, [sp]
|
|
800c744: f7f4 f9e6 bl 8000b14 <__aeabi_dcmpge>
|
|
800c748: 464f mov r7, r9
|
|
800c74a: 464e mov r6, r9
|
|
800c74c: 2800 cmp r0, #0
|
|
800c74e: f040 8234 bne.w 800cbba <_dtoa_r+0x8f2>
|
|
800c752: 2331 movs r3, #49 ; 0x31
|
|
800c754: f10b 0501 add.w r5, fp, #1
|
|
800c758: f88b 3000 strb.w r3, [fp]
|
|
800c75c: f10a 0a01 add.w sl, sl, #1
|
|
800c760: e22f b.n 800cbc2 <_dtoa_r+0x8fa>
|
|
800c762: 07f2 lsls r2, r6, #31
|
|
800c764: d505 bpl.n 800c772 <_dtoa_r+0x4aa>
|
|
800c766: e9d7 2300 ldrd r2, r3, [r7]
|
|
800c76a: f7f3 ff4d bl 8000608 <__aeabi_dmul>
|
|
800c76e: 3501 adds r5, #1
|
|
800c770: 2301 movs r3, #1
|
|
800c772: 1076 asrs r6, r6, #1
|
|
800c774: 3708 adds r7, #8
|
|
800c776: e772 b.n 800c65e <_dtoa_r+0x396>
|
|
800c778: 2502 movs r5, #2
|
|
800c77a: e774 b.n 800c666 <_dtoa_r+0x39e>
|
|
800c77c: f8cd a020 str.w sl, [sp, #32]
|
|
800c780: 464f mov r7, r9
|
|
800c782: e791 b.n 800c6a8 <_dtoa_r+0x3e0>
|
|
800c784: 4b4d ldr r3, [pc, #308] ; (800c8bc <_dtoa_r+0x5f4>)
|
|
800c786: eb03 03c7 add.w r3, r3, r7, lsl #3
|
|
800c78a: e953 0102 ldrd r0, r1, [r3, #-8]
|
|
800c78e: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800c790: 2b00 cmp r3, #0
|
|
800c792: d047 beq.n 800c824 <_dtoa_r+0x55c>
|
|
800c794: 4602 mov r2, r0
|
|
800c796: 460b mov r3, r1
|
|
800c798: 2000 movs r0, #0
|
|
800c79a: 494e ldr r1, [pc, #312] ; (800c8d4 <_dtoa_r+0x60c>)
|
|
800c79c: f7f4 f85e bl 800085c <__aeabi_ddiv>
|
|
800c7a0: 462a mov r2, r5
|
|
800c7a2: 4633 mov r3, r6
|
|
800c7a4: f7f3 fd78 bl 8000298 <__aeabi_dsub>
|
|
800c7a8: e9cd 010c strd r0, r1, [sp, #48] ; 0x30
|
|
800c7ac: 465d mov r5, fp
|
|
800c7ae: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c7b2: f7f4 f9d9 bl 8000b68 <__aeabi_d2iz>
|
|
800c7b6: 4606 mov r6, r0
|
|
800c7b8: f7f3 febc bl 8000534 <__aeabi_i2d>
|
|
800c7bc: 4602 mov r2, r0
|
|
800c7be: 460b mov r3, r1
|
|
800c7c0: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c7c4: f7f3 fd68 bl 8000298 <__aeabi_dsub>
|
|
800c7c8: 3630 adds r6, #48 ; 0x30
|
|
800c7ca: f805 6b01 strb.w r6, [r5], #1
|
|
800c7ce: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30
|
|
800c7d2: e9cd 0100 strd r0, r1, [sp]
|
|
800c7d6: f7f4 f989 bl 8000aec <__aeabi_dcmplt>
|
|
800c7da: 2800 cmp r0, #0
|
|
800c7dc: d163 bne.n 800c8a6 <_dtoa_r+0x5de>
|
|
800c7de: e9dd 2300 ldrd r2, r3, [sp]
|
|
800c7e2: 2000 movs r0, #0
|
|
800c7e4: 4937 ldr r1, [pc, #220] ; (800c8c4 <_dtoa_r+0x5fc>)
|
|
800c7e6: f7f3 fd57 bl 8000298 <__aeabi_dsub>
|
|
800c7ea: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30
|
|
800c7ee: f7f4 f97d bl 8000aec <__aeabi_dcmplt>
|
|
800c7f2: 2800 cmp r0, #0
|
|
800c7f4: f040 80b7 bne.w 800c966 <_dtoa_r+0x69e>
|
|
800c7f8: eba5 030b sub.w r3, r5, fp
|
|
800c7fc: 429f cmp r7, r3
|
|
800c7fe: f77f af7c ble.w 800c6fa <_dtoa_r+0x432>
|
|
800c802: 2200 movs r2, #0
|
|
800c804: 4b30 ldr r3, [pc, #192] ; (800c8c8 <_dtoa_r+0x600>)
|
|
800c806: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
|
800c80a: f7f3 fefd bl 8000608 <__aeabi_dmul>
|
|
800c80e: 2200 movs r2, #0
|
|
800c810: e9cd 010c strd r0, r1, [sp, #48] ; 0x30
|
|
800c814: 4b2c ldr r3, [pc, #176] ; (800c8c8 <_dtoa_r+0x600>)
|
|
800c816: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c81a: f7f3 fef5 bl 8000608 <__aeabi_dmul>
|
|
800c81e: e9cd 0100 strd r0, r1, [sp]
|
|
800c822: e7c4 b.n 800c7ae <_dtoa_r+0x4e6>
|
|
800c824: 462a mov r2, r5
|
|
800c826: 4633 mov r3, r6
|
|
800c828: f7f3 feee bl 8000608 <__aeabi_dmul>
|
|
800c82c: e9cd 010c strd r0, r1, [sp, #48] ; 0x30
|
|
800c830: eb0b 0507 add.w r5, fp, r7
|
|
800c834: 465e mov r6, fp
|
|
800c836: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c83a: f7f4 f995 bl 8000b68 <__aeabi_d2iz>
|
|
800c83e: 4607 mov r7, r0
|
|
800c840: f7f3 fe78 bl 8000534 <__aeabi_i2d>
|
|
800c844: 3730 adds r7, #48 ; 0x30
|
|
800c846: 4602 mov r2, r0
|
|
800c848: 460b mov r3, r1
|
|
800c84a: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c84e: f7f3 fd23 bl 8000298 <__aeabi_dsub>
|
|
800c852: f806 7b01 strb.w r7, [r6], #1
|
|
800c856: 42ae cmp r6, r5
|
|
800c858: e9cd 0100 strd r0, r1, [sp]
|
|
800c85c: f04f 0200 mov.w r2, #0
|
|
800c860: d126 bne.n 800c8b0 <_dtoa_r+0x5e8>
|
|
800c862: 4b1c ldr r3, [pc, #112] ; (800c8d4 <_dtoa_r+0x60c>)
|
|
800c864: e9dd 010c ldrd r0, r1, [sp, #48] ; 0x30
|
|
800c868: f7f3 fd18 bl 800029c <__adddf3>
|
|
800c86c: 4602 mov r2, r0
|
|
800c86e: 460b mov r3, r1
|
|
800c870: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c874: f7f4 f958 bl 8000b28 <__aeabi_dcmpgt>
|
|
800c878: 2800 cmp r0, #0
|
|
800c87a: d174 bne.n 800c966 <_dtoa_r+0x69e>
|
|
800c87c: e9dd 230c ldrd r2, r3, [sp, #48] ; 0x30
|
|
800c880: 2000 movs r0, #0
|
|
800c882: 4914 ldr r1, [pc, #80] ; (800c8d4 <_dtoa_r+0x60c>)
|
|
800c884: f7f3 fd08 bl 8000298 <__aeabi_dsub>
|
|
800c888: 4602 mov r2, r0
|
|
800c88a: 460b mov r3, r1
|
|
800c88c: e9dd 0100 ldrd r0, r1, [sp]
|
|
800c890: f7f4 f92c bl 8000aec <__aeabi_dcmplt>
|
|
800c894: 2800 cmp r0, #0
|
|
800c896: f43f af30 beq.w 800c6fa <_dtoa_r+0x432>
|
|
800c89a: f815 3c01 ldrb.w r3, [r5, #-1]
|
|
800c89e: 2b30 cmp r3, #48 ; 0x30
|
|
800c8a0: f105 32ff add.w r2, r5, #4294967295
|
|
800c8a4: d002 beq.n 800c8ac <_dtoa_r+0x5e4>
|
|
800c8a6: f8dd a020 ldr.w sl, [sp, #32]
|
|
800c8aa: e04a b.n 800c942 <_dtoa_r+0x67a>
|
|
800c8ac: 4615 mov r5, r2
|
|
800c8ae: e7f4 b.n 800c89a <_dtoa_r+0x5d2>
|
|
800c8b0: 4b05 ldr r3, [pc, #20] ; (800c8c8 <_dtoa_r+0x600>)
|
|
800c8b2: f7f3 fea9 bl 8000608 <__aeabi_dmul>
|
|
800c8b6: e9cd 0100 strd r0, r1, [sp]
|
|
800c8ba: e7bc b.n 800c836 <_dtoa_r+0x56e>
|
|
800c8bc: 0800ea70 .word 0x0800ea70
|
|
800c8c0: 0800ea48 .word 0x0800ea48
|
|
800c8c4: 3ff00000 .word 0x3ff00000
|
|
800c8c8: 40240000 .word 0x40240000
|
|
800c8cc: 401c0000 .word 0x401c0000
|
|
800c8d0: 40140000 .word 0x40140000
|
|
800c8d4: 3fe00000 .word 0x3fe00000
|
|
800c8d8: e9dd 6700 ldrd r6, r7, [sp]
|
|
800c8dc: 465d mov r5, fp
|
|
800c8de: e9dd 2302 ldrd r2, r3, [sp, #8]
|
|
800c8e2: 4630 mov r0, r6
|
|
800c8e4: 4639 mov r1, r7
|
|
800c8e6: f7f3 ffb9 bl 800085c <__aeabi_ddiv>
|
|
800c8ea: f7f4 f93d bl 8000b68 <__aeabi_d2iz>
|
|
800c8ee: 4680 mov r8, r0
|
|
800c8f0: f7f3 fe20 bl 8000534 <__aeabi_i2d>
|
|
800c8f4: e9dd 2302 ldrd r2, r3, [sp, #8]
|
|
800c8f8: f7f3 fe86 bl 8000608 <__aeabi_dmul>
|
|
800c8fc: 4602 mov r2, r0
|
|
800c8fe: 460b mov r3, r1
|
|
800c900: 4630 mov r0, r6
|
|
800c902: 4639 mov r1, r7
|
|
800c904: f108 0630 add.w r6, r8, #48 ; 0x30
|
|
800c908: f7f3 fcc6 bl 8000298 <__aeabi_dsub>
|
|
800c90c: f805 6b01 strb.w r6, [r5], #1
|
|
800c910: eba5 060b sub.w r6, r5, fp
|
|
800c914: 45b1 cmp r9, r6
|
|
800c916: 4602 mov r2, r0
|
|
800c918: 460b mov r3, r1
|
|
800c91a: d139 bne.n 800c990 <_dtoa_r+0x6c8>
|
|
800c91c: f7f3 fcbe bl 800029c <__adddf3>
|
|
800c920: e9dd 2302 ldrd r2, r3, [sp, #8]
|
|
800c924: 4606 mov r6, r0
|
|
800c926: 460f mov r7, r1
|
|
800c928: f7f4 f8fe bl 8000b28 <__aeabi_dcmpgt>
|
|
800c92c: b9c8 cbnz r0, 800c962 <_dtoa_r+0x69a>
|
|
800c92e: e9dd 2302 ldrd r2, r3, [sp, #8]
|
|
800c932: 4630 mov r0, r6
|
|
800c934: 4639 mov r1, r7
|
|
800c936: f7f4 f8cf bl 8000ad8 <__aeabi_dcmpeq>
|
|
800c93a: b110 cbz r0, 800c942 <_dtoa_r+0x67a>
|
|
800c93c: f018 0f01 tst.w r8, #1
|
|
800c940: d10f bne.n 800c962 <_dtoa_r+0x69a>
|
|
800c942: 9904 ldr r1, [sp, #16]
|
|
800c944: 4620 mov r0, r4
|
|
800c946: f000 ffe2 bl 800d90e <_Bfree>
|
|
800c94a: 2300 movs r3, #0
|
|
800c94c: 9a12 ldr r2, [sp, #72] ; 0x48
|
|
800c94e: 702b strb r3, [r5, #0]
|
|
800c950: f10a 0301 add.w r3, sl, #1
|
|
800c954: 6013 str r3, [r2, #0]
|
|
800c956: 9b21 ldr r3, [sp, #132] ; 0x84
|
|
800c958: 2b00 cmp r3, #0
|
|
800c95a: f000 8241 beq.w 800cde0 <_dtoa_r+0xb18>
|
|
800c95e: 601d str r5, [r3, #0]
|
|
800c960: e23e b.n 800cde0 <_dtoa_r+0xb18>
|
|
800c962: f8cd a020 str.w sl, [sp, #32]
|
|
800c966: f815 2c01 ldrb.w r2, [r5, #-1]
|
|
800c96a: 2a39 cmp r2, #57 ; 0x39
|
|
800c96c: f105 33ff add.w r3, r5, #4294967295
|
|
800c970: d108 bne.n 800c984 <_dtoa_r+0x6bc>
|
|
800c972: 459b cmp fp, r3
|
|
800c974: d10a bne.n 800c98c <_dtoa_r+0x6c4>
|
|
800c976: 9b08 ldr r3, [sp, #32]
|
|
800c978: 3301 adds r3, #1
|
|
800c97a: 9308 str r3, [sp, #32]
|
|
800c97c: 2330 movs r3, #48 ; 0x30
|
|
800c97e: f88b 3000 strb.w r3, [fp]
|
|
800c982: 465b mov r3, fp
|
|
800c984: 781a ldrb r2, [r3, #0]
|
|
800c986: 3201 adds r2, #1
|
|
800c988: 701a strb r2, [r3, #0]
|
|
800c98a: e78c b.n 800c8a6 <_dtoa_r+0x5de>
|
|
800c98c: 461d mov r5, r3
|
|
800c98e: e7ea b.n 800c966 <_dtoa_r+0x69e>
|
|
800c990: 2200 movs r2, #0
|
|
800c992: 4b9b ldr r3, [pc, #620] ; (800cc00 <_dtoa_r+0x938>)
|
|
800c994: f7f3 fe38 bl 8000608 <__aeabi_dmul>
|
|
800c998: 2200 movs r2, #0
|
|
800c99a: 2300 movs r3, #0
|
|
800c99c: 4606 mov r6, r0
|
|
800c99e: 460f mov r7, r1
|
|
800c9a0: f7f4 f89a bl 8000ad8 <__aeabi_dcmpeq>
|
|
800c9a4: 2800 cmp r0, #0
|
|
800c9a6: d09a beq.n 800c8de <_dtoa_r+0x616>
|
|
800c9a8: e7cb b.n 800c942 <_dtoa_r+0x67a>
|
|
800c9aa: 9a0a ldr r2, [sp, #40] ; 0x28
|
|
800c9ac: 2a00 cmp r2, #0
|
|
800c9ae: f000 808b beq.w 800cac8 <_dtoa_r+0x800>
|
|
800c9b2: 9a06 ldr r2, [sp, #24]
|
|
800c9b4: 2a01 cmp r2, #1
|
|
800c9b6: dc6e bgt.n 800ca96 <_dtoa_r+0x7ce>
|
|
800c9b8: 9a13 ldr r2, [sp, #76] ; 0x4c
|
|
800c9ba: 2a00 cmp r2, #0
|
|
800c9bc: d067 beq.n 800ca8e <_dtoa_r+0x7c6>
|
|
800c9be: f203 4333 addw r3, r3, #1075 ; 0x433
|
|
800c9c2: 9f07 ldr r7, [sp, #28]
|
|
800c9c4: 9d05 ldr r5, [sp, #20]
|
|
800c9c6: 9a05 ldr r2, [sp, #20]
|
|
800c9c8: 2101 movs r1, #1
|
|
800c9ca: 441a add r2, r3
|
|
800c9cc: 4620 mov r0, r4
|
|
800c9ce: 9205 str r2, [sp, #20]
|
|
800c9d0: 4498 add r8, r3
|
|
800c9d2: f001 f87a bl 800daca <__i2b>
|
|
800c9d6: 4606 mov r6, r0
|
|
800c9d8: 2d00 cmp r5, #0
|
|
800c9da: dd0c ble.n 800c9f6 <_dtoa_r+0x72e>
|
|
800c9dc: f1b8 0f00 cmp.w r8, #0
|
|
800c9e0: dd09 ble.n 800c9f6 <_dtoa_r+0x72e>
|
|
800c9e2: 4545 cmp r5, r8
|
|
800c9e4: 9a05 ldr r2, [sp, #20]
|
|
800c9e6: 462b mov r3, r5
|
|
800c9e8: bfa8 it ge
|
|
800c9ea: 4643 movge r3, r8
|
|
800c9ec: 1ad2 subs r2, r2, r3
|
|
800c9ee: 9205 str r2, [sp, #20]
|
|
800c9f0: 1aed subs r5, r5, r3
|
|
800c9f2: eba8 0803 sub.w r8, r8, r3
|
|
800c9f6: 9b07 ldr r3, [sp, #28]
|
|
800c9f8: b1eb cbz r3, 800ca36 <_dtoa_r+0x76e>
|
|
800c9fa: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800c9fc: 2b00 cmp r3, #0
|
|
800c9fe: d067 beq.n 800cad0 <_dtoa_r+0x808>
|
|
800ca00: b18f cbz r7, 800ca26 <_dtoa_r+0x75e>
|
|
800ca02: 4631 mov r1, r6
|
|
800ca04: 463a mov r2, r7
|
|
800ca06: 4620 mov r0, r4
|
|
800ca08: f001 f8fe bl 800dc08 <__pow5mult>
|
|
800ca0c: 9a04 ldr r2, [sp, #16]
|
|
800ca0e: 4601 mov r1, r0
|
|
800ca10: 4606 mov r6, r0
|
|
800ca12: 4620 mov r0, r4
|
|
800ca14: f001 f862 bl 800dadc <__multiply>
|
|
800ca18: 9904 ldr r1, [sp, #16]
|
|
800ca1a: 9008 str r0, [sp, #32]
|
|
800ca1c: 4620 mov r0, r4
|
|
800ca1e: f000 ff76 bl 800d90e <_Bfree>
|
|
800ca22: 9b08 ldr r3, [sp, #32]
|
|
800ca24: 9304 str r3, [sp, #16]
|
|
800ca26: 9b07 ldr r3, [sp, #28]
|
|
800ca28: 1bda subs r2, r3, r7
|
|
800ca2a: d004 beq.n 800ca36 <_dtoa_r+0x76e>
|
|
800ca2c: 9904 ldr r1, [sp, #16]
|
|
800ca2e: 4620 mov r0, r4
|
|
800ca30: f001 f8ea bl 800dc08 <__pow5mult>
|
|
800ca34: 9004 str r0, [sp, #16]
|
|
800ca36: 2101 movs r1, #1
|
|
800ca38: 4620 mov r0, r4
|
|
800ca3a: f001 f846 bl 800daca <__i2b>
|
|
800ca3e: 9b0e ldr r3, [sp, #56] ; 0x38
|
|
800ca40: 4607 mov r7, r0
|
|
800ca42: 2b00 cmp r3, #0
|
|
800ca44: f000 81d0 beq.w 800cde8 <_dtoa_r+0xb20>
|
|
800ca48: 461a mov r2, r3
|
|
800ca4a: 4601 mov r1, r0
|
|
800ca4c: 4620 mov r0, r4
|
|
800ca4e: f001 f8db bl 800dc08 <__pow5mult>
|
|
800ca52: 9b06 ldr r3, [sp, #24]
|
|
800ca54: 2b01 cmp r3, #1
|
|
800ca56: 4607 mov r7, r0
|
|
800ca58: dc40 bgt.n 800cadc <_dtoa_r+0x814>
|
|
800ca5a: 9b00 ldr r3, [sp, #0]
|
|
800ca5c: 2b00 cmp r3, #0
|
|
800ca5e: d139 bne.n 800cad4 <_dtoa_r+0x80c>
|
|
800ca60: 9b01 ldr r3, [sp, #4]
|
|
800ca62: f3c3 0313 ubfx r3, r3, #0, #20
|
|
800ca66: 2b00 cmp r3, #0
|
|
800ca68: d136 bne.n 800cad8 <_dtoa_r+0x810>
|
|
800ca6a: 9b01 ldr r3, [sp, #4]
|
|
800ca6c: f023 4300 bic.w r3, r3, #2147483648 ; 0x80000000
|
|
800ca70: 0d1b lsrs r3, r3, #20
|
|
800ca72: 051b lsls r3, r3, #20
|
|
800ca74: b12b cbz r3, 800ca82 <_dtoa_r+0x7ba>
|
|
800ca76: 9b05 ldr r3, [sp, #20]
|
|
800ca78: 3301 adds r3, #1
|
|
800ca7a: 9305 str r3, [sp, #20]
|
|
800ca7c: f108 0801 add.w r8, r8, #1
|
|
800ca80: 2301 movs r3, #1
|
|
800ca82: 9307 str r3, [sp, #28]
|
|
800ca84: 9b0e ldr r3, [sp, #56] ; 0x38
|
|
800ca86: 2b00 cmp r3, #0
|
|
800ca88: d12a bne.n 800cae0 <_dtoa_r+0x818>
|
|
800ca8a: 2001 movs r0, #1
|
|
800ca8c: e030 b.n 800caf0 <_dtoa_r+0x828>
|
|
800ca8e: 9b14 ldr r3, [sp, #80] ; 0x50
|
|
800ca90: f1c3 0336 rsb r3, r3, #54 ; 0x36
|
|
800ca94: e795 b.n 800c9c2 <_dtoa_r+0x6fa>
|
|
800ca96: 9b07 ldr r3, [sp, #28]
|
|
800ca98: f109 37ff add.w r7, r9, #4294967295
|
|
800ca9c: 42bb cmp r3, r7
|
|
800ca9e: bfbf itttt lt
|
|
800caa0: 9b07 ldrlt r3, [sp, #28]
|
|
800caa2: 9707 strlt r7, [sp, #28]
|
|
800caa4: 1afa sublt r2, r7, r3
|
|
800caa6: 9b0e ldrlt r3, [sp, #56] ; 0x38
|
|
800caa8: bfbb ittet lt
|
|
800caaa: 189b addlt r3, r3, r2
|
|
800caac: 930e strlt r3, [sp, #56] ; 0x38
|
|
800caae: 1bdf subge r7, r3, r7
|
|
800cab0: 2700 movlt r7, #0
|
|
800cab2: f1b9 0f00 cmp.w r9, #0
|
|
800cab6: bfb5 itete lt
|
|
800cab8: 9b05 ldrlt r3, [sp, #20]
|
|
800caba: 9d05 ldrge r5, [sp, #20]
|
|
800cabc: eba3 0509 sublt.w r5, r3, r9
|
|
800cac0: 464b movge r3, r9
|
|
800cac2: bfb8 it lt
|
|
800cac4: 2300 movlt r3, #0
|
|
800cac6: e77e b.n 800c9c6 <_dtoa_r+0x6fe>
|
|
800cac8: 9f07 ldr r7, [sp, #28]
|
|
800caca: 9d05 ldr r5, [sp, #20]
|
|
800cacc: 9e0a ldr r6, [sp, #40] ; 0x28
|
|
800cace: e783 b.n 800c9d8 <_dtoa_r+0x710>
|
|
800cad0: 9a07 ldr r2, [sp, #28]
|
|
800cad2: e7ab b.n 800ca2c <_dtoa_r+0x764>
|
|
800cad4: 2300 movs r3, #0
|
|
800cad6: e7d4 b.n 800ca82 <_dtoa_r+0x7ba>
|
|
800cad8: 9b00 ldr r3, [sp, #0]
|
|
800cada: e7d2 b.n 800ca82 <_dtoa_r+0x7ba>
|
|
800cadc: 2300 movs r3, #0
|
|
800cade: 9307 str r3, [sp, #28]
|
|
800cae0: 693b ldr r3, [r7, #16]
|
|
800cae2: eb07 0383 add.w r3, r7, r3, lsl #2
|
|
800cae6: 6918 ldr r0, [r3, #16]
|
|
800cae8: f000 ffa1 bl 800da2e <__hi0bits>
|
|
800caec: f1c0 0020 rsb r0, r0, #32
|
|
800caf0: 4440 add r0, r8
|
|
800caf2: f010 001f ands.w r0, r0, #31
|
|
800caf6: d047 beq.n 800cb88 <_dtoa_r+0x8c0>
|
|
800caf8: f1c0 0320 rsb r3, r0, #32
|
|
800cafc: 2b04 cmp r3, #4
|
|
800cafe: dd3b ble.n 800cb78 <_dtoa_r+0x8b0>
|
|
800cb00: 9b05 ldr r3, [sp, #20]
|
|
800cb02: f1c0 001c rsb r0, r0, #28
|
|
800cb06: 4403 add r3, r0
|
|
800cb08: 9305 str r3, [sp, #20]
|
|
800cb0a: 4405 add r5, r0
|
|
800cb0c: 4480 add r8, r0
|
|
800cb0e: 9b05 ldr r3, [sp, #20]
|
|
800cb10: 2b00 cmp r3, #0
|
|
800cb12: dd05 ble.n 800cb20 <_dtoa_r+0x858>
|
|
800cb14: 461a mov r2, r3
|
|
800cb16: 9904 ldr r1, [sp, #16]
|
|
800cb18: 4620 mov r0, r4
|
|
800cb1a: f001 f8c3 bl 800dca4 <__lshift>
|
|
800cb1e: 9004 str r0, [sp, #16]
|
|
800cb20: f1b8 0f00 cmp.w r8, #0
|
|
800cb24: dd05 ble.n 800cb32 <_dtoa_r+0x86a>
|
|
800cb26: 4639 mov r1, r7
|
|
800cb28: 4642 mov r2, r8
|
|
800cb2a: 4620 mov r0, r4
|
|
800cb2c: f001 f8ba bl 800dca4 <__lshift>
|
|
800cb30: 4607 mov r7, r0
|
|
800cb32: 9b0f ldr r3, [sp, #60] ; 0x3c
|
|
800cb34: b353 cbz r3, 800cb8c <_dtoa_r+0x8c4>
|
|
800cb36: 4639 mov r1, r7
|
|
800cb38: 9804 ldr r0, [sp, #16]
|
|
800cb3a: f001 f907 bl 800dd4c <__mcmp>
|
|
800cb3e: 2800 cmp r0, #0
|
|
800cb40: da24 bge.n 800cb8c <_dtoa_r+0x8c4>
|
|
800cb42: 2300 movs r3, #0
|
|
800cb44: 220a movs r2, #10
|
|
800cb46: 9904 ldr r1, [sp, #16]
|
|
800cb48: 4620 mov r0, r4
|
|
800cb4a: f000 fef7 bl 800d93c <__multadd>
|
|
800cb4e: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800cb50: 9004 str r0, [sp, #16]
|
|
800cb52: f10a 3aff add.w sl, sl, #4294967295
|
|
800cb56: 2b00 cmp r3, #0
|
|
800cb58: f000 814d beq.w 800cdf6 <_dtoa_r+0xb2e>
|
|
800cb5c: 2300 movs r3, #0
|
|
800cb5e: 4631 mov r1, r6
|
|
800cb60: 220a movs r2, #10
|
|
800cb62: 4620 mov r0, r4
|
|
800cb64: f000 feea bl 800d93c <__multadd>
|
|
800cb68: 9b02 ldr r3, [sp, #8]
|
|
800cb6a: 2b00 cmp r3, #0
|
|
800cb6c: 4606 mov r6, r0
|
|
800cb6e: dc4f bgt.n 800cc10 <_dtoa_r+0x948>
|
|
800cb70: 9b06 ldr r3, [sp, #24]
|
|
800cb72: 2b02 cmp r3, #2
|
|
800cb74: dd4c ble.n 800cc10 <_dtoa_r+0x948>
|
|
800cb76: e011 b.n 800cb9c <_dtoa_r+0x8d4>
|
|
800cb78: d0c9 beq.n 800cb0e <_dtoa_r+0x846>
|
|
800cb7a: 9a05 ldr r2, [sp, #20]
|
|
800cb7c: 331c adds r3, #28
|
|
800cb7e: 441a add r2, r3
|
|
800cb80: 9205 str r2, [sp, #20]
|
|
800cb82: 441d add r5, r3
|
|
800cb84: 4498 add r8, r3
|
|
800cb86: e7c2 b.n 800cb0e <_dtoa_r+0x846>
|
|
800cb88: 4603 mov r3, r0
|
|
800cb8a: e7f6 b.n 800cb7a <_dtoa_r+0x8b2>
|
|
800cb8c: f1b9 0f00 cmp.w r9, #0
|
|
800cb90: dc38 bgt.n 800cc04 <_dtoa_r+0x93c>
|
|
800cb92: 9b06 ldr r3, [sp, #24]
|
|
800cb94: 2b02 cmp r3, #2
|
|
800cb96: dd35 ble.n 800cc04 <_dtoa_r+0x93c>
|
|
800cb98: f8cd 9008 str.w r9, [sp, #8]
|
|
800cb9c: 9b02 ldr r3, [sp, #8]
|
|
800cb9e: b963 cbnz r3, 800cbba <_dtoa_r+0x8f2>
|
|
800cba0: 4639 mov r1, r7
|
|
800cba2: 2205 movs r2, #5
|
|
800cba4: 4620 mov r0, r4
|
|
800cba6: f000 fec9 bl 800d93c <__multadd>
|
|
800cbaa: 4601 mov r1, r0
|
|
800cbac: 4607 mov r7, r0
|
|
800cbae: 9804 ldr r0, [sp, #16]
|
|
800cbb0: f001 f8cc bl 800dd4c <__mcmp>
|
|
800cbb4: 2800 cmp r0, #0
|
|
800cbb6: f73f adcc bgt.w 800c752 <_dtoa_r+0x48a>
|
|
800cbba: 9b0b ldr r3, [sp, #44] ; 0x2c
|
|
800cbbc: 465d mov r5, fp
|
|
800cbbe: ea6f 0a03 mvn.w sl, r3
|
|
800cbc2: f04f 0900 mov.w r9, #0
|
|
800cbc6: 4639 mov r1, r7
|
|
800cbc8: 4620 mov r0, r4
|
|
800cbca: f000 fea0 bl 800d90e <_Bfree>
|
|
800cbce: 2e00 cmp r6, #0
|
|
800cbd0: f43f aeb7 beq.w 800c942 <_dtoa_r+0x67a>
|
|
800cbd4: f1b9 0f00 cmp.w r9, #0
|
|
800cbd8: d005 beq.n 800cbe6 <_dtoa_r+0x91e>
|
|
800cbda: 45b1 cmp r9, r6
|
|
800cbdc: d003 beq.n 800cbe6 <_dtoa_r+0x91e>
|
|
800cbde: 4649 mov r1, r9
|
|
800cbe0: 4620 mov r0, r4
|
|
800cbe2: f000 fe94 bl 800d90e <_Bfree>
|
|
800cbe6: 4631 mov r1, r6
|
|
800cbe8: 4620 mov r0, r4
|
|
800cbea: f000 fe90 bl 800d90e <_Bfree>
|
|
800cbee: e6a8 b.n 800c942 <_dtoa_r+0x67a>
|
|
800cbf0: 2700 movs r7, #0
|
|
800cbf2: 463e mov r6, r7
|
|
800cbf4: e7e1 b.n 800cbba <_dtoa_r+0x8f2>
|
|
800cbf6: f8dd a020 ldr.w sl, [sp, #32]
|
|
800cbfa: 463e mov r6, r7
|
|
800cbfc: e5a9 b.n 800c752 <_dtoa_r+0x48a>
|
|
800cbfe: bf00 nop
|
|
800cc00: 40240000 .word 0x40240000
|
|
800cc04: 9b0a ldr r3, [sp, #40] ; 0x28
|
|
800cc06: f8cd 9008 str.w r9, [sp, #8]
|
|
800cc0a: 2b00 cmp r3, #0
|
|
800cc0c: f000 80fa beq.w 800ce04 <_dtoa_r+0xb3c>
|
|
800cc10: 2d00 cmp r5, #0
|
|
800cc12: dd05 ble.n 800cc20 <_dtoa_r+0x958>
|
|
800cc14: 4631 mov r1, r6
|
|
800cc16: 462a mov r2, r5
|
|
800cc18: 4620 mov r0, r4
|
|
800cc1a: f001 f843 bl 800dca4 <__lshift>
|
|
800cc1e: 4606 mov r6, r0
|
|
800cc20: 9b07 ldr r3, [sp, #28]
|
|
800cc22: 2b00 cmp r3, #0
|
|
800cc24: d04c beq.n 800ccc0 <_dtoa_r+0x9f8>
|
|
800cc26: 6871 ldr r1, [r6, #4]
|
|
800cc28: 4620 mov r0, r4
|
|
800cc2a: f000 fe3c bl 800d8a6 <_Balloc>
|
|
800cc2e: 6932 ldr r2, [r6, #16]
|
|
800cc30: 3202 adds r2, #2
|
|
800cc32: 4605 mov r5, r0
|
|
800cc34: 0092 lsls r2, r2, #2
|
|
800cc36: f106 010c add.w r1, r6, #12
|
|
800cc3a: 300c adds r0, #12
|
|
800cc3c: f000 fe26 bl 800d88c <memcpy>
|
|
800cc40: 2201 movs r2, #1
|
|
800cc42: 4629 mov r1, r5
|
|
800cc44: 4620 mov r0, r4
|
|
800cc46: f001 f82d bl 800dca4 <__lshift>
|
|
800cc4a: 9b00 ldr r3, [sp, #0]
|
|
800cc4c: f8cd b014 str.w fp, [sp, #20]
|
|
800cc50: f003 0301 and.w r3, r3, #1
|
|
800cc54: 46b1 mov r9, r6
|
|
800cc56: 9307 str r3, [sp, #28]
|
|
800cc58: 4606 mov r6, r0
|
|
800cc5a: 4639 mov r1, r7
|
|
800cc5c: 9804 ldr r0, [sp, #16]
|
|
800cc5e: f7ff faa5 bl 800c1ac <quorem>
|
|
800cc62: 4649 mov r1, r9
|
|
800cc64: 4605 mov r5, r0
|
|
800cc66: f100 0830 add.w r8, r0, #48 ; 0x30
|
|
800cc6a: 9804 ldr r0, [sp, #16]
|
|
800cc6c: f001 f86e bl 800dd4c <__mcmp>
|
|
800cc70: 4632 mov r2, r6
|
|
800cc72: 9000 str r0, [sp, #0]
|
|
800cc74: 4639 mov r1, r7
|
|
800cc76: 4620 mov r0, r4
|
|
800cc78: f001 f882 bl 800dd80 <__mdiff>
|
|
800cc7c: 68c3 ldr r3, [r0, #12]
|
|
800cc7e: 4602 mov r2, r0
|
|
800cc80: bb03 cbnz r3, 800ccc4 <_dtoa_r+0x9fc>
|
|
800cc82: 4601 mov r1, r0
|
|
800cc84: 9008 str r0, [sp, #32]
|
|
800cc86: 9804 ldr r0, [sp, #16]
|
|
800cc88: f001 f860 bl 800dd4c <__mcmp>
|
|
800cc8c: 9a08 ldr r2, [sp, #32]
|
|
800cc8e: 4603 mov r3, r0
|
|
800cc90: 4611 mov r1, r2
|
|
800cc92: 4620 mov r0, r4
|
|
800cc94: 9308 str r3, [sp, #32]
|
|
800cc96: f000 fe3a bl 800d90e <_Bfree>
|
|
800cc9a: 9b08 ldr r3, [sp, #32]
|
|
800cc9c: b9a3 cbnz r3, 800ccc8 <_dtoa_r+0xa00>
|
|
800cc9e: 9a06 ldr r2, [sp, #24]
|
|
800cca0: b992 cbnz r2, 800ccc8 <_dtoa_r+0xa00>
|
|
800cca2: 9a07 ldr r2, [sp, #28]
|
|
800cca4: b982 cbnz r2, 800ccc8 <_dtoa_r+0xa00>
|
|
800cca6: f1b8 0f39 cmp.w r8, #57 ; 0x39
|
|
800ccaa: d029 beq.n 800cd00 <_dtoa_r+0xa38>
|
|
800ccac: 9b00 ldr r3, [sp, #0]
|
|
800ccae: 2b00 cmp r3, #0
|
|
800ccb0: dd01 ble.n 800ccb6 <_dtoa_r+0x9ee>
|
|
800ccb2: f105 0831 add.w r8, r5, #49 ; 0x31
|
|
800ccb6: 9b05 ldr r3, [sp, #20]
|
|
800ccb8: 1c5d adds r5, r3, #1
|
|
800ccba: f883 8000 strb.w r8, [r3]
|
|
800ccbe: e782 b.n 800cbc6 <_dtoa_r+0x8fe>
|
|
800ccc0: 4630 mov r0, r6
|
|
800ccc2: e7c2 b.n 800cc4a <_dtoa_r+0x982>
|
|
800ccc4: 2301 movs r3, #1
|
|
800ccc6: e7e3 b.n 800cc90 <_dtoa_r+0x9c8>
|
|
800ccc8: 9a00 ldr r2, [sp, #0]
|
|
800ccca: 2a00 cmp r2, #0
|
|
800cccc: db04 blt.n 800ccd8 <_dtoa_r+0xa10>
|
|
800ccce: d125 bne.n 800cd1c <_dtoa_r+0xa54>
|
|
800ccd0: 9a06 ldr r2, [sp, #24]
|
|
800ccd2: bb1a cbnz r2, 800cd1c <_dtoa_r+0xa54>
|
|
800ccd4: 9a07 ldr r2, [sp, #28]
|
|
800ccd6: bb0a cbnz r2, 800cd1c <_dtoa_r+0xa54>
|
|
800ccd8: 2b00 cmp r3, #0
|
|
800ccda: ddec ble.n 800ccb6 <_dtoa_r+0x9ee>
|
|
800ccdc: 2201 movs r2, #1
|
|
800ccde: 9904 ldr r1, [sp, #16]
|
|
800cce0: 4620 mov r0, r4
|
|
800cce2: f000 ffdf bl 800dca4 <__lshift>
|
|
800cce6: 4639 mov r1, r7
|
|
800cce8: 9004 str r0, [sp, #16]
|
|
800ccea: f001 f82f bl 800dd4c <__mcmp>
|
|
800ccee: 2800 cmp r0, #0
|
|
800ccf0: dc03 bgt.n 800ccfa <_dtoa_r+0xa32>
|
|
800ccf2: d1e0 bne.n 800ccb6 <_dtoa_r+0x9ee>
|
|
800ccf4: f018 0f01 tst.w r8, #1
|
|
800ccf8: d0dd beq.n 800ccb6 <_dtoa_r+0x9ee>
|
|
800ccfa: f1b8 0f39 cmp.w r8, #57 ; 0x39
|
|
800ccfe: d1d8 bne.n 800ccb2 <_dtoa_r+0x9ea>
|
|
800cd00: 9b05 ldr r3, [sp, #20]
|
|
800cd02: 9a05 ldr r2, [sp, #20]
|
|
800cd04: 1c5d adds r5, r3, #1
|
|
800cd06: 2339 movs r3, #57 ; 0x39
|
|
800cd08: 7013 strb r3, [r2, #0]
|
|
800cd0a: f815 3c01 ldrb.w r3, [r5, #-1]
|
|
800cd0e: 2b39 cmp r3, #57 ; 0x39
|
|
800cd10: f105 32ff add.w r2, r5, #4294967295
|
|
800cd14: d04f beq.n 800cdb6 <_dtoa_r+0xaee>
|
|
800cd16: 3301 adds r3, #1
|
|
800cd18: 7013 strb r3, [r2, #0]
|
|
800cd1a: e754 b.n 800cbc6 <_dtoa_r+0x8fe>
|
|
800cd1c: 9a05 ldr r2, [sp, #20]
|
|
800cd1e: 2b00 cmp r3, #0
|
|
800cd20: f102 0501 add.w r5, r2, #1
|
|
800cd24: dd06 ble.n 800cd34 <_dtoa_r+0xa6c>
|
|
800cd26: f1b8 0f39 cmp.w r8, #57 ; 0x39
|
|
800cd2a: d0e9 beq.n 800cd00 <_dtoa_r+0xa38>
|
|
800cd2c: f108 0801 add.w r8, r8, #1
|
|
800cd30: 9b05 ldr r3, [sp, #20]
|
|
800cd32: e7c2 b.n 800ccba <_dtoa_r+0x9f2>
|
|
800cd34: 9a02 ldr r2, [sp, #8]
|
|
800cd36: f805 8c01 strb.w r8, [r5, #-1]
|
|
800cd3a: eba5 030b sub.w r3, r5, fp
|
|
800cd3e: 4293 cmp r3, r2
|
|
800cd40: d021 beq.n 800cd86 <_dtoa_r+0xabe>
|
|
800cd42: 2300 movs r3, #0
|
|
800cd44: 220a movs r2, #10
|
|
800cd46: 9904 ldr r1, [sp, #16]
|
|
800cd48: 4620 mov r0, r4
|
|
800cd4a: f000 fdf7 bl 800d93c <__multadd>
|
|
800cd4e: 45b1 cmp r9, r6
|
|
800cd50: 9004 str r0, [sp, #16]
|
|
800cd52: f04f 0300 mov.w r3, #0
|
|
800cd56: f04f 020a mov.w r2, #10
|
|
800cd5a: 4649 mov r1, r9
|
|
800cd5c: 4620 mov r0, r4
|
|
800cd5e: d105 bne.n 800cd6c <_dtoa_r+0xaa4>
|
|
800cd60: f000 fdec bl 800d93c <__multadd>
|
|
800cd64: 4681 mov r9, r0
|
|
800cd66: 4606 mov r6, r0
|
|
800cd68: 9505 str r5, [sp, #20]
|
|
800cd6a: e776 b.n 800cc5a <_dtoa_r+0x992>
|
|
800cd6c: f000 fde6 bl 800d93c <__multadd>
|
|
800cd70: 4631 mov r1, r6
|
|
800cd72: 4681 mov r9, r0
|
|
800cd74: 2300 movs r3, #0
|
|
800cd76: 220a movs r2, #10
|
|
800cd78: 4620 mov r0, r4
|
|
800cd7a: f000 fddf bl 800d93c <__multadd>
|
|
800cd7e: 4606 mov r6, r0
|
|
800cd80: e7f2 b.n 800cd68 <_dtoa_r+0xaa0>
|
|
800cd82: f04f 0900 mov.w r9, #0
|
|
800cd86: 2201 movs r2, #1
|
|
800cd88: 9904 ldr r1, [sp, #16]
|
|
800cd8a: 4620 mov r0, r4
|
|
800cd8c: f000 ff8a bl 800dca4 <__lshift>
|
|
800cd90: 4639 mov r1, r7
|
|
800cd92: 9004 str r0, [sp, #16]
|
|
800cd94: f000 ffda bl 800dd4c <__mcmp>
|
|
800cd98: 2800 cmp r0, #0
|
|
800cd9a: dcb6 bgt.n 800cd0a <_dtoa_r+0xa42>
|
|
800cd9c: d102 bne.n 800cda4 <_dtoa_r+0xadc>
|
|
800cd9e: f018 0f01 tst.w r8, #1
|
|
800cda2: d1b2 bne.n 800cd0a <_dtoa_r+0xa42>
|
|
800cda4: f815 3c01 ldrb.w r3, [r5, #-1]
|
|
800cda8: 2b30 cmp r3, #48 ; 0x30
|
|
800cdaa: f105 32ff add.w r2, r5, #4294967295
|
|
800cdae: f47f af0a bne.w 800cbc6 <_dtoa_r+0x8fe>
|
|
800cdb2: 4615 mov r5, r2
|
|
800cdb4: e7f6 b.n 800cda4 <_dtoa_r+0xadc>
|
|
800cdb6: 4593 cmp fp, r2
|
|
800cdb8: d105 bne.n 800cdc6 <_dtoa_r+0xafe>
|
|
800cdba: 2331 movs r3, #49 ; 0x31
|
|
800cdbc: f10a 0a01 add.w sl, sl, #1
|
|
800cdc0: f88b 3000 strb.w r3, [fp]
|
|
800cdc4: e6ff b.n 800cbc6 <_dtoa_r+0x8fe>
|
|
800cdc6: 4615 mov r5, r2
|
|
800cdc8: e79f b.n 800cd0a <_dtoa_r+0xa42>
|
|
800cdca: f8df b064 ldr.w fp, [pc, #100] ; 800ce30 <_dtoa_r+0xb68>
|
|
800cdce: e007 b.n 800cde0 <_dtoa_r+0xb18>
|
|
800cdd0: 9b21 ldr r3, [sp, #132] ; 0x84
|
|
800cdd2: f8df b060 ldr.w fp, [pc, #96] ; 800ce34 <_dtoa_r+0xb6c>
|
|
800cdd6: b11b cbz r3, 800cde0 <_dtoa_r+0xb18>
|
|
800cdd8: f10b 0308 add.w r3, fp, #8
|
|
800cddc: 9a21 ldr r2, [sp, #132] ; 0x84
|
|
800cdde: 6013 str r3, [r2, #0]
|
|
800cde0: 4658 mov r0, fp
|
|
800cde2: b017 add sp, #92 ; 0x5c
|
|
800cde4: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800cde8: 9b06 ldr r3, [sp, #24]
|
|
800cdea: 2b01 cmp r3, #1
|
|
800cdec: f77f ae35 ble.w 800ca5a <_dtoa_r+0x792>
|
|
800cdf0: 9b0e ldr r3, [sp, #56] ; 0x38
|
|
800cdf2: 9307 str r3, [sp, #28]
|
|
800cdf4: e649 b.n 800ca8a <_dtoa_r+0x7c2>
|
|
800cdf6: 9b02 ldr r3, [sp, #8]
|
|
800cdf8: 2b00 cmp r3, #0
|
|
800cdfa: dc03 bgt.n 800ce04 <_dtoa_r+0xb3c>
|
|
800cdfc: 9b06 ldr r3, [sp, #24]
|
|
800cdfe: 2b02 cmp r3, #2
|
|
800ce00: f73f aecc bgt.w 800cb9c <_dtoa_r+0x8d4>
|
|
800ce04: 465d mov r5, fp
|
|
800ce06: 4639 mov r1, r7
|
|
800ce08: 9804 ldr r0, [sp, #16]
|
|
800ce0a: f7ff f9cf bl 800c1ac <quorem>
|
|
800ce0e: f100 0830 add.w r8, r0, #48 ; 0x30
|
|
800ce12: f805 8b01 strb.w r8, [r5], #1
|
|
800ce16: 9a02 ldr r2, [sp, #8]
|
|
800ce18: eba5 030b sub.w r3, r5, fp
|
|
800ce1c: 429a cmp r2, r3
|
|
800ce1e: ddb0 ble.n 800cd82 <_dtoa_r+0xaba>
|
|
800ce20: 2300 movs r3, #0
|
|
800ce22: 220a movs r2, #10
|
|
800ce24: 9904 ldr r1, [sp, #16]
|
|
800ce26: 4620 mov r0, r4
|
|
800ce28: f000 fd88 bl 800d93c <__multadd>
|
|
800ce2c: 9004 str r0, [sp, #16]
|
|
800ce2e: e7ea b.n 800ce06 <_dtoa_r+0xb3e>
|
|
800ce30: 0800e948 .word 0x0800e948
|
|
800ce34: 0800e9c8 .word 0x0800e9c8
|
|
|
|
0800ce38 <__sflush_r>:
|
|
800ce38: 898a ldrh r2, [r1, #12]
|
|
800ce3a: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
800ce3e: 4605 mov r5, r0
|
|
800ce40: 0710 lsls r0, r2, #28
|
|
800ce42: 460c mov r4, r1
|
|
800ce44: d458 bmi.n 800cef8 <__sflush_r+0xc0>
|
|
800ce46: 684b ldr r3, [r1, #4]
|
|
800ce48: 2b00 cmp r3, #0
|
|
800ce4a: dc05 bgt.n 800ce58 <__sflush_r+0x20>
|
|
800ce4c: 6c0b ldr r3, [r1, #64] ; 0x40
|
|
800ce4e: 2b00 cmp r3, #0
|
|
800ce50: dc02 bgt.n 800ce58 <__sflush_r+0x20>
|
|
800ce52: 2000 movs r0, #0
|
|
800ce54: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
|
800ce58: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
|
800ce5a: 2e00 cmp r6, #0
|
|
800ce5c: d0f9 beq.n 800ce52 <__sflush_r+0x1a>
|
|
800ce5e: 2300 movs r3, #0
|
|
800ce60: f412 5280 ands.w r2, r2, #4096 ; 0x1000
|
|
800ce64: 682f ldr r7, [r5, #0]
|
|
800ce66: 6a21 ldr r1, [r4, #32]
|
|
800ce68: 602b str r3, [r5, #0]
|
|
800ce6a: d032 beq.n 800ced2 <__sflush_r+0x9a>
|
|
800ce6c: 6d60 ldr r0, [r4, #84] ; 0x54
|
|
800ce6e: 89a3 ldrh r3, [r4, #12]
|
|
800ce70: 075a lsls r2, r3, #29
|
|
800ce72: d505 bpl.n 800ce80 <__sflush_r+0x48>
|
|
800ce74: 6863 ldr r3, [r4, #4]
|
|
800ce76: 1ac0 subs r0, r0, r3
|
|
800ce78: 6b63 ldr r3, [r4, #52] ; 0x34
|
|
800ce7a: b10b cbz r3, 800ce80 <__sflush_r+0x48>
|
|
800ce7c: 6c23 ldr r3, [r4, #64] ; 0x40
|
|
800ce7e: 1ac0 subs r0, r0, r3
|
|
800ce80: 2300 movs r3, #0
|
|
800ce82: 4602 mov r2, r0
|
|
800ce84: 6ae6 ldr r6, [r4, #44] ; 0x2c
|
|
800ce86: 6a21 ldr r1, [r4, #32]
|
|
800ce88: 4628 mov r0, r5
|
|
800ce8a: 47b0 blx r6
|
|
800ce8c: 1c43 adds r3, r0, #1
|
|
800ce8e: 89a3 ldrh r3, [r4, #12]
|
|
800ce90: d106 bne.n 800cea0 <__sflush_r+0x68>
|
|
800ce92: 6829 ldr r1, [r5, #0]
|
|
800ce94: 291d cmp r1, #29
|
|
800ce96: d848 bhi.n 800cf2a <__sflush_r+0xf2>
|
|
800ce98: 4a29 ldr r2, [pc, #164] ; (800cf40 <__sflush_r+0x108>)
|
|
800ce9a: 40ca lsrs r2, r1
|
|
800ce9c: 07d6 lsls r6, r2, #31
|
|
800ce9e: d544 bpl.n 800cf2a <__sflush_r+0xf2>
|
|
800cea0: 2200 movs r2, #0
|
|
800cea2: 6062 str r2, [r4, #4]
|
|
800cea4: 04d9 lsls r1, r3, #19
|
|
800cea6: 6922 ldr r2, [r4, #16]
|
|
800cea8: 6022 str r2, [r4, #0]
|
|
800ceaa: d504 bpl.n 800ceb6 <__sflush_r+0x7e>
|
|
800ceac: 1c42 adds r2, r0, #1
|
|
800ceae: d101 bne.n 800ceb4 <__sflush_r+0x7c>
|
|
800ceb0: 682b ldr r3, [r5, #0]
|
|
800ceb2: b903 cbnz r3, 800ceb6 <__sflush_r+0x7e>
|
|
800ceb4: 6560 str r0, [r4, #84] ; 0x54
|
|
800ceb6: 6b61 ldr r1, [r4, #52] ; 0x34
|
|
800ceb8: 602f str r7, [r5, #0]
|
|
800ceba: 2900 cmp r1, #0
|
|
800cebc: d0c9 beq.n 800ce52 <__sflush_r+0x1a>
|
|
800cebe: f104 0344 add.w r3, r4, #68 ; 0x44
|
|
800cec2: 4299 cmp r1, r3
|
|
800cec4: d002 beq.n 800cecc <__sflush_r+0x94>
|
|
800cec6: 4628 mov r0, r5
|
|
800cec8: f7fd fa6a bl 800a3a0 <_free_r>
|
|
800cecc: 2000 movs r0, #0
|
|
800cece: 6360 str r0, [r4, #52] ; 0x34
|
|
800ced0: e7c0 b.n 800ce54 <__sflush_r+0x1c>
|
|
800ced2: 2301 movs r3, #1
|
|
800ced4: 4628 mov r0, r5
|
|
800ced6: 47b0 blx r6
|
|
800ced8: 1c41 adds r1, r0, #1
|
|
800ceda: d1c8 bne.n 800ce6e <__sflush_r+0x36>
|
|
800cedc: 682b ldr r3, [r5, #0]
|
|
800cede: 2b00 cmp r3, #0
|
|
800cee0: d0c5 beq.n 800ce6e <__sflush_r+0x36>
|
|
800cee2: 2b1d cmp r3, #29
|
|
800cee4: d001 beq.n 800ceea <__sflush_r+0xb2>
|
|
800cee6: 2b16 cmp r3, #22
|
|
800cee8: d101 bne.n 800ceee <__sflush_r+0xb6>
|
|
800ceea: 602f str r7, [r5, #0]
|
|
800ceec: e7b1 b.n 800ce52 <__sflush_r+0x1a>
|
|
800ceee: 89a3 ldrh r3, [r4, #12]
|
|
800cef0: f043 0340 orr.w r3, r3, #64 ; 0x40
|
|
800cef4: 81a3 strh r3, [r4, #12]
|
|
800cef6: e7ad b.n 800ce54 <__sflush_r+0x1c>
|
|
800cef8: 690f ldr r7, [r1, #16]
|
|
800cefa: 2f00 cmp r7, #0
|
|
800cefc: d0a9 beq.n 800ce52 <__sflush_r+0x1a>
|
|
800cefe: 0793 lsls r3, r2, #30
|
|
800cf00: 680e ldr r6, [r1, #0]
|
|
800cf02: bf08 it eq
|
|
800cf04: 694b ldreq r3, [r1, #20]
|
|
800cf06: 600f str r7, [r1, #0]
|
|
800cf08: bf18 it ne
|
|
800cf0a: 2300 movne r3, #0
|
|
800cf0c: eba6 0807 sub.w r8, r6, r7
|
|
800cf10: 608b str r3, [r1, #8]
|
|
800cf12: f1b8 0f00 cmp.w r8, #0
|
|
800cf16: dd9c ble.n 800ce52 <__sflush_r+0x1a>
|
|
800cf18: 4643 mov r3, r8
|
|
800cf1a: 463a mov r2, r7
|
|
800cf1c: 6a21 ldr r1, [r4, #32]
|
|
800cf1e: 6aa6 ldr r6, [r4, #40] ; 0x28
|
|
800cf20: 4628 mov r0, r5
|
|
800cf22: 47b0 blx r6
|
|
800cf24: 2800 cmp r0, #0
|
|
800cf26: dc06 bgt.n 800cf36 <__sflush_r+0xfe>
|
|
800cf28: 89a3 ldrh r3, [r4, #12]
|
|
800cf2a: f043 0340 orr.w r3, r3, #64 ; 0x40
|
|
800cf2e: 81a3 strh r3, [r4, #12]
|
|
800cf30: f04f 30ff mov.w r0, #4294967295
|
|
800cf34: e78e b.n 800ce54 <__sflush_r+0x1c>
|
|
800cf36: 4407 add r7, r0
|
|
800cf38: eba8 0800 sub.w r8, r8, r0
|
|
800cf3c: e7e9 b.n 800cf12 <__sflush_r+0xda>
|
|
800cf3e: bf00 nop
|
|
800cf40: 20400001 .word 0x20400001
|
|
|
|
0800cf44 <_fflush_r>:
|
|
800cf44: b538 push {r3, r4, r5, lr}
|
|
800cf46: 690b ldr r3, [r1, #16]
|
|
800cf48: 4605 mov r5, r0
|
|
800cf4a: 460c mov r4, r1
|
|
800cf4c: b1db cbz r3, 800cf86 <_fflush_r+0x42>
|
|
800cf4e: b118 cbz r0, 800cf58 <_fflush_r+0x14>
|
|
800cf50: 6983 ldr r3, [r0, #24]
|
|
800cf52: b90b cbnz r3, 800cf58 <_fflush_r+0x14>
|
|
800cf54: f000 f860 bl 800d018 <__sinit>
|
|
800cf58: 4b0c ldr r3, [pc, #48] ; (800cf8c <_fflush_r+0x48>)
|
|
800cf5a: 429c cmp r4, r3
|
|
800cf5c: d109 bne.n 800cf72 <_fflush_r+0x2e>
|
|
800cf5e: 686c ldr r4, [r5, #4]
|
|
800cf60: f9b4 300c ldrsh.w r3, [r4, #12]
|
|
800cf64: b17b cbz r3, 800cf86 <_fflush_r+0x42>
|
|
800cf66: 4621 mov r1, r4
|
|
800cf68: 4628 mov r0, r5
|
|
800cf6a: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
|
|
800cf6e: f7ff bf63 b.w 800ce38 <__sflush_r>
|
|
800cf72: 4b07 ldr r3, [pc, #28] ; (800cf90 <_fflush_r+0x4c>)
|
|
800cf74: 429c cmp r4, r3
|
|
800cf76: d101 bne.n 800cf7c <_fflush_r+0x38>
|
|
800cf78: 68ac ldr r4, [r5, #8]
|
|
800cf7a: e7f1 b.n 800cf60 <_fflush_r+0x1c>
|
|
800cf7c: 4b05 ldr r3, [pc, #20] ; (800cf94 <_fflush_r+0x50>)
|
|
800cf7e: 429c cmp r4, r3
|
|
800cf80: bf08 it eq
|
|
800cf82: 68ec ldreq r4, [r5, #12]
|
|
800cf84: e7ec b.n 800cf60 <_fflush_r+0x1c>
|
|
800cf86: 2000 movs r0, #0
|
|
800cf88: bd38 pop {r3, r4, r5, pc}
|
|
800cf8a: bf00 nop
|
|
800cf8c: 0800e9f8 .word 0x0800e9f8
|
|
800cf90: 0800ea18 .word 0x0800ea18
|
|
800cf94: 0800e9d8 .word 0x0800e9d8
|
|
|
|
0800cf98 <std>:
|
|
800cf98: 2300 movs r3, #0
|
|
800cf9a: b510 push {r4, lr}
|
|
800cf9c: 4604 mov r4, r0
|
|
800cf9e: e9c0 3300 strd r3, r3, [r0]
|
|
800cfa2: 6083 str r3, [r0, #8]
|
|
800cfa4: 8181 strh r1, [r0, #12]
|
|
800cfa6: 6643 str r3, [r0, #100] ; 0x64
|
|
800cfa8: 81c2 strh r2, [r0, #14]
|
|
800cfaa: e9c0 3304 strd r3, r3, [r0, #16]
|
|
800cfae: 6183 str r3, [r0, #24]
|
|
800cfb0: 4619 mov r1, r3
|
|
800cfb2: 2208 movs r2, #8
|
|
800cfb4: 305c adds r0, #92 ; 0x5c
|
|
800cfb6: f7fd f9eb bl 800a390 <memset>
|
|
800cfba: 4b05 ldr r3, [pc, #20] ; (800cfd0 <std+0x38>)
|
|
800cfbc: 6263 str r3, [r4, #36] ; 0x24
|
|
800cfbe: 4b05 ldr r3, [pc, #20] ; (800cfd4 <std+0x3c>)
|
|
800cfc0: 62a3 str r3, [r4, #40] ; 0x28
|
|
800cfc2: 4b05 ldr r3, [pc, #20] ; (800cfd8 <std+0x40>)
|
|
800cfc4: 62e3 str r3, [r4, #44] ; 0x2c
|
|
800cfc6: 4b05 ldr r3, [pc, #20] ; (800cfdc <std+0x44>)
|
|
800cfc8: 6224 str r4, [r4, #32]
|
|
800cfca: 6323 str r3, [r4, #48] ; 0x30
|
|
800cfcc: bd10 pop {r4, pc}
|
|
800cfce: bf00 nop
|
|
800cfd0: 0800e5e5 .word 0x0800e5e5
|
|
800cfd4: 0800e607 .word 0x0800e607
|
|
800cfd8: 0800e63f .word 0x0800e63f
|
|
800cfdc: 0800e663 .word 0x0800e663
|
|
|
|
0800cfe0 <_cleanup_r>:
|
|
800cfe0: 4901 ldr r1, [pc, #4] ; (800cfe8 <_cleanup_r+0x8>)
|
|
800cfe2: f000 b885 b.w 800d0f0 <_fwalk_reent>
|
|
800cfe6: bf00 nop
|
|
800cfe8: 0800cf45 .word 0x0800cf45
|
|
|
|
0800cfec <__sfmoreglue>:
|
|
800cfec: b570 push {r4, r5, r6, lr}
|
|
800cfee: 1e4a subs r2, r1, #1
|
|
800cff0: 2568 movs r5, #104 ; 0x68
|
|
800cff2: 4355 muls r5, r2
|
|
800cff4: 460e mov r6, r1
|
|
800cff6: f105 0174 add.w r1, r5, #116 ; 0x74
|
|
800cffa: f7fd fa1f bl 800a43c <_malloc_r>
|
|
800cffe: 4604 mov r4, r0
|
|
800d000: b140 cbz r0, 800d014 <__sfmoreglue+0x28>
|
|
800d002: 2100 movs r1, #0
|
|
800d004: e9c0 1600 strd r1, r6, [r0]
|
|
800d008: 300c adds r0, #12
|
|
800d00a: 60a0 str r0, [r4, #8]
|
|
800d00c: f105 0268 add.w r2, r5, #104 ; 0x68
|
|
800d010: f7fd f9be bl 800a390 <memset>
|
|
800d014: 4620 mov r0, r4
|
|
800d016: bd70 pop {r4, r5, r6, pc}
|
|
|
|
0800d018 <__sinit>:
|
|
800d018: 6983 ldr r3, [r0, #24]
|
|
800d01a: b510 push {r4, lr}
|
|
800d01c: 4604 mov r4, r0
|
|
800d01e: bb33 cbnz r3, 800d06e <__sinit+0x56>
|
|
800d020: e9c0 3312 strd r3, r3, [r0, #72] ; 0x48
|
|
800d024: 6503 str r3, [r0, #80] ; 0x50
|
|
800d026: 4b12 ldr r3, [pc, #72] ; (800d070 <__sinit+0x58>)
|
|
800d028: 4a12 ldr r2, [pc, #72] ; (800d074 <__sinit+0x5c>)
|
|
800d02a: 681b ldr r3, [r3, #0]
|
|
800d02c: 6282 str r2, [r0, #40] ; 0x28
|
|
800d02e: 4298 cmp r0, r3
|
|
800d030: bf04 itt eq
|
|
800d032: 2301 moveq r3, #1
|
|
800d034: 6183 streq r3, [r0, #24]
|
|
800d036: f000 f81f bl 800d078 <__sfp>
|
|
800d03a: 6060 str r0, [r4, #4]
|
|
800d03c: 4620 mov r0, r4
|
|
800d03e: f000 f81b bl 800d078 <__sfp>
|
|
800d042: 60a0 str r0, [r4, #8]
|
|
800d044: 4620 mov r0, r4
|
|
800d046: f000 f817 bl 800d078 <__sfp>
|
|
800d04a: 2200 movs r2, #0
|
|
800d04c: 60e0 str r0, [r4, #12]
|
|
800d04e: 2104 movs r1, #4
|
|
800d050: 6860 ldr r0, [r4, #4]
|
|
800d052: f7ff ffa1 bl 800cf98 <std>
|
|
800d056: 2201 movs r2, #1
|
|
800d058: 2109 movs r1, #9
|
|
800d05a: 68a0 ldr r0, [r4, #8]
|
|
800d05c: f7ff ff9c bl 800cf98 <std>
|
|
800d060: 2202 movs r2, #2
|
|
800d062: 2112 movs r1, #18
|
|
800d064: 68e0 ldr r0, [r4, #12]
|
|
800d066: f7ff ff97 bl 800cf98 <std>
|
|
800d06a: 2301 movs r3, #1
|
|
800d06c: 61a3 str r3, [r4, #24]
|
|
800d06e: bd10 pop {r4, pc}
|
|
800d070: 0800e934 .word 0x0800e934
|
|
800d074: 0800cfe1 .word 0x0800cfe1
|
|
|
|
0800d078 <__sfp>:
|
|
800d078: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800d07a: 4b1b ldr r3, [pc, #108] ; (800d0e8 <__sfp+0x70>)
|
|
800d07c: 681e ldr r6, [r3, #0]
|
|
800d07e: 69b3 ldr r3, [r6, #24]
|
|
800d080: 4607 mov r7, r0
|
|
800d082: b913 cbnz r3, 800d08a <__sfp+0x12>
|
|
800d084: 4630 mov r0, r6
|
|
800d086: f7ff ffc7 bl 800d018 <__sinit>
|
|
800d08a: 3648 adds r6, #72 ; 0x48
|
|
800d08c: e9d6 3401 ldrd r3, r4, [r6, #4]
|
|
800d090: 3b01 subs r3, #1
|
|
800d092: d503 bpl.n 800d09c <__sfp+0x24>
|
|
800d094: 6833 ldr r3, [r6, #0]
|
|
800d096: b133 cbz r3, 800d0a6 <__sfp+0x2e>
|
|
800d098: 6836 ldr r6, [r6, #0]
|
|
800d09a: e7f7 b.n 800d08c <__sfp+0x14>
|
|
800d09c: f9b4 500c ldrsh.w r5, [r4, #12]
|
|
800d0a0: b16d cbz r5, 800d0be <__sfp+0x46>
|
|
800d0a2: 3468 adds r4, #104 ; 0x68
|
|
800d0a4: e7f4 b.n 800d090 <__sfp+0x18>
|
|
800d0a6: 2104 movs r1, #4
|
|
800d0a8: 4638 mov r0, r7
|
|
800d0aa: f7ff ff9f bl 800cfec <__sfmoreglue>
|
|
800d0ae: 6030 str r0, [r6, #0]
|
|
800d0b0: 2800 cmp r0, #0
|
|
800d0b2: d1f1 bne.n 800d098 <__sfp+0x20>
|
|
800d0b4: 230c movs r3, #12
|
|
800d0b6: 603b str r3, [r7, #0]
|
|
800d0b8: 4604 mov r4, r0
|
|
800d0ba: 4620 mov r0, r4
|
|
800d0bc: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
800d0be: 4b0b ldr r3, [pc, #44] ; (800d0ec <__sfp+0x74>)
|
|
800d0c0: 6665 str r5, [r4, #100] ; 0x64
|
|
800d0c2: e9c4 5500 strd r5, r5, [r4]
|
|
800d0c6: 60a5 str r5, [r4, #8]
|
|
800d0c8: e9c4 3503 strd r3, r5, [r4, #12]
|
|
800d0cc: e9c4 5505 strd r5, r5, [r4, #20]
|
|
800d0d0: 2208 movs r2, #8
|
|
800d0d2: 4629 mov r1, r5
|
|
800d0d4: f104 005c add.w r0, r4, #92 ; 0x5c
|
|
800d0d8: f7fd f95a bl 800a390 <memset>
|
|
800d0dc: e9c4 550d strd r5, r5, [r4, #52] ; 0x34
|
|
800d0e0: e9c4 5512 strd r5, r5, [r4, #72] ; 0x48
|
|
800d0e4: e7e9 b.n 800d0ba <__sfp+0x42>
|
|
800d0e6: bf00 nop
|
|
800d0e8: 0800e934 .word 0x0800e934
|
|
800d0ec: ffff0001 .word 0xffff0001
|
|
|
|
0800d0f0 <_fwalk_reent>:
|
|
800d0f0: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
|
800d0f4: 4680 mov r8, r0
|
|
800d0f6: 4689 mov r9, r1
|
|
800d0f8: f100 0448 add.w r4, r0, #72 ; 0x48
|
|
800d0fc: 2600 movs r6, #0
|
|
800d0fe: b914 cbnz r4, 800d106 <_fwalk_reent+0x16>
|
|
800d100: 4630 mov r0, r6
|
|
800d102: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
800d106: e9d4 7501 ldrd r7, r5, [r4, #4]
|
|
800d10a: 3f01 subs r7, #1
|
|
800d10c: d501 bpl.n 800d112 <_fwalk_reent+0x22>
|
|
800d10e: 6824 ldr r4, [r4, #0]
|
|
800d110: e7f5 b.n 800d0fe <_fwalk_reent+0xe>
|
|
800d112: 89ab ldrh r3, [r5, #12]
|
|
800d114: 2b01 cmp r3, #1
|
|
800d116: d907 bls.n 800d128 <_fwalk_reent+0x38>
|
|
800d118: f9b5 300e ldrsh.w r3, [r5, #14]
|
|
800d11c: 3301 adds r3, #1
|
|
800d11e: d003 beq.n 800d128 <_fwalk_reent+0x38>
|
|
800d120: 4629 mov r1, r5
|
|
800d122: 4640 mov r0, r8
|
|
800d124: 47c8 blx r9
|
|
800d126: 4306 orrs r6, r0
|
|
800d128: 3568 adds r5, #104 ; 0x68
|
|
800d12a: e7ee b.n 800d10a <_fwalk_reent+0x1a>
|
|
|
|
0800d12c <rshift>:
|
|
800d12c: b5f0 push {r4, r5, r6, r7, lr}
|
|
800d12e: 6906 ldr r6, [r0, #16]
|
|
800d130: 114b asrs r3, r1, #5
|
|
800d132: 429e cmp r6, r3
|
|
800d134: f100 0414 add.w r4, r0, #20
|
|
800d138: dd30 ble.n 800d19c <rshift+0x70>
|
|
800d13a: f011 011f ands.w r1, r1, #31
|
|
800d13e: eb04 0686 add.w r6, r4, r6, lsl #2
|
|
800d142: eb04 0283 add.w r2, r4, r3, lsl #2
|
|
800d146: d108 bne.n 800d15a <rshift+0x2e>
|
|
800d148: 4621 mov r1, r4
|
|
800d14a: 42b2 cmp r2, r6
|
|
800d14c: 460b mov r3, r1
|
|
800d14e: d211 bcs.n 800d174 <rshift+0x48>
|
|
800d150: f852 3b04 ldr.w r3, [r2], #4
|
|
800d154: f841 3b04 str.w r3, [r1], #4
|
|
800d158: e7f7 b.n 800d14a <rshift+0x1e>
|
|
800d15a: f854 5023 ldr.w r5, [r4, r3, lsl #2]
|
|
800d15e: f1c1 0c20 rsb ip, r1, #32
|
|
800d162: 40cd lsrs r5, r1
|
|
800d164: 3204 adds r2, #4
|
|
800d166: 4623 mov r3, r4
|
|
800d168: 42b2 cmp r2, r6
|
|
800d16a: 4617 mov r7, r2
|
|
800d16c: d30c bcc.n 800d188 <rshift+0x5c>
|
|
800d16e: 601d str r5, [r3, #0]
|
|
800d170: b105 cbz r5, 800d174 <rshift+0x48>
|
|
800d172: 3304 adds r3, #4
|
|
800d174: 1b1a subs r2, r3, r4
|
|
800d176: 42a3 cmp r3, r4
|
|
800d178: ea4f 02a2 mov.w r2, r2, asr #2
|
|
800d17c: bf08 it eq
|
|
800d17e: 2300 moveq r3, #0
|
|
800d180: 6102 str r2, [r0, #16]
|
|
800d182: bf08 it eq
|
|
800d184: 6143 streq r3, [r0, #20]
|
|
800d186: bdf0 pop {r4, r5, r6, r7, pc}
|
|
800d188: 683f ldr r7, [r7, #0]
|
|
800d18a: fa07 f70c lsl.w r7, r7, ip
|
|
800d18e: 433d orrs r5, r7
|
|
800d190: f843 5b04 str.w r5, [r3], #4
|
|
800d194: f852 5b04 ldr.w r5, [r2], #4
|
|
800d198: 40cd lsrs r5, r1
|
|
800d19a: e7e5 b.n 800d168 <rshift+0x3c>
|
|
800d19c: 4623 mov r3, r4
|
|
800d19e: e7e9 b.n 800d174 <rshift+0x48>
|
|
|
|
0800d1a0 <__hexdig_fun>:
|
|
800d1a0: f1a0 0330 sub.w r3, r0, #48 ; 0x30
|
|
800d1a4: 2b09 cmp r3, #9
|
|
800d1a6: d802 bhi.n 800d1ae <__hexdig_fun+0xe>
|
|
800d1a8: 3820 subs r0, #32
|
|
800d1aa: b2c0 uxtb r0, r0
|
|
800d1ac: 4770 bx lr
|
|
800d1ae: f1a0 0361 sub.w r3, r0, #97 ; 0x61
|
|
800d1b2: 2b05 cmp r3, #5
|
|
800d1b4: d801 bhi.n 800d1ba <__hexdig_fun+0x1a>
|
|
800d1b6: 3847 subs r0, #71 ; 0x47
|
|
800d1b8: e7f7 b.n 800d1aa <__hexdig_fun+0xa>
|
|
800d1ba: f1a0 0341 sub.w r3, r0, #65 ; 0x41
|
|
800d1be: 2b05 cmp r3, #5
|
|
800d1c0: d801 bhi.n 800d1c6 <__hexdig_fun+0x26>
|
|
800d1c2: 3827 subs r0, #39 ; 0x27
|
|
800d1c4: e7f1 b.n 800d1aa <__hexdig_fun+0xa>
|
|
800d1c6: 2000 movs r0, #0
|
|
800d1c8: 4770 bx lr
|
|
|
|
0800d1ca <__gethex>:
|
|
800d1ca: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800d1ce: b08b sub sp, #44 ; 0x2c
|
|
800d1d0: 468a mov sl, r1
|
|
800d1d2: 9002 str r0, [sp, #8]
|
|
800d1d4: 9816 ldr r0, [sp, #88] ; 0x58
|
|
800d1d6: 9306 str r3, [sp, #24]
|
|
800d1d8: 4690 mov r8, r2
|
|
800d1da: f000 fad0 bl 800d77e <__localeconv_l>
|
|
800d1de: 6803 ldr r3, [r0, #0]
|
|
800d1e0: 9303 str r3, [sp, #12]
|
|
800d1e2: 4618 mov r0, r3
|
|
800d1e4: f7f2 fffc bl 80001e0 <strlen>
|
|
800d1e8: 9b03 ldr r3, [sp, #12]
|
|
800d1ea: 9001 str r0, [sp, #4]
|
|
800d1ec: 4403 add r3, r0
|
|
800d1ee: f04f 0b00 mov.w fp, #0
|
|
800d1f2: f813 3c01 ldrb.w r3, [r3, #-1]
|
|
800d1f6: 9307 str r3, [sp, #28]
|
|
800d1f8: f8da 3000 ldr.w r3, [sl]
|
|
800d1fc: 3302 adds r3, #2
|
|
800d1fe: 461f mov r7, r3
|
|
800d200: f813 0b01 ldrb.w r0, [r3], #1
|
|
800d204: 2830 cmp r0, #48 ; 0x30
|
|
800d206: d06c beq.n 800d2e2 <__gethex+0x118>
|
|
800d208: f7ff ffca bl 800d1a0 <__hexdig_fun>
|
|
800d20c: 4604 mov r4, r0
|
|
800d20e: 2800 cmp r0, #0
|
|
800d210: d16a bne.n 800d2e8 <__gethex+0x11e>
|
|
800d212: 9a01 ldr r2, [sp, #4]
|
|
800d214: 9903 ldr r1, [sp, #12]
|
|
800d216: 4638 mov r0, r7
|
|
800d218: f001 fa27 bl 800e66a <strncmp>
|
|
800d21c: 2800 cmp r0, #0
|
|
800d21e: d166 bne.n 800d2ee <__gethex+0x124>
|
|
800d220: 9b01 ldr r3, [sp, #4]
|
|
800d222: 5cf8 ldrb r0, [r7, r3]
|
|
800d224: 18fe adds r6, r7, r3
|
|
800d226: f7ff ffbb bl 800d1a0 <__hexdig_fun>
|
|
800d22a: 2800 cmp r0, #0
|
|
800d22c: d062 beq.n 800d2f4 <__gethex+0x12a>
|
|
800d22e: 4633 mov r3, r6
|
|
800d230: 7818 ldrb r0, [r3, #0]
|
|
800d232: 2830 cmp r0, #48 ; 0x30
|
|
800d234: 461f mov r7, r3
|
|
800d236: f103 0301 add.w r3, r3, #1
|
|
800d23a: d0f9 beq.n 800d230 <__gethex+0x66>
|
|
800d23c: f7ff ffb0 bl 800d1a0 <__hexdig_fun>
|
|
800d240: fab0 f580 clz r5, r0
|
|
800d244: 096d lsrs r5, r5, #5
|
|
800d246: 4634 mov r4, r6
|
|
800d248: f04f 0b01 mov.w fp, #1
|
|
800d24c: 463a mov r2, r7
|
|
800d24e: 4616 mov r6, r2
|
|
800d250: 3201 adds r2, #1
|
|
800d252: 7830 ldrb r0, [r6, #0]
|
|
800d254: f7ff ffa4 bl 800d1a0 <__hexdig_fun>
|
|
800d258: 2800 cmp r0, #0
|
|
800d25a: d1f8 bne.n 800d24e <__gethex+0x84>
|
|
800d25c: 9a01 ldr r2, [sp, #4]
|
|
800d25e: 9903 ldr r1, [sp, #12]
|
|
800d260: 4630 mov r0, r6
|
|
800d262: f001 fa02 bl 800e66a <strncmp>
|
|
800d266: b950 cbnz r0, 800d27e <__gethex+0xb4>
|
|
800d268: b954 cbnz r4, 800d280 <__gethex+0xb6>
|
|
800d26a: 9b01 ldr r3, [sp, #4]
|
|
800d26c: 18f4 adds r4, r6, r3
|
|
800d26e: 4622 mov r2, r4
|
|
800d270: 4616 mov r6, r2
|
|
800d272: 3201 adds r2, #1
|
|
800d274: 7830 ldrb r0, [r6, #0]
|
|
800d276: f7ff ff93 bl 800d1a0 <__hexdig_fun>
|
|
800d27a: 2800 cmp r0, #0
|
|
800d27c: d1f8 bne.n 800d270 <__gethex+0xa6>
|
|
800d27e: b10c cbz r4, 800d284 <__gethex+0xba>
|
|
800d280: 1ba4 subs r4, r4, r6
|
|
800d282: 00a4 lsls r4, r4, #2
|
|
800d284: 7833 ldrb r3, [r6, #0]
|
|
800d286: 2b50 cmp r3, #80 ; 0x50
|
|
800d288: d001 beq.n 800d28e <__gethex+0xc4>
|
|
800d28a: 2b70 cmp r3, #112 ; 0x70
|
|
800d28c: d140 bne.n 800d310 <__gethex+0x146>
|
|
800d28e: 7873 ldrb r3, [r6, #1]
|
|
800d290: 2b2b cmp r3, #43 ; 0x2b
|
|
800d292: d031 beq.n 800d2f8 <__gethex+0x12e>
|
|
800d294: 2b2d cmp r3, #45 ; 0x2d
|
|
800d296: d033 beq.n 800d300 <__gethex+0x136>
|
|
800d298: 1c71 adds r1, r6, #1
|
|
800d29a: f04f 0900 mov.w r9, #0
|
|
800d29e: 7808 ldrb r0, [r1, #0]
|
|
800d2a0: f7ff ff7e bl 800d1a0 <__hexdig_fun>
|
|
800d2a4: 1e43 subs r3, r0, #1
|
|
800d2a6: b2db uxtb r3, r3
|
|
800d2a8: 2b18 cmp r3, #24
|
|
800d2aa: d831 bhi.n 800d310 <__gethex+0x146>
|
|
800d2ac: f1a0 0210 sub.w r2, r0, #16
|
|
800d2b0: f811 0f01 ldrb.w r0, [r1, #1]!
|
|
800d2b4: f7ff ff74 bl 800d1a0 <__hexdig_fun>
|
|
800d2b8: 1e43 subs r3, r0, #1
|
|
800d2ba: b2db uxtb r3, r3
|
|
800d2bc: 2b18 cmp r3, #24
|
|
800d2be: d922 bls.n 800d306 <__gethex+0x13c>
|
|
800d2c0: f1b9 0f00 cmp.w r9, #0
|
|
800d2c4: d000 beq.n 800d2c8 <__gethex+0xfe>
|
|
800d2c6: 4252 negs r2, r2
|
|
800d2c8: 4414 add r4, r2
|
|
800d2ca: f8ca 1000 str.w r1, [sl]
|
|
800d2ce: b30d cbz r5, 800d314 <__gethex+0x14a>
|
|
800d2d0: f1bb 0f00 cmp.w fp, #0
|
|
800d2d4: bf0c ite eq
|
|
800d2d6: 2706 moveq r7, #6
|
|
800d2d8: 2700 movne r7, #0
|
|
800d2da: 4638 mov r0, r7
|
|
800d2dc: b00b add sp, #44 ; 0x2c
|
|
800d2de: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800d2e2: f10b 0b01 add.w fp, fp, #1
|
|
800d2e6: e78a b.n 800d1fe <__gethex+0x34>
|
|
800d2e8: 2500 movs r5, #0
|
|
800d2ea: 462c mov r4, r5
|
|
800d2ec: e7ae b.n 800d24c <__gethex+0x82>
|
|
800d2ee: 463e mov r6, r7
|
|
800d2f0: 2501 movs r5, #1
|
|
800d2f2: e7c7 b.n 800d284 <__gethex+0xba>
|
|
800d2f4: 4604 mov r4, r0
|
|
800d2f6: e7fb b.n 800d2f0 <__gethex+0x126>
|
|
800d2f8: f04f 0900 mov.w r9, #0
|
|
800d2fc: 1cb1 adds r1, r6, #2
|
|
800d2fe: e7ce b.n 800d29e <__gethex+0xd4>
|
|
800d300: f04f 0901 mov.w r9, #1
|
|
800d304: e7fa b.n 800d2fc <__gethex+0x132>
|
|
800d306: 230a movs r3, #10
|
|
800d308: fb03 0202 mla r2, r3, r2, r0
|
|
800d30c: 3a10 subs r2, #16
|
|
800d30e: e7cf b.n 800d2b0 <__gethex+0xe6>
|
|
800d310: 4631 mov r1, r6
|
|
800d312: e7da b.n 800d2ca <__gethex+0x100>
|
|
800d314: 1bf3 subs r3, r6, r7
|
|
800d316: 3b01 subs r3, #1
|
|
800d318: 4629 mov r1, r5
|
|
800d31a: 2b07 cmp r3, #7
|
|
800d31c: dc49 bgt.n 800d3b2 <__gethex+0x1e8>
|
|
800d31e: 9802 ldr r0, [sp, #8]
|
|
800d320: f000 fac1 bl 800d8a6 <_Balloc>
|
|
800d324: 9b01 ldr r3, [sp, #4]
|
|
800d326: f100 0914 add.w r9, r0, #20
|
|
800d32a: f04f 0b00 mov.w fp, #0
|
|
800d32e: f1c3 0301 rsb r3, r3, #1
|
|
800d332: 4605 mov r5, r0
|
|
800d334: f8cd 9010 str.w r9, [sp, #16]
|
|
800d338: 46da mov sl, fp
|
|
800d33a: 9308 str r3, [sp, #32]
|
|
800d33c: 42b7 cmp r7, r6
|
|
800d33e: d33b bcc.n 800d3b8 <__gethex+0x1ee>
|
|
800d340: 9804 ldr r0, [sp, #16]
|
|
800d342: f840 ab04 str.w sl, [r0], #4
|
|
800d346: eba0 0009 sub.w r0, r0, r9
|
|
800d34a: 1080 asrs r0, r0, #2
|
|
800d34c: 6128 str r0, [r5, #16]
|
|
800d34e: 0147 lsls r7, r0, #5
|
|
800d350: 4650 mov r0, sl
|
|
800d352: f000 fb6c bl 800da2e <__hi0bits>
|
|
800d356: f8d8 6000 ldr.w r6, [r8]
|
|
800d35a: 1a3f subs r7, r7, r0
|
|
800d35c: 42b7 cmp r7, r6
|
|
800d35e: dd64 ble.n 800d42a <__gethex+0x260>
|
|
800d360: 1bbf subs r7, r7, r6
|
|
800d362: 4639 mov r1, r7
|
|
800d364: 4628 mov r0, r5
|
|
800d366: f000 fe7b bl 800e060 <__any_on>
|
|
800d36a: 4682 mov sl, r0
|
|
800d36c: b178 cbz r0, 800d38e <__gethex+0x1c4>
|
|
800d36e: 1e7b subs r3, r7, #1
|
|
800d370: 1159 asrs r1, r3, #5
|
|
800d372: f003 021f and.w r2, r3, #31
|
|
800d376: f04f 0a01 mov.w sl, #1
|
|
800d37a: f859 1021 ldr.w r1, [r9, r1, lsl #2]
|
|
800d37e: fa0a f202 lsl.w r2, sl, r2
|
|
800d382: 420a tst r2, r1
|
|
800d384: d003 beq.n 800d38e <__gethex+0x1c4>
|
|
800d386: 4553 cmp r3, sl
|
|
800d388: dc46 bgt.n 800d418 <__gethex+0x24e>
|
|
800d38a: f04f 0a02 mov.w sl, #2
|
|
800d38e: 4639 mov r1, r7
|
|
800d390: 4628 mov r0, r5
|
|
800d392: f7ff fecb bl 800d12c <rshift>
|
|
800d396: 443c add r4, r7
|
|
800d398: f8d8 3008 ldr.w r3, [r8, #8]
|
|
800d39c: 42a3 cmp r3, r4
|
|
800d39e: da52 bge.n 800d446 <__gethex+0x27c>
|
|
800d3a0: 4629 mov r1, r5
|
|
800d3a2: 9802 ldr r0, [sp, #8]
|
|
800d3a4: f000 fab3 bl 800d90e <_Bfree>
|
|
800d3a8: 9a14 ldr r2, [sp, #80] ; 0x50
|
|
800d3aa: 2300 movs r3, #0
|
|
800d3ac: 6013 str r3, [r2, #0]
|
|
800d3ae: 27a3 movs r7, #163 ; 0xa3
|
|
800d3b0: e793 b.n 800d2da <__gethex+0x110>
|
|
800d3b2: 3101 adds r1, #1
|
|
800d3b4: 105b asrs r3, r3, #1
|
|
800d3b6: e7b0 b.n 800d31a <__gethex+0x150>
|
|
800d3b8: 1e73 subs r3, r6, #1
|
|
800d3ba: 9305 str r3, [sp, #20]
|
|
800d3bc: 9a07 ldr r2, [sp, #28]
|
|
800d3be: f816 3c01 ldrb.w r3, [r6, #-1]
|
|
800d3c2: 4293 cmp r3, r2
|
|
800d3c4: d018 beq.n 800d3f8 <__gethex+0x22e>
|
|
800d3c6: f1bb 0f20 cmp.w fp, #32
|
|
800d3ca: d107 bne.n 800d3dc <__gethex+0x212>
|
|
800d3cc: 9b04 ldr r3, [sp, #16]
|
|
800d3ce: f8c3 a000 str.w sl, [r3]
|
|
800d3d2: 3304 adds r3, #4
|
|
800d3d4: f04f 0a00 mov.w sl, #0
|
|
800d3d8: 9304 str r3, [sp, #16]
|
|
800d3da: 46d3 mov fp, sl
|
|
800d3dc: f816 0c01 ldrb.w r0, [r6, #-1]
|
|
800d3e0: f7ff fede bl 800d1a0 <__hexdig_fun>
|
|
800d3e4: f000 000f and.w r0, r0, #15
|
|
800d3e8: fa00 f00b lsl.w r0, r0, fp
|
|
800d3ec: ea4a 0a00 orr.w sl, sl, r0
|
|
800d3f0: f10b 0b04 add.w fp, fp, #4
|
|
800d3f4: 9b05 ldr r3, [sp, #20]
|
|
800d3f6: e00d b.n 800d414 <__gethex+0x24a>
|
|
800d3f8: 9b05 ldr r3, [sp, #20]
|
|
800d3fa: 9a08 ldr r2, [sp, #32]
|
|
800d3fc: 4413 add r3, r2
|
|
800d3fe: 42bb cmp r3, r7
|
|
800d400: d3e1 bcc.n 800d3c6 <__gethex+0x1fc>
|
|
800d402: 4618 mov r0, r3
|
|
800d404: 9a01 ldr r2, [sp, #4]
|
|
800d406: 9903 ldr r1, [sp, #12]
|
|
800d408: 9309 str r3, [sp, #36] ; 0x24
|
|
800d40a: f001 f92e bl 800e66a <strncmp>
|
|
800d40e: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800d410: 2800 cmp r0, #0
|
|
800d412: d1d8 bne.n 800d3c6 <__gethex+0x1fc>
|
|
800d414: 461e mov r6, r3
|
|
800d416: e791 b.n 800d33c <__gethex+0x172>
|
|
800d418: 1eb9 subs r1, r7, #2
|
|
800d41a: 4628 mov r0, r5
|
|
800d41c: f000 fe20 bl 800e060 <__any_on>
|
|
800d420: 2800 cmp r0, #0
|
|
800d422: d0b2 beq.n 800d38a <__gethex+0x1c0>
|
|
800d424: f04f 0a03 mov.w sl, #3
|
|
800d428: e7b1 b.n 800d38e <__gethex+0x1c4>
|
|
800d42a: da09 bge.n 800d440 <__gethex+0x276>
|
|
800d42c: 1bf7 subs r7, r6, r7
|
|
800d42e: 4629 mov r1, r5
|
|
800d430: 463a mov r2, r7
|
|
800d432: 9802 ldr r0, [sp, #8]
|
|
800d434: f000 fc36 bl 800dca4 <__lshift>
|
|
800d438: 1be4 subs r4, r4, r7
|
|
800d43a: 4605 mov r5, r0
|
|
800d43c: f100 0914 add.w r9, r0, #20
|
|
800d440: f04f 0a00 mov.w sl, #0
|
|
800d444: e7a8 b.n 800d398 <__gethex+0x1ce>
|
|
800d446: f8d8 0004 ldr.w r0, [r8, #4]
|
|
800d44a: 42a0 cmp r0, r4
|
|
800d44c: dd6a ble.n 800d524 <__gethex+0x35a>
|
|
800d44e: 1b04 subs r4, r0, r4
|
|
800d450: 42a6 cmp r6, r4
|
|
800d452: dc2e bgt.n 800d4b2 <__gethex+0x2e8>
|
|
800d454: f8d8 300c ldr.w r3, [r8, #12]
|
|
800d458: 2b02 cmp r3, #2
|
|
800d45a: d022 beq.n 800d4a2 <__gethex+0x2d8>
|
|
800d45c: 2b03 cmp r3, #3
|
|
800d45e: d024 beq.n 800d4aa <__gethex+0x2e0>
|
|
800d460: 2b01 cmp r3, #1
|
|
800d462: d115 bne.n 800d490 <__gethex+0x2c6>
|
|
800d464: 42a6 cmp r6, r4
|
|
800d466: d113 bne.n 800d490 <__gethex+0x2c6>
|
|
800d468: 2e01 cmp r6, #1
|
|
800d46a: dc0b bgt.n 800d484 <__gethex+0x2ba>
|
|
800d46c: 9a06 ldr r2, [sp, #24]
|
|
800d46e: f8d8 3004 ldr.w r3, [r8, #4]
|
|
800d472: 6013 str r3, [r2, #0]
|
|
800d474: 2301 movs r3, #1
|
|
800d476: 612b str r3, [r5, #16]
|
|
800d478: f8c9 3000 str.w r3, [r9]
|
|
800d47c: 9b14 ldr r3, [sp, #80] ; 0x50
|
|
800d47e: 2762 movs r7, #98 ; 0x62
|
|
800d480: 601d str r5, [r3, #0]
|
|
800d482: e72a b.n 800d2da <__gethex+0x110>
|
|
800d484: 1e71 subs r1, r6, #1
|
|
800d486: 4628 mov r0, r5
|
|
800d488: f000 fdea bl 800e060 <__any_on>
|
|
800d48c: 2800 cmp r0, #0
|
|
800d48e: d1ed bne.n 800d46c <__gethex+0x2a2>
|
|
800d490: 4629 mov r1, r5
|
|
800d492: 9802 ldr r0, [sp, #8]
|
|
800d494: f000 fa3b bl 800d90e <_Bfree>
|
|
800d498: 9a14 ldr r2, [sp, #80] ; 0x50
|
|
800d49a: 2300 movs r3, #0
|
|
800d49c: 6013 str r3, [r2, #0]
|
|
800d49e: 2750 movs r7, #80 ; 0x50
|
|
800d4a0: e71b b.n 800d2da <__gethex+0x110>
|
|
800d4a2: 9b15 ldr r3, [sp, #84] ; 0x54
|
|
800d4a4: 2b00 cmp r3, #0
|
|
800d4a6: d0e1 beq.n 800d46c <__gethex+0x2a2>
|
|
800d4a8: e7f2 b.n 800d490 <__gethex+0x2c6>
|
|
800d4aa: 9b15 ldr r3, [sp, #84] ; 0x54
|
|
800d4ac: 2b00 cmp r3, #0
|
|
800d4ae: d1dd bne.n 800d46c <__gethex+0x2a2>
|
|
800d4b0: e7ee b.n 800d490 <__gethex+0x2c6>
|
|
800d4b2: 1e67 subs r7, r4, #1
|
|
800d4b4: f1ba 0f00 cmp.w sl, #0
|
|
800d4b8: d131 bne.n 800d51e <__gethex+0x354>
|
|
800d4ba: b127 cbz r7, 800d4c6 <__gethex+0x2fc>
|
|
800d4bc: 4639 mov r1, r7
|
|
800d4be: 4628 mov r0, r5
|
|
800d4c0: f000 fdce bl 800e060 <__any_on>
|
|
800d4c4: 4682 mov sl, r0
|
|
800d4c6: 117a asrs r2, r7, #5
|
|
800d4c8: 2301 movs r3, #1
|
|
800d4ca: f007 071f and.w r7, r7, #31
|
|
800d4ce: fa03 f707 lsl.w r7, r3, r7
|
|
800d4d2: f859 3022 ldr.w r3, [r9, r2, lsl #2]
|
|
800d4d6: 4621 mov r1, r4
|
|
800d4d8: 421f tst r7, r3
|
|
800d4da: 4628 mov r0, r5
|
|
800d4dc: bf18 it ne
|
|
800d4de: f04a 0a02 orrne.w sl, sl, #2
|
|
800d4e2: 1b36 subs r6, r6, r4
|
|
800d4e4: f7ff fe22 bl 800d12c <rshift>
|
|
800d4e8: f8d8 4004 ldr.w r4, [r8, #4]
|
|
800d4ec: 2702 movs r7, #2
|
|
800d4ee: f1ba 0f00 cmp.w sl, #0
|
|
800d4f2: d048 beq.n 800d586 <__gethex+0x3bc>
|
|
800d4f4: f8d8 300c ldr.w r3, [r8, #12]
|
|
800d4f8: 2b02 cmp r3, #2
|
|
800d4fa: d015 beq.n 800d528 <__gethex+0x35e>
|
|
800d4fc: 2b03 cmp r3, #3
|
|
800d4fe: d017 beq.n 800d530 <__gethex+0x366>
|
|
800d500: 2b01 cmp r3, #1
|
|
800d502: d109 bne.n 800d518 <__gethex+0x34e>
|
|
800d504: f01a 0f02 tst.w sl, #2
|
|
800d508: d006 beq.n 800d518 <__gethex+0x34e>
|
|
800d50a: f8d9 3000 ldr.w r3, [r9]
|
|
800d50e: ea4a 0a03 orr.w sl, sl, r3
|
|
800d512: f01a 0f01 tst.w sl, #1
|
|
800d516: d10e bne.n 800d536 <__gethex+0x36c>
|
|
800d518: f047 0710 orr.w r7, r7, #16
|
|
800d51c: e033 b.n 800d586 <__gethex+0x3bc>
|
|
800d51e: f04f 0a01 mov.w sl, #1
|
|
800d522: e7d0 b.n 800d4c6 <__gethex+0x2fc>
|
|
800d524: 2701 movs r7, #1
|
|
800d526: e7e2 b.n 800d4ee <__gethex+0x324>
|
|
800d528: 9b15 ldr r3, [sp, #84] ; 0x54
|
|
800d52a: f1c3 0301 rsb r3, r3, #1
|
|
800d52e: 9315 str r3, [sp, #84] ; 0x54
|
|
800d530: 9b15 ldr r3, [sp, #84] ; 0x54
|
|
800d532: 2b00 cmp r3, #0
|
|
800d534: d0f0 beq.n 800d518 <__gethex+0x34e>
|
|
800d536: f8d5 9010 ldr.w r9, [r5, #16]
|
|
800d53a: f105 0314 add.w r3, r5, #20
|
|
800d53e: ea4f 0a89 mov.w sl, r9, lsl #2
|
|
800d542: eb03 010a add.w r1, r3, sl
|
|
800d546: f04f 0c00 mov.w ip, #0
|
|
800d54a: 4618 mov r0, r3
|
|
800d54c: f853 2b04 ldr.w r2, [r3], #4
|
|
800d550: f1b2 3fff cmp.w r2, #4294967295
|
|
800d554: d01c beq.n 800d590 <__gethex+0x3c6>
|
|
800d556: 3201 adds r2, #1
|
|
800d558: 6002 str r2, [r0, #0]
|
|
800d55a: 2f02 cmp r7, #2
|
|
800d55c: f105 0314 add.w r3, r5, #20
|
|
800d560: d138 bne.n 800d5d4 <__gethex+0x40a>
|
|
800d562: f8d8 2000 ldr.w r2, [r8]
|
|
800d566: 3a01 subs r2, #1
|
|
800d568: 42b2 cmp r2, r6
|
|
800d56a: d10a bne.n 800d582 <__gethex+0x3b8>
|
|
800d56c: 1171 asrs r1, r6, #5
|
|
800d56e: 2201 movs r2, #1
|
|
800d570: f006 061f and.w r6, r6, #31
|
|
800d574: f853 3021 ldr.w r3, [r3, r1, lsl #2]
|
|
800d578: fa02 f606 lsl.w r6, r2, r6
|
|
800d57c: 421e tst r6, r3
|
|
800d57e: bf18 it ne
|
|
800d580: 4617 movne r7, r2
|
|
800d582: f047 0720 orr.w r7, r7, #32
|
|
800d586: 9b14 ldr r3, [sp, #80] ; 0x50
|
|
800d588: 601d str r5, [r3, #0]
|
|
800d58a: 9b06 ldr r3, [sp, #24]
|
|
800d58c: 601c str r4, [r3, #0]
|
|
800d58e: e6a4 b.n 800d2da <__gethex+0x110>
|
|
800d590: 4299 cmp r1, r3
|
|
800d592: f843 cc04 str.w ip, [r3, #-4]
|
|
800d596: d8d8 bhi.n 800d54a <__gethex+0x380>
|
|
800d598: 68ab ldr r3, [r5, #8]
|
|
800d59a: 4599 cmp r9, r3
|
|
800d59c: db12 blt.n 800d5c4 <__gethex+0x3fa>
|
|
800d59e: 6869 ldr r1, [r5, #4]
|
|
800d5a0: 9802 ldr r0, [sp, #8]
|
|
800d5a2: 3101 adds r1, #1
|
|
800d5a4: f000 f97f bl 800d8a6 <_Balloc>
|
|
800d5a8: 692a ldr r2, [r5, #16]
|
|
800d5aa: 3202 adds r2, #2
|
|
800d5ac: f105 010c add.w r1, r5, #12
|
|
800d5b0: 4683 mov fp, r0
|
|
800d5b2: 0092 lsls r2, r2, #2
|
|
800d5b4: 300c adds r0, #12
|
|
800d5b6: f000 f969 bl 800d88c <memcpy>
|
|
800d5ba: 4629 mov r1, r5
|
|
800d5bc: 9802 ldr r0, [sp, #8]
|
|
800d5be: f000 f9a6 bl 800d90e <_Bfree>
|
|
800d5c2: 465d mov r5, fp
|
|
800d5c4: 692b ldr r3, [r5, #16]
|
|
800d5c6: 1c5a adds r2, r3, #1
|
|
800d5c8: eb05 0383 add.w r3, r5, r3, lsl #2
|
|
800d5cc: 612a str r2, [r5, #16]
|
|
800d5ce: 2201 movs r2, #1
|
|
800d5d0: 615a str r2, [r3, #20]
|
|
800d5d2: e7c2 b.n 800d55a <__gethex+0x390>
|
|
800d5d4: 692a ldr r2, [r5, #16]
|
|
800d5d6: 454a cmp r2, r9
|
|
800d5d8: dd0b ble.n 800d5f2 <__gethex+0x428>
|
|
800d5da: 2101 movs r1, #1
|
|
800d5dc: 4628 mov r0, r5
|
|
800d5de: f7ff fda5 bl 800d12c <rshift>
|
|
800d5e2: f8d8 3008 ldr.w r3, [r8, #8]
|
|
800d5e6: 3401 adds r4, #1
|
|
800d5e8: 42a3 cmp r3, r4
|
|
800d5ea: f6ff aed9 blt.w 800d3a0 <__gethex+0x1d6>
|
|
800d5ee: 2701 movs r7, #1
|
|
800d5f0: e7c7 b.n 800d582 <__gethex+0x3b8>
|
|
800d5f2: f016 061f ands.w r6, r6, #31
|
|
800d5f6: d0fa beq.n 800d5ee <__gethex+0x424>
|
|
800d5f8: 449a add sl, r3
|
|
800d5fa: f1c6 0620 rsb r6, r6, #32
|
|
800d5fe: f85a 0c04 ldr.w r0, [sl, #-4]
|
|
800d602: f000 fa14 bl 800da2e <__hi0bits>
|
|
800d606: 42b0 cmp r0, r6
|
|
800d608: dbe7 blt.n 800d5da <__gethex+0x410>
|
|
800d60a: e7f0 b.n 800d5ee <__gethex+0x424>
|
|
|
|
0800d60c <L_shift>:
|
|
800d60c: f1c2 0208 rsb r2, r2, #8
|
|
800d610: 0092 lsls r2, r2, #2
|
|
800d612: b570 push {r4, r5, r6, lr}
|
|
800d614: f1c2 0620 rsb r6, r2, #32
|
|
800d618: 6843 ldr r3, [r0, #4]
|
|
800d61a: 6804 ldr r4, [r0, #0]
|
|
800d61c: fa03 f506 lsl.w r5, r3, r6
|
|
800d620: 432c orrs r4, r5
|
|
800d622: 40d3 lsrs r3, r2
|
|
800d624: 6004 str r4, [r0, #0]
|
|
800d626: f840 3f04 str.w r3, [r0, #4]!
|
|
800d62a: 4288 cmp r0, r1
|
|
800d62c: d3f4 bcc.n 800d618 <L_shift+0xc>
|
|
800d62e: bd70 pop {r4, r5, r6, pc}
|
|
|
|
0800d630 <__match>:
|
|
800d630: b530 push {r4, r5, lr}
|
|
800d632: 6803 ldr r3, [r0, #0]
|
|
800d634: 3301 adds r3, #1
|
|
800d636: f811 4b01 ldrb.w r4, [r1], #1
|
|
800d63a: b914 cbnz r4, 800d642 <__match+0x12>
|
|
800d63c: 6003 str r3, [r0, #0]
|
|
800d63e: 2001 movs r0, #1
|
|
800d640: bd30 pop {r4, r5, pc}
|
|
800d642: f813 2b01 ldrb.w r2, [r3], #1
|
|
800d646: f1a2 0541 sub.w r5, r2, #65 ; 0x41
|
|
800d64a: 2d19 cmp r5, #25
|
|
800d64c: bf98 it ls
|
|
800d64e: 3220 addls r2, #32
|
|
800d650: 42a2 cmp r2, r4
|
|
800d652: d0f0 beq.n 800d636 <__match+0x6>
|
|
800d654: 2000 movs r0, #0
|
|
800d656: e7f3 b.n 800d640 <__match+0x10>
|
|
|
|
0800d658 <__hexnan>:
|
|
800d658: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800d65c: 680b ldr r3, [r1, #0]
|
|
800d65e: 6801 ldr r1, [r0, #0]
|
|
800d660: 115f asrs r7, r3, #5
|
|
800d662: eb02 0787 add.w r7, r2, r7, lsl #2
|
|
800d666: f013 031f ands.w r3, r3, #31
|
|
800d66a: b087 sub sp, #28
|
|
800d66c: bf18 it ne
|
|
800d66e: 3704 addne r7, #4
|
|
800d670: 2500 movs r5, #0
|
|
800d672: 1f3e subs r6, r7, #4
|
|
800d674: 4682 mov sl, r0
|
|
800d676: 4690 mov r8, r2
|
|
800d678: 9301 str r3, [sp, #4]
|
|
800d67a: f847 5c04 str.w r5, [r7, #-4]
|
|
800d67e: 46b1 mov r9, r6
|
|
800d680: 4634 mov r4, r6
|
|
800d682: 9502 str r5, [sp, #8]
|
|
800d684: 46ab mov fp, r5
|
|
800d686: 784a ldrb r2, [r1, #1]
|
|
800d688: 1c4b adds r3, r1, #1
|
|
800d68a: 9303 str r3, [sp, #12]
|
|
800d68c: b342 cbz r2, 800d6e0 <__hexnan+0x88>
|
|
800d68e: 4610 mov r0, r2
|
|
800d690: 9105 str r1, [sp, #20]
|
|
800d692: 9204 str r2, [sp, #16]
|
|
800d694: f7ff fd84 bl 800d1a0 <__hexdig_fun>
|
|
800d698: 2800 cmp r0, #0
|
|
800d69a: d143 bne.n 800d724 <__hexnan+0xcc>
|
|
800d69c: 9a04 ldr r2, [sp, #16]
|
|
800d69e: 9905 ldr r1, [sp, #20]
|
|
800d6a0: 2a20 cmp r2, #32
|
|
800d6a2: d818 bhi.n 800d6d6 <__hexnan+0x7e>
|
|
800d6a4: 9b02 ldr r3, [sp, #8]
|
|
800d6a6: 459b cmp fp, r3
|
|
800d6a8: dd13 ble.n 800d6d2 <__hexnan+0x7a>
|
|
800d6aa: 454c cmp r4, r9
|
|
800d6ac: d206 bcs.n 800d6bc <__hexnan+0x64>
|
|
800d6ae: 2d07 cmp r5, #7
|
|
800d6b0: dc04 bgt.n 800d6bc <__hexnan+0x64>
|
|
800d6b2: 462a mov r2, r5
|
|
800d6b4: 4649 mov r1, r9
|
|
800d6b6: 4620 mov r0, r4
|
|
800d6b8: f7ff ffa8 bl 800d60c <L_shift>
|
|
800d6bc: 4544 cmp r4, r8
|
|
800d6be: d944 bls.n 800d74a <__hexnan+0xf2>
|
|
800d6c0: 2300 movs r3, #0
|
|
800d6c2: f1a4 0904 sub.w r9, r4, #4
|
|
800d6c6: f844 3c04 str.w r3, [r4, #-4]
|
|
800d6ca: f8cd b008 str.w fp, [sp, #8]
|
|
800d6ce: 464c mov r4, r9
|
|
800d6d0: 461d mov r5, r3
|
|
800d6d2: 9903 ldr r1, [sp, #12]
|
|
800d6d4: e7d7 b.n 800d686 <__hexnan+0x2e>
|
|
800d6d6: 2a29 cmp r2, #41 ; 0x29
|
|
800d6d8: d14a bne.n 800d770 <__hexnan+0x118>
|
|
800d6da: 3102 adds r1, #2
|
|
800d6dc: f8ca 1000 str.w r1, [sl]
|
|
800d6e0: f1bb 0f00 cmp.w fp, #0
|
|
800d6e4: d044 beq.n 800d770 <__hexnan+0x118>
|
|
800d6e6: 454c cmp r4, r9
|
|
800d6e8: d206 bcs.n 800d6f8 <__hexnan+0xa0>
|
|
800d6ea: 2d07 cmp r5, #7
|
|
800d6ec: dc04 bgt.n 800d6f8 <__hexnan+0xa0>
|
|
800d6ee: 462a mov r2, r5
|
|
800d6f0: 4649 mov r1, r9
|
|
800d6f2: 4620 mov r0, r4
|
|
800d6f4: f7ff ff8a bl 800d60c <L_shift>
|
|
800d6f8: 4544 cmp r4, r8
|
|
800d6fa: d928 bls.n 800d74e <__hexnan+0xf6>
|
|
800d6fc: 4643 mov r3, r8
|
|
800d6fe: f854 2b04 ldr.w r2, [r4], #4
|
|
800d702: f843 2b04 str.w r2, [r3], #4
|
|
800d706: 42a6 cmp r6, r4
|
|
800d708: d2f9 bcs.n 800d6fe <__hexnan+0xa6>
|
|
800d70a: 2200 movs r2, #0
|
|
800d70c: f843 2b04 str.w r2, [r3], #4
|
|
800d710: 429e cmp r6, r3
|
|
800d712: d2fb bcs.n 800d70c <__hexnan+0xb4>
|
|
800d714: 6833 ldr r3, [r6, #0]
|
|
800d716: b91b cbnz r3, 800d720 <__hexnan+0xc8>
|
|
800d718: 4546 cmp r6, r8
|
|
800d71a: d127 bne.n 800d76c <__hexnan+0x114>
|
|
800d71c: 2301 movs r3, #1
|
|
800d71e: 6033 str r3, [r6, #0]
|
|
800d720: 2005 movs r0, #5
|
|
800d722: e026 b.n 800d772 <__hexnan+0x11a>
|
|
800d724: 3501 adds r5, #1
|
|
800d726: 2d08 cmp r5, #8
|
|
800d728: f10b 0b01 add.w fp, fp, #1
|
|
800d72c: dd06 ble.n 800d73c <__hexnan+0xe4>
|
|
800d72e: 4544 cmp r4, r8
|
|
800d730: d9cf bls.n 800d6d2 <__hexnan+0x7a>
|
|
800d732: 2300 movs r3, #0
|
|
800d734: f844 3c04 str.w r3, [r4, #-4]
|
|
800d738: 2501 movs r5, #1
|
|
800d73a: 3c04 subs r4, #4
|
|
800d73c: 6822 ldr r2, [r4, #0]
|
|
800d73e: f000 000f and.w r0, r0, #15
|
|
800d742: ea40 1002 orr.w r0, r0, r2, lsl #4
|
|
800d746: 6020 str r0, [r4, #0]
|
|
800d748: e7c3 b.n 800d6d2 <__hexnan+0x7a>
|
|
800d74a: 2508 movs r5, #8
|
|
800d74c: e7c1 b.n 800d6d2 <__hexnan+0x7a>
|
|
800d74e: 9b01 ldr r3, [sp, #4]
|
|
800d750: 2b00 cmp r3, #0
|
|
800d752: d0df beq.n 800d714 <__hexnan+0xbc>
|
|
800d754: f04f 32ff mov.w r2, #4294967295
|
|
800d758: f1c3 0320 rsb r3, r3, #32
|
|
800d75c: fa22 f303 lsr.w r3, r2, r3
|
|
800d760: f857 2c04 ldr.w r2, [r7, #-4]
|
|
800d764: 401a ands r2, r3
|
|
800d766: f847 2c04 str.w r2, [r7, #-4]
|
|
800d76a: e7d3 b.n 800d714 <__hexnan+0xbc>
|
|
800d76c: 3e04 subs r6, #4
|
|
800d76e: e7d1 b.n 800d714 <__hexnan+0xbc>
|
|
800d770: 2004 movs r0, #4
|
|
800d772: b007 add sp, #28
|
|
800d774: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
|
|
0800d778 <__locale_ctype_ptr_l>:
|
|
800d778: f8d0 00ec ldr.w r0, [r0, #236] ; 0xec
|
|
800d77c: 4770 bx lr
|
|
|
|
0800d77e <__localeconv_l>:
|
|
800d77e: 30f0 adds r0, #240 ; 0xf0
|
|
800d780: 4770 bx lr
|
|
...
|
|
|
|
0800d784 <_localeconv_r>:
|
|
800d784: 4b04 ldr r3, [pc, #16] ; (800d798 <_localeconv_r+0x14>)
|
|
800d786: 681b ldr r3, [r3, #0]
|
|
800d788: 6a18 ldr r0, [r3, #32]
|
|
800d78a: 4b04 ldr r3, [pc, #16] ; (800d79c <_localeconv_r+0x18>)
|
|
800d78c: 2800 cmp r0, #0
|
|
800d78e: bf08 it eq
|
|
800d790: 4618 moveq r0, r3
|
|
800d792: 30f0 adds r0, #240 ; 0xf0
|
|
800d794: 4770 bx lr
|
|
800d796: bf00 nop
|
|
800d798: 2000002c .word 0x2000002c
|
|
800d79c: 20000090 .word 0x20000090
|
|
|
|
0800d7a0 <__swhatbuf_r>:
|
|
800d7a0: b570 push {r4, r5, r6, lr}
|
|
800d7a2: 460e mov r6, r1
|
|
800d7a4: f9b1 100e ldrsh.w r1, [r1, #14]
|
|
800d7a8: 2900 cmp r1, #0
|
|
800d7aa: b096 sub sp, #88 ; 0x58
|
|
800d7ac: 4614 mov r4, r2
|
|
800d7ae: 461d mov r5, r3
|
|
800d7b0: da07 bge.n 800d7c2 <__swhatbuf_r+0x22>
|
|
800d7b2: 2300 movs r3, #0
|
|
800d7b4: 602b str r3, [r5, #0]
|
|
800d7b6: 89b3 ldrh r3, [r6, #12]
|
|
800d7b8: 061a lsls r2, r3, #24
|
|
800d7ba: d410 bmi.n 800d7de <__swhatbuf_r+0x3e>
|
|
800d7bc: f44f 6380 mov.w r3, #1024 ; 0x400
|
|
800d7c0: e00e b.n 800d7e0 <__swhatbuf_r+0x40>
|
|
800d7c2: 466a mov r2, sp
|
|
800d7c4: f000 ff92 bl 800e6ec <_fstat_r>
|
|
800d7c8: 2800 cmp r0, #0
|
|
800d7ca: dbf2 blt.n 800d7b2 <__swhatbuf_r+0x12>
|
|
800d7cc: 9a01 ldr r2, [sp, #4]
|
|
800d7ce: f402 4270 and.w r2, r2, #61440 ; 0xf000
|
|
800d7d2: f5a2 5300 sub.w r3, r2, #8192 ; 0x2000
|
|
800d7d6: 425a negs r2, r3
|
|
800d7d8: 415a adcs r2, r3
|
|
800d7da: 602a str r2, [r5, #0]
|
|
800d7dc: e7ee b.n 800d7bc <__swhatbuf_r+0x1c>
|
|
800d7de: 2340 movs r3, #64 ; 0x40
|
|
800d7e0: 2000 movs r0, #0
|
|
800d7e2: 6023 str r3, [r4, #0]
|
|
800d7e4: b016 add sp, #88 ; 0x58
|
|
800d7e6: bd70 pop {r4, r5, r6, pc}
|
|
|
|
0800d7e8 <__smakebuf_r>:
|
|
800d7e8: 898b ldrh r3, [r1, #12]
|
|
800d7ea: b573 push {r0, r1, r4, r5, r6, lr}
|
|
800d7ec: 079d lsls r5, r3, #30
|
|
800d7ee: 4606 mov r6, r0
|
|
800d7f0: 460c mov r4, r1
|
|
800d7f2: d507 bpl.n 800d804 <__smakebuf_r+0x1c>
|
|
800d7f4: f104 0347 add.w r3, r4, #71 ; 0x47
|
|
800d7f8: 6023 str r3, [r4, #0]
|
|
800d7fa: 6123 str r3, [r4, #16]
|
|
800d7fc: 2301 movs r3, #1
|
|
800d7fe: 6163 str r3, [r4, #20]
|
|
800d800: b002 add sp, #8
|
|
800d802: bd70 pop {r4, r5, r6, pc}
|
|
800d804: ab01 add r3, sp, #4
|
|
800d806: 466a mov r2, sp
|
|
800d808: f7ff ffca bl 800d7a0 <__swhatbuf_r>
|
|
800d80c: 9900 ldr r1, [sp, #0]
|
|
800d80e: 4605 mov r5, r0
|
|
800d810: 4630 mov r0, r6
|
|
800d812: f7fc fe13 bl 800a43c <_malloc_r>
|
|
800d816: b948 cbnz r0, 800d82c <__smakebuf_r+0x44>
|
|
800d818: f9b4 300c ldrsh.w r3, [r4, #12]
|
|
800d81c: 059a lsls r2, r3, #22
|
|
800d81e: d4ef bmi.n 800d800 <__smakebuf_r+0x18>
|
|
800d820: f023 0303 bic.w r3, r3, #3
|
|
800d824: f043 0302 orr.w r3, r3, #2
|
|
800d828: 81a3 strh r3, [r4, #12]
|
|
800d82a: e7e3 b.n 800d7f4 <__smakebuf_r+0xc>
|
|
800d82c: 4b0d ldr r3, [pc, #52] ; (800d864 <__smakebuf_r+0x7c>)
|
|
800d82e: 62b3 str r3, [r6, #40] ; 0x28
|
|
800d830: 89a3 ldrh r3, [r4, #12]
|
|
800d832: 6020 str r0, [r4, #0]
|
|
800d834: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800d838: 81a3 strh r3, [r4, #12]
|
|
800d83a: 9b00 ldr r3, [sp, #0]
|
|
800d83c: 6163 str r3, [r4, #20]
|
|
800d83e: 9b01 ldr r3, [sp, #4]
|
|
800d840: 6120 str r0, [r4, #16]
|
|
800d842: b15b cbz r3, 800d85c <__smakebuf_r+0x74>
|
|
800d844: f9b4 100e ldrsh.w r1, [r4, #14]
|
|
800d848: 4630 mov r0, r6
|
|
800d84a: f000 ff61 bl 800e710 <_isatty_r>
|
|
800d84e: b128 cbz r0, 800d85c <__smakebuf_r+0x74>
|
|
800d850: 89a3 ldrh r3, [r4, #12]
|
|
800d852: f023 0303 bic.w r3, r3, #3
|
|
800d856: f043 0301 orr.w r3, r3, #1
|
|
800d85a: 81a3 strh r3, [r4, #12]
|
|
800d85c: 89a3 ldrh r3, [r4, #12]
|
|
800d85e: 431d orrs r5, r3
|
|
800d860: 81a5 strh r5, [r4, #12]
|
|
800d862: e7cd b.n 800d800 <__smakebuf_r+0x18>
|
|
800d864: 0800cfe1 .word 0x0800cfe1
|
|
|
|
0800d868 <__ascii_mbtowc>:
|
|
800d868: b082 sub sp, #8
|
|
800d86a: b901 cbnz r1, 800d86e <__ascii_mbtowc+0x6>
|
|
800d86c: a901 add r1, sp, #4
|
|
800d86e: b142 cbz r2, 800d882 <__ascii_mbtowc+0x1a>
|
|
800d870: b14b cbz r3, 800d886 <__ascii_mbtowc+0x1e>
|
|
800d872: 7813 ldrb r3, [r2, #0]
|
|
800d874: 600b str r3, [r1, #0]
|
|
800d876: 7812 ldrb r2, [r2, #0]
|
|
800d878: 1c10 adds r0, r2, #0
|
|
800d87a: bf18 it ne
|
|
800d87c: 2001 movne r0, #1
|
|
800d87e: b002 add sp, #8
|
|
800d880: 4770 bx lr
|
|
800d882: 4610 mov r0, r2
|
|
800d884: e7fb b.n 800d87e <__ascii_mbtowc+0x16>
|
|
800d886: f06f 0001 mvn.w r0, #1
|
|
800d88a: e7f8 b.n 800d87e <__ascii_mbtowc+0x16>
|
|
|
|
0800d88c <memcpy>:
|
|
800d88c: b510 push {r4, lr}
|
|
800d88e: 1e43 subs r3, r0, #1
|
|
800d890: 440a add r2, r1
|
|
800d892: 4291 cmp r1, r2
|
|
800d894: d100 bne.n 800d898 <memcpy+0xc>
|
|
800d896: bd10 pop {r4, pc}
|
|
800d898: f811 4b01 ldrb.w r4, [r1], #1
|
|
800d89c: f803 4f01 strb.w r4, [r3, #1]!
|
|
800d8a0: e7f7 b.n 800d892 <memcpy+0x6>
|
|
|
|
0800d8a2 <__malloc_lock>:
|
|
800d8a2: 4770 bx lr
|
|
|
|
0800d8a4 <__malloc_unlock>:
|
|
800d8a4: 4770 bx lr
|
|
|
|
0800d8a6 <_Balloc>:
|
|
800d8a6: b570 push {r4, r5, r6, lr}
|
|
800d8a8: 6a45 ldr r5, [r0, #36] ; 0x24
|
|
800d8aa: 4604 mov r4, r0
|
|
800d8ac: 460e mov r6, r1
|
|
800d8ae: b93d cbnz r5, 800d8c0 <_Balloc+0x1a>
|
|
800d8b0: 2010 movs r0, #16
|
|
800d8b2: f7fc fd5d bl 800a370 <malloc>
|
|
800d8b6: 6260 str r0, [r4, #36] ; 0x24
|
|
800d8b8: e9c0 5501 strd r5, r5, [r0, #4]
|
|
800d8bc: 6005 str r5, [r0, #0]
|
|
800d8be: 60c5 str r5, [r0, #12]
|
|
800d8c0: 6a65 ldr r5, [r4, #36] ; 0x24
|
|
800d8c2: 68eb ldr r3, [r5, #12]
|
|
800d8c4: b183 cbz r3, 800d8e8 <_Balloc+0x42>
|
|
800d8c6: 6a63 ldr r3, [r4, #36] ; 0x24
|
|
800d8c8: 68db ldr r3, [r3, #12]
|
|
800d8ca: f853 0026 ldr.w r0, [r3, r6, lsl #2]
|
|
800d8ce: b9b8 cbnz r0, 800d900 <_Balloc+0x5a>
|
|
800d8d0: 2101 movs r1, #1
|
|
800d8d2: fa01 f506 lsl.w r5, r1, r6
|
|
800d8d6: 1d6a adds r2, r5, #5
|
|
800d8d8: 0092 lsls r2, r2, #2
|
|
800d8da: 4620 mov r0, r4
|
|
800d8dc: f000 fbe1 bl 800e0a2 <_calloc_r>
|
|
800d8e0: b160 cbz r0, 800d8fc <_Balloc+0x56>
|
|
800d8e2: e9c0 6501 strd r6, r5, [r0, #4]
|
|
800d8e6: e00e b.n 800d906 <_Balloc+0x60>
|
|
800d8e8: 2221 movs r2, #33 ; 0x21
|
|
800d8ea: 2104 movs r1, #4
|
|
800d8ec: 4620 mov r0, r4
|
|
800d8ee: f000 fbd8 bl 800e0a2 <_calloc_r>
|
|
800d8f2: 6a63 ldr r3, [r4, #36] ; 0x24
|
|
800d8f4: 60e8 str r0, [r5, #12]
|
|
800d8f6: 68db ldr r3, [r3, #12]
|
|
800d8f8: 2b00 cmp r3, #0
|
|
800d8fa: d1e4 bne.n 800d8c6 <_Balloc+0x20>
|
|
800d8fc: 2000 movs r0, #0
|
|
800d8fe: bd70 pop {r4, r5, r6, pc}
|
|
800d900: 6802 ldr r2, [r0, #0]
|
|
800d902: f843 2026 str.w r2, [r3, r6, lsl #2]
|
|
800d906: 2300 movs r3, #0
|
|
800d908: e9c0 3303 strd r3, r3, [r0, #12]
|
|
800d90c: e7f7 b.n 800d8fe <_Balloc+0x58>
|
|
|
|
0800d90e <_Bfree>:
|
|
800d90e: b570 push {r4, r5, r6, lr}
|
|
800d910: 6a44 ldr r4, [r0, #36] ; 0x24
|
|
800d912: 4606 mov r6, r0
|
|
800d914: 460d mov r5, r1
|
|
800d916: b93c cbnz r4, 800d928 <_Bfree+0x1a>
|
|
800d918: 2010 movs r0, #16
|
|
800d91a: f7fc fd29 bl 800a370 <malloc>
|
|
800d91e: 6270 str r0, [r6, #36] ; 0x24
|
|
800d920: e9c0 4401 strd r4, r4, [r0, #4]
|
|
800d924: 6004 str r4, [r0, #0]
|
|
800d926: 60c4 str r4, [r0, #12]
|
|
800d928: b13d cbz r5, 800d93a <_Bfree+0x2c>
|
|
800d92a: 6a73 ldr r3, [r6, #36] ; 0x24
|
|
800d92c: 686a ldr r2, [r5, #4]
|
|
800d92e: 68db ldr r3, [r3, #12]
|
|
800d930: f853 1022 ldr.w r1, [r3, r2, lsl #2]
|
|
800d934: 6029 str r1, [r5, #0]
|
|
800d936: f843 5022 str.w r5, [r3, r2, lsl #2]
|
|
800d93a: bd70 pop {r4, r5, r6, pc}
|
|
|
|
0800d93c <__multadd>:
|
|
800d93c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
800d940: 690d ldr r5, [r1, #16]
|
|
800d942: 461f mov r7, r3
|
|
800d944: 4606 mov r6, r0
|
|
800d946: 460c mov r4, r1
|
|
800d948: f101 0c14 add.w ip, r1, #20
|
|
800d94c: 2300 movs r3, #0
|
|
800d94e: f8dc 0000 ldr.w r0, [ip]
|
|
800d952: b281 uxth r1, r0
|
|
800d954: fb02 7101 mla r1, r2, r1, r7
|
|
800d958: 0c0f lsrs r7, r1, #16
|
|
800d95a: 0c00 lsrs r0, r0, #16
|
|
800d95c: fb02 7000 mla r0, r2, r0, r7
|
|
800d960: b289 uxth r1, r1
|
|
800d962: 3301 adds r3, #1
|
|
800d964: eb01 4100 add.w r1, r1, r0, lsl #16
|
|
800d968: 429d cmp r5, r3
|
|
800d96a: ea4f 4710 mov.w r7, r0, lsr #16
|
|
800d96e: f84c 1b04 str.w r1, [ip], #4
|
|
800d972: dcec bgt.n 800d94e <__multadd+0x12>
|
|
800d974: b1d7 cbz r7, 800d9ac <__multadd+0x70>
|
|
800d976: 68a3 ldr r3, [r4, #8]
|
|
800d978: 42ab cmp r3, r5
|
|
800d97a: dc12 bgt.n 800d9a2 <__multadd+0x66>
|
|
800d97c: 6861 ldr r1, [r4, #4]
|
|
800d97e: 4630 mov r0, r6
|
|
800d980: 3101 adds r1, #1
|
|
800d982: f7ff ff90 bl 800d8a6 <_Balloc>
|
|
800d986: 6922 ldr r2, [r4, #16]
|
|
800d988: 3202 adds r2, #2
|
|
800d98a: f104 010c add.w r1, r4, #12
|
|
800d98e: 4680 mov r8, r0
|
|
800d990: 0092 lsls r2, r2, #2
|
|
800d992: 300c adds r0, #12
|
|
800d994: f7ff ff7a bl 800d88c <memcpy>
|
|
800d998: 4621 mov r1, r4
|
|
800d99a: 4630 mov r0, r6
|
|
800d99c: f7ff ffb7 bl 800d90e <_Bfree>
|
|
800d9a0: 4644 mov r4, r8
|
|
800d9a2: eb04 0385 add.w r3, r4, r5, lsl #2
|
|
800d9a6: 3501 adds r5, #1
|
|
800d9a8: 615f str r7, [r3, #20]
|
|
800d9aa: 6125 str r5, [r4, #16]
|
|
800d9ac: 4620 mov r0, r4
|
|
800d9ae: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
|
|
|
|
0800d9b2 <__s2b>:
|
|
800d9b2: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
|
800d9b6: 460c mov r4, r1
|
|
800d9b8: 4615 mov r5, r2
|
|
800d9ba: 461f mov r7, r3
|
|
800d9bc: 2209 movs r2, #9
|
|
800d9be: 3308 adds r3, #8
|
|
800d9c0: 4606 mov r6, r0
|
|
800d9c2: fb93 f3f2 sdiv r3, r3, r2
|
|
800d9c6: 2100 movs r1, #0
|
|
800d9c8: 2201 movs r2, #1
|
|
800d9ca: 429a cmp r2, r3
|
|
800d9cc: db20 blt.n 800da10 <__s2b+0x5e>
|
|
800d9ce: 4630 mov r0, r6
|
|
800d9d0: f7ff ff69 bl 800d8a6 <_Balloc>
|
|
800d9d4: 9b08 ldr r3, [sp, #32]
|
|
800d9d6: 6143 str r3, [r0, #20]
|
|
800d9d8: 2d09 cmp r5, #9
|
|
800d9da: f04f 0301 mov.w r3, #1
|
|
800d9de: 6103 str r3, [r0, #16]
|
|
800d9e0: dd19 ble.n 800da16 <__s2b+0x64>
|
|
800d9e2: f104 0809 add.w r8, r4, #9
|
|
800d9e6: 46c1 mov r9, r8
|
|
800d9e8: 442c add r4, r5
|
|
800d9ea: f819 3b01 ldrb.w r3, [r9], #1
|
|
800d9ee: 4601 mov r1, r0
|
|
800d9f0: 3b30 subs r3, #48 ; 0x30
|
|
800d9f2: 220a movs r2, #10
|
|
800d9f4: 4630 mov r0, r6
|
|
800d9f6: f7ff ffa1 bl 800d93c <__multadd>
|
|
800d9fa: 45a1 cmp r9, r4
|
|
800d9fc: d1f5 bne.n 800d9ea <__s2b+0x38>
|
|
800d9fe: eb08 0405 add.w r4, r8, r5
|
|
800da02: 3c08 subs r4, #8
|
|
800da04: 1b2d subs r5, r5, r4
|
|
800da06: 1963 adds r3, r4, r5
|
|
800da08: 42bb cmp r3, r7
|
|
800da0a: db07 blt.n 800da1c <__s2b+0x6a>
|
|
800da0c: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
800da10: 0052 lsls r2, r2, #1
|
|
800da12: 3101 adds r1, #1
|
|
800da14: e7d9 b.n 800d9ca <__s2b+0x18>
|
|
800da16: 340a adds r4, #10
|
|
800da18: 2509 movs r5, #9
|
|
800da1a: e7f3 b.n 800da04 <__s2b+0x52>
|
|
800da1c: f814 3b01 ldrb.w r3, [r4], #1
|
|
800da20: 4601 mov r1, r0
|
|
800da22: 3b30 subs r3, #48 ; 0x30
|
|
800da24: 220a movs r2, #10
|
|
800da26: 4630 mov r0, r6
|
|
800da28: f7ff ff88 bl 800d93c <__multadd>
|
|
800da2c: e7eb b.n 800da06 <__s2b+0x54>
|
|
|
|
0800da2e <__hi0bits>:
|
|
800da2e: 0c02 lsrs r2, r0, #16
|
|
800da30: 0412 lsls r2, r2, #16
|
|
800da32: 4603 mov r3, r0
|
|
800da34: b9b2 cbnz r2, 800da64 <__hi0bits+0x36>
|
|
800da36: 0403 lsls r3, r0, #16
|
|
800da38: 2010 movs r0, #16
|
|
800da3a: f013 4f7f tst.w r3, #4278190080 ; 0xff000000
|
|
800da3e: bf04 itt eq
|
|
800da40: 021b lsleq r3, r3, #8
|
|
800da42: 3008 addeq r0, #8
|
|
800da44: f013 4f70 tst.w r3, #4026531840 ; 0xf0000000
|
|
800da48: bf04 itt eq
|
|
800da4a: 011b lsleq r3, r3, #4
|
|
800da4c: 3004 addeq r0, #4
|
|
800da4e: f013 4f40 tst.w r3, #3221225472 ; 0xc0000000
|
|
800da52: bf04 itt eq
|
|
800da54: 009b lsleq r3, r3, #2
|
|
800da56: 3002 addeq r0, #2
|
|
800da58: 2b00 cmp r3, #0
|
|
800da5a: db06 blt.n 800da6a <__hi0bits+0x3c>
|
|
800da5c: 005b lsls r3, r3, #1
|
|
800da5e: d503 bpl.n 800da68 <__hi0bits+0x3a>
|
|
800da60: 3001 adds r0, #1
|
|
800da62: 4770 bx lr
|
|
800da64: 2000 movs r0, #0
|
|
800da66: e7e8 b.n 800da3a <__hi0bits+0xc>
|
|
800da68: 2020 movs r0, #32
|
|
800da6a: 4770 bx lr
|
|
|
|
0800da6c <__lo0bits>:
|
|
800da6c: 6803 ldr r3, [r0, #0]
|
|
800da6e: f013 0207 ands.w r2, r3, #7
|
|
800da72: 4601 mov r1, r0
|
|
800da74: d00b beq.n 800da8e <__lo0bits+0x22>
|
|
800da76: 07da lsls r2, r3, #31
|
|
800da78: d423 bmi.n 800dac2 <__lo0bits+0x56>
|
|
800da7a: 0798 lsls r0, r3, #30
|
|
800da7c: bf49 itett mi
|
|
800da7e: 085b lsrmi r3, r3, #1
|
|
800da80: 089b lsrpl r3, r3, #2
|
|
800da82: 2001 movmi r0, #1
|
|
800da84: 600b strmi r3, [r1, #0]
|
|
800da86: bf5c itt pl
|
|
800da88: 600b strpl r3, [r1, #0]
|
|
800da8a: 2002 movpl r0, #2
|
|
800da8c: 4770 bx lr
|
|
800da8e: b298 uxth r0, r3
|
|
800da90: b9a8 cbnz r0, 800dabe <__lo0bits+0x52>
|
|
800da92: 0c1b lsrs r3, r3, #16
|
|
800da94: 2010 movs r0, #16
|
|
800da96: f013 0fff tst.w r3, #255 ; 0xff
|
|
800da9a: bf04 itt eq
|
|
800da9c: 0a1b lsreq r3, r3, #8
|
|
800da9e: 3008 addeq r0, #8
|
|
800daa0: 071a lsls r2, r3, #28
|
|
800daa2: bf04 itt eq
|
|
800daa4: 091b lsreq r3, r3, #4
|
|
800daa6: 3004 addeq r0, #4
|
|
800daa8: 079a lsls r2, r3, #30
|
|
800daaa: bf04 itt eq
|
|
800daac: 089b lsreq r3, r3, #2
|
|
800daae: 3002 addeq r0, #2
|
|
800dab0: 07da lsls r2, r3, #31
|
|
800dab2: d402 bmi.n 800daba <__lo0bits+0x4e>
|
|
800dab4: 085b lsrs r3, r3, #1
|
|
800dab6: d006 beq.n 800dac6 <__lo0bits+0x5a>
|
|
800dab8: 3001 adds r0, #1
|
|
800daba: 600b str r3, [r1, #0]
|
|
800dabc: 4770 bx lr
|
|
800dabe: 4610 mov r0, r2
|
|
800dac0: e7e9 b.n 800da96 <__lo0bits+0x2a>
|
|
800dac2: 2000 movs r0, #0
|
|
800dac4: 4770 bx lr
|
|
800dac6: 2020 movs r0, #32
|
|
800dac8: 4770 bx lr
|
|
|
|
0800daca <__i2b>:
|
|
800daca: b510 push {r4, lr}
|
|
800dacc: 460c mov r4, r1
|
|
800dace: 2101 movs r1, #1
|
|
800dad0: f7ff fee9 bl 800d8a6 <_Balloc>
|
|
800dad4: 2201 movs r2, #1
|
|
800dad6: 6144 str r4, [r0, #20]
|
|
800dad8: 6102 str r2, [r0, #16]
|
|
800dada: bd10 pop {r4, pc}
|
|
|
|
0800dadc <__multiply>:
|
|
800dadc: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800dae0: 4614 mov r4, r2
|
|
800dae2: 690a ldr r2, [r1, #16]
|
|
800dae4: 6923 ldr r3, [r4, #16]
|
|
800dae6: 429a cmp r2, r3
|
|
800dae8: bfb8 it lt
|
|
800daea: 460b movlt r3, r1
|
|
800daec: 4688 mov r8, r1
|
|
800daee: bfbc itt lt
|
|
800daf0: 46a0 movlt r8, r4
|
|
800daf2: 461c movlt r4, r3
|
|
800daf4: f8d8 7010 ldr.w r7, [r8, #16]
|
|
800daf8: f8d4 9010 ldr.w r9, [r4, #16]
|
|
800dafc: f8d8 3008 ldr.w r3, [r8, #8]
|
|
800db00: f8d8 1004 ldr.w r1, [r8, #4]
|
|
800db04: eb07 0609 add.w r6, r7, r9
|
|
800db08: 42b3 cmp r3, r6
|
|
800db0a: bfb8 it lt
|
|
800db0c: 3101 addlt r1, #1
|
|
800db0e: f7ff feca bl 800d8a6 <_Balloc>
|
|
800db12: f100 0514 add.w r5, r0, #20
|
|
800db16: eb05 0e86 add.w lr, r5, r6, lsl #2
|
|
800db1a: 462b mov r3, r5
|
|
800db1c: 2200 movs r2, #0
|
|
800db1e: 4573 cmp r3, lr
|
|
800db20: d316 bcc.n 800db50 <__multiply+0x74>
|
|
800db22: f104 0214 add.w r2, r4, #20
|
|
800db26: f108 0114 add.w r1, r8, #20
|
|
800db2a: eb02 0389 add.w r3, r2, r9, lsl #2
|
|
800db2e: eb01 0787 add.w r7, r1, r7, lsl #2
|
|
800db32: 9300 str r3, [sp, #0]
|
|
800db34: 9b00 ldr r3, [sp, #0]
|
|
800db36: 9201 str r2, [sp, #4]
|
|
800db38: 4293 cmp r3, r2
|
|
800db3a: d80c bhi.n 800db56 <__multiply+0x7a>
|
|
800db3c: 2e00 cmp r6, #0
|
|
800db3e: dd03 ble.n 800db48 <__multiply+0x6c>
|
|
800db40: f85e 3d04 ldr.w r3, [lr, #-4]!
|
|
800db44: 2b00 cmp r3, #0
|
|
800db46: d05d beq.n 800dc04 <__multiply+0x128>
|
|
800db48: 6106 str r6, [r0, #16]
|
|
800db4a: b003 add sp, #12
|
|
800db4c: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800db50: f843 2b04 str.w r2, [r3], #4
|
|
800db54: e7e3 b.n 800db1e <__multiply+0x42>
|
|
800db56: f8b2 b000 ldrh.w fp, [r2]
|
|
800db5a: f1bb 0f00 cmp.w fp, #0
|
|
800db5e: d023 beq.n 800dba8 <__multiply+0xcc>
|
|
800db60: 4689 mov r9, r1
|
|
800db62: 46ac mov ip, r5
|
|
800db64: f04f 0800 mov.w r8, #0
|
|
800db68: f859 4b04 ldr.w r4, [r9], #4
|
|
800db6c: f8dc a000 ldr.w sl, [ip]
|
|
800db70: b2a3 uxth r3, r4
|
|
800db72: fa1f fa8a uxth.w sl, sl
|
|
800db76: fb0b a303 mla r3, fp, r3, sl
|
|
800db7a: ea4f 4a14 mov.w sl, r4, lsr #16
|
|
800db7e: f8dc 4000 ldr.w r4, [ip]
|
|
800db82: 4443 add r3, r8
|
|
800db84: ea4f 4814 mov.w r8, r4, lsr #16
|
|
800db88: fb0b 840a mla r4, fp, sl, r8
|
|
800db8c: eb04 4413 add.w r4, r4, r3, lsr #16
|
|
800db90: 46e2 mov sl, ip
|
|
800db92: b29b uxth r3, r3
|
|
800db94: ea43 4304 orr.w r3, r3, r4, lsl #16
|
|
800db98: 454f cmp r7, r9
|
|
800db9a: ea4f 4814 mov.w r8, r4, lsr #16
|
|
800db9e: f84a 3b04 str.w r3, [sl], #4
|
|
800dba2: d82b bhi.n 800dbfc <__multiply+0x120>
|
|
800dba4: f8cc 8004 str.w r8, [ip, #4]
|
|
800dba8: 9b01 ldr r3, [sp, #4]
|
|
800dbaa: f8b3 a002 ldrh.w sl, [r3, #2]
|
|
800dbae: 3204 adds r2, #4
|
|
800dbb0: f1ba 0f00 cmp.w sl, #0
|
|
800dbb4: d020 beq.n 800dbf8 <__multiply+0x11c>
|
|
800dbb6: 682b ldr r3, [r5, #0]
|
|
800dbb8: 4689 mov r9, r1
|
|
800dbba: 46a8 mov r8, r5
|
|
800dbbc: f04f 0b00 mov.w fp, #0
|
|
800dbc0: f8b9 c000 ldrh.w ip, [r9]
|
|
800dbc4: f8b8 4002 ldrh.w r4, [r8, #2]
|
|
800dbc8: fb0a 440c mla r4, sl, ip, r4
|
|
800dbcc: 445c add r4, fp
|
|
800dbce: 46c4 mov ip, r8
|
|
800dbd0: b29b uxth r3, r3
|
|
800dbd2: ea43 4304 orr.w r3, r3, r4, lsl #16
|
|
800dbd6: f84c 3b04 str.w r3, [ip], #4
|
|
800dbda: f859 3b04 ldr.w r3, [r9], #4
|
|
800dbde: f8b8 b004 ldrh.w fp, [r8, #4]
|
|
800dbe2: 0c1b lsrs r3, r3, #16
|
|
800dbe4: fb0a b303 mla r3, sl, r3, fp
|
|
800dbe8: eb03 4314 add.w r3, r3, r4, lsr #16
|
|
800dbec: 454f cmp r7, r9
|
|
800dbee: ea4f 4b13 mov.w fp, r3, lsr #16
|
|
800dbf2: d805 bhi.n 800dc00 <__multiply+0x124>
|
|
800dbf4: f8c8 3004 str.w r3, [r8, #4]
|
|
800dbf8: 3504 adds r5, #4
|
|
800dbfa: e79b b.n 800db34 <__multiply+0x58>
|
|
800dbfc: 46d4 mov ip, sl
|
|
800dbfe: e7b3 b.n 800db68 <__multiply+0x8c>
|
|
800dc00: 46e0 mov r8, ip
|
|
800dc02: e7dd b.n 800dbc0 <__multiply+0xe4>
|
|
800dc04: 3e01 subs r6, #1
|
|
800dc06: e799 b.n 800db3c <__multiply+0x60>
|
|
|
|
0800dc08 <__pow5mult>:
|
|
800dc08: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
|
|
800dc0c: 4615 mov r5, r2
|
|
800dc0e: f012 0203 ands.w r2, r2, #3
|
|
800dc12: 4606 mov r6, r0
|
|
800dc14: 460f mov r7, r1
|
|
800dc16: d007 beq.n 800dc28 <__pow5mult+0x20>
|
|
800dc18: 3a01 subs r2, #1
|
|
800dc1a: 4c21 ldr r4, [pc, #132] ; (800dca0 <__pow5mult+0x98>)
|
|
800dc1c: 2300 movs r3, #0
|
|
800dc1e: f854 2022 ldr.w r2, [r4, r2, lsl #2]
|
|
800dc22: f7ff fe8b bl 800d93c <__multadd>
|
|
800dc26: 4607 mov r7, r0
|
|
800dc28: 10ad asrs r5, r5, #2
|
|
800dc2a: d035 beq.n 800dc98 <__pow5mult+0x90>
|
|
800dc2c: 6a74 ldr r4, [r6, #36] ; 0x24
|
|
800dc2e: b93c cbnz r4, 800dc40 <__pow5mult+0x38>
|
|
800dc30: 2010 movs r0, #16
|
|
800dc32: f7fc fb9d bl 800a370 <malloc>
|
|
800dc36: 6270 str r0, [r6, #36] ; 0x24
|
|
800dc38: e9c0 4401 strd r4, r4, [r0, #4]
|
|
800dc3c: 6004 str r4, [r0, #0]
|
|
800dc3e: 60c4 str r4, [r0, #12]
|
|
800dc40: f8d6 8024 ldr.w r8, [r6, #36] ; 0x24
|
|
800dc44: f8d8 4008 ldr.w r4, [r8, #8]
|
|
800dc48: b94c cbnz r4, 800dc5e <__pow5mult+0x56>
|
|
800dc4a: f240 2171 movw r1, #625 ; 0x271
|
|
800dc4e: 4630 mov r0, r6
|
|
800dc50: f7ff ff3b bl 800daca <__i2b>
|
|
800dc54: 2300 movs r3, #0
|
|
800dc56: f8c8 0008 str.w r0, [r8, #8]
|
|
800dc5a: 4604 mov r4, r0
|
|
800dc5c: 6003 str r3, [r0, #0]
|
|
800dc5e: f04f 0800 mov.w r8, #0
|
|
800dc62: 07eb lsls r3, r5, #31
|
|
800dc64: d50a bpl.n 800dc7c <__pow5mult+0x74>
|
|
800dc66: 4639 mov r1, r7
|
|
800dc68: 4622 mov r2, r4
|
|
800dc6a: 4630 mov r0, r6
|
|
800dc6c: f7ff ff36 bl 800dadc <__multiply>
|
|
800dc70: 4639 mov r1, r7
|
|
800dc72: 4681 mov r9, r0
|
|
800dc74: 4630 mov r0, r6
|
|
800dc76: f7ff fe4a bl 800d90e <_Bfree>
|
|
800dc7a: 464f mov r7, r9
|
|
800dc7c: 106d asrs r5, r5, #1
|
|
800dc7e: d00b beq.n 800dc98 <__pow5mult+0x90>
|
|
800dc80: 6820 ldr r0, [r4, #0]
|
|
800dc82: b938 cbnz r0, 800dc94 <__pow5mult+0x8c>
|
|
800dc84: 4622 mov r2, r4
|
|
800dc86: 4621 mov r1, r4
|
|
800dc88: 4630 mov r0, r6
|
|
800dc8a: f7ff ff27 bl 800dadc <__multiply>
|
|
800dc8e: 6020 str r0, [r4, #0]
|
|
800dc90: f8c0 8000 str.w r8, [r0]
|
|
800dc94: 4604 mov r4, r0
|
|
800dc96: e7e4 b.n 800dc62 <__pow5mult+0x5a>
|
|
800dc98: 4638 mov r0, r7
|
|
800dc9a: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
|
|
800dc9e: bf00 nop
|
|
800dca0: 0800eb38 .word 0x0800eb38
|
|
|
|
0800dca4 <__lshift>:
|
|
800dca4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800dca8: 460c mov r4, r1
|
|
800dcaa: ea4f 1a62 mov.w sl, r2, asr #5
|
|
800dcae: 6923 ldr r3, [r4, #16]
|
|
800dcb0: 6849 ldr r1, [r1, #4]
|
|
800dcb2: eb0a 0903 add.w r9, sl, r3
|
|
800dcb6: 68a3 ldr r3, [r4, #8]
|
|
800dcb8: 4607 mov r7, r0
|
|
800dcba: 4616 mov r6, r2
|
|
800dcbc: f109 0501 add.w r5, r9, #1
|
|
800dcc0: 42ab cmp r3, r5
|
|
800dcc2: db32 blt.n 800dd2a <__lshift+0x86>
|
|
800dcc4: 4638 mov r0, r7
|
|
800dcc6: f7ff fdee bl 800d8a6 <_Balloc>
|
|
800dcca: 2300 movs r3, #0
|
|
800dccc: 4680 mov r8, r0
|
|
800dcce: f100 0114 add.w r1, r0, #20
|
|
800dcd2: 461a mov r2, r3
|
|
800dcd4: 4553 cmp r3, sl
|
|
800dcd6: db2b blt.n 800dd30 <__lshift+0x8c>
|
|
800dcd8: 6920 ldr r0, [r4, #16]
|
|
800dcda: ea2a 7aea bic.w sl, sl, sl, asr #31
|
|
800dcde: f104 0314 add.w r3, r4, #20
|
|
800dce2: f016 021f ands.w r2, r6, #31
|
|
800dce6: eb01 018a add.w r1, r1, sl, lsl #2
|
|
800dcea: eb03 0c80 add.w ip, r3, r0, lsl #2
|
|
800dcee: d025 beq.n 800dd3c <__lshift+0x98>
|
|
800dcf0: f1c2 0e20 rsb lr, r2, #32
|
|
800dcf4: 2000 movs r0, #0
|
|
800dcf6: 681e ldr r6, [r3, #0]
|
|
800dcf8: 468a mov sl, r1
|
|
800dcfa: 4096 lsls r6, r2
|
|
800dcfc: 4330 orrs r0, r6
|
|
800dcfe: f84a 0b04 str.w r0, [sl], #4
|
|
800dd02: f853 0b04 ldr.w r0, [r3], #4
|
|
800dd06: 459c cmp ip, r3
|
|
800dd08: fa20 f00e lsr.w r0, r0, lr
|
|
800dd0c: d814 bhi.n 800dd38 <__lshift+0x94>
|
|
800dd0e: 6048 str r0, [r1, #4]
|
|
800dd10: b108 cbz r0, 800dd16 <__lshift+0x72>
|
|
800dd12: f109 0502 add.w r5, r9, #2
|
|
800dd16: 3d01 subs r5, #1
|
|
800dd18: 4638 mov r0, r7
|
|
800dd1a: f8c8 5010 str.w r5, [r8, #16]
|
|
800dd1e: 4621 mov r1, r4
|
|
800dd20: f7ff fdf5 bl 800d90e <_Bfree>
|
|
800dd24: 4640 mov r0, r8
|
|
800dd26: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
800dd2a: 3101 adds r1, #1
|
|
800dd2c: 005b lsls r3, r3, #1
|
|
800dd2e: e7c7 b.n 800dcc0 <__lshift+0x1c>
|
|
800dd30: f841 2023 str.w r2, [r1, r3, lsl #2]
|
|
800dd34: 3301 adds r3, #1
|
|
800dd36: e7cd b.n 800dcd4 <__lshift+0x30>
|
|
800dd38: 4651 mov r1, sl
|
|
800dd3a: e7dc b.n 800dcf6 <__lshift+0x52>
|
|
800dd3c: 3904 subs r1, #4
|
|
800dd3e: f853 2b04 ldr.w r2, [r3], #4
|
|
800dd42: f841 2f04 str.w r2, [r1, #4]!
|
|
800dd46: 459c cmp ip, r3
|
|
800dd48: d8f9 bhi.n 800dd3e <__lshift+0x9a>
|
|
800dd4a: e7e4 b.n 800dd16 <__lshift+0x72>
|
|
|
|
0800dd4c <__mcmp>:
|
|
800dd4c: 6903 ldr r3, [r0, #16]
|
|
800dd4e: 690a ldr r2, [r1, #16]
|
|
800dd50: 1a9b subs r3, r3, r2
|
|
800dd52: b530 push {r4, r5, lr}
|
|
800dd54: d10c bne.n 800dd70 <__mcmp+0x24>
|
|
800dd56: 0092 lsls r2, r2, #2
|
|
800dd58: 3014 adds r0, #20
|
|
800dd5a: 3114 adds r1, #20
|
|
800dd5c: 1884 adds r4, r0, r2
|
|
800dd5e: 4411 add r1, r2
|
|
800dd60: f854 5d04 ldr.w r5, [r4, #-4]!
|
|
800dd64: f851 2d04 ldr.w r2, [r1, #-4]!
|
|
800dd68: 4295 cmp r5, r2
|
|
800dd6a: d003 beq.n 800dd74 <__mcmp+0x28>
|
|
800dd6c: d305 bcc.n 800dd7a <__mcmp+0x2e>
|
|
800dd6e: 2301 movs r3, #1
|
|
800dd70: 4618 mov r0, r3
|
|
800dd72: bd30 pop {r4, r5, pc}
|
|
800dd74: 42a0 cmp r0, r4
|
|
800dd76: d3f3 bcc.n 800dd60 <__mcmp+0x14>
|
|
800dd78: e7fa b.n 800dd70 <__mcmp+0x24>
|
|
800dd7a: f04f 33ff mov.w r3, #4294967295
|
|
800dd7e: e7f7 b.n 800dd70 <__mcmp+0x24>
|
|
|
|
0800dd80 <__mdiff>:
|
|
800dd80: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800dd84: 460d mov r5, r1
|
|
800dd86: 4607 mov r7, r0
|
|
800dd88: 4611 mov r1, r2
|
|
800dd8a: 4628 mov r0, r5
|
|
800dd8c: 4614 mov r4, r2
|
|
800dd8e: f7ff ffdd bl 800dd4c <__mcmp>
|
|
800dd92: 1e06 subs r6, r0, #0
|
|
800dd94: d108 bne.n 800dda8 <__mdiff+0x28>
|
|
800dd96: 4631 mov r1, r6
|
|
800dd98: 4638 mov r0, r7
|
|
800dd9a: f7ff fd84 bl 800d8a6 <_Balloc>
|
|
800dd9e: 2301 movs r3, #1
|
|
800dda0: e9c0 3604 strd r3, r6, [r0, #16]
|
|
800dda4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
800dda8: bfa4 itt ge
|
|
800ddaa: 4623 movge r3, r4
|
|
800ddac: 462c movge r4, r5
|
|
800ddae: 4638 mov r0, r7
|
|
800ddb0: 6861 ldr r1, [r4, #4]
|
|
800ddb2: bfa6 itte ge
|
|
800ddb4: 461d movge r5, r3
|
|
800ddb6: 2600 movge r6, #0
|
|
800ddb8: 2601 movlt r6, #1
|
|
800ddba: f7ff fd74 bl 800d8a6 <_Balloc>
|
|
800ddbe: 692b ldr r3, [r5, #16]
|
|
800ddc0: 60c6 str r6, [r0, #12]
|
|
800ddc2: 6926 ldr r6, [r4, #16]
|
|
800ddc4: f105 0914 add.w r9, r5, #20
|
|
800ddc8: f104 0214 add.w r2, r4, #20
|
|
800ddcc: eb02 0786 add.w r7, r2, r6, lsl #2
|
|
800ddd0: eb09 0883 add.w r8, r9, r3, lsl #2
|
|
800ddd4: f100 0514 add.w r5, r0, #20
|
|
800ddd8: f04f 0e00 mov.w lr, #0
|
|
800dddc: f852 ab04 ldr.w sl, [r2], #4
|
|
800dde0: f859 4b04 ldr.w r4, [r9], #4
|
|
800dde4: fa1e f18a uxtah r1, lr, sl
|
|
800dde8: b2a3 uxth r3, r4
|
|
800ddea: 1ac9 subs r1, r1, r3
|
|
800ddec: 0c23 lsrs r3, r4, #16
|
|
800ddee: ebc3 431a rsb r3, r3, sl, lsr #16
|
|
800ddf2: eb03 4321 add.w r3, r3, r1, asr #16
|
|
800ddf6: b289 uxth r1, r1
|
|
800ddf8: ea4f 4e23 mov.w lr, r3, asr #16
|
|
800ddfc: 45c8 cmp r8, r9
|
|
800ddfe: ea41 4303 orr.w r3, r1, r3, lsl #16
|
|
800de02: 4694 mov ip, r2
|
|
800de04: f845 3b04 str.w r3, [r5], #4
|
|
800de08: d8e8 bhi.n 800dddc <__mdiff+0x5c>
|
|
800de0a: 45bc cmp ip, r7
|
|
800de0c: d304 bcc.n 800de18 <__mdiff+0x98>
|
|
800de0e: f855 3d04 ldr.w r3, [r5, #-4]!
|
|
800de12: b183 cbz r3, 800de36 <__mdiff+0xb6>
|
|
800de14: 6106 str r6, [r0, #16]
|
|
800de16: e7c5 b.n 800dda4 <__mdiff+0x24>
|
|
800de18: f85c 1b04 ldr.w r1, [ip], #4
|
|
800de1c: fa1e f381 uxtah r3, lr, r1
|
|
800de20: 141a asrs r2, r3, #16
|
|
800de22: eb02 4211 add.w r2, r2, r1, lsr #16
|
|
800de26: b29b uxth r3, r3
|
|
800de28: ea43 4302 orr.w r3, r3, r2, lsl #16
|
|
800de2c: ea4f 4e22 mov.w lr, r2, asr #16
|
|
800de30: f845 3b04 str.w r3, [r5], #4
|
|
800de34: e7e9 b.n 800de0a <__mdiff+0x8a>
|
|
800de36: 3e01 subs r6, #1
|
|
800de38: e7e9 b.n 800de0e <__mdiff+0x8e>
|
|
...
|
|
|
|
0800de3c <__ulp>:
|
|
800de3c: 4b12 ldr r3, [pc, #72] ; (800de88 <__ulp+0x4c>)
|
|
800de3e: ee10 2a90 vmov r2, s1
|
|
800de42: 401a ands r2, r3
|
|
800de44: f1a2 7350 sub.w r3, r2, #54525952 ; 0x3400000
|
|
800de48: 2b00 cmp r3, #0
|
|
800de4a: dd04 ble.n 800de56 <__ulp+0x1a>
|
|
800de4c: 2000 movs r0, #0
|
|
800de4e: 4619 mov r1, r3
|
|
800de50: ec41 0b10 vmov d0, r0, r1
|
|
800de54: 4770 bx lr
|
|
800de56: 425b negs r3, r3
|
|
800de58: 151b asrs r3, r3, #20
|
|
800de5a: 2b13 cmp r3, #19
|
|
800de5c: f04f 0000 mov.w r0, #0
|
|
800de60: f04f 0100 mov.w r1, #0
|
|
800de64: dc04 bgt.n 800de70 <__ulp+0x34>
|
|
800de66: f44f 2200 mov.w r2, #524288 ; 0x80000
|
|
800de6a: fa42 f103 asr.w r1, r2, r3
|
|
800de6e: e7ef b.n 800de50 <__ulp+0x14>
|
|
800de70: 3b14 subs r3, #20
|
|
800de72: 2b1e cmp r3, #30
|
|
800de74: f04f 0201 mov.w r2, #1
|
|
800de78: bfda itte le
|
|
800de7a: f1c3 031f rsble r3, r3, #31
|
|
800de7e: fa02 f303 lslle.w r3, r2, r3
|
|
800de82: 4613 movgt r3, r2
|
|
800de84: 4618 mov r0, r3
|
|
800de86: e7e3 b.n 800de50 <__ulp+0x14>
|
|
800de88: 7ff00000 .word 0x7ff00000
|
|
|
|
0800de8c <__b2d>:
|
|
800de8c: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800de8e: 6905 ldr r5, [r0, #16]
|
|
800de90: f100 0714 add.w r7, r0, #20
|
|
800de94: eb07 0585 add.w r5, r7, r5, lsl #2
|
|
800de98: 1f2e subs r6, r5, #4
|
|
800de9a: f855 4c04 ldr.w r4, [r5, #-4]
|
|
800de9e: 4620 mov r0, r4
|
|
800dea0: f7ff fdc5 bl 800da2e <__hi0bits>
|
|
800dea4: f1c0 0320 rsb r3, r0, #32
|
|
800dea8: 280a cmp r0, #10
|
|
800deaa: 600b str r3, [r1, #0]
|
|
800deac: f8df c074 ldr.w ip, [pc, #116] ; 800df24 <__b2d+0x98>
|
|
800deb0: dc14 bgt.n 800dedc <__b2d+0x50>
|
|
800deb2: f1c0 0e0b rsb lr, r0, #11
|
|
800deb6: fa24 f10e lsr.w r1, r4, lr
|
|
800deba: 42b7 cmp r7, r6
|
|
800debc: ea41 030c orr.w r3, r1, ip
|
|
800dec0: bf34 ite cc
|
|
800dec2: f855 1c08 ldrcc.w r1, [r5, #-8]
|
|
800dec6: 2100 movcs r1, #0
|
|
800dec8: 3015 adds r0, #21
|
|
800deca: fa04 f000 lsl.w r0, r4, r0
|
|
800dece: fa21 f10e lsr.w r1, r1, lr
|
|
800ded2: ea40 0201 orr.w r2, r0, r1
|
|
800ded6: ec43 2b10 vmov d0, r2, r3
|
|
800deda: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
800dedc: 42b7 cmp r7, r6
|
|
800dede: bf3a itte cc
|
|
800dee0: f1a5 0608 subcc.w r6, r5, #8
|
|
800dee4: f855 1c08 ldrcc.w r1, [r5, #-8]
|
|
800dee8: 2100 movcs r1, #0
|
|
800deea: 380b subs r0, #11
|
|
800deec: d015 beq.n 800df1a <__b2d+0x8e>
|
|
800deee: 4084 lsls r4, r0
|
|
800def0: f1c0 0520 rsb r5, r0, #32
|
|
800def4: f044 547f orr.w r4, r4, #1069547520 ; 0x3fc00000
|
|
800def8: f444 1440 orr.w r4, r4, #3145728 ; 0x300000
|
|
800defc: 42be cmp r6, r7
|
|
800defe: fa21 fc05 lsr.w ip, r1, r5
|
|
800df02: ea44 030c orr.w r3, r4, ip
|
|
800df06: bf8c ite hi
|
|
800df08: f856 4c04 ldrhi.w r4, [r6, #-4]
|
|
800df0c: 2400 movls r4, #0
|
|
800df0e: fa01 f000 lsl.w r0, r1, r0
|
|
800df12: 40ec lsrs r4, r5
|
|
800df14: ea40 0204 orr.w r2, r0, r4
|
|
800df18: e7dd b.n 800ded6 <__b2d+0x4a>
|
|
800df1a: ea44 030c orr.w r3, r4, ip
|
|
800df1e: 460a mov r2, r1
|
|
800df20: e7d9 b.n 800ded6 <__b2d+0x4a>
|
|
800df22: bf00 nop
|
|
800df24: 3ff00000 .word 0x3ff00000
|
|
|
|
0800df28 <__d2b>:
|
|
800df28: e92d 43f7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, lr}
|
|
800df2c: 460e mov r6, r1
|
|
800df2e: 2101 movs r1, #1
|
|
800df30: ec59 8b10 vmov r8, r9, d0
|
|
800df34: 4615 mov r5, r2
|
|
800df36: f7ff fcb6 bl 800d8a6 <_Balloc>
|
|
800df3a: f3c9 540a ubfx r4, r9, #20, #11
|
|
800df3e: 4607 mov r7, r0
|
|
800df40: f3c9 0313 ubfx r3, r9, #0, #20
|
|
800df44: bb34 cbnz r4, 800df94 <__d2b+0x6c>
|
|
800df46: 9301 str r3, [sp, #4]
|
|
800df48: f1b8 0300 subs.w r3, r8, #0
|
|
800df4c: d027 beq.n 800df9e <__d2b+0x76>
|
|
800df4e: a802 add r0, sp, #8
|
|
800df50: f840 3d08 str.w r3, [r0, #-8]!
|
|
800df54: f7ff fd8a bl 800da6c <__lo0bits>
|
|
800df58: 9900 ldr r1, [sp, #0]
|
|
800df5a: b1f0 cbz r0, 800df9a <__d2b+0x72>
|
|
800df5c: 9a01 ldr r2, [sp, #4]
|
|
800df5e: f1c0 0320 rsb r3, r0, #32
|
|
800df62: fa02 f303 lsl.w r3, r2, r3
|
|
800df66: 430b orrs r3, r1
|
|
800df68: 40c2 lsrs r2, r0
|
|
800df6a: 617b str r3, [r7, #20]
|
|
800df6c: 9201 str r2, [sp, #4]
|
|
800df6e: 9b01 ldr r3, [sp, #4]
|
|
800df70: 61bb str r3, [r7, #24]
|
|
800df72: 2b00 cmp r3, #0
|
|
800df74: bf14 ite ne
|
|
800df76: 2102 movne r1, #2
|
|
800df78: 2101 moveq r1, #1
|
|
800df7a: 6139 str r1, [r7, #16]
|
|
800df7c: b1c4 cbz r4, 800dfb0 <__d2b+0x88>
|
|
800df7e: f2a4 4433 subw r4, r4, #1075 ; 0x433
|
|
800df82: 4404 add r4, r0
|
|
800df84: 6034 str r4, [r6, #0]
|
|
800df86: f1c0 0035 rsb r0, r0, #53 ; 0x35
|
|
800df8a: 6028 str r0, [r5, #0]
|
|
800df8c: 4638 mov r0, r7
|
|
800df8e: b003 add sp, #12
|
|
800df90: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
|
|
800df94: f443 1380 orr.w r3, r3, #1048576 ; 0x100000
|
|
800df98: e7d5 b.n 800df46 <__d2b+0x1e>
|
|
800df9a: 6179 str r1, [r7, #20]
|
|
800df9c: e7e7 b.n 800df6e <__d2b+0x46>
|
|
800df9e: a801 add r0, sp, #4
|
|
800dfa0: f7ff fd64 bl 800da6c <__lo0bits>
|
|
800dfa4: 9b01 ldr r3, [sp, #4]
|
|
800dfa6: 617b str r3, [r7, #20]
|
|
800dfa8: 2101 movs r1, #1
|
|
800dfaa: 6139 str r1, [r7, #16]
|
|
800dfac: 3020 adds r0, #32
|
|
800dfae: e7e5 b.n 800df7c <__d2b+0x54>
|
|
800dfb0: eb07 0381 add.w r3, r7, r1, lsl #2
|
|
800dfb4: f2a0 4032 subw r0, r0, #1074 ; 0x432
|
|
800dfb8: 6030 str r0, [r6, #0]
|
|
800dfba: 6918 ldr r0, [r3, #16]
|
|
800dfbc: f7ff fd37 bl 800da2e <__hi0bits>
|
|
800dfc0: ebc0 1041 rsb r0, r0, r1, lsl #5
|
|
800dfc4: e7e1 b.n 800df8a <__d2b+0x62>
|
|
|
|
0800dfc6 <__ratio>:
|
|
800dfc6: e92d 4ff7 stmdb sp!, {r0, r1, r2, r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800dfca: 4688 mov r8, r1
|
|
800dfcc: 4669 mov r1, sp
|
|
800dfce: 4681 mov r9, r0
|
|
800dfd0: f7ff ff5c bl 800de8c <__b2d>
|
|
800dfd4: a901 add r1, sp, #4
|
|
800dfd6: 4640 mov r0, r8
|
|
800dfd8: ec57 6b10 vmov r6, r7, d0
|
|
800dfdc: f7ff ff56 bl 800de8c <__b2d>
|
|
800dfe0: f8d9 3010 ldr.w r3, [r9, #16]
|
|
800dfe4: f8d8 2010 ldr.w r2, [r8, #16]
|
|
800dfe8: eba3 0c02 sub.w ip, r3, r2
|
|
800dfec: e9dd 3200 ldrd r3, r2, [sp]
|
|
800dff0: 1a9b subs r3, r3, r2
|
|
800dff2: eb03 134c add.w r3, r3, ip, lsl #5
|
|
800dff6: ec5b ab10 vmov sl, fp, d0
|
|
800dffa: 2b00 cmp r3, #0
|
|
800dffc: bfce itee gt
|
|
800dffe: 463a movgt r2, r7
|
|
800e000: ebc3 3303 rsble r3, r3, r3, lsl #12
|
|
800e004: 465a movle r2, fp
|
|
800e006: 4659 mov r1, fp
|
|
800e008: 463d mov r5, r7
|
|
800e00a: bfd4 ite le
|
|
800e00c: eb02 5103 addle.w r1, r2, r3, lsl #20
|
|
800e010: eb02 5503 addgt.w r5, r2, r3, lsl #20
|
|
800e014: 4630 mov r0, r6
|
|
800e016: ee10 2a10 vmov r2, s0
|
|
800e01a: 460b mov r3, r1
|
|
800e01c: 4629 mov r1, r5
|
|
800e01e: f7f2 fc1d bl 800085c <__aeabi_ddiv>
|
|
800e022: ec41 0b10 vmov d0, r0, r1
|
|
800e026: b003 add sp, #12
|
|
800e028: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
|
|
0800e02c <__copybits>:
|
|
800e02c: 3901 subs r1, #1
|
|
800e02e: b510 push {r4, lr}
|
|
800e030: 1149 asrs r1, r1, #5
|
|
800e032: 6914 ldr r4, [r2, #16]
|
|
800e034: 3101 adds r1, #1
|
|
800e036: f102 0314 add.w r3, r2, #20
|
|
800e03a: eb00 0181 add.w r1, r0, r1, lsl #2
|
|
800e03e: eb03 0484 add.w r4, r3, r4, lsl #2
|
|
800e042: 42a3 cmp r3, r4
|
|
800e044: 4602 mov r2, r0
|
|
800e046: d303 bcc.n 800e050 <__copybits+0x24>
|
|
800e048: 2300 movs r3, #0
|
|
800e04a: 428a cmp r2, r1
|
|
800e04c: d305 bcc.n 800e05a <__copybits+0x2e>
|
|
800e04e: bd10 pop {r4, pc}
|
|
800e050: f853 2b04 ldr.w r2, [r3], #4
|
|
800e054: f840 2b04 str.w r2, [r0], #4
|
|
800e058: e7f3 b.n 800e042 <__copybits+0x16>
|
|
800e05a: f842 3b04 str.w r3, [r2], #4
|
|
800e05e: e7f4 b.n 800e04a <__copybits+0x1e>
|
|
|
|
0800e060 <__any_on>:
|
|
800e060: f100 0214 add.w r2, r0, #20
|
|
800e064: 6900 ldr r0, [r0, #16]
|
|
800e066: 114b asrs r3, r1, #5
|
|
800e068: 4298 cmp r0, r3
|
|
800e06a: b510 push {r4, lr}
|
|
800e06c: db11 blt.n 800e092 <__any_on+0x32>
|
|
800e06e: dd0a ble.n 800e086 <__any_on+0x26>
|
|
800e070: f011 011f ands.w r1, r1, #31
|
|
800e074: d007 beq.n 800e086 <__any_on+0x26>
|
|
800e076: f852 4023 ldr.w r4, [r2, r3, lsl #2]
|
|
800e07a: fa24 f001 lsr.w r0, r4, r1
|
|
800e07e: fa00 f101 lsl.w r1, r0, r1
|
|
800e082: 428c cmp r4, r1
|
|
800e084: d10b bne.n 800e09e <__any_on+0x3e>
|
|
800e086: eb02 0383 add.w r3, r2, r3, lsl #2
|
|
800e08a: 4293 cmp r3, r2
|
|
800e08c: d803 bhi.n 800e096 <__any_on+0x36>
|
|
800e08e: 2000 movs r0, #0
|
|
800e090: bd10 pop {r4, pc}
|
|
800e092: 4603 mov r3, r0
|
|
800e094: e7f7 b.n 800e086 <__any_on+0x26>
|
|
800e096: f853 1d04 ldr.w r1, [r3, #-4]!
|
|
800e09a: 2900 cmp r1, #0
|
|
800e09c: d0f5 beq.n 800e08a <__any_on+0x2a>
|
|
800e09e: 2001 movs r0, #1
|
|
800e0a0: e7f6 b.n 800e090 <__any_on+0x30>
|
|
|
|
0800e0a2 <_calloc_r>:
|
|
800e0a2: b538 push {r3, r4, r5, lr}
|
|
800e0a4: fb02 f401 mul.w r4, r2, r1
|
|
800e0a8: 4621 mov r1, r4
|
|
800e0aa: f7fc f9c7 bl 800a43c <_malloc_r>
|
|
800e0ae: 4605 mov r5, r0
|
|
800e0b0: b118 cbz r0, 800e0ba <_calloc_r+0x18>
|
|
800e0b2: 4622 mov r2, r4
|
|
800e0b4: 2100 movs r1, #0
|
|
800e0b6: f7fc f96b bl 800a390 <memset>
|
|
800e0ba: 4628 mov r0, r5
|
|
800e0bc: bd38 pop {r3, r4, r5, pc}
|
|
|
|
0800e0be <__ssputs_r>:
|
|
800e0be: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
|
|
800e0c2: 688e ldr r6, [r1, #8]
|
|
800e0c4: 429e cmp r6, r3
|
|
800e0c6: 4682 mov sl, r0
|
|
800e0c8: 460c mov r4, r1
|
|
800e0ca: 4690 mov r8, r2
|
|
800e0cc: 4699 mov r9, r3
|
|
800e0ce: d837 bhi.n 800e140 <__ssputs_r+0x82>
|
|
800e0d0: 898a ldrh r2, [r1, #12]
|
|
800e0d2: f412 6f90 tst.w r2, #1152 ; 0x480
|
|
800e0d6: d031 beq.n 800e13c <__ssputs_r+0x7e>
|
|
800e0d8: 6825 ldr r5, [r4, #0]
|
|
800e0da: 6909 ldr r1, [r1, #16]
|
|
800e0dc: 1a6f subs r7, r5, r1
|
|
800e0de: 6965 ldr r5, [r4, #20]
|
|
800e0e0: 2302 movs r3, #2
|
|
800e0e2: eb05 0545 add.w r5, r5, r5, lsl #1
|
|
800e0e6: fb95 f5f3 sdiv r5, r5, r3
|
|
800e0ea: f109 0301 add.w r3, r9, #1
|
|
800e0ee: 443b add r3, r7
|
|
800e0f0: 429d cmp r5, r3
|
|
800e0f2: bf38 it cc
|
|
800e0f4: 461d movcc r5, r3
|
|
800e0f6: 0553 lsls r3, r2, #21
|
|
800e0f8: d530 bpl.n 800e15c <__ssputs_r+0x9e>
|
|
800e0fa: 4629 mov r1, r5
|
|
800e0fc: f7fc f99e bl 800a43c <_malloc_r>
|
|
800e100: 4606 mov r6, r0
|
|
800e102: b950 cbnz r0, 800e11a <__ssputs_r+0x5c>
|
|
800e104: 230c movs r3, #12
|
|
800e106: f8ca 3000 str.w r3, [sl]
|
|
800e10a: 89a3 ldrh r3, [r4, #12]
|
|
800e10c: f043 0340 orr.w r3, r3, #64 ; 0x40
|
|
800e110: 81a3 strh r3, [r4, #12]
|
|
800e112: f04f 30ff mov.w r0, #4294967295
|
|
800e116: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
|
|
800e11a: 463a mov r2, r7
|
|
800e11c: 6921 ldr r1, [r4, #16]
|
|
800e11e: f7ff fbb5 bl 800d88c <memcpy>
|
|
800e122: 89a3 ldrh r3, [r4, #12]
|
|
800e124: f423 6390 bic.w r3, r3, #1152 ; 0x480
|
|
800e128: f043 0380 orr.w r3, r3, #128 ; 0x80
|
|
800e12c: 81a3 strh r3, [r4, #12]
|
|
800e12e: 6126 str r6, [r4, #16]
|
|
800e130: 6165 str r5, [r4, #20]
|
|
800e132: 443e add r6, r7
|
|
800e134: 1bed subs r5, r5, r7
|
|
800e136: 6026 str r6, [r4, #0]
|
|
800e138: 60a5 str r5, [r4, #8]
|
|
800e13a: 464e mov r6, r9
|
|
800e13c: 454e cmp r6, r9
|
|
800e13e: d900 bls.n 800e142 <__ssputs_r+0x84>
|
|
800e140: 464e mov r6, r9
|
|
800e142: 4632 mov r2, r6
|
|
800e144: 4641 mov r1, r8
|
|
800e146: 6820 ldr r0, [r4, #0]
|
|
800e148: f000 fb04 bl 800e754 <memmove>
|
|
800e14c: 68a3 ldr r3, [r4, #8]
|
|
800e14e: 1b9b subs r3, r3, r6
|
|
800e150: 60a3 str r3, [r4, #8]
|
|
800e152: 6823 ldr r3, [r4, #0]
|
|
800e154: 441e add r6, r3
|
|
800e156: 6026 str r6, [r4, #0]
|
|
800e158: 2000 movs r0, #0
|
|
800e15a: e7dc b.n 800e116 <__ssputs_r+0x58>
|
|
800e15c: 462a mov r2, r5
|
|
800e15e: f000 fb12 bl 800e786 <_realloc_r>
|
|
800e162: 4606 mov r6, r0
|
|
800e164: 2800 cmp r0, #0
|
|
800e166: d1e2 bne.n 800e12e <__ssputs_r+0x70>
|
|
800e168: 6921 ldr r1, [r4, #16]
|
|
800e16a: 4650 mov r0, sl
|
|
800e16c: f7fc f918 bl 800a3a0 <_free_r>
|
|
800e170: e7c8 b.n 800e104 <__ssputs_r+0x46>
|
|
...
|
|
|
|
0800e174 <_svfiprintf_r>:
|
|
800e174: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800e178: 461d mov r5, r3
|
|
800e17a: 898b ldrh r3, [r1, #12]
|
|
800e17c: 061f lsls r7, r3, #24
|
|
800e17e: b09d sub sp, #116 ; 0x74
|
|
800e180: 4680 mov r8, r0
|
|
800e182: 460c mov r4, r1
|
|
800e184: 4616 mov r6, r2
|
|
800e186: d50f bpl.n 800e1a8 <_svfiprintf_r+0x34>
|
|
800e188: 690b ldr r3, [r1, #16]
|
|
800e18a: b96b cbnz r3, 800e1a8 <_svfiprintf_r+0x34>
|
|
800e18c: 2140 movs r1, #64 ; 0x40
|
|
800e18e: f7fc f955 bl 800a43c <_malloc_r>
|
|
800e192: 6020 str r0, [r4, #0]
|
|
800e194: 6120 str r0, [r4, #16]
|
|
800e196: b928 cbnz r0, 800e1a4 <_svfiprintf_r+0x30>
|
|
800e198: 230c movs r3, #12
|
|
800e19a: f8c8 3000 str.w r3, [r8]
|
|
800e19e: f04f 30ff mov.w r0, #4294967295
|
|
800e1a2: e0c8 b.n 800e336 <_svfiprintf_r+0x1c2>
|
|
800e1a4: 2340 movs r3, #64 ; 0x40
|
|
800e1a6: 6163 str r3, [r4, #20]
|
|
800e1a8: 2300 movs r3, #0
|
|
800e1aa: 9309 str r3, [sp, #36] ; 0x24
|
|
800e1ac: 2320 movs r3, #32
|
|
800e1ae: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
|
800e1b2: 2330 movs r3, #48 ; 0x30
|
|
800e1b4: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
|
800e1b8: 9503 str r5, [sp, #12]
|
|
800e1ba: f04f 0b01 mov.w fp, #1
|
|
800e1be: 4637 mov r7, r6
|
|
800e1c0: 463d mov r5, r7
|
|
800e1c2: f815 3b01 ldrb.w r3, [r5], #1
|
|
800e1c6: b10b cbz r3, 800e1cc <_svfiprintf_r+0x58>
|
|
800e1c8: 2b25 cmp r3, #37 ; 0x25
|
|
800e1ca: d13e bne.n 800e24a <_svfiprintf_r+0xd6>
|
|
800e1cc: ebb7 0a06 subs.w sl, r7, r6
|
|
800e1d0: d00b beq.n 800e1ea <_svfiprintf_r+0x76>
|
|
800e1d2: 4653 mov r3, sl
|
|
800e1d4: 4632 mov r2, r6
|
|
800e1d6: 4621 mov r1, r4
|
|
800e1d8: 4640 mov r0, r8
|
|
800e1da: f7ff ff70 bl 800e0be <__ssputs_r>
|
|
800e1de: 3001 adds r0, #1
|
|
800e1e0: f000 80a4 beq.w 800e32c <_svfiprintf_r+0x1b8>
|
|
800e1e4: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800e1e6: 4453 add r3, sl
|
|
800e1e8: 9309 str r3, [sp, #36] ; 0x24
|
|
800e1ea: 783b ldrb r3, [r7, #0]
|
|
800e1ec: 2b00 cmp r3, #0
|
|
800e1ee: f000 809d beq.w 800e32c <_svfiprintf_r+0x1b8>
|
|
800e1f2: 2300 movs r3, #0
|
|
800e1f4: f04f 32ff mov.w r2, #4294967295
|
|
800e1f8: e9cd 2305 strd r2, r3, [sp, #20]
|
|
800e1fc: 9304 str r3, [sp, #16]
|
|
800e1fe: 9307 str r3, [sp, #28]
|
|
800e200: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
|
800e204: 931a str r3, [sp, #104] ; 0x68
|
|
800e206: 462f mov r7, r5
|
|
800e208: 2205 movs r2, #5
|
|
800e20a: f817 1b01 ldrb.w r1, [r7], #1
|
|
800e20e: 4850 ldr r0, [pc, #320] ; (800e350 <_svfiprintf_r+0x1dc>)
|
|
800e210: f7f1 ffee bl 80001f0 <memchr>
|
|
800e214: 9b04 ldr r3, [sp, #16]
|
|
800e216: b9d0 cbnz r0, 800e24e <_svfiprintf_r+0xda>
|
|
800e218: 06d9 lsls r1, r3, #27
|
|
800e21a: bf44 itt mi
|
|
800e21c: 2220 movmi r2, #32
|
|
800e21e: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
|
|
800e222: 071a lsls r2, r3, #28
|
|
800e224: bf44 itt mi
|
|
800e226: 222b movmi r2, #43 ; 0x2b
|
|
800e228: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
|
|
800e22c: 782a ldrb r2, [r5, #0]
|
|
800e22e: 2a2a cmp r2, #42 ; 0x2a
|
|
800e230: d015 beq.n 800e25e <_svfiprintf_r+0xea>
|
|
800e232: 9a07 ldr r2, [sp, #28]
|
|
800e234: 462f mov r7, r5
|
|
800e236: 2000 movs r0, #0
|
|
800e238: 250a movs r5, #10
|
|
800e23a: 4639 mov r1, r7
|
|
800e23c: f811 3b01 ldrb.w r3, [r1], #1
|
|
800e240: 3b30 subs r3, #48 ; 0x30
|
|
800e242: 2b09 cmp r3, #9
|
|
800e244: d94d bls.n 800e2e2 <_svfiprintf_r+0x16e>
|
|
800e246: b1b8 cbz r0, 800e278 <_svfiprintf_r+0x104>
|
|
800e248: e00f b.n 800e26a <_svfiprintf_r+0xf6>
|
|
800e24a: 462f mov r7, r5
|
|
800e24c: e7b8 b.n 800e1c0 <_svfiprintf_r+0x4c>
|
|
800e24e: 4a40 ldr r2, [pc, #256] ; (800e350 <_svfiprintf_r+0x1dc>)
|
|
800e250: 1a80 subs r0, r0, r2
|
|
800e252: fa0b f000 lsl.w r0, fp, r0
|
|
800e256: 4318 orrs r0, r3
|
|
800e258: 9004 str r0, [sp, #16]
|
|
800e25a: 463d mov r5, r7
|
|
800e25c: e7d3 b.n 800e206 <_svfiprintf_r+0x92>
|
|
800e25e: 9a03 ldr r2, [sp, #12]
|
|
800e260: 1d11 adds r1, r2, #4
|
|
800e262: 6812 ldr r2, [r2, #0]
|
|
800e264: 9103 str r1, [sp, #12]
|
|
800e266: 2a00 cmp r2, #0
|
|
800e268: db01 blt.n 800e26e <_svfiprintf_r+0xfa>
|
|
800e26a: 9207 str r2, [sp, #28]
|
|
800e26c: e004 b.n 800e278 <_svfiprintf_r+0x104>
|
|
800e26e: 4252 negs r2, r2
|
|
800e270: f043 0302 orr.w r3, r3, #2
|
|
800e274: 9207 str r2, [sp, #28]
|
|
800e276: 9304 str r3, [sp, #16]
|
|
800e278: 783b ldrb r3, [r7, #0]
|
|
800e27a: 2b2e cmp r3, #46 ; 0x2e
|
|
800e27c: d10c bne.n 800e298 <_svfiprintf_r+0x124>
|
|
800e27e: 787b ldrb r3, [r7, #1]
|
|
800e280: 2b2a cmp r3, #42 ; 0x2a
|
|
800e282: d133 bne.n 800e2ec <_svfiprintf_r+0x178>
|
|
800e284: 9b03 ldr r3, [sp, #12]
|
|
800e286: 1d1a adds r2, r3, #4
|
|
800e288: 681b ldr r3, [r3, #0]
|
|
800e28a: 9203 str r2, [sp, #12]
|
|
800e28c: 2b00 cmp r3, #0
|
|
800e28e: bfb8 it lt
|
|
800e290: f04f 33ff movlt.w r3, #4294967295
|
|
800e294: 3702 adds r7, #2
|
|
800e296: 9305 str r3, [sp, #20]
|
|
800e298: 4d2e ldr r5, [pc, #184] ; (800e354 <_svfiprintf_r+0x1e0>)
|
|
800e29a: 7839 ldrb r1, [r7, #0]
|
|
800e29c: 2203 movs r2, #3
|
|
800e29e: 4628 mov r0, r5
|
|
800e2a0: f7f1 ffa6 bl 80001f0 <memchr>
|
|
800e2a4: b138 cbz r0, 800e2b6 <_svfiprintf_r+0x142>
|
|
800e2a6: 2340 movs r3, #64 ; 0x40
|
|
800e2a8: 1b40 subs r0, r0, r5
|
|
800e2aa: fa03 f000 lsl.w r0, r3, r0
|
|
800e2ae: 9b04 ldr r3, [sp, #16]
|
|
800e2b0: 4303 orrs r3, r0
|
|
800e2b2: 3701 adds r7, #1
|
|
800e2b4: 9304 str r3, [sp, #16]
|
|
800e2b6: 7839 ldrb r1, [r7, #0]
|
|
800e2b8: 4827 ldr r0, [pc, #156] ; (800e358 <_svfiprintf_r+0x1e4>)
|
|
800e2ba: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
|
800e2be: 2206 movs r2, #6
|
|
800e2c0: 1c7e adds r6, r7, #1
|
|
800e2c2: f7f1 ff95 bl 80001f0 <memchr>
|
|
800e2c6: 2800 cmp r0, #0
|
|
800e2c8: d038 beq.n 800e33c <_svfiprintf_r+0x1c8>
|
|
800e2ca: 4b24 ldr r3, [pc, #144] ; (800e35c <_svfiprintf_r+0x1e8>)
|
|
800e2cc: bb13 cbnz r3, 800e314 <_svfiprintf_r+0x1a0>
|
|
800e2ce: 9b03 ldr r3, [sp, #12]
|
|
800e2d0: 3307 adds r3, #7
|
|
800e2d2: f023 0307 bic.w r3, r3, #7
|
|
800e2d6: 3308 adds r3, #8
|
|
800e2d8: 9303 str r3, [sp, #12]
|
|
800e2da: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800e2dc: 444b add r3, r9
|
|
800e2de: 9309 str r3, [sp, #36] ; 0x24
|
|
800e2e0: e76d b.n 800e1be <_svfiprintf_r+0x4a>
|
|
800e2e2: fb05 3202 mla r2, r5, r2, r3
|
|
800e2e6: 2001 movs r0, #1
|
|
800e2e8: 460f mov r7, r1
|
|
800e2ea: e7a6 b.n 800e23a <_svfiprintf_r+0xc6>
|
|
800e2ec: 2300 movs r3, #0
|
|
800e2ee: 3701 adds r7, #1
|
|
800e2f0: 9305 str r3, [sp, #20]
|
|
800e2f2: 4619 mov r1, r3
|
|
800e2f4: 250a movs r5, #10
|
|
800e2f6: 4638 mov r0, r7
|
|
800e2f8: f810 2b01 ldrb.w r2, [r0], #1
|
|
800e2fc: 3a30 subs r2, #48 ; 0x30
|
|
800e2fe: 2a09 cmp r2, #9
|
|
800e300: d903 bls.n 800e30a <_svfiprintf_r+0x196>
|
|
800e302: 2b00 cmp r3, #0
|
|
800e304: d0c8 beq.n 800e298 <_svfiprintf_r+0x124>
|
|
800e306: 9105 str r1, [sp, #20]
|
|
800e308: e7c6 b.n 800e298 <_svfiprintf_r+0x124>
|
|
800e30a: fb05 2101 mla r1, r5, r1, r2
|
|
800e30e: 2301 movs r3, #1
|
|
800e310: 4607 mov r7, r0
|
|
800e312: e7f0 b.n 800e2f6 <_svfiprintf_r+0x182>
|
|
800e314: ab03 add r3, sp, #12
|
|
800e316: 9300 str r3, [sp, #0]
|
|
800e318: 4622 mov r2, r4
|
|
800e31a: 4b11 ldr r3, [pc, #68] ; (800e360 <_svfiprintf_r+0x1ec>)
|
|
800e31c: a904 add r1, sp, #16
|
|
800e31e: 4640 mov r0, r8
|
|
800e320: f7fc f97a bl 800a618 <_printf_float>
|
|
800e324: f1b0 3fff cmp.w r0, #4294967295
|
|
800e328: 4681 mov r9, r0
|
|
800e32a: d1d6 bne.n 800e2da <_svfiprintf_r+0x166>
|
|
800e32c: 89a3 ldrh r3, [r4, #12]
|
|
800e32e: 065b lsls r3, r3, #25
|
|
800e330: f53f af35 bmi.w 800e19e <_svfiprintf_r+0x2a>
|
|
800e334: 9809 ldr r0, [sp, #36] ; 0x24
|
|
800e336: b01d add sp, #116 ; 0x74
|
|
800e338: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800e33c: ab03 add r3, sp, #12
|
|
800e33e: 9300 str r3, [sp, #0]
|
|
800e340: 4622 mov r2, r4
|
|
800e342: 4b07 ldr r3, [pc, #28] ; (800e360 <_svfiprintf_r+0x1ec>)
|
|
800e344: a904 add r1, sp, #16
|
|
800e346: 4640 mov r0, r8
|
|
800e348: f7fc fc1c bl 800ab84 <_printf_i>
|
|
800e34c: e7ea b.n 800e324 <_svfiprintf_r+0x1b0>
|
|
800e34e: bf00 nop
|
|
800e350: 0800eb44 .word 0x0800eb44
|
|
800e354: 0800eb4a .word 0x0800eb4a
|
|
800e358: 0800eb4e .word 0x0800eb4e
|
|
800e35c: 0800a619 .word 0x0800a619
|
|
800e360: 0800e0bf .word 0x0800e0bf
|
|
|
|
0800e364 <__sfputc_r>:
|
|
800e364: 6893 ldr r3, [r2, #8]
|
|
800e366: 3b01 subs r3, #1
|
|
800e368: 2b00 cmp r3, #0
|
|
800e36a: b410 push {r4}
|
|
800e36c: 6093 str r3, [r2, #8]
|
|
800e36e: da08 bge.n 800e382 <__sfputc_r+0x1e>
|
|
800e370: 6994 ldr r4, [r2, #24]
|
|
800e372: 42a3 cmp r3, r4
|
|
800e374: db01 blt.n 800e37a <__sfputc_r+0x16>
|
|
800e376: 290a cmp r1, #10
|
|
800e378: d103 bne.n 800e382 <__sfputc_r+0x1e>
|
|
800e37a: f85d 4b04 ldr.w r4, [sp], #4
|
|
800e37e: f7fd be55 b.w 800c02c <__swbuf_r>
|
|
800e382: 6813 ldr r3, [r2, #0]
|
|
800e384: 1c58 adds r0, r3, #1
|
|
800e386: 6010 str r0, [r2, #0]
|
|
800e388: 7019 strb r1, [r3, #0]
|
|
800e38a: 4608 mov r0, r1
|
|
800e38c: f85d 4b04 ldr.w r4, [sp], #4
|
|
800e390: 4770 bx lr
|
|
|
|
0800e392 <__sfputs_r>:
|
|
800e392: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800e394: 4606 mov r6, r0
|
|
800e396: 460f mov r7, r1
|
|
800e398: 4614 mov r4, r2
|
|
800e39a: 18d5 adds r5, r2, r3
|
|
800e39c: 42ac cmp r4, r5
|
|
800e39e: d101 bne.n 800e3a4 <__sfputs_r+0x12>
|
|
800e3a0: 2000 movs r0, #0
|
|
800e3a2: e007 b.n 800e3b4 <__sfputs_r+0x22>
|
|
800e3a4: 463a mov r2, r7
|
|
800e3a6: f814 1b01 ldrb.w r1, [r4], #1
|
|
800e3aa: 4630 mov r0, r6
|
|
800e3ac: f7ff ffda bl 800e364 <__sfputc_r>
|
|
800e3b0: 1c43 adds r3, r0, #1
|
|
800e3b2: d1f3 bne.n 800e39c <__sfputs_r+0xa>
|
|
800e3b4: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
...
|
|
|
|
0800e3b8 <_vfiprintf_r>:
|
|
800e3b8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
|
|
800e3bc: 460c mov r4, r1
|
|
800e3be: b09d sub sp, #116 ; 0x74
|
|
800e3c0: 4617 mov r7, r2
|
|
800e3c2: 461d mov r5, r3
|
|
800e3c4: 4606 mov r6, r0
|
|
800e3c6: b118 cbz r0, 800e3d0 <_vfiprintf_r+0x18>
|
|
800e3c8: 6983 ldr r3, [r0, #24]
|
|
800e3ca: b90b cbnz r3, 800e3d0 <_vfiprintf_r+0x18>
|
|
800e3cc: f7fe fe24 bl 800d018 <__sinit>
|
|
800e3d0: 4b7c ldr r3, [pc, #496] ; (800e5c4 <_vfiprintf_r+0x20c>)
|
|
800e3d2: 429c cmp r4, r3
|
|
800e3d4: d158 bne.n 800e488 <_vfiprintf_r+0xd0>
|
|
800e3d6: 6874 ldr r4, [r6, #4]
|
|
800e3d8: 89a3 ldrh r3, [r4, #12]
|
|
800e3da: 0718 lsls r0, r3, #28
|
|
800e3dc: d55e bpl.n 800e49c <_vfiprintf_r+0xe4>
|
|
800e3de: 6923 ldr r3, [r4, #16]
|
|
800e3e0: 2b00 cmp r3, #0
|
|
800e3e2: d05b beq.n 800e49c <_vfiprintf_r+0xe4>
|
|
800e3e4: 2300 movs r3, #0
|
|
800e3e6: 9309 str r3, [sp, #36] ; 0x24
|
|
800e3e8: 2320 movs r3, #32
|
|
800e3ea: f88d 3029 strb.w r3, [sp, #41] ; 0x29
|
|
800e3ee: 2330 movs r3, #48 ; 0x30
|
|
800e3f0: f88d 302a strb.w r3, [sp, #42] ; 0x2a
|
|
800e3f4: 9503 str r5, [sp, #12]
|
|
800e3f6: f04f 0b01 mov.w fp, #1
|
|
800e3fa: 46b8 mov r8, r7
|
|
800e3fc: 4645 mov r5, r8
|
|
800e3fe: f815 3b01 ldrb.w r3, [r5], #1
|
|
800e402: b10b cbz r3, 800e408 <_vfiprintf_r+0x50>
|
|
800e404: 2b25 cmp r3, #37 ; 0x25
|
|
800e406: d154 bne.n 800e4b2 <_vfiprintf_r+0xfa>
|
|
800e408: ebb8 0a07 subs.w sl, r8, r7
|
|
800e40c: d00b beq.n 800e426 <_vfiprintf_r+0x6e>
|
|
800e40e: 4653 mov r3, sl
|
|
800e410: 463a mov r2, r7
|
|
800e412: 4621 mov r1, r4
|
|
800e414: 4630 mov r0, r6
|
|
800e416: f7ff ffbc bl 800e392 <__sfputs_r>
|
|
800e41a: 3001 adds r0, #1
|
|
800e41c: f000 80c2 beq.w 800e5a4 <_vfiprintf_r+0x1ec>
|
|
800e420: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800e422: 4453 add r3, sl
|
|
800e424: 9309 str r3, [sp, #36] ; 0x24
|
|
800e426: f898 3000 ldrb.w r3, [r8]
|
|
800e42a: 2b00 cmp r3, #0
|
|
800e42c: f000 80ba beq.w 800e5a4 <_vfiprintf_r+0x1ec>
|
|
800e430: 2300 movs r3, #0
|
|
800e432: f04f 32ff mov.w r2, #4294967295
|
|
800e436: e9cd 2305 strd r2, r3, [sp, #20]
|
|
800e43a: 9304 str r3, [sp, #16]
|
|
800e43c: 9307 str r3, [sp, #28]
|
|
800e43e: f88d 3053 strb.w r3, [sp, #83] ; 0x53
|
|
800e442: 931a str r3, [sp, #104] ; 0x68
|
|
800e444: 46a8 mov r8, r5
|
|
800e446: 2205 movs r2, #5
|
|
800e448: f818 1b01 ldrb.w r1, [r8], #1
|
|
800e44c: 485e ldr r0, [pc, #376] ; (800e5c8 <_vfiprintf_r+0x210>)
|
|
800e44e: f7f1 fecf bl 80001f0 <memchr>
|
|
800e452: 9b04 ldr r3, [sp, #16]
|
|
800e454: bb78 cbnz r0, 800e4b6 <_vfiprintf_r+0xfe>
|
|
800e456: 06d9 lsls r1, r3, #27
|
|
800e458: bf44 itt mi
|
|
800e45a: 2220 movmi r2, #32
|
|
800e45c: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
|
|
800e460: 071a lsls r2, r3, #28
|
|
800e462: bf44 itt mi
|
|
800e464: 222b movmi r2, #43 ; 0x2b
|
|
800e466: f88d 2053 strbmi.w r2, [sp, #83] ; 0x53
|
|
800e46a: 782a ldrb r2, [r5, #0]
|
|
800e46c: 2a2a cmp r2, #42 ; 0x2a
|
|
800e46e: d02a beq.n 800e4c6 <_vfiprintf_r+0x10e>
|
|
800e470: 9a07 ldr r2, [sp, #28]
|
|
800e472: 46a8 mov r8, r5
|
|
800e474: 2000 movs r0, #0
|
|
800e476: 250a movs r5, #10
|
|
800e478: 4641 mov r1, r8
|
|
800e47a: f811 3b01 ldrb.w r3, [r1], #1
|
|
800e47e: 3b30 subs r3, #48 ; 0x30
|
|
800e480: 2b09 cmp r3, #9
|
|
800e482: d969 bls.n 800e558 <_vfiprintf_r+0x1a0>
|
|
800e484: b360 cbz r0, 800e4e0 <_vfiprintf_r+0x128>
|
|
800e486: e024 b.n 800e4d2 <_vfiprintf_r+0x11a>
|
|
800e488: 4b50 ldr r3, [pc, #320] ; (800e5cc <_vfiprintf_r+0x214>)
|
|
800e48a: 429c cmp r4, r3
|
|
800e48c: d101 bne.n 800e492 <_vfiprintf_r+0xda>
|
|
800e48e: 68b4 ldr r4, [r6, #8]
|
|
800e490: e7a2 b.n 800e3d8 <_vfiprintf_r+0x20>
|
|
800e492: 4b4f ldr r3, [pc, #316] ; (800e5d0 <_vfiprintf_r+0x218>)
|
|
800e494: 429c cmp r4, r3
|
|
800e496: bf08 it eq
|
|
800e498: 68f4 ldreq r4, [r6, #12]
|
|
800e49a: e79d b.n 800e3d8 <_vfiprintf_r+0x20>
|
|
800e49c: 4621 mov r1, r4
|
|
800e49e: 4630 mov r0, r6
|
|
800e4a0: f7fd fe16 bl 800c0d0 <__swsetup_r>
|
|
800e4a4: 2800 cmp r0, #0
|
|
800e4a6: d09d beq.n 800e3e4 <_vfiprintf_r+0x2c>
|
|
800e4a8: f04f 30ff mov.w r0, #4294967295
|
|
800e4ac: b01d add sp, #116 ; 0x74
|
|
800e4ae: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
|
|
800e4b2: 46a8 mov r8, r5
|
|
800e4b4: e7a2 b.n 800e3fc <_vfiprintf_r+0x44>
|
|
800e4b6: 4a44 ldr r2, [pc, #272] ; (800e5c8 <_vfiprintf_r+0x210>)
|
|
800e4b8: 1a80 subs r0, r0, r2
|
|
800e4ba: fa0b f000 lsl.w r0, fp, r0
|
|
800e4be: 4318 orrs r0, r3
|
|
800e4c0: 9004 str r0, [sp, #16]
|
|
800e4c2: 4645 mov r5, r8
|
|
800e4c4: e7be b.n 800e444 <_vfiprintf_r+0x8c>
|
|
800e4c6: 9a03 ldr r2, [sp, #12]
|
|
800e4c8: 1d11 adds r1, r2, #4
|
|
800e4ca: 6812 ldr r2, [r2, #0]
|
|
800e4cc: 9103 str r1, [sp, #12]
|
|
800e4ce: 2a00 cmp r2, #0
|
|
800e4d0: db01 blt.n 800e4d6 <_vfiprintf_r+0x11e>
|
|
800e4d2: 9207 str r2, [sp, #28]
|
|
800e4d4: e004 b.n 800e4e0 <_vfiprintf_r+0x128>
|
|
800e4d6: 4252 negs r2, r2
|
|
800e4d8: f043 0302 orr.w r3, r3, #2
|
|
800e4dc: 9207 str r2, [sp, #28]
|
|
800e4de: 9304 str r3, [sp, #16]
|
|
800e4e0: f898 3000 ldrb.w r3, [r8]
|
|
800e4e4: 2b2e cmp r3, #46 ; 0x2e
|
|
800e4e6: d10e bne.n 800e506 <_vfiprintf_r+0x14e>
|
|
800e4e8: f898 3001 ldrb.w r3, [r8, #1]
|
|
800e4ec: 2b2a cmp r3, #42 ; 0x2a
|
|
800e4ee: d138 bne.n 800e562 <_vfiprintf_r+0x1aa>
|
|
800e4f0: 9b03 ldr r3, [sp, #12]
|
|
800e4f2: 1d1a adds r2, r3, #4
|
|
800e4f4: 681b ldr r3, [r3, #0]
|
|
800e4f6: 9203 str r2, [sp, #12]
|
|
800e4f8: 2b00 cmp r3, #0
|
|
800e4fa: bfb8 it lt
|
|
800e4fc: f04f 33ff movlt.w r3, #4294967295
|
|
800e500: f108 0802 add.w r8, r8, #2
|
|
800e504: 9305 str r3, [sp, #20]
|
|
800e506: 4d33 ldr r5, [pc, #204] ; (800e5d4 <_vfiprintf_r+0x21c>)
|
|
800e508: f898 1000 ldrb.w r1, [r8]
|
|
800e50c: 2203 movs r2, #3
|
|
800e50e: 4628 mov r0, r5
|
|
800e510: f7f1 fe6e bl 80001f0 <memchr>
|
|
800e514: b140 cbz r0, 800e528 <_vfiprintf_r+0x170>
|
|
800e516: 2340 movs r3, #64 ; 0x40
|
|
800e518: 1b40 subs r0, r0, r5
|
|
800e51a: fa03 f000 lsl.w r0, r3, r0
|
|
800e51e: 9b04 ldr r3, [sp, #16]
|
|
800e520: 4303 orrs r3, r0
|
|
800e522: f108 0801 add.w r8, r8, #1
|
|
800e526: 9304 str r3, [sp, #16]
|
|
800e528: f898 1000 ldrb.w r1, [r8]
|
|
800e52c: 482a ldr r0, [pc, #168] ; (800e5d8 <_vfiprintf_r+0x220>)
|
|
800e52e: f88d 1028 strb.w r1, [sp, #40] ; 0x28
|
|
800e532: 2206 movs r2, #6
|
|
800e534: f108 0701 add.w r7, r8, #1
|
|
800e538: f7f1 fe5a bl 80001f0 <memchr>
|
|
800e53c: 2800 cmp r0, #0
|
|
800e53e: d037 beq.n 800e5b0 <_vfiprintf_r+0x1f8>
|
|
800e540: 4b26 ldr r3, [pc, #152] ; (800e5dc <_vfiprintf_r+0x224>)
|
|
800e542: bb1b cbnz r3, 800e58c <_vfiprintf_r+0x1d4>
|
|
800e544: 9b03 ldr r3, [sp, #12]
|
|
800e546: 3307 adds r3, #7
|
|
800e548: f023 0307 bic.w r3, r3, #7
|
|
800e54c: 3308 adds r3, #8
|
|
800e54e: 9303 str r3, [sp, #12]
|
|
800e550: 9b09 ldr r3, [sp, #36] ; 0x24
|
|
800e552: 444b add r3, r9
|
|
800e554: 9309 str r3, [sp, #36] ; 0x24
|
|
800e556: e750 b.n 800e3fa <_vfiprintf_r+0x42>
|
|
800e558: fb05 3202 mla r2, r5, r2, r3
|
|
800e55c: 2001 movs r0, #1
|
|
800e55e: 4688 mov r8, r1
|
|
800e560: e78a b.n 800e478 <_vfiprintf_r+0xc0>
|
|
800e562: 2300 movs r3, #0
|
|
800e564: f108 0801 add.w r8, r8, #1
|
|
800e568: 9305 str r3, [sp, #20]
|
|
800e56a: 4619 mov r1, r3
|
|
800e56c: 250a movs r5, #10
|
|
800e56e: 4640 mov r0, r8
|
|
800e570: f810 2b01 ldrb.w r2, [r0], #1
|
|
800e574: 3a30 subs r2, #48 ; 0x30
|
|
800e576: 2a09 cmp r2, #9
|
|
800e578: d903 bls.n 800e582 <_vfiprintf_r+0x1ca>
|
|
800e57a: 2b00 cmp r3, #0
|
|
800e57c: d0c3 beq.n 800e506 <_vfiprintf_r+0x14e>
|
|
800e57e: 9105 str r1, [sp, #20]
|
|
800e580: e7c1 b.n 800e506 <_vfiprintf_r+0x14e>
|
|
800e582: fb05 2101 mla r1, r5, r1, r2
|
|
800e586: 2301 movs r3, #1
|
|
800e588: 4680 mov r8, r0
|
|
800e58a: e7f0 b.n 800e56e <_vfiprintf_r+0x1b6>
|
|
800e58c: ab03 add r3, sp, #12
|
|
800e58e: 9300 str r3, [sp, #0]
|
|
800e590: 4622 mov r2, r4
|
|
800e592: 4b13 ldr r3, [pc, #76] ; (800e5e0 <_vfiprintf_r+0x228>)
|
|
800e594: a904 add r1, sp, #16
|
|
800e596: 4630 mov r0, r6
|
|
800e598: f7fc f83e bl 800a618 <_printf_float>
|
|
800e59c: f1b0 3fff cmp.w r0, #4294967295
|
|
800e5a0: 4681 mov r9, r0
|
|
800e5a2: d1d5 bne.n 800e550 <_vfiprintf_r+0x198>
|
|
800e5a4: 89a3 ldrh r3, [r4, #12]
|
|
800e5a6: 065b lsls r3, r3, #25
|
|
800e5a8: f53f af7e bmi.w 800e4a8 <_vfiprintf_r+0xf0>
|
|
800e5ac: 9809 ldr r0, [sp, #36] ; 0x24
|
|
800e5ae: e77d b.n 800e4ac <_vfiprintf_r+0xf4>
|
|
800e5b0: ab03 add r3, sp, #12
|
|
800e5b2: 9300 str r3, [sp, #0]
|
|
800e5b4: 4622 mov r2, r4
|
|
800e5b6: 4b0a ldr r3, [pc, #40] ; (800e5e0 <_vfiprintf_r+0x228>)
|
|
800e5b8: a904 add r1, sp, #16
|
|
800e5ba: 4630 mov r0, r6
|
|
800e5bc: f7fc fae2 bl 800ab84 <_printf_i>
|
|
800e5c0: e7ec b.n 800e59c <_vfiprintf_r+0x1e4>
|
|
800e5c2: bf00 nop
|
|
800e5c4: 0800e9f8 .word 0x0800e9f8
|
|
800e5c8: 0800eb44 .word 0x0800eb44
|
|
800e5cc: 0800ea18 .word 0x0800ea18
|
|
800e5d0: 0800e9d8 .word 0x0800e9d8
|
|
800e5d4: 0800eb4a .word 0x0800eb4a
|
|
800e5d8: 0800eb4e .word 0x0800eb4e
|
|
800e5dc: 0800a619 .word 0x0800a619
|
|
800e5e0: 0800e393 .word 0x0800e393
|
|
|
|
0800e5e4 <__sread>:
|
|
800e5e4: b510 push {r4, lr}
|
|
800e5e6: 460c mov r4, r1
|
|
800e5e8: f9b1 100e ldrsh.w r1, [r1, #14]
|
|
800e5ec: f000 f8f2 bl 800e7d4 <_read_r>
|
|
800e5f0: 2800 cmp r0, #0
|
|
800e5f2: bfab itete ge
|
|
800e5f4: 6d63 ldrge r3, [r4, #84] ; 0x54
|
|
800e5f6: 89a3 ldrhlt r3, [r4, #12]
|
|
800e5f8: 181b addge r3, r3, r0
|
|
800e5fa: f423 5380 biclt.w r3, r3, #4096 ; 0x1000
|
|
800e5fe: bfac ite ge
|
|
800e600: 6563 strge r3, [r4, #84] ; 0x54
|
|
800e602: 81a3 strhlt r3, [r4, #12]
|
|
800e604: bd10 pop {r4, pc}
|
|
|
|
0800e606 <__swrite>:
|
|
800e606: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
|
800e60a: 461f mov r7, r3
|
|
800e60c: 898b ldrh r3, [r1, #12]
|
|
800e60e: 05db lsls r3, r3, #23
|
|
800e610: 4605 mov r5, r0
|
|
800e612: 460c mov r4, r1
|
|
800e614: 4616 mov r6, r2
|
|
800e616: d505 bpl.n 800e624 <__swrite+0x1e>
|
|
800e618: 2302 movs r3, #2
|
|
800e61a: 2200 movs r2, #0
|
|
800e61c: f9b1 100e ldrsh.w r1, [r1, #14]
|
|
800e620: f000 f886 bl 800e730 <_lseek_r>
|
|
800e624: 89a3 ldrh r3, [r4, #12]
|
|
800e626: f9b4 100e ldrsh.w r1, [r4, #14]
|
|
800e62a: f423 5380 bic.w r3, r3, #4096 ; 0x1000
|
|
800e62e: 81a3 strh r3, [r4, #12]
|
|
800e630: 4632 mov r2, r6
|
|
800e632: 463b mov r3, r7
|
|
800e634: 4628 mov r0, r5
|
|
800e636: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
|
|
800e63a: f000 b835 b.w 800e6a8 <_write_r>
|
|
|
|
0800e63e <__sseek>:
|
|
800e63e: b510 push {r4, lr}
|
|
800e640: 460c mov r4, r1
|
|
800e642: f9b1 100e ldrsh.w r1, [r1, #14]
|
|
800e646: f000 f873 bl 800e730 <_lseek_r>
|
|
800e64a: 1c43 adds r3, r0, #1
|
|
800e64c: 89a3 ldrh r3, [r4, #12]
|
|
800e64e: bf15 itete ne
|
|
800e650: 6560 strne r0, [r4, #84] ; 0x54
|
|
800e652: f423 5380 biceq.w r3, r3, #4096 ; 0x1000
|
|
800e656: f443 5380 orrne.w r3, r3, #4096 ; 0x1000
|
|
800e65a: 81a3 strheq r3, [r4, #12]
|
|
800e65c: bf18 it ne
|
|
800e65e: 81a3 strhne r3, [r4, #12]
|
|
800e660: bd10 pop {r4, pc}
|
|
|
|
0800e662 <__sclose>:
|
|
800e662: f9b1 100e ldrsh.w r1, [r1, #14]
|
|
800e666: f000 b831 b.w 800e6cc <_close_r>
|
|
|
|
0800e66a <strncmp>:
|
|
800e66a: b510 push {r4, lr}
|
|
800e66c: b16a cbz r2, 800e68a <strncmp+0x20>
|
|
800e66e: 3901 subs r1, #1
|
|
800e670: 1884 adds r4, r0, r2
|
|
800e672: f810 3b01 ldrb.w r3, [r0], #1
|
|
800e676: f811 2f01 ldrb.w r2, [r1, #1]!
|
|
800e67a: 4293 cmp r3, r2
|
|
800e67c: d103 bne.n 800e686 <strncmp+0x1c>
|
|
800e67e: 42a0 cmp r0, r4
|
|
800e680: d001 beq.n 800e686 <strncmp+0x1c>
|
|
800e682: 2b00 cmp r3, #0
|
|
800e684: d1f5 bne.n 800e672 <strncmp+0x8>
|
|
800e686: 1a98 subs r0, r3, r2
|
|
800e688: bd10 pop {r4, pc}
|
|
800e68a: 4610 mov r0, r2
|
|
800e68c: e7fc b.n 800e688 <strncmp+0x1e>
|
|
|
|
0800e68e <__ascii_wctomb>:
|
|
800e68e: b149 cbz r1, 800e6a4 <__ascii_wctomb+0x16>
|
|
800e690: 2aff cmp r2, #255 ; 0xff
|
|
800e692: bf85 ittet hi
|
|
800e694: 238a movhi r3, #138 ; 0x8a
|
|
800e696: 6003 strhi r3, [r0, #0]
|
|
800e698: 700a strbls r2, [r1, #0]
|
|
800e69a: f04f 30ff movhi.w r0, #4294967295
|
|
800e69e: bf98 it ls
|
|
800e6a0: 2001 movls r0, #1
|
|
800e6a2: 4770 bx lr
|
|
800e6a4: 4608 mov r0, r1
|
|
800e6a6: 4770 bx lr
|
|
|
|
0800e6a8 <_write_r>:
|
|
800e6a8: b538 push {r3, r4, r5, lr}
|
|
800e6aa: 4c07 ldr r4, [pc, #28] ; (800e6c8 <_write_r+0x20>)
|
|
800e6ac: 4605 mov r5, r0
|
|
800e6ae: 4608 mov r0, r1
|
|
800e6b0: 4611 mov r1, r2
|
|
800e6b2: 2200 movs r2, #0
|
|
800e6b4: 6022 str r2, [r4, #0]
|
|
800e6b6: 461a mov r2, r3
|
|
800e6b8: f7f3 fa01 bl 8001abe <_write>
|
|
800e6bc: 1c43 adds r3, r0, #1
|
|
800e6be: d102 bne.n 800e6c6 <_write_r+0x1e>
|
|
800e6c0: 6823 ldr r3, [r4, #0]
|
|
800e6c2: b103 cbz r3, 800e6c6 <_write_r+0x1e>
|
|
800e6c4: 602b str r3, [r5, #0]
|
|
800e6c6: bd38 pop {r3, r4, r5, pc}
|
|
800e6c8: 20000ab0 .word 0x20000ab0
|
|
|
|
0800e6cc <_close_r>:
|
|
800e6cc: b538 push {r3, r4, r5, lr}
|
|
800e6ce: 4c06 ldr r4, [pc, #24] ; (800e6e8 <_close_r+0x1c>)
|
|
800e6d0: 2300 movs r3, #0
|
|
800e6d2: 4605 mov r5, r0
|
|
800e6d4: 4608 mov r0, r1
|
|
800e6d6: 6023 str r3, [r4, #0]
|
|
800e6d8: f7f3 fa0d bl 8001af6 <_close>
|
|
800e6dc: 1c43 adds r3, r0, #1
|
|
800e6de: d102 bne.n 800e6e6 <_close_r+0x1a>
|
|
800e6e0: 6823 ldr r3, [r4, #0]
|
|
800e6e2: b103 cbz r3, 800e6e6 <_close_r+0x1a>
|
|
800e6e4: 602b str r3, [r5, #0]
|
|
800e6e6: bd38 pop {r3, r4, r5, pc}
|
|
800e6e8: 20000ab0 .word 0x20000ab0
|
|
|
|
0800e6ec <_fstat_r>:
|
|
800e6ec: b538 push {r3, r4, r5, lr}
|
|
800e6ee: 4c07 ldr r4, [pc, #28] ; (800e70c <_fstat_r+0x20>)
|
|
800e6f0: 2300 movs r3, #0
|
|
800e6f2: 4605 mov r5, r0
|
|
800e6f4: 4608 mov r0, r1
|
|
800e6f6: 4611 mov r1, r2
|
|
800e6f8: 6023 str r3, [r4, #0]
|
|
800e6fa: f7f3 fa08 bl 8001b0e <_fstat>
|
|
800e6fe: 1c43 adds r3, r0, #1
|
|
800e700: d102 bne.n 800e708 <_fstat_r+0x1c>
|
|
800e702: 6823 ldr r3, [r4, #0]
|
|
800e704: b103 cbz r3, 800e708 <_fstat_r+0x1c>
|
|
800e706: 602b str r3, [r5, #0]
|
|
800e708: bd38 pop {r3, r4, r5, pc}
|
|
800e70a: bf00 nop
|
|
800e70c: 20000ab0 .word 0x20000ab0
|
|
|
|
0800e710 <_isatty_r>:
|
|
800e710: b538 push {r3, r4, r5, lr}
|
|
800e712: 4c06 ldr r4, [pc, #24] ; (800e72c <_isatty_r+0x1c>)
|
|
800e714: 2300 movs r3, #0
|
|
800e716: 4605 mov r5, r0
|
|
800e718: 4608 mov r0, r1
|
|
800e71a: 6023 str r3, [r4, #0]
|
|
800e71c: f7f3 fa07 bl 8001b2e <_isatty>
|
|
800e720: 1c43 adds r3, r0, #1
|
|
800e722: d102 bne.n 800e72a <_isatty_r+0x1a>
|
|
800e724: 6823 ldr r3, [r4, #0]
|
|
800e726: b103 cbz r3, 800e72a <_isatty_r+0x1a>
|
|
800e728: 602b str r3, [r5, #0]
|
|
800e72a: bd38 pop {r3, r4, r5, pc}
|
|
800e72c: 20000ab0 .word 0x20000ab0
|
|
|
|
0800e730 <_lseek_r>:
|
|
800e730: b538 push {r3, r4, r5, lr}
|
|
800e732: 4c07 ldr r4, [pc, #28] ; (800e750 <_lseek_r+0x20>)
|
|
800e734: 4605 mov r5, r0
|
|
800e736: 4608 mov r0, r1
|
|
800e738: 4611 mov r1, r2
|
|
800e73a: 2200 movs r2, #0
|
|
800e73c: 6022 str r2, [r4, #0]
|
|
800e73e: 461a mov r2, r3
|
|
800e740: f7f3 fa00 bl 8001b44 <_lseek>
|
|
800e744: 1c43 adds r3, r0, #1
|
|
800e746: d102 bne.n 800e74e <_lseek_r+0x1e>
|
|
800e748: 6823 ldr r3, [r4, #0]
|
|
800e74a: b103 cbz r3, 800e74e <_lseek_r+0x1e>
|
|
800e74c: 602b str r3, [r5, #0]
|
|
800e74e: bd38 pop {r3, r4, r5, pc}
|
|
800e750: 20000ab0 .word 0x20000ab0
|
|
|
|
0800e754 <memmove>:
|
|
800e754: 4288 cmp r0, r1
|
|
800e756: b510 push {r4, lr}
|
|
800e758: eb01 0302 add.w r3, r1, r2
|
|
800e75c: d807 bhi.n 800e76e <memmove+0x1a>
|
|
800e75e: 1e42 subs r2, r0, #1
|
|
800e760: 4299 cmp r1, r3
|
|
800e762: d00a beq.n 800e77a <memmove+0x26>
|
|
800e764: f811 4b01 ldrb.w r4, [r1], #1
|
|
800e768: f802 4f01 strb.w r4, [r2, #1]!
|
|
800e76c: e7f8 b.n 800e760 <memmove+0xc>
|
|
800e76e: 4283 cmp r3, r0
|
|
800e770: d9f5 bls.n 800e75e <memmove+0xa>
|
|
800e772: 1881 adds r1, r0, r2
|
|
800e774: 1ad2 subs r2, r2, r3
|
|
800e776: 42d3 cmn r3, r2
|
|
800e778: d100 bne.n 800e77c <memmove+0x28>
|
|
800e77a: bd10 pop {r4, pc}
|
|
800e77c: f813 4d01 ldrb.w r4, [r3, #-1]!
|
|
800e780: f801 4d01 strb.w r4, [r1, #-1]!
|
|
800e784: e7f7 b.n 800e776 <memmove+0x22>
|
|
|
|
0800e786 <_realloc_r>:
|
|
800e786: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800e788: 4607 mov r7, r0
|
|
800e78a: 4614 mov r4, r2
|
|
800e78c: 460e mov r6, r1
|
|
800e78e: b921 cbnz r1, 800e79a <_realloc_r+0x14>
|
|
800e790: 4611 mov r1, r2
|
|
800e792: e8bd 40f8 ldmia.w sp!, {r3, r4, r5, r6, r7, lr}
|
|
800e796: f7fb be51 b.w 800a43c <_malloc_r>
|
|
800e79a: b922 cbnz r2, 800e7a6 <_realloc_r+0x20>
|
|
800e79c: f7fb fe00 bl 800a3a0 <_free_r>
|
|
800e7a0: 4625 mov r5, r4
|
|
800e7a2: 4628 mov r0, r5
|
|
800e7a4: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
800e7a6: f000 f827 bl 800e7f8 <_malloc_usable_size_r>
|
|
800e7aa: 42a0 cmp r0, r4
|
|
800e7ac: d20f bcs.n 800e7ce <_realloc_r+0x48>
|
|
800e7ae: 4621 mov r1, r4
|
|
800e7b0: 4638 mov r0, r7
|
|
800e7b2: f7fb fe43 bl 800a43c <_malloc_r>
|
|
800e7b6: 4605 mov r5, r0
|
|
800e7b8: 2800 cmp r0, #0
|
|
800e7ba: d0f2 beq.n 800e7a2 <_realloc_r+0x1c>
|
|
800e7bc: 4631 mov r1, r6
|
|
800e7be: 4622 mov r2, r4
|
|
800e7c0: f7ff f864 bl 800d88c <memcpy>
|
|
800e7c4: 4631 mov r1, r6
|
|
800e7c6: 4638 mov r0, r7
|
|
800e7c8: f7fb fdea bl 800a3a0 <_free_r>
|
|
800e7cc: e7e9 b.n 800e7a2 <_realloc_r+0x1c>
|
|
800e7ce: 4635 mov r5, r6
|
|
800e7d0: e7e7 b.n 800e7a2 <_realloc_r+0x1c>
|
|
...
|
|
|
|
0800e7d4 <_read_r>:
|
|
800e7d4: b538 push {r3, r4, r5, lr}
|
|
800e7d6: 4c07 ldr r4, [pc, #28] ; (800e7f4 <_read_r+0x20>)
|
|
800e7d8: 4605 mov r5, r0
|
|
800e7da: 4608 mov r0, r1
|
|
800e7dc: 4611 mov r1, r2
|
|
800e7de: 2200 movs r2, #0
|
|
800e7e0: 6022 str r2, [r4, #0]
|
|
800e7e2: 461a mov r2, r3
|
|
800e7e4: f7f3 f94e bl 8001a84 <_read>
|
|
800e7e8: 1c43 adds r3, r0, #1
|
|
800e7ea: d102 bne.n 800e7f2 <_read_r+0x1e>
|
|
800e7ec: 6823 ldr r3, [r4, #0]
|
|
800e7ee: b103 cbz r3, 800e7f2 <_read_r+0x1e>
|
|
800e7f0: 602b str r3, [r5, #0]
|
|
800e7f2: bd38 pop {r3, r4, r5, pc}
|
|
800e7f4: 20000ab0 .word 0x20000ab0
|
|
|
|
0800e7f8 <_malloc_usable_size_r>:
|
|
800e7f8: f851 3c04 ldr.w r3, [r1, #-4]
|
|
800e7fc: 1f18 subs r0, r3, #4
|
|
800e7fe: 2b00 cmp r3, #0
|
|
800e800: bfbc itt lt
|
|
800e802: 580b ldrlt r3, [r1, r0]
|
|
800e804: 18c0 addlt r0, r0, r3
|
|
800e806: 4770 bx lr
|
|
|
|
0800e808 <_init>:
|
|
800e808: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800e80a: bf00 nop
|
|
800e80c: bcf8 pop {r3, r4, r5, r6, r7}
|
|
800e80e: bc08 pop {r3}
|
|
800e810: 469e mov lr, r3
|
|
800e812: 4770 bx lr
|
|
|
|
0800e814 <_fini>:
|
|
800e814: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
800e816: bf00 nop
|
|
800e818: bcf8 pop {r3, r4, r5, r6, r7}
|
|
800e81a: bc08 pop {r3}
|
|
800e81c: 469e mov lr, r3
|
|
800e81e: 4770 bx lr
|