Th3maz1ng/W800_Smart_Watch
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base: Th3maz1ng:b7a476ddef215e6fbf17917f41985590d32ca5b1
Branches Tags
Th3maz1ng:master
Th3maz1ng:wip
Th3maz1ng:splash_screen_dev
Th3maz1ng:register_dump_BLE
..
compare: Th3maz1ng:c34d86e8aeddcf2dcae379c1f7133c008943518e
Branches Tags
Th3maz1ng:wip
Th3maz1ng:master
Th3maz1ng:splash_screen_dev
Th3maz1ng:register_dump_BLE

5 Commits
b7a476ddef ... c34d86e8ae

Author SHA1 Message Date
anschrammh
c34d86e8ae Updated the firmware version history header 2024-08-01 01:53:31 +02:00
anschrammh
45e578e444 Calling the RTC 32k oscillator calibration function every 15 minutes, may be changed to a longer interval in the future 2024-08-01 01:53:30 +02:00
anschrammh
4919b17c3c Added RTC osc calibration function : tls_pmu_32k_calibrate to try help mitigate internal RTC time drift when using the 32K OSC (while MCU sleeps) 2024-08-01 01:53:28 +02:00
anschrammh
b4c8c8c05a Corrected user area start address in flash, this space is used to save the watch's user config 2024-08-01 01:53:25 +02:00
anschrammh
e5a35b01ed Corrected bad calculated address boundaries which did not make sense with the various flash part sizes... 2024-08-01 01:53:23 +02:00
2 changed files with 2 additions and 2 deletions
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2
src/W800_SDK_v1.00.10/ld/w800/gcc_csky_bt.ld
View File

@ -25,7 +25,7 @@
* Linker script addresses modified, now the memory map is the following :
* Run Image Header (1KB) starts at 0x0801 0000
* Application Run Image starts at 0x0801 0400 and is 1,952 MB,
ends at 0x081F 83FF
* ends at 0x081F 83FF
* User Area is 15KB, starts at 0x081F 8400 and ends at 0x081F C000
******************************************************************************/
MEMORY

2
src/W800_SDK_v1.00.10/platform/drivers/pmu/wm_pmu.c
View File

@ -191,7 +191,7 @@ void tls_pmu_clk_select(u8 bypass)
/** NOT PART OF THE OFFICIAL SDK **/
bool tls_pmu_32k_calibrate(void)
{
/* To start the calibration procedure, the bit 3 needs to be set to 0 and then 1 */
/* To start the calibration procedure, the bit 3 needs to be set to 0 and then to 1 */
unsigned int pmu_ps_cr = tls_reg_read32(HR_PMU_PS_CR);
/* First make sure the bit 3 is 0 */